tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

tty: serial: qcom_geni_serial: Remove xfer_mode variable

The driver only supports FIFO mode so setting and checking this variable
is unnecessary. If DMA support is ever added then such checks can be
introduced.

Signed-off-by: Ryan Case <ryandcase@chromium.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Ryan Case and committed by
Greg Kroah-Hartman bdc05a8a a85fb9ce

+24 -43
+24 -43
drivers/tty/serial/qcom_geni_serial.c
··· 105 105 u32 tx_fifo_depth; 106 106 u32 tx_fifo_width; 107 107 u32 rx_fifo_depth; 108 - enum geni_se_xfer_mode xfer_mode; 109 108 bool setup; 110 109 int (*handle_rx)(struct uart_port *uport, u32 bytes, bool drop); 111 110 unsigned int baud; ··· 549 550 static void qcom_geni_serial_start_tx(struct uart_port *uport) 550 551 { 551 552 u32 irq_en; 552 - struct qcom_geni_serial_port *port = to_dev_port(uport, uport); 553 553 u32 status; 554 554 555 - if (port->xfer_mode == GENI_SE_FIFO) { 556 - /* 557 - * readl ensures reading & writing of IRQ_EN register 558 - * is not re-ordered before checking the status of the 559 - * Serial Engine. 560 - */ 561 - status = readl(uport->membase + SE_GENI_STATUS); 562 - if (status & M_GENI_CMD_ACTIVE) 563 - return; 555 + status = readl(uport->membase + SE_GENI_STATUS); 556 + if (status & M_GENI_CMD_ACTIVE) 557 + return; 564 558 565 - if (!qcom_geni_serial_tx_empty(uport)) 566 - return; 559 + if (!qcom_geni_serial_tx_empty(uport)) 560 + return; 567 561 568 - irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); 569 - irq_en |= M_TX_FIFO_WATERMARK_EN | M_CMD_DONE_EN; 562 + irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); 563 + irq_en |= M_TX_FIFO_WATERMARK_EN | M_CMD_DONE_EN; 570 564 571 - writel(DEF_TX_WM, uport->membase + 572 - SE_GENI_TX_WATERMARK_REG); 573 - writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN); 574 - } 565 + writel(DEF_TX_WM, uport->membase + SE_GENI_TX_WATERMARK_REG); 566 + writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN); 575 567 } 576 568 577 569 static void qcom_geni_serial_stop_tx(struct uart_port *uport) ··· 572 582 struct qcom_geni_serial_port *port = to_dev_port(uport, uport); 573 583 574 584 irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); 575 - irq_en &= ~M_CMD_DONE_EN; 576 - if (port->xfer_mode == GENI_SE_FIFO) { 577 - irq_en &= ~M_TX_FIFO_WATERMARK_EN; 578 - writel(0, uport->membase + 579 - SE_GENI_TX_WATERMARK_REG); 580 - } 585 + irq_en &= ~(M_CMD_DONE_EN | M_TX_FIFO_WATERMARK_EN); 586 + writel(0, uport->membase + SE_GENI_TX_WATERMARK_REG); 581 587 writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN); 582 588 status = readl(uport->membase + SE_GENI_STATUS); 583 589 /* Possible stop tx is called multiple times. */ ··· 603 617 604 618 geni_se_setup_s_cmd(&port->se, UART_START_READ, 0); 605 619 606 - if (port->xfer_mode == GENI_SE_FIFO) { 607 - irq_en = readl(uport->membase + SE_GENI_S_IRQ_EN); 608 - irq_en |= S_RX_FIFO_WATERMARK_EN | S_RX_FIFO_LAST_EN; 609 - writel(irq_en, uport->membase + SE_GENI_S_IRQ_EN); 620 + irq_en = readl(uport->membase + SE_GENI_S_IRQ_EN); 621 + irq_en |= S_RX_FIFO_WATERMARK_EN | S_RX_FIFO_LAST_EN; 622 + writel(irq_en, uport->membase + SE_GENI_S_IRQ_EN); 610 623 611 - irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); 612 - irq_en |= M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN; 613 - writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN); 614 - } 624 + irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); 625 + irq_en |= M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN; 626 + writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN); 615 627 } 616 628 617 629 static void qcom_geni_serial_stop_rx(struct uart_port *uport) ··· 619 635 struct qcom_geni_serial_port *port = to_dev_port(uport, uport); 620 636 u32 irq_clear = S_CMD_DONE_EN; 621 637 622 - if (port->xfer_mode == GENI_SE_FIFO) { 623 - irq_en = readl(uport->membase + SE_GENI_S_IRQ_EN); 624 - irq_en &= ~(S_RX_FIFO_WATERMARK_EN | S_RX_FIFO_LAST_EN); 625 - writel(irq_en, uport->membase + SE_GENI_S_IRQ_EN); 638 + irq_en = readl(uport->membase + SE_GENI_S_IRQ_EN); 639 + irq_en &= ~(S_RX_FIFO_WATERMARK_EN | S_RX_FIFO_LAST_EN); 640 + writel(irq_en, uport->membase + SE_GENI_S_IRQ_EN); 626 641 627 - irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); 628 - irq_en &= ~(M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN); 629 - writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN); 630 - } 642 + irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); 643 + irq_en &= ~(M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN); 644 + writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN); 631 645 632 646 status = readl(uport->membase + SE_GENI_STATUS); 633 647 /* Possible stop rx is called multiple times. */ ··· 868 886 * Make an unconditional cancel on the main sequencer to reset 869 887 * it else we could end up in data loss scenarios. 870 888 */ 871 - port->xfer_mode = GENI_SE_FIFO; 872 889 if (uart_console(uport)) 873 890 qcom_geni_serial_poll_tx_done(uport); 874 891 geni_se_config_packing(&port->se, BITS_PER_BYTE, port->tx_bytes_pw, ··· 875 894 geni_se_config_packing(&port->se, BITS_PER_BYTE, port->rx_bytes_pw, 876 895 false, false, true); 877 896 geni_se_init(&port->se, UART_RX_WM, port->rx_fifo_depth - 2); 878 - geni_se_select_mode(&port->se, port->xfer_mode); 897 + geni_se_select_mode(&port->se, GENI_SE_FIFO); 879 898 if (!uart_console(uport)) { 880 899 port->rx_fifo = devm_kcalloc(uport->dev, 881 900 port->rx_fifo_depth, sizeof(u32), GFP_KERNEL);