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linux
drm/mcde: Add device tree bindings
This adds the device tree bindings for the ST-Ericsson
Multi Channel Display Engine MCDE as found in the U8500
SoCs.
Cc: devicetree@vger.kernel.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20190416142844.12038-1-linus.walleij@linaro.org
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Documentation/devicetree/bindings/display/ste,mcde.txt
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Documentation/devicetree/bindings/display/ste,mcde.txt
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ST-Ericsson Multi Channel Display Engine MCDE
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The ST-Ericsson MCDE is a display controller with support for compositing
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and displaying several channels memory resident graphics data on DSI or
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LCD displays or bridges. It is used in the ST-Ericsson U8500 platform.
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Required properties:
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- compatible: must be:
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"ste,mcde"
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- reg: register base for the main MCDE control registers, should be
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0x1000 in size
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- interrupts: the interrupt line for the MCDE
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- epod-supply: a phandle to the EPOD regulator
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- vana-supply: a phandle to the analog voltage regulator
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- clocks: an array of the MCDE clocks in this strict order:
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MCDECLK (main MCDE clock), LCDCLK (LCD clock), PLLDSI
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(HDMI clock), DSI0ESCLK (DSI0 energy save clock),
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DSI1ESCLK (DSI1 energy save clock), DSI2ESCLK (DSI2 energy
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save clock)
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- clock-names: must be the following array:
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"mcde", "lcd", "hdmi"
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to match the required clock inputs above.
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- #address-cells: should be <1> (for the DSI hosts that will be children)
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- #size-cells: should be <1> (for the DSI hosts that will be children)
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- ranges: this should always be stated
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Required subnodes:
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The devicetree must specify subnodes for the DSI host adapters.
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These must have the following characteristics:
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- compatible: must be:
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"ste,mcde-dsi"
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- reg: must specify the register range for the DSI host
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- vana-supply: phandle to the VANA voltage regulator
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- clocks: phandles to the high speed and low power (energy save) clocks
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the high speed clock is not present on the third (dsi2) block, so it
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should only have the "lp" clock
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- clock-names: "hs" for the high speed clock and "lp" for the low power
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(energy save) clock
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- #address-cells: should be <1>
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- #size-cells: should be <0>
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Display panels and bridges will appear as children on the DSI hosts, and
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the displays are connected to the DSI hosts using the common binding
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for video transmitter interfaces; see
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Documentation/devicetree/bindings/media/video-interfaces.txt
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If a DSI host is unused (not connected) it will have no children defined.
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Example:
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mcde@a0350000 {
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compatible = "ste,mcde";
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reg = <0xa0350000 0x1000>;
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interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
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epod-supply = <&db8500_b2r2_mcde_reg>;
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vana-supply = <&ab8500_ldo_ana_reg>;
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clocks = <&prcmu_clk PRCMU_MCDECLK>, /* Main MCDE clock */
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<&prcmu_clk PRCMU_LCDCLK>, /* LCD clock */
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<&prcmu_clk PRCMU_PLLDSI>; /* HDMI clock */
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clock-names = "mcde", "lcd", "hdmi";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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dsi0: dsi@a0351000 {
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compatible = "ste,mcde-dsi";
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reg = <0xa0351000 0x1000>;
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vana-supply = <&ab8500_ldo_ana_reg>;
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clocks = <&prcmu_clk PRCMU_DSI0CLK>, <&prcmu_clk PRCMU_DSI0ESCCLK>;
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clock-names = "hs", "lp";
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#address-cells = <1>;
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#size-cells = <0>;
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panel {
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compatible = "samsung,s6d16d0";
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reg = <0>;
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vdd1-supply = <&ab8500_ldo_aux1_reg>;
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reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
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};
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};
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dsi1: dsi@a0352000 {
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compatible = "ste,mcde-dsi";
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reg = <0xa0352000 0x1000>;
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vana-supply = <&ab8500_ldo_ana_reg>;
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clocks = <&prcmu_clk PRCMU_DSI1CLK>, <&prcmu_clk PRCMU_DSI1ESCCLK>;
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clock-names = "hs", "lp";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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dsi2: dsi@a0353000 {
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compatible = "ste,mcde-dsi";
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reg = <0xa0353000 0x1000>;
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vana-supply = <&ab8500_ldo_ana_reg>;
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/* This DSI port only has the Low Power / Energy Save clock */
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clocks = <&prcmu_clk PRCMU_DSI2ESCCLK>;
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clock-names = "lp";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};