Merge master.kernel.org:/home/rmk/linux-2.6-mmc

+229 -235
+218 -223
drivers/mmc/wbsd.c
··· 93 static inline void wbsd_unlock_config(struct wbsd_host* host) 94 { 95 BUG_ON(host->config == 0); 96 - 97 outb(host->unlock_code, host->config); 98 outb(host->unlock_code, host->config); 99 } ··· 101 static inline void wbsd_lock_config(struct wbsd_host* host) 102 { 103 BUG_ON(host->config == 0); 104 - 105 outb(LOCK_CODE, host->config); 106 } 107 108 static inline void wbsd_write_config(struct wbsd_host* host, u8 reg, u8 value) 109 { 110 BUG_ON(host->config == 0); 111 - 112 outb(reg, host->config); 113 outb(value, host->config + 1); 114 } ··· 116 static inline u8 wbsd_read_config(struct wbsd_host* host, u8 reg) 117 { 118 BUG_ON(host->config == 0); 119 - 120 outb(reg, host->config); 121 return inb(host->config + 1); 122 } ··· 140 static void wbsd_init_device(struct wbsd_host* host) 141 { 142 u8 setup, ier; 143 - 144 /* 145 * Reset chip (SD/MMC part) and fifo. 146 */ 147 setup = wbsd_read_index(host, WBSD_IDX_SETUP); 148 setup |= WBSD_FIFO_RESET | WBSD_SOFT_RESET; 149 wbsd_write_index(host, WBSD_IDX_SETUP, setup); 150 - 151 /* 152 * Set DAT3 to input 153 */ 154 setup &= ~WBSD_DAT3_H; 155 wbsd_write_index(host, WBSD_IDX_SETUP, setup); 156 host->flags &= ~WBSD_FIGNORE_DETECT; 157 - 158 /* 159 * Read back default clock. 160 */ ··· 164 * Power down port. 165 */ 166 outb(WBSD_POWER_N, host->base + WBSD_CSR); 167 - 168 /* 169 * Set maximum timeout. 170 */ 171 wbsd_write_index(host, WBSD_IDX_TAAC, 0x7F); 172 - 173 /* 174 * Test for card presence 175 */ ··· 177 host->flags |= WBSD_FCARD_PRESENT; 178 else 179 host->flags &= ~WBSD_FCARD_PRESENT; 180 - 181 /* 182 * Enable interesting interrupts. 183 */ ··· 200 static void wbsd_reset(struct wbsd_host* host) 201 { 202 u8 setup; 203 - 204 printk(KERN_ERR DRIVER_NAME ": Resetting chip\n"); 205 - 206 /* 207 * Soft reset of chip (SD/MMC part). 208 */ ··· 214 static void wbsd_request_end(struct wbsd_host* host, struct mmc_request* mrq) 215 { 216 unsigned long dmaflags; 217 - 218 DBGF("Ending request, cmd (%x)\n", mrq->cmd->opcode); 219 - 220 if (host->dma >= 0) 221 { 222 /* ··· 232 */ 233 wbsd_write_index(host, WBSD_IDX_DMA, 0); 234 } 235 - 236 host->mrq = NULL; 237 238 /* ··· 275 host->offset = 0; 276 host->remain = host->cur_sg->length; 277 } 278 - 279 return host->num_sg; 280 } 281 ··· 297 struct scatterlist* sg; 298 char* dmabuf = host->dma_buffer; 299 char* sgbuf; 300 - 301 size = host->size; 302 - 303 sg = data->sg; 304 len = data->sg_len; 305 - 306 /* 307 * Just loop through all entries. Size might not 308 * be the entire list though so make sure that ··· 317 memcpy(dmabuf, sgbuf, sg[i].length); 318 kunmap_atomic(sgbuf, KM_BIO_SRC_IRQ); 319 dmabuf += sg[i].length; 320 - 321 if (size < sg[i].length) 322 size = 0; 323 else 324 size -= sg[i].length; 325 - 326 if (size == 0) 327 break; 328 } 329 - 330 /* 331 * Check that we didn't get a request to transfer 332 * more data than can fit into the SG list. 333 */ 334 - 335 BUG_ON(size != 0); 336 - 337 host->size -= size; 338 } 339 ··· 343 struct scatterlist* sg; 344 char* dmabuf = host->dma_buffer; 345 char* sgbuf; 346 - 347 size = host->size; 348 - 349 sg = data->sg; 350 len = data->sg_len; 351 - 352 /* 353 * Just loop through all entries. Size might not 354 * be the entire list though so make sure that ··· 363 memcpy(sgbuf, dmabuf, sg[i].length); 364 kunmap_atomic(sgbuf, KM_BIO_SRC_IRQ); 365 dmabuf += sg[i].length; 366 - 367 if (size < sg[i].length) 368 size = 0; 369 else 370 size -= sg[i].length; 371 - 372 if (size == 0) 373 break; 374 } 375 - 376 /* 377 * Check that we didn't get a request to transfer 378 * more data than can fit into the SG list. 379 */ 380 - 381 BUG_ON(size != 0); 382 - 383 host->size -= size; 384 } 385 386 /* 387 * Command handling 388 */ 389 - 390 static inline void wbsd_get_short_reply(struct wbsd_host* host, 391 struct mmc_command* cmd) 392 { ··· 398 cmd->error = MMC_ERR_INVALID; 399 return; 400 } 401 - 402 cmd->resp[0] = 403 wbsd_read_index(host, WBSD_IDX_RESP12) << 24; 404 cmd->resp[0] |= ··· 415 struct mmc_command* cmd) 416 { 417 int i; 418 - 419 /* 420 * Correct response type? 421 */ ··· 424 cmd->error = MMC_ERR_INVALID; 425 return; 426 } 427 - 428 for (i = 0;i < 4;i++) 429 { 430 cmd->resp[i] = ··· 442 { 443 int i; 444 u8 status, isr; 445 - 446 DBGF("Sending cmd (%x)\n", cmd->opcode); 447 448 /* ··· 451 * transfer. 452 */ 453 host->isr = 0; 454 - 455 /* 456 * Send the command (CRC calculated by host). 457 */ 458 outb(cmd->opcode, host->base + WBSD_CMDR); 459 for (i = 3;i >= 0;i--) 460 outb((cmd->arg >> (i * 8)) & 0xff, host->base + WBSD_CMDR); 461 - 462 cmd->error = MMC_ERR_NONE; 463 - 464 /* 465 * Wait for the request to complete. 466 */ ··· 477 * Read back status. 478 */ 479 isr = host->isr; 480 - 481 /* Card removed? */ 482 if (isr & WBSD_INT_CARD) 483 cmd->error = MMC_ERR_TIMEOUT; ··· 509 struct mmc_data* data = host->mrq->cmd->data; 510 char* buffer; 511 int i, fsr, fifo; 512 - 513 /* 514 * Handle excessive data. 515 */ 516 if (data->bytes_xfered == host->size) 517 return; 518 - 519 buffer = wbsd_kmap_sg(host) + host->offset; 520 521 /* ··· 527 /* 528 * The size field in the FSR is broken so we have to 529 * do some guessing. 530 - */ 531 if (fsr & WBSD_FIFO_FULL) 532 fifo = 16; 533 else if (fsr & WBSD_FIFO_FUTHRE) 534 fifo = 8; 535 else 536 fifo = 1; 537 - 538 for (i = 0;i < fifo;i++) 539 { 540 *buffer = inb(host->base + WBSD_DFR); ··· 543 host->remain--; 544 545 data->bytes_xfered++; 546 - 547 /* 548 * Transfer done? 549 */ 550 if (data->bytes_xfered == host->size) 551 { 552 - wbsd_kunmap_sg(host); 553 return; 554 } 555 - 556 /* 557 * End of scatter list entry? 558 */ 559 if (host->remain == 0) 560 { 561 wbsd_kunmap_sg(host); 562 - 563 /* 564 * Get next entry. Check if last. 565 */ ··· 572 * into the scatter list. 573 */ 574 BUG_ON(1); 575 - 576 host->size = data->bytes_xfered; 577 - 578 return; 579 } 580 - 581 buffer = wbsd_kmap_sg(host); 582 } 583 } 584 } 585 - 586 wbsd_kunmap_sg(host); 587 588 /* ··· 599 struct mmc_data* data = host->mrq->cmd->data; 600 char* buffer; 601 int i, fsr, fifo; 602 - 603 /* 604 * Check that we aren't being called after the 605 * entire buffer has been transfered. ··· 618 /* 619 * The size field in the FSR is broken so we have to 620 * do some guessing. 621 - */ 622 if (fsr & WBSD_FIFO_EMPTY) 623 fifo = 0; 624 else if (fsr & WBSD_FIFO_EMTHRE) ··· 632 buffer++; 633 host->offset++; 634 host->remain--; 635 - 636 data->bytes_xfered++; 637 - 638 /* 639 * Transfer done? 640 */ ··· 650 if (host->remain == 0) 651 { 652 wbsd_kunmap_sg(host); 653 - 654 /* 655 * Get next entry. Check if last. 656 */ ··· 663 * into the scatter list. 664 */ 665 BUG_ON(1); 666 - 667 host->size = data->bytes_xfered; 668 - 669 return; 670 } 671 - 672 buffer = wbsd_kmap_sg(host); 673 } 674 } 675 } 676 - 677 wbsd_kunmap_sg(host); 678 - 679 /* 680 * The controller stops sending interrupts for 681 * 'FIFO empty' under certain conditions. So we ··· 694 1 << data->blksz_bits, data->blocks, data->flags); 695 DBGF("tsac %d ms nsac %d clk\n", 696 data->timeout_ns / 1000000, data->timeout_clks); 697 - 698 /* 699 * Calculate size. 700 */ ··· 708 wbsd_write_index(host, WBSD_IDX_TAAC, 127); 709 else 710 wbsd_write_index(host, WBSD_IDX_TAAC, data->timeout_ns/1000000); 711 - 712 if (data->timeout_clks > 255) 713 wbsd_write_index(host, WBSD_IDX_NSAC, 255); 714 else 715 wbsd_write_index(host, WBSD_IDX_NSAC, data->timeout_clks); 716 - 717 /* 718 * Inform the chip of how large blocks will be 719 * sent. It needs this to determine when to ··· 732 else if (host->bus_width == MMC_BUS_WIDTH_4) 733 { 734 blksize = (1 << data->blksz_bits) + 2 * 4; 735 - 736 wbsd_write_index(host, WBSD_IDX_PBSMSB, ((blksize >> 4) & 0xF0) 737 | WBSD_DATA_WIDTH); 738 wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF); ··· 751 setup = wbsd_read_index(host, WBSD_IDX_SETUP); 752 setup |= WBSD_FIFO_RESET; 753 wbsd_write_index(host, WBSD_IDX_SETUP, setup); 754 - 755 /* 756 * DMA transfer? 757 */ 758 if (host->dma >= 0) 759 - { 760 /* 761 * The buffer for DMA is only 64 kB. 762 */ ··· 766 data->error = MMC_ERR_INVALID; 767 return; 768 } 769 - 770 /* 771 * Transfer data from the SG list to 772 * the DMA buffer. 773 */ 774 if (data->flags & MMC_DATA_WRITE) 775 wbsd_sg_to_dma(host, data); 776 - 777 /* 778 * Initialise the ISA DMA controller. 779 - */ 780 dmaflags = claim_dma_lock(); 781 disable_dma(host->dma); 782 clear_dma_ff(host->dma); ··· 802 * output to a minimum. 803 */ 804 host->firsterr = 1; 805 - 806 /* 807 * Initialise the SG list. 808 */ 809 wbsd_init_sg(host, data); 810 - 811 /* 812 * Turn off DMA. 813 */ 814 wbsd_write_index(host, WBSD_IDX_DMA, 0); 815 - 816 /* 817 * Set up FIFO threshold levels (and fill 818 * buffer if doing a write). ··· 828 WBSD_FIFOEN_EMPTY | 8); 829 wbsd_fill_fifo(host); 830 } 831 - } 832 - 833 data->error = MMC_ERR_NONE; 834 } 835 ··· 838 unsigned long dmaflags; 839 int count; 840 u8 status; 841 - 842 WARN_ON(host->mrq == NULL); 843 844 /* ··· 855 { 856 status = wbsd_read_index(host, WBSD_IDX_STATUS); 857 } while (status & (WBSD_BLOCK_READ | WBSD_BLOCK_WRITE)); 858 - 859 /* 860 * DMA transfer? 861 */ ··· 865 * Disable DMA on the host. 866 */ 867 wbsd_write_index(host, WBSD_IDX_DMA, 0); 868 - 869 /* 870 * Turn of ISA DMA controller. 871 */ ··· 874 clear_dma_ff(host->dma); 875 count = get_dma_residue(host->dma); 876 release_dma_lock(dmaflags); 877 - 878 /* 879 * Any leftover data? 880 */ ··· 882 { 883 printk(KERN_ERR DRIVER_NAME ": Incomplete DMA " 884 "transfer. %d bytes left.\n", count); 885 - 886 data->error = MMC_ERR_FAILED; 887 } 888 else ··· 893 */ 894 if (data->flags & MMC_DATA_READ) 895 wbsd_dma_to_sg(host, data); 896 - 897 data->bytes_xfered = host->size; 898 } 899 } 900 - 901 DBGF("Ending data transfer (%d bytes)\n", data->bytes_xfered); 902 - 903 wbsd_request_end(host, host->mrq); 904 } 905 ··· 924 cmd = mrq->cmd; 925 926 host->mrq = mrq; 927 - 928 /* 929 * If there is no card in the slot then 930 * timeout immediatly. ··· 941 if (cmd->data) 942 { 943 wbsd_prepare_data(host, cmd->data); 944 - 945 if (cmd->data->error != MMC_ERR_NONE) 946 goto done; 947 } 948 - 949 wbsd_send_command(host, cmd); 950 951 /* 952 * If this is a data transfer the request 953 * will be finished after the data has 954 * transfered. 955 - */ 956 if (cmd->data && (cmd->error == MMC_ERR_NONE)) 957 { 958 /* ··· 965 966 return; 967 } 968 - 969 done: 970 wbsd_request_end(host, mrq); 971 ··· 976 { 977 struct wbsd_host* host = mmc_priv(mmc); 978 u8 clk, setup, pwr; 979 - 980 DBGF("clock %uHz busmode %u powermode %u cs %u Vdd %u width %u\n", 981 ios->clock, ios->bus_mode, ios->power_mode, ios->chip_select, 982 ios->vdd, ios->bus_width); ··· 989 */ 990 if (ios->power_mode == MMC_POWER_OFF) 991 wbsd_init_device(host); 992 - 993 if (ios->clock >= 24000000) 994 clk = WBSD_CLK_24M; 995 else if (ios->clock >= 16000000) ··· 1042 mod_timer(&host->ignore_timer, jiffies + HZ/100); 1043 } 1044 wbsd_write_index(host, WBSD_IDX_SETUP, setup); 1045 - 1046 /* 1047 * Store bus width for later. Will be used when 1048 * setting up the data transfer. ··· 1128 WARN_ON(!host->mrq->cmd->data); 1129 if (!host->mrq->cmd->data) 1130 return NULL; 1131 - 1132 return host->mrq->cmd->data; 1133 } 1134 ··· 1136 { 1137 struct wbsd_host* host = (struct wbsd_host*)param; 1138 u8 csr; 1139 - 1140 spin_lock(&host->lock); 1141 - 1142 if (host->flags & WBSD_FIGNORE_DETECT) 1143 { 1144 spin_unlock(&host->lock); 1145 return; 1146 } 1147 - 1148 csr = inb(host->base + WBSD_CSR); 1149 WARN_ON(csr == 0xff); 1150 - 1151 if (csr & WBSD_CARDPRESENT) 1152 { 1153 if (!(host->flags & WBSD_FCARD_PRESENT)) 1154 { 1155 DBG("Card inserted\n"); 1156 host->flags |= WBSD_FCARD_PRESENT; 1157 - 1158 - spin_unlock(&host->lock); 1159 1160 - /* 1161 - * Delay card detection to allow electrical connections 1162 - * to stabilise. 1163 - */ 1164 - mmc_detect_change(host->mmc, msecs_to_jiffies(500)); 1165 } 1166 - else 1167 - spin_unlock(&host->lock); 1168 } 1169 else if (host->flags & WBSD_FCARD_PRESENT) 1170 { 1171 DBG("Card removed\n"); 1172 host->flags &= ~WBSD_FCARD_PRESENT; 1173 - 1174 if (host->mrq) 1175 { 1176 printk(KERN_ERR DRIVER_NAME 1177 ": Card removed during transfer!\n"); 1178 wbsd_reset(host); 1179 - 1180 host->mrq->cmd->error = MMC_ERR_FAILED; 1181 tasklet_schedule(&host->finish_tasklet); 1182 } 1183 - 1184 - /* 1185 - * Unlock first since we might get a call back. 1186 - */ 1187 - spin_unlock(&host->lock); 1188 1189 - mmc_detect_change(host->mmc, 0); 1190 } 1191 - else 1192 - spin_unlock(&host->lock); 1193 } 1194 1195 static void wbsd_tasklet_fifo(unsigned long param) 1196 { 1197 struct wbsd_host* host = (struct wbsd_host*)param; 1198 struct mmc_data* data; 1199 - 1200 spin_lock(&host->lock); 1201 - 1202 if (!host->mrq) 1203 goto end; 1204 - 1205 data = wbsd_get_data(host); 1206 if (!data) 1207 goto end; ··· 1215 tasklet_schedule(&host->finish_tasklet); 1216 } 1217 1218 - end: 1219 spin_unlock(&host->lock); 1220 } 1221 ··· 1223 { 1224 struct wbsd_host* host = (struct wbsd_host*)param; 1225 struct mmc_data* data; 1226 - 1227 spin_lock(&host->lock); 1228 - 1229 if (!host->mrq) 1230 goto end; 1231 - 1232 data = wbsd_get_data(host); 1233 if (!data) 1234 goto end; 1235 - 1236 DBGF("CRC error\n"); 1237 1238 data->error = MMC_ERR_BADCRC; 1239 - 1240 tasklet_schedule(&host->finish_tasklet); 1241 1242 - end: 1243 spin_unlock(&host->lock); 1244 } 1245 ··· 1247 { 1248 struct wbsd_host* host = (struct wbsd_host*)param; 1249 struct mmc_data* data; 1250 - 1251 spin_lock(&host->lock); 1252 - 1253 if (!host->mrq) 1254 goto end; 1255 - 1256 data = wbsd_get_data(host); 1257 if (!data) 1258 goto end; 1259 - 1260 DBGF("Timeout\n"); 1261 1262 data->error = MMC_ERR_TIMEOUT; 1263 - 1264 tasklet_schedule(&host->finish_tasklet); 1265 1266 - end: 1267 spin_unlock(&host->lock); 1268 } 1269 ··· 1271 { 1272 struct wbsd_host* host = (struct wbsd_host*)param; 1273 struct mmc_data* data; 1274 - 1275 spin_lock(&host->lock); 1276 - 1277 WARN_ON(!host->mrq); 1278 if (!host->mrq) 1279 goto end; 1280 - 1281 data = wbsd_get_data(host); 1282 if (!data) 1283 goto end; 1284 1285 wbsd_finish_data(host, data); 1286 - 1287 - end: 1288 spin_unlock(&host->lock); 1289 } 1290 ··· 1292 { 1293 struct wbsd_host* host = (struct wbsd_host*)param; 1294 struct mmc_data* data; 1295 - 1296 spin_lock(&host->lock); 1297 1298 if ((wbsd_read_index(host, WBSD_IDX_CRCSTATUS) & WBSD_CRC_MASK) != ··· 1301 data = wbsd_get_data(host); 1302 if (!data) 1303 goto end; 1304 - 1305 DBGF("CRC error\n"); 1306 1307 data->error = MMC_ERR_BADCRC; 1308 - 1309 tasklet_schedule(&host->finish_tasklet); 1310 } 1311 1312 - end: 1313 spin_unlock(&host->lock); 1314 } 1315 ··· 1321 { 1322 struct wbsd_host* host = dev_id; 1323 int isr; 1324 - 1325 isr = inb(host->base + WBSD_ISR); 1326 1327 /* ··· 1329 */ 1330 if (isr == 0xff || isr == 0x00) 1331 return IRQ_NONE; 1332 - 1333 host->isr |= isr; 1334 1335 /* ··· 1347 tasklet_hi_schedule(&host->block_tasklet); 1348 if (isr & WBSD_INT_TC) 1349 tasklet_schedule(&host->finish_tasklet); 1350 - 1351 return IRQ_HANDLED; 1352 } 1353 ··· 1365 { 1366 struct mmc_host* mmc; 1367 struct wbsd_host* host; 1368 - 1369 /* 1370 * Allocate MMC structure. 1371 */ 1372 mmc = mmc_alloc_host(sizeof(struct wbsd_host), dev); 1373 if (!mmc) 1374 return -ENOMEM; 1375 - 1376 host = mmc_priv(mmc); 1377 host->mmc = mmc; 1378 ··· 1386 mmc->f_max = 24000000; 1387 mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34; 1388 mmc->caps = MMC_CAP_4_BIT_DATA; 1389 - 1390 spin_lock_init(&host->lock); 1391 - 1392 /* 1393 * Set up timers 1394 */ 1395 init_timer(&host->ignore_timer); 1396 host->ignore_timer.data = (unsigned long)host; 1397 host->ignore_timer.function = wbsd_reset_ignore; 1398 - 1399 /* 1400 * Maximum number of segments. Worst case is one sector per segment 1401 * so this will be 64kB/512. 1402 */ 1403 mmc->max_hw_segs = 128; 1404 mmc->max_phys_segs = 128; 1405 - 1406 /* 1407 * Maximum number of sectors in one transfer. Also limited by 64kB 1408 * buffer. 1409 */ 1410 mmc->max_sectors = 128; 1411 - 1412 /* 1413 * Maximum segment size. Could be one segment with the maximum number 1414 * of segments. 1415 */ 1416 mmc->max_seg_size = mmc->max_sectors * 512; 1417 - 1418 dev_set_drvdata(dev, mmc); 1419 - 1420 return 0; 1421 } 1422 ··· 1424 { 1425 struct mmc_host* mmc; 1426 struct wbsd_host* host; 1427 - 1428 mmc = dev_get_drvdata(dev); 1429 if (!mmc) 1430 return; 1431 - 1432 host = mmc_priv(mmc); 1433 BUG_ON(host == NULL); 1434 - 1435 del_timer_sync(&host->ignore_timer); 1436 - 1437 mmc_free_host(mmc); 1438 - 1439 dev_set_drvdata(dev, NULL); 1440 } 1441 ··· 1447 { 1448 int i, j, k; 1449 int id; 1450 - 1451 /* 1452 * Iterate through all ports, all codes to 1453 * find hardware that is in our known list. ··· 1456 { 1457 if (!request_region(config_ports[i], 2, DRIVER_NAME)) 1458 continue; 1459 - 1460 for (j = 0;j < sizeof(unlock_codes)/sizeof(int);j++) 1461 { 1462 id = 0xFFFF; 1463 - 1464 outb(unlock_codes[j], config_ports[i]); 1465 outb(unlock_codes[j], config_ports[i]); 1466 - 1467 outb(WBSD_CONF_ID_HI, config_ports[i]); 1468 id = inb(config_ports[i] + 1) << 8; 1469 1470 outb(WBSD_CONF_ID_LO, config_ports[i]); 1471 id |= inb(config_ports[i] + 1); 1472 - 1473 for (k = 0;k < sizeof(valid_ids)/sizeof(int);k++) 1474 { 1475 if (id == valid_ids[k]) 1476 - { 1477 host->chip_id = id; 1478 host->config = config_ports[i]; 1479 host->unlock_code = unlock_codes[i]; 1480 - 1481 return 0; 1482 } 1483 } 1484 - 1485 if (id != 0xFFFF) 1486 { 1487 DBG("Unknown hardware (id %x) found at %x\n", ··· 1490 1491 outb(LOCK_CODE, config_ports[i]); 1492 } 1493 - 1494 release_region(config_ports[i], 2); 1495 } 1496 - 1497 return -ENODEV; 1498 } 1499 ··· 1505 { 1506 if (io & 0x7) 1507 return -EINVAL; 1508 - 1509 if (!request_region(base, 8, DRIVER_NAME)) 1510 return -EIO; 1511 - 1512 host->base = io; 1513 - 1514 return 0; 1515 } 1516 ··· 1518 { 1519 if (host->base) 1520 release_region(host->base, 8); 1521 - 1522 host->base = 0; 1523 1524 if (host->config) 1525 release_region(host->config, 2); 1526 - 1527 host->config = 0; 1528 } 1529 ··· 1535 { 1536 if (dma < 0) 1537 return; 1538 - 1539 if (request_dma(dma, DRIVER_NAME)) 1540 goto err; 1541 - 1542 /* 1543 * We need to allocate a special buffer in 1544 * order for ISA to be able to DMA to it. ··· 1553 */ 1554 host->dma_addr = dma_map_single(host->mmc->dev, host->dma_buffer, 1555 WBSD_DMA_SIZE, DMA_BIDIRECTIONAL); 1556 - 1557 /* 1558 * ISA DMA must be aligned on a 64k basis. 1559 */ ··· 1566 goto kfree; 1567 1568 host->dma = dma; 1569 - 1570 return; 1571 - 1572 kfree: 1573 /* 1574 * If we've gotten here then there is some kind of alignment bug 1575 */ 1576 BUG_ON(1); 1577 - 1578 dma_unmap_single(host->mmc->dev, host->dma_addr, WBSD_DMA_SIZE, 1579 DMA_BIDIRECTIONAL); 1580 host->dma_addr = (dma_addr_t)NULL; 1581 - 1582 kfree(host->dma_buffer); 1583 host->dma_buffer = NULL; 1584 ··· 1599 kfree(host->dma_buffer); 1600 if (host->dma >= 0) 1601 free_dma(host->dma); 1602 - 1603 host->dma = -1; 1604 host->dma_buffer = NULL; 1605 host->dma_addr = (dma_addr_t)NULL; ··· 1612 static int __devinit wbsd_request_irq(struct wbsd_host* host, int irq) 1613 { 1614 int ret; 1615 - 1616 /* 1617 * Allocate interrupt. 1618 */ ··· 1620 ret = request_irq(irq, wbsd_irq, SA_SHIRQ, DRIVER_NAME, host); 1621 if (ret) 1622 return ret; 1623 - 1624 host->irq = irq; 1625 1626 /* ··· 1632 tasklet_init(&host->timeout_tasklet, wbsd_tasklet_timeout, (unsigned long)host); 1633 tasklet_init(&host->finish_tasklet, wbsd_tasklet_finish, (unsigned long)host); 1634 tasklet_init(&host->block_tasklet, wbsd_tasklet_block, (unsigned long)host); 1635 - 1636 return 0; 1637 } 1638 ··· 1642 return; 1643 1644 free_irq(host->irq, host); 1645 - 1646 host->irq = 0; 1647 - 1648 tasklet_kill(&host->card_tasklet); 1649 tasklet_kill(&host->fifo_tasklet); 1650 tasklet_kill(&host->crc_tasklet); ··· 1661 int base, int irq, int dma) 1662 { 1663 int ret; 1664 - 1665 /* 1666 * Allocate I/O ports. 1667 */ ··· 1680 * Allocate DMA. 1681 */ 1682 wbsd_request_dma(host, dma); 1683 - 1684 return 0; 1685 } 1686 ··· 1703 { 1704 /* 1705 * Reset the chip. 1706 - */ 1707 wbsd_write_config(host, WBSD_CONF_SWRST, 1); 1708 wbsd_write_config(host, WBSD_CONF_SWRST, 0); 1709 ··· 1711 * Select SD/MMC function. 1712 */ 1713 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); 1714 - 1715 /* 1716 * Set up card detection. 1717 */ 1718 wbsd_write_config(host, WBSD_CONF_PINS, WBSD_PINS_DETECT_GP11); 1719 - 1720 /* 1721 * Configure chip 1722 */ 1723 wbsd_write_config(host, WBSD_CONF_PORT_HI, host->base >> 8); 1724 wbsd_write_config(host, WBSD_CONF_PORT_LO, host->base & 0xff); 1725 - 1726 wbsd_write_config(host, WBSD_CONF_IRQ, host->irq); 1727 - 1728 if (host->dma >= 0) 1729 wbsd_write_config(host, WBSD_CONF_DRQ, host->dma); 1730 - 1731 /* 1732 * Enable and power up chip. 1733 */ ··· 1738 /* 1739 * Check that configured resources are correct. 1740 */ 1741 - 1742 static int __devinit wbsd_chip_validate(struct wbsd_host* host) 1743 { 1744 int base, irq, dma; 1745 - 1746 /* 1747 * Select SD/MMC function. 1748 */ 1749 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); 1750 - 1751 /* 1752 * Read configuration. 1753 */ 1754 base = wbsd_read_config(host, WBSD_CONF_PORT_HI) << 8; 1755 base |= wbsd_read_config(host, WBSD_CONF_PORT_LO); 1756 - 1757 irq = wbsd_read_config(host, WBSD_CONF_IRQ); 1758 - 1759 dma = wbsd_read_config(host, WBSD_CONF_DRQ); 1760 - 1761 /* 1762 * Validate against given configuration. 1763 */ ··· 1767 return 0; 1768 if ((dma != host->dma) && (host->dma != -1)) 1769 return 0; 1770 - 1771 return 1; 1772 } 1773 ··· 1783 struct wbsd_host* host = NULL; 1784 struct mmc_host* mmc = NULL; 1785 int ret; 1786 - 1787 ret = wbsd_alloc_mmc(dev); 1788 if (ret) 1789 return ret; 1790 - 1791 mmc = dev_get_drvdata(dev); 1792 host = mmc_priv(mmc); 1793 - 1794 /* 1795 * Scan for hardware. 1796 */ ··· 1809 return ret; 1810 } 1811 } 1812 - 1813 /* 1814 * Request resources. 1815 */ ··· 1820 wbsd_free_mmc(dev); 1821 return ret; 1822 } 1823 - 1824 /* 1825 * See if chip needs to be configured. 1826 */ ··· 1837 } 1838 else 1839 wbsd_chip_config(host); 1840 - 1841 /* 1842 * Power Management stuff. No idea how this works. 1843 * Not tested. ··· 1855 * Reset the chip into a known state. 1856 */ 1857 wbsd_init_device(host); 1858 - 1859 mmc_add_host(mmc); 1860 1861 printk(KERN_INFO "%s: W83L51xD", mmc_hostname(mmc)); ··· 1877 { 1878 struct mmc_host* mmc = dev_get_drvdata(dev); 1879 struct wbsd_host* host; 1880 - 1881 if (!mmc) 1882 return; 1883 1884 host = mmc_priv(mmc); 1885 - 1886 mmc_remove_host(mmc); 1887 1888 if (!pnp) ··· 1895 wbsd_write_config(host, WBSD_CONF_ENABLE, 0); 1896 wbsd_lock_config(host); 1897 } 1898 - 1899 wbsd_release_resources(host); 1900 - 1901 wbsd_free_mmc(dev); 1902 } 1903 ··· 1927 wbsd_pnp_probe(struct pnp_dev * pnpdev, const struct pnp_device_id *dev_id) 1928 { 1929 int io, irq, dma; 1930 - 1931 /* 1932 * Get resources from PnP layer. 1933 */ ··· 1937 dma = pnp_dma(pnpdev, 0); 1938 else 1939 dma = -1; 1940 - 1941 DBGF("PnP resources: port %3x irq %d dma %d\n", io, irq, dma); 1942 - 1943 return wbsd_init(&pnpdev->dev, io, irq, dma, 1); 1944 } 1945 ··· 1980 .bus = &platform_bus_type, 1981 .probe = wbsd_probe, 1982 .remove = wbsd_remove, 1983 - 1984 .suspend = wbsd_suspend, 1985 .resume = wbsd_resume, 1986 }; ··· 2003 static int __init wbsd_drv_init(void) 2004 { 2005 int result; 2006 - 2007 printk(KERN_INFO DRIVER_NAME 2008 ": Winbond W83L51xD SD/MMC card interface driver, " 2009 DRIVER_VERSION "\n"); ··· 2018 return result; 2019 } 2020 2021 - #endif /* CONFIG_PNP */ 2022 - 2023 if (nopnp) 2024 { 2025 result = driver_register(&wbsd_driver); ··· 2041 2042 if (!nopnp) 2043 pnp_unregister_driver(&wbsd_pnp_driver); 2044 - 2045 - #endif /* CONFIG_PNP */ 2046 2047 if (nopnp) 2048 { 2049 platform_device_unregister(wbsd_device); 2050 - 2051 driver_unregister(&wbsd_driver); 2052 } 2053
··· 93 static inline void wbsd_unlock_config(struct wbsd_host* host) 94 { 95 BUG_ON(host->config == 0); 96 + 97 outb(host->unlock_code, host->config); 98 outb(host->unlock_code, host->config); 99 } ··· 101 static inline void wbsd_lock_config(struct wbsd_host* host) 102 { 103 BUG_ON(host->config == 0); 104 + 105 outb(LOCK_CODE, host->config); 106 } 107 108 static inline void wbsd_write_config(struct wbsd_host* host, u8 reg, u8 value) 109 { 110 BUG_ON(host->config == 0); 111 + 112 outb(reg, host->config); 113 outb(value, host->config + 1); 114 } ··· 116 static inline u8 wbsd_read_config(struct wbsd_host* host, u8 reg) 117 { 118 BUG_ON(host->config == 0); 119 + 120 outb(reg, host->config); 121 return inb(host->config + 1); 122 } ··· 140 static void wbsd_init_device(struct wbsd_host* host) 141 { 142 u8 setup, ier; 143 + 144 /* 145 * Reset chip (SD/MMC part) and fifo. 146 */ 147 setup = wbsd_read_index(host, WBSD_IDX_SETUP); 148 setup |= WBSD_FIFO_RESET | WBSD_SOFT_RESET; 149 wbsd_write_index(host, WBSD_IDX_SETUP, setup); 150 + 151 /* 152 * Set DAT3 to input 153 */ 154 setup &= ~WBSD_DAT3_H; 155 wbsd_write_index(host, WBSD_IDX_SETUP, setup); 156 host->flags &= ~WBSD_FIGNORE_DETECT; 157 + 158 /* 159 * Read back default clock. 160 */ ··· 164 * Power down port. 165 */ 166 outb(WBSD_POWER_N, host->base + WBSD_CSR); 167 + 168 /* 169 * Set maximum timeout. 170 */ 171 wbsd_write_index(host, WBSD_IDX_TAAC, 0x7F); 172 + 173 /* 174 * Test for card presence 175 */ ··· 177 host->flags |= WBSD_FCARD_PRESENT; 178 else 179 host->flags &= ~WBSD_FCARD_PRESENT; 180 + 181 /* 182 * Enable interesting interrupts. 183 */ ··· 200 static void wbsd_reset(struct wbsd_host* host) 201 { 202 u8 setup; 203 + 204 printk(KERN_ERR DRIVER_NAME ": Resetting chip\n"); 205 + 206 /* 207 * Soft reset of chip (SD/MMC part). 208 */ ··· 214 static void wbsd_request_end(struct wbsd_host* host, struct mmc_request* mrq) 215 { 216 unsigned long dmaflags; 217 + 218 DBGF("Ending request, cmd (%x)\n", mrq->cmd->opcode); 219 + 220 if (host->dma >= 0) 221 { 222 /* ··· 232 */ 233 wbsd_write_index(host, WBSD_IDX_DMA, 0); 234 } 235 + 236 host->mrq = NULL; 237 238 /* ··· 275 host->offset = 0; 276 host->remain = host->cur_sg->length; 277 } 278 + 279 return host->num_sg; 280 } 281 ··· 297 struct scatterlist* sg; 298 char* dmabuf = host->dma_buffer; 299 char* sgbuf; 300 + 301 size = host->size; 302 + 303 sg = data->sg; 304 len = data->sg_len; 305 + 306 /* 307 * Just loop through all entries. Size might not 308 * be the entire list though so make sure that ··· 317 memcpy(dmabuf, sgbuf, sg[i].length); 318 kunmap_atomic(sgbuf, KM_BIO_SRC_IRQ); 319 dmabuf += sg[i].length; 320 + 321 if (size < sg[i].length) 322 size = 0; 323 else 324 size -= sg[i].length; 325 + 326 if (size == 0) 327 break; 328 } 329 + 330 /* 331 * Check that we didn't get a request to transfer 332 * more data than can fit into the SG list. 333 */ 334 + 335 BUG_ON(size != 0); 336 + 337 host->size -= size; 338 } 339 ··· 343 struct scatterlist* sg; 344 char* dmabuf = host->dma_buffer; 345 char* sgbuf; 346 + 347 size = host->size; 348 + 349 sg = data->sg; 350 len = data->sg_len; 351 + 352 /* 353 * Just loop through all entries. Size might not 354 * be the entire list though so make sure that ··· 363 memcpy(sgbuf, dmabuf, sg[i].length); 364 kunmap_atomic(sgbuf, KM_BIO_SRC_IRQ); 365 dmabuf += sg[i].length; 366 + 367 if (size < sg[i].length) 368 size = 0; 369 else 370 size -= sg[i].length; 371 + 372 if (size == 0) 373 break; 374 } 375 + 376 /* 377 * Check that we didn't get a request to transfer 378 * more data than can fit into the SG list. 379 */ 380 + 381 BUG_ON(size != 0); 382 + 383 host->size -= size; 384 } 385 386 /* 387 * Command handling 388 */ 389 + 390 static inline void wbsd_get_short_reply(struct wbsd_host* host, 391 struct mmc_command* cmd) 392 { ··· 398 cmd->error = MMC_ERR_INVALID; 399 return; 400 } 401 + 402 cmd->resp[0] = 403 wbsd_read_index(host, WBSD_IDX_RESP12) << 24; 404 cmd->resp[0] |= ··· 415 struct mmc_command* cmd) 416 { 417 int i; 418 + 419 /* 420 * Correct response type? 421 */ ··· 424 cmd->error = MMC_ERR_INVALID; 425 return; 426 } 427 + 428 for (i = 0;i < 4;i++) 429 { 430 cmd->resp[i] = ··· 442 { 443 int i; 444 u8 status, isr; 445 + 446 DBGF("Sending cmd (%x)\n", cmd->opcode); 447 448 /* ··· 451 * transfer. 452 */ 453 host->isr = 0; 454 + 455 /* 456 * Send the command (CRC calculated by host). 457 */ 458 outb(cmd->opcode, host->base + WBSD_CMDR); 459 for (i = 3;i >= 0;i--) 460 outb((cmd->arg >> (i * 8)) & 0xff, host->base + WBSD_CMDR); 461 + 462 cmd->error = MMC_ERR_NONE; 463 + 464 /* 465 * Wait for the request to complete. 466 */ ··· 477 * Read back status. 478 */ 479 isr = host->isr; 480 + 481 /* Card removed? */ 482 if (isr & WBSD_INT_CARD) 483 cmd->error = MMC_ERR_TIMEOUT; ··· 509 struct mmc_data* data = host->mrq->cmd->data; 510 char* buffer; 511 int i, fsr, fifo; 512 + 513 /* 514 * Handle excessive data. 515 */ 516 if (data->bytes_xfered == host->size) 517 return; 518 + 519 buffer = wbsd_kmap_sg(host) + host->offset; 520 521 /* ··· 527 /* 528 * The size field in the FSR is broken so we have to 529 * do some guessing. 530 + */ 531 if (fsr & WBSD_FIFO_FULL) 532 fifo = 16; 533 else if (fsr & WBSD_FIFO_FUTHRE) 534 fifo = 8; 535 else 536 fifo = 1; 537 + 538 for (i = 0;i < fifo;i++) 539 { 540 *buffer = inb(host->base + WBSD_DFR); ··· 543 host->remain--; 544 545 data->bytes_xfered++; 546 + 547 /* 548 * Transfer done? 549 */ 550 if (data->bytes_xfered == host->size) 551 { 552 + wbsd_kunmap_sg(host); 553 return; 554 } 555 + 556 /* 557 * End of scatter list entry? 558 */ 559 if (host->remain == 0) 560 { 561 wbsd_kunmap_sg(host); 562 + 563 /* 564 * Get next entry. Check if last. 565 */ ··· 572 * into the scatter list. 573 */ 574 BUG_ON(1); 575 + 576 host->size = data->bytes_xfered; 577 + 578 return; 579 } 580 + 581 buffer = wbsd_kmap_sg(host); 582 } 583 } 584 } 585 + 586 wbsd_kunmap_sg(host); 587 588 /* ··· 599 struct mmc_data* data = host->mrq->cmd->data; 600 char* buffer; 601 int i, fsr, fifo; 602 + 603 /* 604 * Check that we aren't being called after the 605 * entire buffer has been transfered. ··· 618 /* 619 * The size field in the FSR is broken so we have to 620 * do some guessing. 621 + */ 622 if (fsr & WBSD_FIFO_EMPTY) 623 fifo = 0; 624 else if (fsr & WBSD_FIFO_EMTHRE) ··· 632 buffer++; 633 host->offset++; 634 host->remain--; 635 + 636 data->bytes_xfered++; 637 + 638 /* 639 * Transfer done? 640 */ ··· 650 if (host->remain == 0) 651 { 652 wbsd_kunmap_sg(host); 653 + 654 /* 655 * Get next entry. Check if last. 656 */ ··· 663 * into the scatter list. 664 */ 665 BUG_ON(1); 666 + 667 host->size = data->bytes_xfered; 668 + 669 return; 670 } 671 + 672 buffer = wbsd_kmap_sg(host); 673 } 674 } 675 } 676 + 677 wbsd_kunmap_sg(host); 678 + 679 /* 680 * The controller stops sending interrupts for 681 * 'FIFO empty' under certain conditions. So we ··· 694 1 << data->blksz_bits, data->blocks, data->flags); 695 DBGF("tsac %d ms nsac %d clk\n", 696 data->timeout_ns / 1000000, data->timeout_clks); 697 + 698 /* 699 * Calculate size. 700 */ ··· 708 wbsd_write_index(host, WBSD_IDX_TAAC, 127); 709 else 710 wbsd_write_index(host, WBSD_IDX_TAAC, data->timeout_ns/1000000); 711 + 712 if (data->timeout_clks > 255) 713 wbsd_write_index(host, WBSD_IDX_NSAC, 255); 714 else 715 wbsd_write_index(host, WBSD_IDX_NSAC, data->timeout_clks); 716 + 717 /* 718 * Inform the chip of how large blocks will be 719 * sent. It needs this to determine when to ··· 732 else if (host->bus_width == MMC_BUS_WIDTH_4) 733 { 734 blksize = (1 << data->blksz_bits) + 2 * 4; 735 + 736 wbsd_write_index(host, WBSD_IDX_PBSMSB, ((blksize >> 4) & 0xF0) 737 | WBSD_DATA_WIDTH); 738 wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF); ··· 751 setup = wbsd_read_index(host, WBSD_IDX_SETUP); 752 setup |= WBSD_FIFO_RESET; 753 wbsd_write_index(host, WBSD_IDX_SETUP, setup); 754 + 755 /* 756 * DMA transfer? 757 */ 758 if (host->dma >= 0) 759 + { 760 /* 761 * The buffer for DMA is only 64 kB. 762 */ ··· 766 data->error = MMC_ERR_INVALID; 767 return; 768 } 769 + 770 /* 771 * Transfer data from the SG list to 772 * the DMA buffer. 773 */ 774 if (data->flags & MMC_DATA_WRITE) 775 wbsd_sg_to_dma(host, data); 776 + 777 /* 778 * Initialise the ISA DMA controller. 779 + */ 780 dmaflags = claim_dma_lock(); 781 disable_dma(host->dma); 782 clear_dma_ff(host->dma); ··· 802 * output to a minimum. 803 */ 804 host->firsterr = 1; 805 + 806 /* 807 * Initialise the SG list. 808 */ 809 wbsd_init_sg(host, data); 810 + 811 /* 812 * Turn off DMA. 813 */ 814 wbsd_write_index(host, WBSD_IDX_DMA, 0); 815 + 816 /* 817 * Set up FIFO threshold levels (and fill 818 * buffer if doing a write). ··· 828 WBSD_FIFOEN_EMPTY | 8); 829 wbsd_fill_fifo(host); 830 } 831 + } 832 + 833 data->error = MMC_ERR_NONE; 834 } 835 ··· 838 unsigned long dmaflags; 839 int count; 840 u8 status; 841 + 842 WARN_ON(host->mrq == NULL); 843 844 /* ··· 855 { 856 status = wbsd_read_index(host, WBSD_IDX_STATUS); 857 } while (status & (WBSD_BLOCK_READ | WBSD_BLOCK_WRITE)); 858 + 859 /* 860 * DMA transfer? 861 */ ··· 865 * Disable DMA on the host. 866 */ 867 wbsd_write_index(host, WBSD_IDX_DMA, 0); 868 + 869 /* 870 * Turn of ISA DMA controller. 871 */ ··· 874 clear_dma_ff(host->dma); 875 count = get_dma_residue(host->dma); 876 release_dma_lock(dmaflags); 877 + 878 /* 879 * Any leftover data? 880 */ ··· 882 { 883 printk(KERN_ERR DRIVER_NAME ": Incomplete DMA " 884 "transfer. %d bytes left.\n", count); 885 + 886 data->error = MMC_ERR_FAILED; 887 } 888 else ··· 893 */ 894 if (data->flags & MMC_DATA_READ) 895 wbsd_dma_to_sg(host, data); 896 + 897 data->bytes_xfered = host->size; 898 } 899 } 900 + 901 DBGF("Ending data transfer (%d bytes)\n", data->bytes_xfered); 902 + 903 wbsd_request_end(host, host->mrq); 904 } 905 ··· 924 cmd = mrq->cmd; 925 926 host->mrq = mrq; 927 + 928 /* 929 * If there is no card in the slot then 930 * timeout immediatly. ··· 941 if (cmd->data) 942 { 943 wbsd_prepare_data(host, cmd->data); 944 + 945 if (cmd->data->error != MMC_ERR_NONE) 946 goto done; 947 } 948 + 949 wbsd_send_command(host, cmd); 950 951 /* 952 * If this is a data transfer the request 953 * will be finished after the data has 954 * transfered. 955 + */ 956 if (cmd->data && (cmd->error == MMC_ERR_NONE)) 957 { 958 /* ··· 965 966 return; 967 } 968 + 969 done: 970 wbsd_request_end(host, mrq); 971 ··· 976 { 977 struct wbsd_host* host = mmc_priv(mmc); 978 u8 clk, setup, pwr; 979 + 980 DBGF("clock %uHz busmode %u powermode %u cs %u Vdd %u width %u\n", 981 ios->clock, ios->bus_mode, ios->power_mode, ios->chip_select, 982 ios->vdd, ios->bus_width); ··· 989 */ 990 if (ios->power_mode == MMC_POWER_OFF) 991 wbsd_init_device(host); 992 + 993 if (ios->clock >= 24000000) 994 clk = WBSD_CLK_24M; 995 else if (ios->clock >= 16000000) ··· 1042 mod_timer(&host->ignore_timer, jiffies + HZ/100); 1043 } 1044 wbsd_write_index(host, WBSD_IDX_SETUP, setup); 1045 + 1046 /* 1047 * Store bus width for later. Will be used when 1048 * setting up the data transfer. ··· 1128 WARN_ON(!host->mrq->cmd->data); 1129 if (!host->mrq->cmd->data) 1130 return NULL; 1131 + 1132 return host->mrq->cmd->data; 1133 } 1134 ··· 1136 { 1137 struct wbsd_host* host = (struct wbsd_host*)param; 1138 u8 csr; 1139 + int delay = -1; 1140 + 1141 spin_lock(&host->lock); 1142 + 1143 if (host->flags & WBSD_FIGNORE_DETECT) 1144 { 1145 spin_unlock(&host->lock); 1146 return; 1147 } 1148 + 1149 csr = inb(host->base + WBSD_CSR); 1150 WARN_ON(csr == 0xff); 1151 + 1152 if (csr & WBSD_CARDPRESENT) 1153 { 1154 if (!(host->flags & WBSD_FCARD_PRESENT)) 1155 { 1156 DBG("Card inserted\n"); 1157 host->flags |= WBSD_FCARD_PRESENT; 1158 1159 + delay = 500; 1160 } 1161 } 1162 else if (host->flags & WBSD_FCARD_PRESENT) 1163 { 1164 DBG("Card removed\n"); 1165 host->flags &= ~WBSD_FCARD_PRESENT; 1166 + 1167 if (host->mrq) 1168 { 1169 printk(KERN_ERR DRIVER_NAME 1170 ": Card removed during transfer!\n"); 1171 wbsd_reset(host); 1172 + 1173 host->mrq->cmd->error = MMC_ERR_FAILED; 1174 tasklet_schedule(&host->finish_tasklet); 1175 } 1176 1177 + delay = 0; 1178 } 1179 + 1180 + /* 1181 + * Unlock first since we might get a call back. 1182 + */ 1183 + 1184 + spin_unlock(&host->lock); 1185 + 1186 + if (delay != -1) 1187 + mmc_detect_change(host->mmc, msecs_to_jiffies(delay)); 1188 } 1189 1190 static void wbsd_tasklet_fifo(unsigned long param) 1191 { 1192 struct wbsd_host* host = (struct wbsd_host*)param; 1193 struct mmc_data* data; 1194 + 1195 spin_lock(&host->lock); 1196 + 1197 if (!host->mrq) 1198 goto end; 1199 + 1200 data = wbsd_get_data(host); 1201 if (!data) 1202 goto end; ··· 1220 tasklet_schedule(&host->finish_tasklet); 1221 } 1222 1223 + end: 1224 spin_unlock(&host->lock); 1225 } 1226 ··· 1228 { 1229 struct wbsd_host* host = (struct wbsd_host*)param; 1230 struct mmc_data* data; 1231 + 1232 spin_lock(&host->lock); 1233 + 1234 if (!host->mrq) 1235 goto end; 1236 + 1237 data = wbsd_get_data(host); 1238 if (!data) 1239 goto end; 1240 + 1241 DBGF("CRC error\n"); 1242 1243 data->error = MMC_ERR_BADCRC; 1244 + 1245 tasklet_schedule(&host->finish_tasklet); 1246 1247 + end: 1248 spin_unlock(&host->lock); 1249 } 1250 ··· 1252 { 1253 struct wbsd_host* host = (struct wbsd_host*)param; 1254 struct mmc_data* data; 1255 + 1256 spin_lock(&host->lock); 1257 + 1258 if (!host->mrq) 1259 goto end; 1260 + 1261 data = wbsd_get_data(host); 1262 if (!data) 1263 goto end; 1264 + 1265 DBGF("Timeout\n"); 1266 1267 data->error = MMC_ERR_TIMEOUT; 1268 + 1269 tasklet_schedule(&host->finish_tasklet); 1270 1271 + end: 1272 spin_unlock(&host->lock); 1273 } 1274 ··· 1276 { 1277 struct wbsd_host* host = (struct wbsd_host*)param; 1278 struct mmc_data* data; 1279 + 1280 spin_lock(&host->lock); 1281 + 1282 WARN_ON(!host->mrq); 1283 if (!host->mrq) 1284 goto end; 1285 + 1286 data = wbsd_get_data(host); 1287 if (!data) 1288 goto end; 1289 1290 wbsd_finish_data(host, data); 1291 + 1292 + end: 1293 spin_unlock(&host->lock); 1294 } 1295 ··· 1297 { 1298 struct wbsd_host* host = (struct wbsd_host*)param; 1299 struct mmc_data* data; 1300 + 1301 spin_lock(&host->lock); 1302 1303 if ((wbsd_read_index(host, WBSD_IDX_CRCSTATUS) & WBSD_CRC_MASK) != ··· 1306 data = wbsd_get_data(host); 1307 if (!data) 1308 goto end; 1309 + 1310 DBGF("CRC error\n"); 1311 1312 data->error = MMC_ERR_BADCRC; 1313 + 1314 tasklet_schedule(&host->finish_tasklet); 1315 } 1316 1317 + end: 1318 spin_unlock(&host->lock); 1319 } 1320 ··· 1326 { 1327 struct wbsd_host* host = dev_id; 1328 int isr; 1329 + 1330 isr = inb(host->base + WBSD_ISR); 1331 1332 /* ··· 1334 */ 1335 if (isr == 0xff || isr == 0x00) 1336 return IRQ_NONE; 1337 + 1338 host->isr |= isr; 1339 1340 /* ··· 1352 tasklet_hi_schedule(&host->block_tasklet); 1353 if (isr & WBSD_INT_TC) 1354 tasklet_schedule(&host->finish_tasklet); 1355 + 1356 return IRQ_HANDLED; 1357 } 1358 ··· 1370 { 1371 struct mmc_host* mmc; 1372 struct wbsd_host* host; 1373 + 1374 /* 1375 * Allocate MMC structure. 1376 */ 1377 mmc = mmc_alloc_host(sizeof(struct wbsd_host), dev); 1378 if (!mmc) 1379 return -ENOMEM; 1380 + 1381 host = mmc_priv(mmc); 1382 host->mmc = mmc; 1383 ··· 1391 mmc->f_max = 24000000; 1392 mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34; 1393 mmc->caps = MMC_CAP_4_BIT_DATA; 1394 + 1395 spin_lock_init(&host->lock); 1396 + 1397 /* 1398 * Set up timers 1399 */ 1400 init_timer(&host->ignore_timer); 1401 host->ignore_timer.data = (unsigned long)host; 1402 host->ignore_timer.function = wbsd_reset_ignore; 1403 + 1404 /* 1405 * Maximum number of segments. Worst case is one sector per segment 1406 * so this will be 64kB/512. 1407 */ 1408 mmc->max_hw_segs = 128; 1409 mmc->max_phys_segs = 128; 1410 + 1411 /* 1412 * Maximum number of sectors in one transfer. Also limited by 64kB 1413 * buffer. 1414 */ 1415 mmc->max_sectors = 128; 1416 + 1417 /* 1418 * Maximum segment size. Could be one segment with the maximum number 1419 * of segments. 1420 */ 1421 mmc->max_seg_size = mmc->max_sectors * 512; 1422 + 1423 dev_set_drvdata(dev, mmc); 1424 + 1425 return 0; 1426 } 1427 ··· 1429 { 1430 struct mmc_host* mmc; 1431 struct wbsd_host* host; 1432 + 1433 mmc = dev_get_drvdata(dev); 1434 if (!mmc) 1435 return; 1436 + 1437 host = mmc_priv(mmc); 1438 BUG_ON(host == NULL); 1439 + 1440 del_timer_sync(&host->ignore_timer); 1441 + 1442 mmc_free_host(mmc); 1443 + 1444 dev_set_drvdata(dev, NULL); 1445 } 1446 ··· 1452 { 1453 int i, j, k; 1454 int id; 1455 + 1456 /* 1457 * Iterate through all ports, all codes to 1458 * find hardware that is in our known list. ··· 1461 { 1462 if (!request_region(config_ports[i], 2, DRIVER_NAME)) 1463 continue; 1464 + 1465 for (j = 0;j < sizeof(unlock_codes)/sizeof(int);j++) 1466 { 1467 id = 0xFFFF; 1468 + 1469 outb(unlock_codes[j], config_ports[i]); 1470 outb(unlock_codes[j], config_ports[i]); 1471 + 1472 outb(WBSD_CONF_ID_HI, config_ports[i]); 1473 id = inb(config_ports[i] + 1) << 8; 1474 1475 outb(WBSD_CONF_ID_LO, config_ports[i]); 1476 id |= inb(config_ports[i] + 1); 1477 + 1478 for (k = 0;k < sizeof(valid_ids)/sizeof(int);k++) 1479 { 1480 if (id == valid_ids[k]) 1481 + { 1482 host->chip_id = id; 1483 host->config = config_ports[i]; 1484 host->unlock_code = unlock_codes[i]; 1485 + 1486 return 0; 1487 } 1488 } 1489 + 1490 if (id != 0xFFFF) 1491 { 1492 DBG("Unknown hardware (id %x) found at %x\n", ··· 1495 1496 outb(LOCK_CODE, config_ports[i]); 1497 } 1498 + 1499 release_region(config_ports[i], 2); 1500 } 1501 + 1502 return -ENODEV; 1503 } 1504 ··· 1510 { 1511 if (io & 0x7) 1512 return -EINVAL; 1513 + 1514 if (!request_region(base, 8, DRIVER_NAME)) 1515 return -EIO; 1516 + 1517 host->base = io; 1518 + 1519 return 0; 1520 } 1521 ··· 1523 { 1524 if (host->base) 1525 release_region(host->base, 8); 1526 + 1527 host->base = 0; 1528 1529 if (host->config) 1530 release_region(host->config, 2); 1531 + 1532 host->config = 0; 1533 } 1534 ··· 1540 { 1541 if (dma < 0) 1542 return; 1543 + 1544 if (request_dma(dma, DRIVER_NAME)) 1545 goto err; 1546 + 1547 /* 1548 * We need to allocate a special buffer in 1549 * order for ISA to be able to DMA to it. ··· 1558 */ 1559 host->dma_addr = dma_map_single(host->mmc->dev, host->dma_buffer, 1560 WBSD_DMA_SIZE, DMA_BIDIRECTIONAL); 1561 + 1562 /* 1563 * ISA DMA must be aligned on a 64k basis. 1564 */ ··· 1571 goto kfree; 1572 1573 host->dma = dma; 1574 + 1575 return; 1576 + 1577 kfree: 1578 /* 1579 * If we've gotten here then there is some kind of alignment bug 1580 */ 1581 BUG_ON(1); 1582 + 1583 dma_unmap_single(host->mmc->dev, host->dma_addr, WBSD_DMA_SIZE, 1584 DMA_BIDIRECTIONAL); 1585 host->dma_addr = (dma_addr_t)NULL; 1586 + 1587 kfree(host->dma_buffer); 1588 host->dma_buffer = NULL; 1589 ··· 1604 kfree(host->dma_buffer); 1605 if (host->dma >= 0) 1606 free_dma(host->dma); 1607 + 1608 host->dma = -1; 1609 host->dma_buffer = NULL; 1610 host->dma_addr = (dma_addr_t)NULL; ··· 1617 static int __devinit wbsd_request_irq(struct wbsd_host* host, int irq) 1618 { 1619 int ret; 1620 + 1621 /* 1622 * Allocate interrupt. 1623 */ ··· 1625 ret = request_irq(irq, wbsd_irq, SA_SHIRQ, DRIVER_NAME, host); 1626 if (ret) 1627 return ret; 1628 + 1629 host->irq = irq; 1630 1631 /* ··· 1637 tasklet_init(&host->timeout_tasklet, wbsd_tasklet_timeout, (unsigned long)host); 1638 tasklet_init(&host->finish_tasklet, wbsd_tasklet_finish, (unsigned long)host); 1639 tasklet_init(&host->block_tasklet, wbsd_tasklet_block, (unsigned long)host); 1640 + 1641 return 0; 1642 } 1643 ··· 1647 return; 1648 1649 free_irq(host->irq, host); 1650 + 1651 host->irq = 0; 1652 + 1653 tasklet_kill(&host->card_tasklet); 1654 tasklet_kill(&host->fifo_tasklet); 1655 tasklet_kill(&host->crc_tasklet); ··· 1666 int base, int irq, int dma) 1667 { 1668 int ret; 1669 + 1670 /* 1671 * Allocate I/O ports. 1672 */ ··· 1685 * Allocate DMA. 1686 */ 1687 wbsd_request_dma(host, dma); 1688 + 1689 return 0; 1690 } 1691 ··· 1708 { 1709 /* 1710 * Reset the chip. 1711 + */ 1712 wbsd_write_config(host, WBSD_CONF_SWRST, 1); 1713 wbsd_write_config(host, WBSD_CONF_SWRST, 0); 1714 ··· 1716 * Select SD/MMC function. 1717 */ 1718 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); 1719 + 1720 /* 1721 * Set up card detection. 1722 */ 1723 wbsd_write_config(host, WBSD_CONF_PINS, WBSD_PINS_DETECT_GP11); 1724 + 1725 /* 1726 * Configure chip 1727 */ 1728 wbsd_write_config(host, WBSD_CONF_PORT_HI, host->base >> 8); 1729 wbsd_write_config(host, WBSD_CONF_PORT_LO, host->base & 0xff); 1730 + 1731 wbsd_write_config(host, WBSD_CONF_IRQ, host->irq); 1732 + 1733 if (host->dma >= 0) 1734 wbsd_write_config(host, WBSD_CONF_DRQ, host->dma); 1735 + 1736 /* 1737 * Enable and power up chip. 1738 */ ··· 1743 /* 1744 * Check that configured resources are correct. 1745 */ 1746 + 1747 static int __devinit wbsd_chip_validate(struct wbsd_host* host) 1748 { 1749 int base, irq, dma; 1750 + 1751 /* 1752 * Select SD/MMC function. 1753 */ 1754 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD); 1755 + 1756 /* 1757 * Read configuration. 1758 */ 1759 base = wbsd_read_config(host, WBSD_CONF_PORT_HI) << 8; 1760 base |= wbsd_read_config(host, WBSD_CONF_PORT_LO); 1761 + 1762 irq = wbsd_read_config(host, WBSD_CONF_IRQ); 1763 + 1764 dma = wbsd_read_config(host, WBSD_CONF_DRQ); 1765 + 1766 /* 1767 * Validate against given configuration. 1768 */ ··· 1772 return 0; 1773 if ((dma != host->dma) && (host->dma != -1)) 1774 return 0; 1775 + 1776 return 1; 1777 } 1778 ··· 1788 struct wbsd_host* host = NULL; 1789 struct mmc_host* mmc = NULL; 1790 int ret; 1791 + 1792 ret = wbsd_alloc_mmc(dev); 1793 if (ret) 1794 return ret; 1795 + 1796 mmc = dev_get_drvdata(dev); 1797 host = mmc_priv(mmc); 1798 + 1799 /* 1800 * Scan for hardware. 1801 */ ··· 1814 return ret; 1815 } 1816 } 1817 + 1818 /* 1819 * Request resources. 1820 */ ··· 1825 wbsd_free_mmc(dev); 1826 return ret; 1827 } 1828 + 1829 /* 1830 * See if chip needs to be configured. 1831 */ ··· 1842 } 1843 else 1844 wbsd_chip_config(host); 1845 + 1846 /* 1847 * Power Management stuff. No idea how this works. 1848 * Not tested. ··· 1860 * Reset the chip into a known state. 1861 */ 1862 wbsd_init_device(host); 1863 + 1864 mmc_add_host(mmc); 1865 1866 printk(KERN_INFO "%s: W83L51xD", mmc_hostname(mmc)); ··· 1882 { 1883 struct mmc_host* mmc = dev_get_drvdata(dev); 1884 struct wbsd_host* host; 1885 + 1886 if (!mmc) 1887 return; 1888 1889 host = mmc_priv(mmc); 1890 + 1891 mmc_remove_host(mmc); 1892 1893 if (!pnp) ··· 1900 wbsd_write_config(host, WBSD_CONF_ENABLE, 0); 1901 wbsd_lock_config(host); 1902 } 1903 + 1904 wbsd_release_resources(host); 1905 + 1906 wbsd_free_mmc(dev); 1907 } 1908 ··· 1932 wbsd_pnp_probe(struct pnp_dev * pnpdev, const struct pnp_device_id *dev_id) 1933 { 1934 int io, irq, dma; 1935 + 1936 /* 1937 * Get resources from PnP layer. 1938 */ ··· 1942 dma = pnp_dma(pnpdev, 0); 1943 else 1944 dma = -1; 1945 + 1946 DBGF("PnP resources: port %3x irq %d dma %d\n", io, irq, dma); 1947 + 1948 return wbsd_init(&pnpdev->dev, io, irq, dma, 1); 1949 } 1950 ··· 1985 .bus = &platform_bus_type, 1986 .probe = wbsd_probe, 1987 .remove = wbsd_remove, 1988 + 1989 .suspend = wbsd_suspend, 1990 .resume = wbsd_resume, 1991 }; ··· 2008 static int __init wbsd_drv_init(void) 2009 { 2010 int result; 2011 + 2012 printk(KERN_INFO DRIVER_NAME 2013 ": Winbond W83L51xD SD/MMC card interface driver, " 2014 DRIVER_VERSION "\n"); ··· 2023 return result; 2024 } 2025 2026 + #endif /* CONFIG_PNP */ 2027 + 2028 if (nopnp) 2029 { 2030 result = driver_register(&wbsd_driver); ··· 2046 2047 if (!nopnp) 2048 pnp_unregister_driver(&wbsd_pnp_driver); 2049 + 2050 + #endif /* CONFIG_PNP */ 2051 2052 if (nopnp) 2053 { 2054 platform_device_unregister(wbsd_device); 2055 + 2056 driver_unregister(&wbsd_driver); 2057 } 2058
+11 -12
drivers/mmc/wbsd.h
··· 139 struct wbsd_host 140 { 141 struct mmc_host* mmc; /* MMC structure */ 142 - 143 spinlock_t lock; /* Mutex */ 144 145 int flags; /* Driver states */ 146 147 #define WBSD_FCARD_PRESENT (1<<0) /* Card is present */ 148 #define WBSD_FIGNORE_DETECT (1<<1) /* Ignore card detection */ 149 - 150 struct mmc_request* mrq; /* Current request */ 151 - 152 u8 isr; /* Accumulated ISR */ 153 - 154 struct scatterlist* cur_sg; /* Current SG entry */ 155 unsigned int num_sg; /* Number of entries left */ 156 void* mapped_sg; /* vaddr of mapped sg */ 157 - 158 unsigned int offset; /* Offset into current entry */ 159 unsigned int remain; /* Data left in curren entry */ 160 161 int size; /* Total size of transfer */ 162 - 163 char* dma_buffer; /* ISA DMA buffer */ 164 dma_addr_t dma_addr; /* Physical address for same */ 165 166 int firsterr; /* See fifo functions */ 167 - 168 u8 clk; /* Current clock speed */ 169 unsigned char bus_width; /* Current bus width */ 170 - 171 int config; /* Config port */ 172 u8 unlock_code; /* Code to unlock config */ 173 174 int chip_id; /* ID of controller */ 175 - 176 int base; /* I/O port base */ 177 int irq; /* Interrupt */ 178 int dma; /* DMA channel */ 179 - 180 struct tasklet_struct card_tasklet; /* Tasklet structures */ 181 struct tasklet_struct fifo_tasklet; 182 struct tasklet_struct crc_tasklet; 183 struct tasklet_struct timeout_tasklet; 184 struct tasklet_struct finish_tasklet; 185 struct tasklet_struct block_tasklet; 186 - 187 - struct timer_list detect_timer; /* Card detection timer */ 188 struct timer_list ignore_timer; /* Ignore detection timer */ 189 };
··· 139 struct wbsd_host 140 { 141 struct mmc_host* mmc; /* MMC structure */ 142 + 143 spinlock_t lock; /* Mutex */ 144 145 int flags; /* Driver states */ 146 147 #define WBSD_FCARD_PRESENT (1<<0) /* Card is present */ 148 #define WBSD_FIGNORE_DETECT (1<<1) /* Ignore card detection */ 149 + 150 struct mmc_request* mrq; /* Current request */ 151 + 152 u8 isr; /* Accumulated ISR */ 153 + 154 struct scatterlist* cur_sg; /* Current SG entry */ 155 unsigned int num_sg; /* Number of entries left */ 156 void* mapped_sg; /* vaddr of mapped sg */ 157 + 158 unsigned int offset; /* Offset into current entry */ 159 unsigned int remain; /* Data left in curren entry */ 160 161 int size; /* Total size of transfer */ 162 + 163 char* dma_buffer; /* ISA DMA buffer */ 164 dma_addr_t dma_addr; /* Physical address for same */ 165 166 int firsterr; /* See fifo functions */ 167 + 168 u8 clk; /* Current clock speed */ 169 unsigned char bus_width; /* Current bus width */ 170 + 171 int config; /* Config port */ 172 u8 unlock_code; /* Code to unlock config */ 173 174 int chip_id; /* ID of controller */ 175 + 176 int base; /* I/O port base */ 177 int irq; /* Interrupt */ 178 int dma; /* DMA channel */ 179 + 180 struct tasklet_struct card_tasklet; /* Tasklet structures */ 181 struct tasklet_struct fifo_tasklet; 182 struct tasklet_struct crc_tasklet; 183 struct tasklet_struct timeout_tasklet; 184 struct tasklet_struct finish_tasklet; 185 struct tasklet_struct block_tasklet; 186 + 187 struct timer_list ignore_timer; /* Ignore detection timer */ 188 };