Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: mvebu: support running big-endian

Add indication we can run these cores in BE mode, and ensure that the
secondary CPU is set to big-endian mode in the initialisation code as
the initial code runs little-endian.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>

Ben Dooks bca028e7 50eec2fc

+8
+1
arch/arm/mach-mvebu/Kconfig
··· 1 1 config ARCH_MVEBU 2 2 bool "Marvell SOCs with Device Tree support" if ARCH_MULTI_V7 3 + select ARCH_SUPPORTS_BIG_ENDIAN 3 4 select CLKSRC_MMIO 4 5 select COMMON_CLK 5 6 select GENERIC_CLOCKEVENTS
+3
arch/arm/mach-mvebu/coherency_ll.S
··· 20 20 #define ARMADA_XP_CFB_CTL_REG_OFFSET 0x0 21 21 #define ARMADA_XP_CFB_CFG_REG_OFFSET 0x4 22 22 23 + #include <asm/assembler.h> 24 + 23 25 .text 24 26 /* 25 27 * r0: Coherency fabric base register address ··· 31 29 /* Create bit by cpu index */ 32 30 mov r3, #(1 << 24) 33 31 lsl r1, r3, r1 32 + ARM_BE8(rev r1, r1) 34 33 35 34 /* Add CPU to SMP group - Atomic */ 36 35 add r3, r0, #ARMADA_XP_CFB_CTL_REG_OFFSET
+4
arch/arm/mach-mvebu/headsmp.S
··· 21 21 #include <linux/linkage.h> 22 22 #include <linux/init.h> 23 23 24 + #include <asm/assembler.h> 25 + 24 26 /* 25 27 * Armada XP specific entry point for secondary CPUs. 26 28 * We add the CPU to the coherency fabric and then jump to secondary 27 29 * startup 28 30 */ 29 31 ENTRY(armada_xp_secondary_startup) 32 + ARM_BE8(setend be ) @ go BE8 if entered LE 33 + 30 34 /* Get coherency fabric base physical address */ 31 35 adr r0, 1f 32 36 ldr r1, [r0]