Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Loongarch: KVM: Add KVM hypercalls documentation for LoongArch

Add documentation topic for using pv_virt when running as a guest
on KVM hypervisor.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
Co-developed-by: Mingcong Bai <jeffbai@aosc.io>
Signed-off-by: Mingcong Bai <jeffbai@aosc.io>
Link: https://lore.kernel.org/all/5c338084b1bcccc1d57dce9ddb1e7081@aosc.io/
Signed-off-by: Dandan Zhang <zhangdandan@uniontech.com>
[jc: fixed htmldocs build error]
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Link: https://lore.kernel.org/r/4769C036576F8816+20240828045950.3484113-1-zhangdandan@uniontech.com

authored by

Bibo Mao and committed by
Jonathan Corbet
bc6cb620 e04eb52b

+101
+1
Documentation/virt/kvm/index.rst
··· 14 14 s390/index 15 15 ppc-pv 16 16 x86/index 17 + loongarch/index 17 18 18 19 locking 19 20 vcpu-requests
+89
Documentation/virt/kvm/loongarch/hypercalls.rst
··· 1 + .. SPDX-License-Identifier: GPL-2.0 2 + 3 + =================================== 4 + The LoongArch paravirtual interface 5 + =================================== 6 + 7 + KVM hypercalls use the HVCL instruction with code 0x100 and the hypercall 8 + number is put in a0. Up to five arguments may be placed in registers a1 - a5. 9 + The return value is placed in v0 (an alias of a0). 10 + 11 + Source code for this interface can be found in arch/loongarch/kvm*. 12 + 13 + Querying for existence 14 + ====================== 15 + 16 + To determine if the host is running on KVM, we can utilize the cpucfg() 17 + function at index CPUCFG_KVM_BASE (0x40000000). 18 + 19 + The CPUCFG_KVM_BASE range, spanning from 0x40000000 to 0x400000FF, The 20 + CPUCFG_KVM_BASE range between 0x40000000 - 0x400000FF is marked as reserved. 21 + Consequently, all current and future processors will not implement any 22 + feature within this range. 23 + 24 + On a KVM-virtualized Linux system, a read operation on cpucfg() at index 25 + CPUCFG_KVM_BASE (0x40000000) returns the magic string 'KVM\0'. 26 + 27 + Once you have determined that your host is running on a paravirtualization- 28 + capable KVM, you may now use hypercalls as described below. 29 + 30 + KVM hypercall ABI 31 + ================= 32 + 33 + The KVM hypercall ABI is simple, with one scratch register a0 (v0) and at most 34 + five generic registers (a1 - a5) used as input parameters. The FP (Floating- 35 + point) and vector registers are not utilized as input registers and must 36 + remain unmodified during a hypercall. 37 + 38 + Hypercall functions can be inlined as it only uses one scratch register. 39 + 40 + The parameters are as follows: 41 + 42 + ======== ================= ================ 43 + Register IN OUT 44 + ======== ================= ================ 45 + a0 function number Return code 46 + a1 1st parameter - 47 + a2 2nd parameter - 48 + a3 3rd parameter - 49 + a4 4th parameter - 50 + a5 5th parameter - 51 + ======== ================= ================ 52 + 53 + The return codes may be one of the following: 54 + 55 + ==== ========================= 56 + Code Meaning 57 + ==== ========================= 58 + 0 Success 59 + -1 Hypercall not implemented 60 + -2 Bad Hypercall parameter 61 + ==== ========================= 62 + 63 + KVM Hypercalls Documentation 64 + ============================ 65 + 66 + The template for each hypercall is as follows: 67 + 68 + 1. Hypercall name 69 + 2. Purpose 70 + 71 + 1. KVM_HCALL_FUNC_IPI 72 + ------------------------ 73 + 74 + :Purpose: Send IPIs to multiple vCPUs. 75 + 76 + - a0: KVM_HCALL_FUNC_IPI 77 + - a1: Lower part of the bitmap for destination physical CPUIDs 78 + - a2: Higher part of the bitmap for destination physical CPUIDs 79 + - a3: The lowest physical CPUID in the bitmap 80 + 81 + The hypercall lets a guest send multiple IPIs (Inter-Process Interrupts) with 82 + at most 128 destinations per hypercall. The destinations are represented in a 83 + bitmap contained in the first two input registers (a1 and a2). 84 + 85 + Bit 0 of a1 corresponds to the physical CPUID in the third input register (a3) 86 + and bit 1 corresponds to the physical CPUID in a3+1, and so on. 87 + 88 + PV IPI on LoongArch includes both PV IPI multicast sending and PV IPI receiving, 89 + and SWI is used for PV IPI inject since there is no VM-exits accessing SWI registers.
+10
Documentation/virt/kvm/loongarch/index.rst
··· 1 + .. SPDX-License-Identifier: GPL-2.0 2 + 3 + ========================= 4 + KVM for LoongArch systems 5 + ========================= 6 + 7 + .. toctree:: 8 + :maxdepth: 2 9 + 10 + hypercalls.rst
+1
MAINTAINERS
··· 12299 12299 L: loongarch@lists.linux.dev 12300 12300 S: Maintained 12301 12301 T: git git://git.kernel.org/pub/scm/virt/kvm/kvm.git 12302 + F: Documentation/virt/kvm/loongarch/ 12302 12303 F: arch/loongarch/include/asm/kvm* 12303 12304 F: arch/loongarch/include/uapi/asm/kvm* 12304 12305 F: arch/loongarch/kvm/