phy: qcom-qmp: pcs: Add v8.50 register offsets

The new Glymur SoC bumps up the HW version of QMP phy to v8.50 for PCIE
g5x4. Add the new PCS offsets in a dedicated header file.

Signed-off-by: Prudhvi Yarlagadda <[e-mail]>
Signed-off-by: Wenbin Yao <[e-mail]>
Reviewed-by: Dmitry Baryshkov <[e-mail]>
Signed-off-by: Qiang Yu <[e-mail]>
Link: https://patch.msgid.link/[e-mail]
Signed-off-by: Vinod Koul <[e-mail]>

drivers/phy/qualcomm/phy-qcom-qmp-pcs-v8_50.h

···
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#ifndef QCOM_PHY_QMP_PCS_V8_50_H_
+#define QCOM_PHY_QMP_PCS_V8_50_H_
+
+#define QPHY_V8_50_PCS_STATUS1			0x010
+#define QPHY_V8_50_PCS_START_CONTROL			0x05c
+#define QPHY_V8_50_PCS_POWER_DOWN_CONTROL			0x64
+
+#endif

drivers/phy/qualcomm/phy-qcom-qmp.h

···
 
 #include "phy-qcom-qmp-pcs-v8.h"
 
+#include "phy-qcom-qmp-pcs-v8_50.h"
+
 /* QPHY_SW_RESET bit */
 #define SW_RESET				BIT(0)
 /* QPHY_POWER_DOWN_CONTROL */