Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

net/mlx5: Remove spinlock support from mlx5_write64

As there is no user of mlx5_write64 that passes a spinlock to
mlx5_write64, remove this functionality and simplify the function.

Signed-off-by: Maxim Mikityanskiy <maximmi@mellanox.com>
Reviewed-by: Eran Ben Elisha <eranbe@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>

authored by

Maxim Mikityanskiy and committed by
Saeed Mahameed
bbf29f61 38702cce

+13 -26
+1 -1
drivers/infiniband/hw/mlx5/qp.c
··· 5015 5015 wmb(); 5016 5016 5017 5017 /* currently we support only regular doorbells */ 5018 - mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset, NULL); 5018 + mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset); 5019 5019 /* Make sure doorbells don't leak out of SQ spinlock 5020 5020 * and reach the HCA out of order. 5021 5021 */
+1 -1
drivers/net/ethernet/mellanox/mlx5/core/en.h
··· 916 916 */ 917 917 wmb(); 918 918 919 - mlx5_write64((__be32 *)ctrl, uar_map, NULL); 919 + mlx5_write64((__be32 *)ctrl, uar_map); 920 920 } 921 921 922 922 static inline void mlx5e_cq_arm(struct mlx5e_cq *cq)
+1 -1
drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c
··· 135 135 *conn->qp.wq.sq.db = cpu_to_be32(conn->qp.sq.pc); 136 136 /* Make sure that doorbell record is visible before ringing */ 137 137 wmb(); 138 - mlx5_write64(wqe, conn->fdev->conn_res.uar->map + MLX5_BF_OFFSET, NULL); 138 + mlx5_write64(wqe, conn->fdev->conn_res.uar->map + MLX5_BF_OFFSET); 139 139 } 140 140 141 141 static void mlx5_fpga_conn_post_send(struct mlx5_fpga_conn *conn,
+1 -1
include/linux/mlx5/cq.h
··· 170 170 doorbell[0] = cpu_to_be32(sn << 28 | cmd | ci); 171 171 doorbell[1] = cpu_to_be32(cq->cqn); 172 172 173 - mlx5_write64(doorbell, uar_page + MLX5_CQ_DOORBELL, NULL); 173 + mlx5_write64(doorbell, uar_page + MLX5_CQ_DOORBELL); 174 174 } 175 175 176 176 static inline void mlx5_cq_hold(struct mlx5_core_cq *cq)
+9 -22
include/linux/mlx5/doorbell.h
··· 36 36 #define MLX5_BF_OFFSET 0x800 37 37 #define MLX5_CQ_DOORBELL 0x20 38 38 39 - #if BITS_PER_LONG == 64 40 39 /* Assume that we can just write a 64-bit doorbell atomically. s390 41 40 * actually doesn't have writeq() but S/390 systems don't even have 42 41 * PCI so we won't worry about it. 42 + * 43 + * Note that the write is not atomic on 32-bit systems! In contrast to 64-bit 44 + * ones, it requires proper locking. mlx5_write64 doesn't do any locking, so use 45 + * it at your own discretion, protected by some kind of lock on 32 bits. 46 + * 47 + * TODO: use write{q,l}_relaxed() 43 48 */ 44 49 45 - static inline void mlx5_write64(__be32 val[2], void __iomem *dest, 46 - spinlock_t *doorbell_lock) 50 + static inline void mlx5_write64(__be32 val[2], void __iomem *dest) 47 51 { 52 + #if BITS_PER_LONG == 64 48 53 __raw_writeq(*(u64 *)val, dest); 49 - } 50 - 51 54 #else 52 - 53 - /* Just fall back to a spinlock to protect the doorbell if 54 - * BITS_PER_LONG is 32 -- there's no portable way to do atomic 64-bit 55 - * MMIO writes. 56 - */ 57 - 58 - static inline void mlx5_write64(__be32 val[2], void __iomem *dest, 59 - spinlock_t *doorbell_lock) 60 - { 61 - unsigned long flags; 62 - 63 - if (doorbell_lock) 64 - spin_lock_irqsave(doorbell_lock, flags); 65 55 __raw_writel((__force u32) val[0], dest); 66 56 __raw_writel((__force u32) val[1], dest + 4); 67 - if (doorbell_lock) 68 - spin_unlock_irqrestore(doorbell_lock, flags); 69 - } 70 - 71 57 #endif 58 + } 72 59 73 60 #endif /* MLX5_DOORBELL_H */