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dt-bindings: opp: Convert ti-omap5-opp-supply to json schema

Rename ti-omap5-opp-supply to be bit more generic omap-opp-supply and
convert the free text binding to json-schema.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>

authored by

Nishanth Menon and committed by
Viresh Kumar
bbc2bf13 a5a29791

+101 -63
+101
Documentation/devicetree/bindings/opp/ti,omap-opp-supply.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/opp/ti,omap-opp-supply.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Texas Instruments OMAP compatible OPP supply 8 + 9 + description: 10 + OMAP5, DRA7, and AM57 families of SoCs have Class 0 AVS eFuse 11 + registers, which contain OPP-specific voltage information tailored 12 + for the specific device. This binding provides the information 13 + needed to describe such a hardware values and relate them to program 14 + the primary regulator during an OPP transition. 15 + 16 + Also, some supplies may have an associated vbb-supply, an Adaptive 17 + Body Bias regulator, which must transition in a specific sequence 18 + w.r.t the vdd-supply and clk when making an OPP transition. By 19 + supplying two regulators to the device that will undergo OPP 20 + transitions, we can use the multi-regulator support implemented by 21 + the OPP core to describe both regulators the platform needs. The 22 + OPP core binding Documentation/devicetree/bindings/opp/opp-v2.yaml 23 + provides further information (refer to Example 4 Handling multiple 24 + regulators). 25 + 26 + maintainers: 27 + - Nishanth Menon <nm@ti.com> 28 + 29 + properties: 30 + $nodename: 31 + pattern: '^opp-supply(@[0-9a-f]+)?$' 32 + 33 + compatible: 34 + oneOf: 35 + - description: Basic OPP supply controlling VDD and VBB 36 + const: ti,omap-opp-supply 37 + - description: OMAP5+ optimized voltages in efuse(Class 0) VDD along with 38 + VBB. 39 + const: ti,omap5-opp-supply 40 + - description: OMAP5+ optimized voltages in efuse(class0) VDD but no VBB 41 + const: ti,omap5-core-opp-supply 42 + 43 + reg: 44 + maxItems: 1 45 + 46 + ti,absolute-max-voltage-uv: 47 + $ref: /schemas/types.yaml#/definitions/uint32 48 + description: Absolute maximum voltage for the OPP supply in micro-volts. 49 + minimum: 750000 50 + maximum: 1500000 51 + 52 + ti,efuse-settings: 53 + description: An array of u32 tuple items providing information about 54 + optimized efuse configuration. 55 + minItems: 1 56 + $ref: /schemas/types.yaml#/definitions/uint32-matrix 57 + items: 58 + items: 59 + - description: Reference voltage in micro-volts (OPP Voltage) 60 + minimum: 750000 61 + maximum: 1500000 62 + multipleOf: 10000 63 + - description: efuse offset where the optimized voltage is located 64 + multipleOf: 4 65 + maximum: 256 66 + 67 + required: 68 + - compatible 69 + - ti,absolute-max-voltage-uv 70 + 71 + allOf: 72 + - if: 73 + not: 74 + properties: 75 + compatible: 76 + contains: 77 + const: ti,omap-opp-supply 78 + then: 79 + required: 80 + - reg 81 + - ti,efuse-settings 82 + 83 + additionalProperties: false 84 + 85 + examples: 86 + - | 87 + opp-supply { 88 + compatible = "ti,omap-opp-supply"; 89 + ti,absolute-max-voltage-uv = <1375000>; 90 + }; 91 + - | 92 + opp-supply@4a003b20 { 93 + compatible = "ti,omap5-opp-supply"; 94 + reg = <0x4a003b20 0x8>; 95 + ti,efuse-settings = 96 + /* uV offset */ 97 + <1060000 0x0>, 98 + <1160000 0x4>, 99 + <1210000 0x8>; 100 + ti,absolute-max-voltage-uv = <1500000>; 101 + };
-63
Documentation/devicetree/bindings/opp/ti-omap5-opp-supply.txt
··· 1 - Texas Instruments OMAP compatible OPP supply description 2 - 3 - OMAP5, DRA7, and AM57 family of SoCs have Class0 AVS eFuse registers which 4 - contain data that can be used to adjust voltages programmed for some of their 5 - supplies for more efficient operation. This binding provides the information 6 - needed to read these values and use them to program the main regulator during 7 - an OPP transitions. 8 - 9 - Also, some supplies may have an associated vbb-supply which is an Adaptive Body 10 - Bias regulator which much be transitioned in a specific sequence with regards 11 - to the vdd-supply and clk when making an OPP transition. By supplying two 12 - regulators to the device that will undergo OPP transitions we can make use 13 - of the multi regulator binding that is part of the OPP core described here [1] 14 - to describe both regulators needed by the platform. 15 - 16 - [1] Documentation/devicetree/bindings/opp/opp-v2.yaml 17 - 18 - Required Properties for Device Node: 19 - - vdd-supply: phandle to regulator controlling VDD supply 20 - - vbb-supply: phandle to regulator controlling Body Bias supply 21 - (Usually Adaptive Body Bias regulator) 22 - 23 - Required Properties for opp-supply node: 24 - - compatible: Should be one of: 25 - "ti,omap-opp-supply" - basic OPP supply controlling VDD and VBB 26 - "ti,omap5-opp-supply" - OMAP5+ optimized voltages in efuse(class0)VDD 27 - along with VBB 28 - "ti,omap5-core-opp-supply" - OMAP5+ optimized voltages in efuse(class0) VDD 29 - but no VBB. 30 - - reg: Address and length of the efuse register set for the device (mandatory 31 - only for "ti,omap5-opp-supply") 32 - - ti,efuse-settings: An array of u32 tuple items providing information about 33 - optimized efuse configuration. Each item consists of the following: 34 - volt: voltage in uV - reference voltage (OPP voltage) 35 - efuse_offseet: efuse offset from reg where the optimized voltage is stored. 36 - - ti,absolute-max-voltage-uv: absolute maximum voltage for the OPP supply. 37 - 38 - Example: 39 - 40 - /* Device Node (CPU) */ 41 - cpus { 42 - cpu0: cpu@0 { 43 - device_type = "cpu"; 44 - 45 - ... 46 - 47 - vdd-supply = <&vcc>; 48 - vbb-supply = <&abb_mpu>; 49 - }; 50 - }; 51 - 52 - /* OMAP OPP Supply with Class0 registers */ 53 - opp_supply_mpu: opp_supply@4a003b20 { 54 - compatible = "ti,omap5-opp-supply"; 55 - reg = <0x4a003b20 0x8>; 56 - ti,efuse-settings = < 57 - /* uV offset */ 58 - 1060000 0x0 59 - 1160000 0x4 60 - 1210000 0x8 61 - >; 62 - ti,absolute-max-voltage-uv = <1500000>; 63 - };