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drm/i915/display: convert intel_ddi_buf_trans.c to struct intel_display

Going forward, struct intel_display is the main device data structure
for display. Switch to it.

For MISSING_CASE(), log the PCI ID instead of the platform to get rid of
the i915_drv.h dependency.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250204134228.2934744-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Jani Nikula bb68ce5d 8de6a113

+33 -25
+33 -25
drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
··· 3 3 * Copyright © 2020 Intel Corporation 4 4 */ 5 5 6 - #include "i915_drv.h" 6 + #include "i915_utils.h" 7 + #include "intel_cx0_phy.h" 7 8 #include "intel_ddi.h" 8 9 #include "intel_ddi_buf_trans.h" 9 10 #include "intel_de.h" 10 11 #include "intel_display_types.h" 11 12 #include "intel_dp.h" 12 - #include "intel_cx0_phy.h" 13 13 14 14 /* HDMI/DVI modes ignore everything but the last 2 items. So we share 15 15 * them for both DP and FDI transports, allowing those ports to ··· 1407 1407 const struct intel_crtc_state *crtc_state, 1408 1408 int *n_entries) 1409 1409 { 1410 - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 1410 + struct intel_display *display = to_intel_display(encoder); 1411 1411 1412 1412 if (crtc_state->port_clock > 270000) { 1413 - if (IS_TIGERLAKE_UY(dev_priv)) { 1413 + if (display->platform.tigerlake_uy) { 1414 1414 return intel_get_buf_trans(&tgl_uy_combo_phy_trans_dp_hbr2, 1415 1415 n_entries); 1416 1416 } else { ··· 1709 1709 1710 1710 void intel_ddi_buf_trans_init(struct intel_encoder *encoder) 1711 1711 { 1712 - struct drm_i915_private *i915 = to_i915(encoder->base.dev); 1712 + struct intel_display *display = to_intel_display(encoder); 1713 1713 1714 - if (DISPLAY_VER(i915) >= 14) { 1714 + if (DISPLAY_VER(display) >= 14) { 1715 1715 if (intel_encoder_is_c10phy(encoder)) 1716 1716 encoder->get_buf_trans = mtl_get_c10_buf_trans; 1717 1717 else 1718 1718 encoder->get_buf_trans = mtl_get_c20_buf_trans; 1719 - } else if (IS_DG2(i915)) { 1719 + } else if (display->platform.dg2) { 1720 1720 encoder->get_buf_trans = dg2_get_snps_buf_trans; 1721 - } else if (IS_ALDERLAKE_P(i915)) { 1721 + } else if (display->platform.alderlake_p) { 1722 1722 if (intel_encoder_is_combo(encoder)) 1723 1723 encoder->get_buf_trans = adlp_get_combo_buf_trans; 1724 1724 else 1725 1725 encoder->get_buf_trans = adlp_get_dkl_buf_trans; 1726 - } else if (IS_ALDERLAKE_S(i915)) { 1726 + } else if (display->platform.alderlake_s) { 1727 1727 encoder->get_buf_trans = adls_get_combo_buf_trans; 1728 - } else if (IS_ROCKETLAKE(i915)) { 1728 + } else if (display->platform.rocketlake) { 1729 1729 encoder->get_buf_trans = rkl_get_combo_buf_trans; 1730 - } else if (IS_DG1(i915)) { 1730 + } else if (display->platform.dg1) { 1731 1731 encoder->get_buf_trans = dg1_get_combo_buf_trans; 1732 - } else if (DISPLAY_VER(i915) >= 12) { 1732 + } else if (DISPLAY_VER(display) >= 12) { 1733 1733 if (intel_encoder_is_combo(encoder)) 1734 1734 encoder->get_buf_trans = tgl_get_combo_buf_trans; 1735 1735 else 1736 1736 encoder->get_buf_trans = tgl_get_dkl_buf_trans; 1737 - } else if (DISPLAY_VER(i915) == 11) { 1738 - if (IS_JASPERLAKE(i915)) 1737 + } else if (DISPLAY_VER(display) == 11) { 1738 + if (display->platform.jasperlake) 1739 1739 encoder->get_buf_trans = jsl_get_combo_buf_trans; 1740 - else if (IS_ELKHARTLAKE(i915)) 1740 + else if (display->platform.elkhartlake) 1741 1741 encoder->get_buf_trans = ehl_get_combo_buf_trans; 1742 1742 else if (intel_encoder_is_combo(encoder)) 1743 1743 encoder->get_buf_trans = icl_get_combo_buf_trans; 1744 1744 else 1745 1745 encoder->get_buf_trans = icl_get_mg_buf_trans; 1746 - } else if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) { 1746 + } else if (display->platform.geminilake || display->platform.broxton) { 1747 1747 encoder->get_buf_trans = bxt_get_buf_trans; 1748 - } else if (IS_COMETLAKE_ULX(i915) || IS_COFFEELAKE_ULX(i915) || IS_KABYLAKE_ULX(i915)) { 1748 + } else if (display->platform.cometlake_ulx || 1749 + display->platform.coffeelake_ulx || 1750 + display->platform.kabylake_ulx) { 1749 1751 encoder->get_buf_trans = kbl_y_get_buf_trans; 1750 - } else if (IS_COMETLAKE_ULT(i915) || IS_COFFEELAKE_ULT(i915) || IS_KABYLAKE_ULT(i915)) { 1752 + } else if (display->platform.cometlake_ult || 1753 + display->platform.coffeelake_ult || 1754 + display->platform.kabylake_ult) { 1751 1755 encoder->get_buf_trans = kbl_u_get_buf_trans; 1752 - } else if (IS_COMETLAKE(i915) || IS_COFFEELAKE(i915) || IS_KABYLAKE(i915)) { 1756 + } else if (display->platform.cometlake || 1757 + display->platform.coffeelake || 1758 + display->platform.kabylake) { 1753 1759 encoder->get_buf_trans = kbl_get_buf_trans; 1754 - } else if (IS_SKYLAKE_ULX(i915)) { 1760 + } else if (display->platform.skylake_ulx) { 1755 1761 encoder->get_buf_trans = skl_y_get_buf_trans; 1756 - } else if (IS_SKYLAKE_ULT(i915)) { 1762 + } else if (display->platform.skylake_ult) { 1757 1763 encoder->get_buf_trans = skl_u_get_buf_trans; 1758 - } else if (IS_SKYLAKE(i915)) { 1764 + } else if (display->platform.skylake) { 1759 1765 encoder->get_buf_trans = skl_get_buf_trans; 1760 - } else if (IS_BROADWELL(i915)) { 1766 + } else if (display->platform.broadwell) { 1761 1767 encoder->get_buf_trans = bdw_get_buf_trans; 1762 - } else if (IS_HASWELL(i915)) { 1768 + } else if (display->platform.haswell) { 1763 1769 encoder->get_buf_trans = hsw_get_buf_trans; 1764 1770 } else { 1765 - MISSING_CASE(INTEL_INFO(i915)->platform); 1771 + struct pci_dev *pdev = to_pci_dev(display->drm->dev); 1772 + 1773 + MISSING_CASE(pdev->device); 1766 1774 } 1767 1775 }