Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: davinci: da850: add ECAP & EHRPWM clock nodes

Add ECAP and EHRPWM module clock nodes. Also add a clock
node for TBCLK for EHRWPM.

Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>

authored by

Philip Avinash and committed by
Sekhar Nori
bb170e61 c6007ffe

+47
+46
arch/arm/mach-davinci/da850.c
··· 383 383 .flags = PSC_LRST | PSC_FORCE, 384 384 }; 385 385 386 + static struct clk ehrpwm_clk = { 387 + .name = "ehrpwm", 388 + .parent = &pll0_sysclk2, 389 + .lpsc = DA8XX_LPSC1_PWM, 390 + .gpsc = 1, 391 + .flags = DA850_CLK_ASYNC3, 392 + }; 393 + 394 + #define DA8XX_EHRPWM_TBCLKSYNC BIT(12) 395 + 396 + static void ehrpwm_tblck_enable(struct clk *clk) 397 + { 398 + u32 val; 399 + 400 + val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG)); 401 + val |= DA8XX_EHRPWM_TBCLKSYNC; 402 + writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG)); 403 + } 404 + 405 + static void ehrpwm_tblck_disable(struct clk *clk) 406 + { 407 + u32 val; 408 + 409 + val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG)); 410 + val &= ~DA8XX_EHRPWM_TBCLKSYNC; 411 + writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG)); 412 + } 413 + 414 + static struct clk ehrpwm_tbclk = { 415 + .name = "ehrpwm_tbclk", 416 + .parent = &ehrpwm_clk, 417 + .clk_enable = ehrpwm_tblck_enable, 418 + .clk_disable = ehrpwm_tblck_disable, 419 + }; 420 + 421 + static struct clk ecap_clk = { 422 + .name = "ecap", 423 + .parent = &pll0_sysclk2, 424 + .lpsc = DA8XX_LPSC1_ECAP, 425 + .gpsc = 1, 426 + .flags = DA850_CLK_ASYNC3, 427 + }; 428 + 386 429 static struct clk_lookup da850_clks[] = { 387 430 CLK(NULL, "ref", &ref_clk), 388 431 CLK(NULL, "pll0", &pll0_clk), ··· 473 430 CLK("vpif", NULL, &vpif_clk), 474 431 CLK("ahci", NULL, &sata_clk), 475 432 CLK("davinci-rproc.0", NULL, &dsp_clk), 433 + CLK("ehrpwm", "fck", &ehrpwm_clk), 434 + CLK("ehrpwm", "tbclk", &ehrpwm_tbclk), 435 + CLK("ecap", "fck", &ecap_clk), 476 436 CLK(NULL, NULL, NULL), 477 437 }; 478 438
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arch/arm/mach-davinci/include/mach/da8xx.h
··· 55 55 #define DA8XX_SYSCFG0_VIRT(x) (da8xx_syscfg0_base + (x)) 56 56 #define DA8XX_JTAG_ID_REG 0x18 57 57 #define DA8XX_CFGCHIP0_REG 0x17c 58 + #define DA8XX_CFGCHIP1_REG 0x180 58 59 #define DA8XX_CFGCHIP2_REG 0x184 59 60 #define DA8XX_CFGCHIP3_REG 0x188 60 61