Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

m68knommu: move ColdFire DMA register addresses to per-cpu headers

The base addresses of the ColdFire DMA unit registers belong with
all the other address definitions in the per-cpu headers. The current
definitions assume they are relative to an MBAR register. Not all
ColdFire CPUs have an MBAR register. A clean address define can only
be acheived in the per-cpu headers along with all the other chips
peripheral base addresses.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>

+58 -27
+3
arch/m68k/include/asm/m5206sim.h
··· 92 92 #define MCFSIM_PADDR (MCF_MBAR + 0x1c5) /* Parallel Direction (r/w) */ 93 93 #define MCFSIM_PADAT (MCF_MBAR + 0x1c9) /* Parallel Port Value (r/w) */ 94 94 95 + #define MCFDMA_BASE0 (MCF_MBAR + 0x200) /* Base address DMA 0 */ 96 + #define MCFDMA_BASE1 (MCF_MBAR + 0x240) /* Base address DMA 1 */ 97 + 95 98 #if defined(CONFIG_NETtel) 96 99 #define MCFUART_BASE1 0x180 /* Base address of UART1 */ 97 100 #define MCFUART_BASE2 0x140 /* Base address of UART2 */
+9
arch/m68k/include/asm/m523xsim.h
··· 160 160 */ 161 161 #define MCFGPIO_PAR_QSPI (MCF_IPSBAR + 0x10004A) 162 162 #define MCFGPIO_PAR_TIMER (MCF_IPSBAR + 0x10004C) 163 + 164 + /* 165 + * DMA unit base addresses. 166 + */ 167 + #define MCFDMA_BASE0 (MCF_IPSBAR + 0x100) 168 + #define MCFDMA_BASE1 (MCF_IPSBAR + 0x140) 169 + #define MCFDMA_BASE2 (MCF_IPSBAR + 0x180) 170 + #define MCFDMA_BASE3 (MCF_IPSBAR + 0x1C0) 171 + 163 172 /****************************************************************************/ 164 173 #endif /* m523xsim_h */
+8
arch/m68k/include/asm/m5249sim.h
··· 73 73 #define MCFUART_BASE2 0x200 /* Base address of UART2 */ 74 74 75 75 /* 76 + * DMA unit base addresses. 77 + */ 78 + #define MCFDMA_BASE0 (MCF_MBAR + 0x300) /* Base address DMA 0 */ 79 + #define MCFDMA_BASE1 (MCF_MBAR + 0x340) /* Base address DMA 1 */ 80 + #define MCFDMA_BASE2 (MCF_MBAR + 0x380) /* Base address DMA 2 */ 81 + #define MCFDMA_BASE3 (MCF_MBAR + 0x3C0) /* Base address DMA 3 */ 82 + 83 + /* 76 84 * Some symbol defines for the above... 77 85 */ 78 86 #define MCFSIM_SWDICR MCFSIM_ICR0 /* Watchdog timer ICR */
+2
arch/m68k/include/asm/m5272sim.h
··· 80 80 #define MCFSIM_PCDAT (MCF_MBAR + 0x96) /* Port C Data (r/w) */ 81 81 #define MCFSIM_PDCNT (MCF_MBAR + 0x98) /* Port D Control (r/w) */ 82 82 83 + #define MCFDMA_BASE0 (MCF_MBAR + 0xe0) /* Base address DMA 0 */ 84 + 83 85 /* 84 86 * Define system peripheral IRQ usage. 85 87 */
+8
arch/m68k/include/asm/m527xsim.h
··· 61 61 #endif 62 62 63 63 /* 64 + * DMA unit base addresses. 65 + */ 66 + #define MCFDMA_BASE0 (MCF_IPSBAR + 0x100) 67 + #define MCFDMA_BASE1 (MCF_IPSBAR + 0x140) 68 + #define MCFDMA_BASE2 (MCF_IPSBAR + 0x180) 69 + #define MCFDMA_BASE3 (MCF_IPSBAR + 0x1C0) 70 + 71 + /* 64 72 * UART module. 65 73 */ 66 74 #define MCFUART_BASE1 (MCF_IPSBAR + 0x200)
+8
arch/m68k/include/asm/m528xsim.h
··· 47 47 #define MCFSIM_DMR1 0x54 /* SDRAM address mask 1 */ 48 48 49 49 /* 50 + * DMA unit base addresses. 51 + */ 52 + #define MCFDMA_BASE0 (MCF_IPSBAR + 0x00000100) 53 + #define MCFDMA_BASE1 (MCF_IPSBAR + 0x00000140) 54 + #define MCFDMA_BASE2 (MCF_IPSBAR + 0x00000180) 55 + #define MCFDMA_BASE3 (MCF_IPSBAR + 0x000001C0) 56 + 57 + /* 50 58 * UART module. 51 59 */ 52 60 #define MCFUART_BASE1 (MCF_IPSBAR + 0x00000200)
+8
arch/m68k/include/asm/m5307sim.h
··· 99 99 #define MCFSIM_PADAT (MCF_MBAR + 0x248) 100 100 101 101 /* 102 + * DMA unit base addresses. 103 + */ 104 + #define MCFDMA_BASE0 (MCF_MBAR + 0x300) /* Base address DMA 0 */ 105 + #define MCFDMA_BASE1 (MCF_MBAR + 0x340) /* Base address DMA 1 */ 106 + #define MCFDMA_BASE2 (MCF_MBAR + 0x380) /* Base address DMA 2 */ 107 + #define MCFDMA_BASE3 (MCF_MBAR + 0x3C0) /* Base address DMA 3 */ 108 + 109 + /* 102 110 * UART module. 103 111 */ 104 112 #if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3)
+8
arch/m68k/include/asm/m5407sim.h
··· 85 85 #define MCFSIM_PADAT (MCF_MBAR + 0x248) 86 86 87 87 /* 88 + * DMA unit base addresses. 89 + */ 90 + #define MCFDMA_BASE0 (MCF_MBAR + 0x300) /* Base address DMA 0 */ 91 + #define MCFDMA_BASE1 (MCF_MBAR + 0x340) /* Base address DMA 1 */ 92 + #define MCFDMA_BASE2 (MCF_MBAR + 0x380) /* Base address DMA 2 */ 93 + #define MCFDMA_BASE3 (MCF_MBAR + 0x3C0) /* Base address DMA 3 */ 94 + 95 + /* 88 96 * Generic GPIO support 89 97 */ 90 98 #define MCFGPIO_PIN_MAX 16
-23
arch/m68k/include/asm/mcfdma.h
··· 11 11 #define mcfdma_h 12 12 /****************************************************************************/ 13 13 14 - 15 - /* 16 - * Get address specific defines for this Coldfire member. 17 - */ 18 - #if defined(CONFIG_M5206) || defined(CONFIG_M5206e) 19 - #define MCFDMA_BASE0 0x200 /* Base address of DMA 0 */ 20 - #define MCFDMA_BASE1 0x240 /* Base address of DMA 1 */ 21 - #elif defined(CONFIG_M5272) 22 - #define MCFDMA_BASE0 0x0e0 /* Base address of DMA 0 */ 23 - #elif defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) 24 - /* These are relative to the IPSBAR, not MBAR */ 25 - #define MCFDMA_BASE0 0x100 /* Base address of DMA 0 */ 26 - #define MCFDMA_BASE1 0x140 /* Base address of DMA 1 */ 27 - #define MCFDMA_BASE2 0x180 /* Base address of DMA 2 */ 28 - #define MCFDMA_BASE3 0x1C0 /* Base address of DMA 3 */ 29 - #elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407) 30 - #define MCFDMA_BASE0 0x300 /* Base address of DMA 0 */ 31 - #define MCFDMA_BASE1 0x340 /* Base address of DMA 1 */ 32 - #define MCFDMA_BASE2 0x380 /* Base address of DMA 2 */ 33 - #define MCFDMA_BASE3 0x3C0 /* Base address of DMA 3 */ 34 - #endif 35 - 36 - 37 14 #if !defined(CONFIG_M5272) 38 15 39 16 /*
+4 -4
arch/m68knommu/platform/coldfire/dma.c
··· 21 21 */ 22 22 unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { 23 23 #ifdef MCFDMA_BASE0 24 - MCF_MBAR + MCFDMA_BASE0, 24 + MCFDMA_BASE0, 25 25 #endif 26 26 #ifdef MCFDMA_BASE1 27 - MCF_MBAR + MCFDMA_BASE1, 27 + MCFDMA_BASE1, 28 28 #endif 29 29 #ifdef MCFDMA_BASE2 30 - MCF_MBAR + MCFDMA_BASE2, 30 + MCFDMA_BASE2, 31 31 #endif 32 32 #ifdef MCFDMA_BASE3 33 - MCF_MBAR + MCFDMA_BASE3, 33 + MCFDMA_BASE3, 34 34 #endif 35 35 }; 36 36