Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branches 'ib-mfd-clk-4.6', 'ib-mfd-input-iio-4.6', 'ib-mfd-regulator-4.6' and 'ib-mfd-regulator-gpio-4.6' into ibs-for-mfd-merged

Lee Jones bab07062 c4726abc

+2391 -1375
+58
Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt
··· 1 + Freescale i.MX25 ADC GCQ device 2 + 3 + This is a generic conversion queue device that can convert any of the 4 + analog inputs using the ADC unit of the i.MX25. 5 + 6 + Required properties: 7 + - compatible: Should be "fsl,imx25-gcq". 8 + - reg: Should be the register range of the module. 9 + - interrupts: Should be the interrupt number of the module. 10 + Typically this is <1>. 11 + - interrupt-parent: phandle to the tsadc module of the i.MX25. 12 + - #address-cells: Should be <1> (setting for the subnodes) 13 + - #size-cells: Should be <0> (setting for the subnodes) 14 + 15 + Optional properties: 16 + - vref-ext-supply: The regulator supplying the ADC reference voltage. 17 + Required when at least one subnode uses the this reference. 18 + - vref-xp-supply: The regulator supplying the ADC reference voltage on pin XP. 19 + Required when at least one subnode uses this reference. 20 + - vref-yp-supply: The regulator supplying the ADC reference voltage on pin YP. 21 + Required when at least one subnode uses this reference. 22 + 23 + Sub-nodes: 24 + Optionally you can define subnodes which define the reference voltage 25 + for the analog inputs. 26 + 27 + Required properties for subnodes: 28 + - reg: Should be the number of the analog input. 29 + 0: xp 30 + 1: yp 31 + 2: xn 32 + 3: yn 33 + 4: wiper 34 + 5: inaux0 35 + 6: inaux1 36 + 7: inaux2 37 + Optional properties for subnodes: 38 + - fsl,adc-refp: specifies the positive reference input as defined in 39 + <dt-bindings/iio/adc/fsl-imx25-gcq.h> 40 + - fsl,adc-refn: specifies the negative reference input as defined in 41 + <dt-bindings/iio/adc/fsl-imx25-gcq.h> 42 + 43 + Example: 44 + 45 + adc: adc@50030800 { 46 + compatible = "fsl,imx25-gcq"; 47 + reg = <0x50030800 0x60>; 48 + interrupt-parent = <&tscadc>; 49 + interrupts = <1>; 50 + #address-cells = <1>; 51 + #size-cells = <0>; 52 + 53 + inaux@5 { 54 + reg = <5>; 55 + fsl,adc-refp = <MX25_ADC_REFP_INT>; 56 + fsl,adc-refn = <MX25_ADC_REFN_NGND>; 57 + }; 58 + };
+35
Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt
··· 1 + Freescale mx25 TS conversion queue module 2 + 3 + mx25 touchscreen conversion queue module which controls the ADC unit of the 4 + mx25 for attached touchscreens. 5 + 6 + Required properties: 7 + - compatible: Should be "fsl,imx25-tcq". 8 + - reg: Memory range of the device. 9 + - interrupts: Should be the interrupt number associated with this module within 10 + the tscadc unit (<0>). 11 + - interrupt-parent: Should be a phandle to the tscadc unit. 12 + - fsl,wires: Should be '<4>' or '<5>' 13 + 14 + Optional properties: 15 + - fsl,pen-debounce-ns: Pen debounce time in nanoseconds. 16 + - fsl,pen-threshold: Pen-down threshold for the touchscreen. This is a value 17 + between 1 and 4096. It is the ratio between the internal reference voltage 18 + and the measured voltage after the plate was precharged. Resistence between 19 + plates and therefore the voltage decreases with pressure so that a smaller 20 + value is equivalent to a higher pressure. 21 + - fsl,settling-time-ns: Settling time in nanoseconds. The settling time is before 22 + the actual touch detection to wait for an even charge distribution in the 23 + plate. 24 + 25 + This device includes two conversion queues which can be added as subnodes. 26 + The first queue is for the touchscreen, the second for general purpose ADC. 27 + 28 + Example: 29 + tsc: tcq@50030400 { 30 + compatible = "fsl,imx25-tcq"; 31 + reg = <0x50030400 0x60>; 32 + interrupt-parent = <&tscadc>; 33 + interrupts = <0>; 34 + fsl,wires = <4>; 35 + };
+4 -3
Documentation/devicetree/bindings/mfd/axp20x.txt
··· 5 5 axp202 (X-Powers) 6 6 axp209 (X-Powers) 7 7 axp221 (X-Powers) 8 + axp223 (X-Powers) 8 9 9 10 Required properties: 10 11 - compatible: "x-powers,axp152", "x-powers,axp202", "x-powers,axp209", 11 - "x-powers,axp221" 12 - - reg: The I2C slave address for the AXP chip 12 + "x-powers,axp221", "x-powers,axp223" 13 + - reg: The I2C slave address or RSB hardware address for the AXP chip 13 14 - interrupt-parent: The parent interrupt controller 14 15 - interrupts: SoC NMI / GPIO interrupt connected to the PMIC's IRQ pin 15 16 - interrupt-controller: The PMIC has its own internal IRQs ··· 52 51 LDO4 : LDO : ldo24in-supply : shared supply 53 52 LDO5 : LDO : ldo5in-supply 54 53 55 - AXP221 regulators, type, and corresponding input supply names: 54 + AXP221/AXP223 regulators, type, and corresponding input supply names: 56 55 57 56 Regulator Type Supply Name Notes 58 57 --------- ---- ----------- -----
+47
Documentation/devicetree/bindings/mfd/fsl-imx25-tsadc.txt
··· 1 + Freescale MX25 ADC/TSC MultiFunction Device (MFD) 2 + 3 + This device combines two general purpose conversion queues one used for general 4 + ADC and the other used for touchscreens. 5 + 6 + Required properties: 7 + - compatible: Should be "fsl,imx25-tsadc". 8 + - reg: Start address and size of the memory area of 9 + the device 10 + - interrupts: Interrupt for this device 11 + (See: ../interrupt-controller/interrupts.txt) 12 + - clocks: An 'ipg' clock (See: ../clock/clock-bindings.txt) 13 + - interrupt-controller: This device is an interrupt controller. It 14 + controls the interrupts of both 15 + conversion queues. 16 + - #interrupt-cells: Should be '<1>'. 17 + - #address-cells: Should be '<1>'. 18 + - #size-cells: Should be '<1>'. 19 + 20 + This device includes two conversion queues which can be added as subnodes. 21 + The first queue is for the touchscreen, the second for general purpose ADC. 22 + 23 + Example: 24 + tscadc: tscadc@50030000 { 25 + compatible = "fsl,imx25-tsadc"; 26 + reg = <0x50030000 0xc>; 27 + interrupts = <46>; 28 + clocks = <&clks 119>; 29 + clock-names = "ipg"; 30 + interrupt-controller; 31 + #interrupt-cells = <1>; 32 + #address-cells = <1>; 33 + #size-cells = <1>; 34 + ranges; 35 + 36 + tsc: tcq@50030400 { 37 + compatible = "fsl,imx25-tcq"; 38 + reg = <0x50030400 0x60>; 39 + ... 40 + }; 41 + 42 + adc: gcq@50030800 { 43 + compatible = "fsl,imx25-gcq"; 44 + reg = <0x50030800 0x60>; 45 + ... 46 + }; 47 + };
+50
Documentation/devicetree/bindings/mfd/tps65912.txt
··· 1 + * TPS65912 Power Management Integrated Circuit bindings 2 + 3 + Required properties: 4 + - compatible : Should be "ti,tps65912". 5 + - reg : Slave address or chip select number (I2C / SPI). 6 + - interrupt-parent : The parent interrupt controller. 7 + - interrupts : The interrupt line the device is connected to. 8 + - interrupt-controller : Marks the device node as an interrupt controller. 9 + - #interrupt-cells : The number of cells to describe an IRQ, should be 2. 10 + The first cell is the IRQ number. 11 + The second cell is the flags, encoded as trigger 12 + masks from ../interrupt-controller/interrupts.txt. 13 + - gpio-controller : Marks the device node as a GPIO Controller. 14 + - #gpio-cells : Should be two. The first cell is the pin number and 15 + the second cell is used to specify flags. 16 + See ../gpio/gpio.txt for more information. 17 + - regulators: : List of child nodes that specify the regulator 18 + initialization data. Child nodes must be named 19 + after their hardware counterparts: dcdc[1-4] and 20 + ldo[1-10]. Each child nodes is defined using the 21 + standard binding for regulators. 22 + 23 + Example: 24 + 25 + pmic: tps65912@2d { 26 + compatible = "ti,tps65912"; 27 + reg = <0x2d>; 28 + interrupt-parent = <&gpio1>; 29 + interrupts = <28 IRQ_TYPE_LEVEL_LOW>; 30 + interrupt-controller; 31 + #interrupt-cells = <2>; 32 + gpio-controller; 33 + #gpio-cells = <2>; 34 + 35 + regulators { 36 + dcdc1 { 37 + regulator-name = "vdd_core"; 38 + regulator-min-microvolt = <912000>; 39 + regulator-max-microvolt = <1144000>; 40 + regulator-boot-on; 41 + regulator-always-on; 42 + }; 43 + 44 + ldo1 { 45 + regulator-name = "ldo1"; 46 + regulator-min-microvolt = <1900000>; 47 + regulator-max-microvolt = <1900000>; 48 + }; 49 + }; 50 + };
+1 -1
drivers/gpio/Kconfig
··· 860 860 861 861 config GPIO_TPS65912 862 862 tristate "TI TPS65912 GPIO" 863 - depends on (MFD_TPS65912_I2C || MFD_TPS65912_SPI) 863 + depends on MFD_TPS65912 864 864 help 865 865 This driver supports TPS65912 gpio chip 866 866
+93 -86
drivers/gpio/gpio-tps65912.c
··· 1 1 /* 2 - * Copyright 2011 Texas Instruments Inc. 2 + * GPIO driver for TI TPS65912x PMICs 3 3 * 4 - * Author: Margarita Olaya <magi@slimlogic.co.uk> 4 + * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/ 5 + * Andrew F. Davis <afd@ti.com> 5 6 * 6 - * This program is free software; you can redistribute it and/or modify it 7 - * under the terms of the GNU General Public License as published by the 8 - * Free Software Foundation; either version 2 of the License, or (at your 9 - * option) any later version. 7 + * This program is free software; you can redistribute it and/or 8 + * modify it under the terms of the GNU General Public License version 2 as 9 + * published by the Free Software Foundation. 10 10 * 11 - * This driver is based on wm8350 implementation. 11 + * This program is distributed "as is" WITHOUT ANY WARRANTY of any 12 + * kind, whether expressed or implied; without even the implied warranty 13 + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 + * GNU General Public License version 2 for more details. 15 + * 16 + * Based on the Arizona GPIO driver and the previous TPS65912 driver by 17 + * Margarita Olaya Cabrera <magi@slimlogic.co.uk> 12 18 */ 13 19 14 - #include <linux/kernel.h> 15 - #include <linux/module.h> 16 - #include <linux/errno.h> 17 20 #include <linux/gpio.h> 18 - #include <linux/mfd/core.h> 21 + #include <linux/module.h> 19 22 #include <linux/platform_device.h> 20 - #include <linux/seq_file.h> 21 - #include <linux/slab.h> 23 + 22 24 #include <linux/mfd/tps65912.h> 23 25 24 - struct tps65912_gpio_data { 25 - struct tps65912 *tps65912; 26 + struct tps65912_gpio { 26 27 struct gpio_chip gpio_chip; 28 + struct tps65912 *tps; 27 29 }; 30 + 31 + static int tps65912_gpio_get_direction(struct gpio_chip *gc, 32 + unsigned offset) 33 + { 34 + struct tps65912_gpio *gpio = gpiochip_get_data(gc); 35 + 36 + int ret, val; 37 + 38 + ret = regmap_read(gpio->tps->regmap, TPS65912_GPIO1 + offset, &val); 39 + if (ret) 40 + return ret; 41 + 42 + if (val & GPIO_CFG_MASK) 43 + return GPIOF_DIR_OUT; 44 + else 45 + return GPIOF_DIR_IN; 46 + } 47 + 48 + static int tps65912_gpio_direction_input(struct gpio_chip *gc, unsigned offset) 49 + { 50 + struct tps65912_gpio *gpio = gpiochip_get_data(gc); 51 + 52 + return regmap_update_bits(gpio->tps->regmap, TPS65912_GPIO1 + offset, 53 + GPIO_CFG_MASK, 0); 54 + } 55 + 56 + static int tps65912_gpio_direction_output(struct gpio_chip *gc, 57 + unsigned offset, int value) 58 + { 59 + struct tps65912_gpio *gpio = gpiochip_get_data(gc); 60 + 61 + /* Set the initial value */ 62 + regmap_update_bits(gpio->tps->regmap, TPS65912_GPIO1 + offset, 63 + GPIO_SET_MASK, value ? GPIO_SET_MASK : 0); 64 + 65 + return regmap_update_bits(gpio->tps->regmap, TPS65912_GPIO1 + offset, 66 + GPIO_CFG_MASK, GPIO_CFG_MASK); 67 + } 28 68 29 69 static int tps65912_gpio_get(struct gpio_chip *gc, unsigned offset) 30 70 { 31 - struct tps65912_gpio_data *tps65912_gpio = gpiochip_get_data(gc); 32 - struct tps65912 *tps65912 = tps65912_gpio->tps65912; 33 - int val; 71 + struct tps65912_gpio *gpio = gpiochip_get_data(gc); 72 + int ret, val; 34 73 35 - val = tps65912_reg_read(tps65912, TPS65912_GPIO1 + offset); 74 + ret = regmap_read(gpio->tps->regmap, TPS65912_GPIO1 + offset, &val); 75 + if (ret) 76 + return ret; 36 77 37 78 if (val & GPIO_STS_MASK) 38 79 return 1; ··· 84 43 static void tps65912_gpio_set(struct gpio_chip *gc, unsigned offset, 85 44 int value) 86 45 { 87 - struct tps65912_gpio_data *tps65912_gpio = gpiochip_get_data(gc); 88 - struct tps65912 *tps65912 = tps65912_gpio->tps65912; 46 + struct tps65912_gpio *gpio = gpiochip_get_data(gc); 89 47 90 - if (value) 91 - tps65912_set_bits(tps65912, TPS65912_GPIO1 + offset, 92 - GPIO_SET_MASK); 93 - else 94 - tps65912_clear_bits(tps65912, TPS65912_GPIO1 + offset, 95 - GPIO_SET_MASK); 96 - } 97 - 98 - static int tps65912_gpio_output(struct gpio_chip *gc, unsigned offset, 99 - int value) 100 - { 101 - struct tps65912_gpio_data *tps65912_gpio = gpiochip_get_data(gc); 102 - struct tps65912 *tps65912 = tps65912_gpio->tps65912; 103 - 104 - /* Set the initial value */ 105 - tps65912_gpio_set(gc, offset, value); 106 - 107 - return tps65912_set_bits(tps65912, TPS65912_GPIO1 + offset, 108 - GPIO_CFG_MASK); 109 - } 110 - 111 - static int tps65912_gpio_input(struct gpio_chip *gc, unsigned offset) 112 - { 113 - struct tps65912_gpio_data *tps65912_gpio = gpiochip_get_data(gc); 114 - struct tps65912 *tps65912 = tps65912_gpio->tps65912; 115 - 116 - return tps65912_clear_bits(tps65912, TPS65912_GPIO1 + offset, 117 - GPIO_CFG_MASK); 48 + regmap_update_bits(gpio->tps->regmap, TPS65912_GPIO1 + offset, 49 + GPIO_SET_MASK, value ? GPIO_SET_MASK : 0); 118 50 } 119 51 120 52 static struct gpio_chip template_chip = { 121 - .label = "tps65912", 53 + .label = "tps65912-gpio", 122 54 .owner = THIS_MODULE, 123 - .direction_input = tps65912_gpio_input, 124 - .direction_output = tps65912_gpio_output, 55 + .get_direction = tps65912_gpio_get_direction, 56 + .direction_input = tps65912_gpio_direction_input, 57 + .direction_output = tps65912_gpio_direction_output, 125 58 .get = tps65912_gpio_get, 126 59 .set = tps65912_gpio_set, 127 - .can_sleep = true, 128 - .ngpio = 5, 129 60 .base = -1, 61 + .ngpio = 5, 62 + .can_sleep = true, 130 63 }; 131 64 132 65 static int tps65912_gpio_probe(struct platform_device *pdev) 133 66 { 134 - struct tps65912 *tps65912 = dev_get_drvdata(pdev->dev.parent); 135 - struct tps65912_board *pdata = dev_get_platdata(tps65912->dev); 136 - struct tps65912_gpio_data *tps65912_gpio; 67 + struct tps65912 *tps = dev_get_drvdata(pdev->dev.parent); 68 + struct tps65912_gpio *gpio; 137 69 int ret; 138 70 139 - tps65912_gpio = devm_kzalloc(&pdev->dev, sizeof(*tps65912_gpio), 140 - GFP_KERNEL); 141 - if (tps65912_gpio == NULL) 71 + gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); 72 + if (!gpio) 142 73 return -ENOMEM; 143 74 144 - tps65912_gpio->tps65912 = tps65912; 145 - tps65912_gpio->gpio_chip = template_chip; 146 - tps65912_gpio->gpio_chip.parent = &pdev->dev; 147 - if (pdata && pdata->gpio_base) 148 - tps65912_gpio->gpio_chip.base = pdata->gpio_base; 75 + gpio->tps = dev_get_drvdata(pdev->dev.parent); 76 + gpio->gpio_chip = template_chip; 77 + gpio->gpio_chip.parent = tps->dev; 149 78 150 - ret = gpiochip_add_data(&tps65912_gpio->gpio_chip, tps65912_gpio); 79 + ret = gpiochip_add_data(&gpio->gpio_chip, gpio); 151 80 if (ret < 0) { 152 - dev_err(&pdev->dev, "Failed to register gpiochip, %d\n", ret); 81 + dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); 153 82 return ret; 154 83 } 155 84 156 - platform_set_drvdata(pdev, tps65912_gpio); 85 + platform_set_drvdata(pdev, gpio); 157 86 158 - return ret; 87 + return 0; 159 88 } 160 89 161 90 static int tps65912_gpio_remove(struct platform_device *pdev) 162 91 { 163 - struct tps65912_gpio_data *tps65912_gpio = platform_get_drvdata(pdev); 92 + struct tps65912_gpio *gpio = platform_get_drvdata(pdev); 164 93 165 - gpiochip_remove(&tps65912_gpio->gpio_chip); 94 + gpiochip_remove(&gpio->gpio_chip); 95 + 166 96 return 0; 167 97 } 98 + 99 + static const struct platform_device_id tps65912_gpio_id_table[] = { 100 + { "tps65912-gpio", }, 101 + { /* sentinel */ } 102 + }; 103 + MODULE_DEVICE_TABLE(platform, tps65912_gpio_id_table); 168 104 169 105 static struct platform_driver tps65912_gpio_driver = { 170 106 .driver = { ··· 149 131 }, 150 132 .probe = tps65912_gpio_probe, 151 133 .remove = tps65912_gpio_remove, 134 + .id_table = tps65912_gpio_id_table, 152 135 }; 136 + module_platform_driver(tps65912_gpio_driver); 153 137 154 - static int __init tps65912_gpio_init(void) 155 - { 156 - return platform_driver_register(&tps65912_gpio_driver); 157 - } 158 - subsys_initcall(tps65912_gpio_init); 159 - 160 - static void __exit tps65912_gpio_exit(void) 161 - { 162 - platform_driver_unregister(&tps65912_gpio_driver); 163 - } 164 - module_exit(tps65912_gpio_exit); 165 - 166 - MODULE_AUTHOR("Margarita Olaya Cabrera <magi@slimlogic.co.uk>"); 167 - MODULE_DESCRIPTION("GPIO interface for TPS65912 PMICs"); 138 + MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>"); 139 + MODULE_DESCRIPTION("TPS65912 GPIO driver"); 168 140 MODULE_LICENSE("GPL v2"); 169 - MODULE_ALIAS("platform:tps65912-gpio");
+7
drivers/iio/adc/Kconfig
··· 183 183 To compile this driver as a module, choose M here: the module will be 184 184 called exynos_adc. 185 185 186 + config FSL_MX25_ADC 187 + tristate "Freescale MX25 ADC driver" 188 + depends on MFD_MX25_TSADC 189 + help 190 + Generic Conversion Queue driver used for general purpose ADC in the 191 + MX25. This driver supports single measurements using the MX25 ADC. 192 + 186 193 config HI8435 187 194 tristate "Holt Integrated Circuits HI-8435 threshold detector" 188 195 select IIO_TRIGGERED_EVENT
+1
drivers/iio/adc/Makefile
··· 19 19 obj-$(CONFIG_CC10001_ADC) += cc10001_adc.o 20 20 obj-$(CONFIG_DA9150_GPADC) += da9150-gpadc.o 21 21 obj-$(CONFIG_EXYNOS_ADC) += exynos_adc.o 22 + obj-$(CONFIG_FSL_MX25_ADC) += fsl-imx25-gcq.o 22 23 obj-$(CONFIG_HI8435) += hi8435.o 23 24 obj-$(CONFIG_IMX7D_ADC) += imx7d_adc.o 24 25 obj-$(CONFIG_INA2XX_ADC) += ina2xx-adc.o
+417
drivers/iio/adc/fsl-imx25-gcq.c
··· 1 + /* 2 + * Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de> 3 + * 4 + * This program is free software; you can redistribute it and/or modify it under 5 + * the terms of the GNU General Public License version 2 as published by the 6 + * Free Software Foundation. 7 + * 8 + * This is the driver for the imx25 GCQ (Generic Conversion Queue) 9 + * connected to the imx25 ADC. 10 + */ 11 + 12 + #include <dt-bindings/iio/adc/fsl-imx25-gcq.h> 13 + #include <linux/clk.h> 14 + #include <linux/iio/iio.h> 15 + #include <linux/interrupt.h> 16 + #include <linux/mfd/imx25-tsadc.h> 17 + #include <linux/module.h> 18 + #include <linux/of.h> 19 + #include <linux/platform_device.h> 20 + #include <linux/regmap.h> 21 + #include <linux/regulator/consumer.h> 22 + 23 + #define MX25_GCQ_TIMEOUT (msecs_to_jiffies(2000)) 24 + 25 + static const char * const driver_name = "mx25-gcq"; 26 + 27 + enum mx25_gcq_cfgs { 28 + MX25_CFG_XP = 0, 29 + MX25_CFG_YP, 30 + MX25_CFG_XN, 31 + MX25_CFG_YN, 32 + MX25_CFG_WIPER, 33 + MX25_CFG_INAUX0, 34 + MX25_CFG_INAUX1, 35 + MX25_CFG_INAUX2, 36 + MX25_NUM_CFGS, 37 + }; 38 + 39 + struct mx25_gcq_priv { 40 + struct regmap *regs; 41 + struct completion completed; 42 + struct clk *clk; 43 + int irq; 44 + struct regulator *vref[4]; 45 + u32 channel_vref_mv[MX25_NUM_CFGS]; 46 + }; 47 + 48 + #define MX25_CQG_CHAN(chan, id) {\ 49 + .type = IIO_VOLTAGE,\ 50 + .indexed = 1,\ 51 + .channel = chan,\ 52 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 53 + BIT(IIO_CHAN_INFO_SCALE),\ 54 + .datasheet_name = id,\ 55 + } 56 + 57 + static const struct iio_chan_spec mx25_gcq_channels[MX25_NUM_CFGS] = { 58 + MX25_CQG_CHAN(MX25_CFG_XP, "xp"), 59 + MX25_CQG_CHAN(MX25_CFG_YP, "yp"), 60 + MX25_CQG_CHAN(MX25_CFG_XN, "xn"), 61 + MX25_CQG_CHAN(MX25_CFG_YN, "yn"), 62 + MX25_CQG_CHAN(MX25_CFG_WIPER, "wiper"), 63 + MX25_CQG_CHAN(MX25_CFG_INAUX0, "inaux0"), 64 + MX25_CQG_CHAN(MX25_CFG_INAUX1, "inaux1"), 65 + MX25_CQG_CHAN(MX25_CFG_INAUX2, "inaux2"), 66 + }; 67 + 68 + static const char * const mx25_gcq_refp_names[] = { 69 + [MX25_ADC_REFP_YP] = "yp", 70 + [MX25_ADC_REFP_XP] = "xp", 71 + [MX25_ADC_REFP_INT] = "int", 72 + [MX25_ADC_REFP_EXT] = "ext", 73 + }; 74 + 75 + static irqreturn_t mx25_gcq_irq(int irq, void *data) 76 + { 77 + struct mx25_gcq_priv *priv = data; 78 + u32 stats; 79 + 80 + regmap_read(priv->regs, MX25_ADCQ_SR, &stats); 81 + 82 + if (stats & MX25_ADCQ_SR_EOQ) { 83 + regmap_update_bits(priv->regs, MX25_ADCQ_MR, 84 + MX25_ADCQ_MR_EOQ_IRQ, MX25_ADCQ_MR_EOQ_IRQ); 85 + complete(&priv->completed); 86 + } 87 + 88 + /* Disable conversion queue run */ 89 + regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS, 0); 90 + 91 + /* Acknowledge all possible irqs */ 92 + regmap_write(priv->regs, MX25_ADCQ_SR, MX25_ADCQ_SR_FRR | 93 + MX25_ADCQ_SR_FUR | MX25_ADCQ_SR_FOR | 94 + MX25_ADCQ_SR_EOQ | MX25_ADCQ_SR_PD); 95 + 96 + return IRQ_HANDLED; 97 + } 98 + 99 + static int mx25_gcq_get_raw_value(struct device *dev, 100 + struct iio_chan_spec const *chan, 101 + struct mx25_gcq_priv *priv, 102 + int *val) 103 + { 104 + long timeout; 105 + u32 data; 106 + 107 + /* Setup the configuration we want to use */ 108 + regmap_write(priv->regs, MX25_ADCQ_ITEM_7_0, 109 + MX25_ADCQ_ITEM(0, chan->channel)); 110 + 111 + regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_EOQ_IRQ, 0); 112 + 113 + /* Trigger queue for one run */ 114 + regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS, 115 + MX25_ADCQ_CR_FQS); 116 + 117 + timeout = wait_for_completion_interruptible_timeout( 118 + &priv->completed, MX25_GCQ_TIMEOUT); 119 + if (timeout < 0) { 120 + dev_err(dev, "ADC wait for measurement failed\n"); 121 + return timeout; 122 + } else if (timeout == 0) { 123 + dev_err(dev, "ADC timed out\n"); 124 + return -ETIMEDOUT; 125 + } 126 + 127 + regmap_read(priv->regs, MX25_ADCQ_FIFO, &data); 128 + 129 + *val = MX25_ADCQ_FIFO_DATA(data); 130 + 131 + return IIO_VAL_INT; 132 + } 133 + 134 + static int mx25_gcq_read_raw(struct iio_dev *indio_dev, 135 + struct iio_chan_spec const *chan, int *val, 136 + int *val2, long mask) 137 + { 138 + struct mx25_gcq_priv *priv = iio_priv(indio_dev); 139 + int ret; 140 + 141 + switch (mask) { 142 + case IIO_CHAN_INFO_RAW: 143 + mutex_lock(&indio_dev->mlock); 144 + ret = mx25_gcq_get_raw_value(&indio_dev->dev, chan, priv, val); 145 + mutex_unlock(&indio_dev->mlock); 146 + return ret; 147 + 148 + case IIO_CHAN_INFO_SCALE: 149 + *val = priv->channel_vref_mv[chan->channel]; 150 + *val2 = 12; 151 + return IIO_VAL_FRACTIONAL_LOG2; 152 + 153 + default: 154 + return -EINVAL; 155 + } 156 + } 157 + 158 + static const struct iio_info mx25_gcq_iio_info = { 159 + .read_raw = mx25_gcq_read_raw, 160 + }; 161 + 162 + static const struct regmap_config mx25_gcq_regconfig = { 163 + .max_register = 0x5c, 164 + .reg_bits = 32, 165 + .val_bits = 32, 166 + .reg_stride = 4, 167 + }; 168 + 169 + static int mx25_gcq_setup_cfgs(struct platform_device *pdev, 170 + struct mx25_gcq_priv *priv) 171 + { 172 + struct device_node *np = pdev->dev.of_node; 173 + struct device_node *child; 174 + struct device *dev = &pdev->dev; 175 + unsigned int refp_used[4] = {}; 176 + int ret, i; 177 + 178 + /* 179 + * Setup all configurations registers with a default conversion 180 + * configuration for each input 181 + */ 182 + for (i = 0; i < MX25_NUM_CFGS; ++i) 183 + regmap_write(priv->regs, MX25_ADCQ_CFG(i), 184 + MX25_ADCQ_CFG_YPLL_OFF | 185 + MX25_ADCQ_CFG_XNUR_OFF | 186 + MX25_ADCQ_CFG_XPUL_OFF | 187 + MX25_ADCQ_CFG_REFP_INT | 188 + MX25_ADCQ_CFG_IN(i) | 189 + MX25_ADCQ_CFG_REFN_NGND2); 190 + 191 + /* 192 + * First get all regulators to store them in channel_vref_mv if 193 + * necessary. Later we use that information for proper IIO scale 194 + * information. 195 + */ 196 + priv->vref[MX25_ADC_REFP_INT] = NULL; 197 + priv->vref[MX25_ADC_REFP_EXT] = 198 + devm_regulator_get_optional(&pdev->dev, "vref-ext"); 199 + priv->vref[MX25_ADC_REFP_XP] = 200 + devm_regulator_get_optional(&pdev->dev, "vref-xp"); 201 + priv->vref[MX25_ADC_REFP_YP] = 202 + devm_regulator_get_optional(&pdev->dev, "vref-yp"); 203 + 204 + for_each_child_of_node(np, child) { 205 + u32 reg; 206 + u32 refp = MX25_ADCQ_CFG_REFP_INT; 207 + u32 refn = MX25_ADCQ_CFG_REFN_NGND2; 208 + 209 + ret = of_property_read_u32(child, "reg", &reg); 210 + if (ret) { 211 + dev_err(dev, "Failed to get reg property\n"); 212 + return ret; 213 + } 214 + 215 + if (reg >= MX25_NUM_CFGS) { 216 + dev_err(dev, 217 + "reg value is greater than the number of available configuration registers\n"); 218 + return -EINVAL; 219 + } 220 + 221 + of_property_read_u32(child, "fsl,adc-refp", &refp); 222 + of_property_read_u32(child, "fsl,adc-refn", &refn); 223 + 224 + switch (refp) { 225 + case MX25_ADC_REFP_EXT: 226 + case MX25_ADC_REFP_XP: 227 + case MX25_ADC_REFP_YP: 228 + if (IS_ERR(priv->vref[refp])) { 229 + dev_err(dev, "Error, trying to use external voltage reference without a vref-%s regulator.", 230 + mx25_gcq_refp_names[refp]); 231 + return PTR_ERR(priv->vref[refp]); 232 + } 233 + priv->channel_vref_mv[reg] = 234 + regulator_get_voltage(priv->vref[refp]); 235 + /* Conversion from uV to mV */ 236 + priv->channel_vref_mv[reg] /= 1000; 237 + break; 238 + case MX25_ADC_REFP_INT: 239 + priv->channel_vref_mv[reg] = 2500; 240 + break; 241 + default: 242 + dev_err(dev, "Invalid positive reference %d\n", refp); 243 + return -EINVAL; 244 + } 245 + 246 + ++refp_used[refp]; 247 + 248 + /* 249 + * Shift the read values to the correct positions within the 250 + * register. 251 + */ 252 + refp = MX25_ADCQ_CFG_REFP(refp); 253 + refn = MX25_ADCQ_CFG_REFN(refn); 254 + 255 + if ((refp & MX25_ADCQ_CFG_REFP_MASK) != refp) { 256 + dev_err(dev, "Invalid fsl,adc-refp property value\n"); 257 + return -EINVAL; 258 + } 259 + if ((refn & MX25_ADCQ_CFG_REFN_MASK) != refn) { 260 + dev_err(dev, "Invalid fsl,adc-refn property value\n"); 261 + return -EINVAL; 262 + } 263 + 264 + regmap_update_bits(priv->regs, MX25_ADCQ_CFG(reg), 265 + MX25_ADCQ_CFG_REFP_MASK | 266 + MX25_ADCQ_CFG_REFN_MASK, 267 + refp | refn); 268 + } 269 + regmap_update_bits(priv->regs, MX25_ADCQ_CR, 270 + MX25_ADCQ_CR_FRST | MX25_ADCQ_CR_QRST, 271 + MX25_ADCQ_CR_FRST | MX25_ADCQ_CR_QRST); 272 + 273 + regmap_write(priv->regs, MX25_ADCQ_CR, 274 + MX25_ADCQ_CR_PDMSK | MX25_ADCQ_CR_QSM_FQS); 275 + 276 + /* Remove unused regulators */ 277 + for (i = 0; i != 4; ++i) { 278 + if (!refp_used[i]) { 279 + if (!IS_ERR_OR_NULL(priv->vref[i])) 280 + devm_regulator_put(priv->vref[i]); 281 + priv->vref[i] = NULL; 282 + } 283 + } 284 + 285 + return 0; 286 + } 287 + 288 + static int mx25_gcq_probe(struct platform_device *pdev) 289 + { 290 + struct iio_dev *indio_dev; 291 + struct mx25_gcq_priv *priv; 292 + struct mx25_tsadc *tsadc = dev_get_drvdata(pdev->dev.parent); 293 + struct device *dev = &pdev->dev; 294 + struct resource *res; 295 + void __iomem *mem; 296 + int ret; 297 + int i; 298 + 299 + indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*priv)); 300 + if (!indio_dev) 301 + return -ENOMEM; 302 + 303 + priv = iio_priv(indio_dev); 304 + 305 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 306 + mem = devm_ioremap_resource(dev, res); 307 + if (IS_ERR(mem)) 308 + return PTR_ERR(mem); 309 + 310 + priv->regs = devm_regmap_init_mmio(dev, mem, &mx25_gcq_regconfig); 311 + if (IS_ERR(priv->regs)) { 312 + dev_err(dev, "Failed to initialize regmap\n"); 313 + return PTR_ERR(priv->regs); 314 + } 315 + 316 + init_completion(&priv->completed); 317 + 318 + ret = mx25_gcq_setup_cfgs(pdev, priv); 319 + if (ret) 320 + return ret; 321 + 322 + for (i = 0; i != 4; ++i) { 323 + if (!priv->vref[i]) 324 + continue; 325 + 326 + ret = regulator_enable(priv->vref[i]); 327 + if (ret) 328 + goto err_regulator_disable; 329 + } 330 + 331 + priv->clk = tsadc->clk; 332 + ret = clk_prepare_enable(priv->clk); 333 + if (ret) { 334 + dev_err(dev, "Failed to enable clock\n"); 335 + goto err_vref_disable; 336 + } 337 + 338 + priv->irq = platform_get_irq(pdev, 0); 339 + if (priv->irq <= 0) { 340 + dev_err(dev, "Failed to get IRQ\n"); 341 + ret = priv->irq; 342 + if (!ret) 343 + ret = -ENXIO; 344 + goto err_clk_unprepare; 345 + } 346 + 347 + ret = request_irq(priv->irq, mx25_gcq_irq, 0, pdev->name, priv); 348 + if (ret) { 349 + dev_err(dev, "Failed requesting IRQ\n"); 350 + goto err_clk_unprepare; 351 + } 352 + 353 + indio_dev->dev.parent = &pdev->dev; 354 + indio_dev->channels = mx25_gcq_channels; 355 + indio_dev->num_channels = ARRAY_SIZE(mx25_gcq_channels); 356 + indio_dev->info = &mx25_gcq_iio_info; 357 + indio_dev->name = driver_name; 358 + 359 + ret = iio_device_register(indio_dev); 360 + if (ret) { 361 + dev_err(dev, "Failed to register iio device\n"); 362 + goto err_irq_free; 363 + } 364 + 365 + platform_set_drvdata(pdev, indio_dev); 366 + 367 + return 0; 368 + 369 + err_irq_free: 370 + free_irq(priv->irq, priv); 371 + err_clk_unprepare: 372 + clk_disable_unprepare(priv->clk); 373 + err_vref_disable: 374 + i = 4; 375 + err_regulator_disable: 376 + for (; i-- > 0;) { 377 + if (priv->vref[i]) 378 + regulator_disable(priv->vref[i]); 379 + } 380 + return ret; 381 + } 382 + 383 + static int mx25_gcq_remove(struct platform_device *pdev) 384 + { 385 + struct iio_dev *indio_dev = platform_get_drvdata(pdev); 386 + struct mx25_gcq_priv *priv = iio_priv(indio_dev); 387 + int i; 388 + 389 + iio_device_unregister(indio_dev); 390 + free_irq(priv->irq, priv); 391 + clk_disable_unprepare(priv->clk); 392 + for (i = 4; i-- > 0;) { 393 + if (priv->vref[i]) 394 + regulator_disable(priv->vref[i]); 395 + } 396 + 397 + return 0; 398 + } 399 + 400 + static const struct of_device_id mx25_gcq_ids[] = { 401 + { .compatible = "fsl,imx25-gcq", }, 402 + { /* Sentinel */ } 403 + }; 404 + 405 + static struct platform_driver mx25_gcq_driver = { 406 + .driver = { 407 + .name = "mx25-gcq", 408 + .of_match_table = mx25_gcq_ids, 409 + }, 410 + .probe = mx25_gcq_probe, 411 + .remove = mx25_gcq_remove, 412 + }; 413 + module_platform_driver(mx25_gcq_driver); 414 + 415 + MODULE_DESCRIPTION("ADC driver for Freescale mx25"); 416 + MODULE_AUTHOR("Markus Pargmann <mpa@pengutronix.de>"); 417 + MODULE_LICENSE("GPL v2");
+9
drivers/input/touchscreen/Kconfig
··· 822 822 To compile this driver as a module, choose M here: the 823 823 module will be called usbtouchscreen. 824 824 825 + config TOUCHSCREEN_MX25 826 + tristate "Freescale i.MX25 touchscreen input driver" 827 + depends on MFD_MX25_TSADC 828 + help 829 + Enable support for touchscreen connected to your i.MX25. 830 + 831 + To compile this driver as a module, choose M here: the 832 + module will be called fsl-imx25-tcq. 833 + 825 834 config TOUCHSCREEN_MC13783 826 835 tristate "Freescale MC13783 touchscreen input driver" 827 836 depends on MFD_MC13XXX
+1
drivers/input/touchscreen/Makefile
··· 46 46 obj-$(CONFIG_TOUCHSCREEN_IPROC) += bcm_iproc_tsc.o 47 47 obj-$(CONFIG_TOUCHSCREEN_LPC32XX) += lpc32xx_ts.o 48 48 obj-$(CONFIG_TOUCHSCREEN_MAX11801) += max11801_ts.o 49 + obj-$(CONFIG_TOUCHSCREEN_MX25) += fsl-imx25-tcq.o 49 50 obj-$(CONFIG_TOUCHSCREEN_MC13783) += mc13783_ts.o 50 51 obj-$(CONFIG_TOUCHSCREEN_MCS5000) += mcs5000_ts.o 51 52 obj-$(CONFIG_TOUCHSCREEN_MIGOR) += migor_ts.o
+596
drivers/input/touchscreen/fsl-imx25-tcq.c
··· 1 + /* 2 + * Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de> 3 + * 4 + * This program is free software; you can redistribute it and/or modify it under 5 + * the terms of the GNU General Public License version 2 as published by the 6 + * Free Software Foundation. 7 + * 8 + * Based on driver from 2011: 9 + * Juergen Beisert, Pengutronix <kernel@pengutronix.de> 10 + * 11 + * This is the driver for the imx25 TCQ (Touchscreen Conversion Queue) 12 + * connected to the imx25 ADC. 13 + */ 14 + 15 + #include <linux/clk.h> 16 + #include <linux/device.h> 17 + #include <linux/input.h> 18 + #include <linux/interrupt.h> 19 + #include <linux/mfd/imx25-tsadc.h> 20 + #include <linux/module.h> 21 + #include <linux/of.h> 22 + #include <linux/platform_device.h> 23 + #include <linux/regmap.h> 24 + 25 + static const char mx25_tcq_name[] = "mx25-tcq"; 26 + 27 + enum mx25_tcq_mode { 28 + MX25_TS_4WIRE, 29 + }; 30 + 31 + struct mx25_tcq_priv { 32 + struct regmap *regs; 33 + struct regmap *core_regs; 34 + struct input_dev *idev; 35 + enum mx25_tcq_mode mode; 36 + unsigned int pen_threshold; 37 + unsigned int sample_count; 38 + unsigned int expected_samples; 39 + unsigned int pen_debounce; 40 + unsigned int settling_time; 41 + struct clk *clk; 42 + int irq; 43 + struct device *dev; 44 + }; 45 + 46 + static struct regmap_config mx25_tcq_regconfig = { 47 + .fast_io = true, 48 + .max_register = 0x5c, 49 + .reg_bits = 32, 50 + .val_bits = 32, 51 + .reg_stride = 4, 52 + }; 53 + 54 + static const struct of_device_id mx25_tcq_ids[] = { 55 + { .compatible = "fsl,imx25-tcq", }, 56 + { /* Sentinel */ } 57 + }; 58 + 59 + #define TSC_4WIRE_PRE_INDEX 0 60 + #define TSC_4WIRE_X_INDEX 1 61 + #define TSC_4WIRE_Y_INDEX 2 62 + #define TSC_4WIRE_POST_INDEX 3 63 + #define TSC_4WIRE_LEAVE 4 64 + 65 + #define MX25_TSC_DEF_THRESHOLD 80 66 + #define TSC_MAX_SAMPLES 16 67 + 68 + #define MX25_TSC_REPEAT_WAIT 14 69 + 70 + enum mx25_adc_configurations { 71 + MX25_CFG_PRECHARGE = 0, 72 + MX25_CFG_TOUCH_DETECT, 73 + MX25_CFG_X_MEASUREMENT, 74 + MX25_CFG_Y_MEASUREMENT, 75 + }; 76 + 77 + #define MX25_PRECHARGE_VALUE (\ 78 + MX25_ADCQ_CFG_YPLL_OFF | \ 79 + MX25_ADCQ_CFG_XNUR_OFF | \ 80 + MX25_ADCQ_CFG_XPUL_HIGH | \ 81 + MX25_ADCQ_CFG_REFP_INT | \ 82 + MX25_ADCQ_CFG_IN_XP | \ 83 + MX25_ADCQ_CFG_REFN_NGND2 | \ 84 + MX25_ADCQ_CFG_IGS) 85 + 86 + #define MX25_TOUCH_DETECT_VALUE (\ 87 + MX25_ADCQ_CFG_YNLR | \ 88 + MX25_ADCQ_CFG_YPLL_OFF | \ 89 + MX25_ADCQ_CFG_XNUR_OFF | \ 90 + MX25_ADCQ_CFG_XPUL_OFF | \ 91 + MX25_ADCQ_CFG_REFP_INT | \ 92 + MX25_ADCQ_CFG_IN_XP | \ 93 + MX25_ADCQ_CFG_REFN_NGND2 | \ 94 + MX25_ADCQ_CFG_PENIACK) 95 + 96 + static void imx25_setup_queue_cfgs(struct mx25_tcq_priv *priv, 97 + unsigned int settling_cnt) 98 + { 99 + u32 precharge_cfg = 100 + MX25_PRECHARGE_VALUE | 101 + MX25_ADCQ_CFG_SETTLING_TIME(settling_cnt); 102 + u32 touch_detect_cfg = 103 + MX25_TOUCH_DETECT_VALUE | 104 + MX25_ADCQ_CFG_NOS(1) | 105 + MX25_ADCQ_CFG_SETTLING_TIME(settling_cnt); 106 + 107 + regmap_write(priv->core_regs, MX25_TSC_TICR, precharge_cfg); 108 + 109 + /* PRECHARGE */ 110 + regmap_write(priv->regs, MX25_ADCQ_CFG(MX25_CFG_PRECHARGE), 111 + precharge_cfg); 112 + 113 + /* TOUCH_DETECT */ 114 + regmap_write(priv->regs, MX25_ADCQ_CFG(MX25_CFG_TOUCH_DETECT), 115 + touch_detect_cfg); 116 + 117 + /* X Measurement */ 118 + regmap_write(priv->regs, MX25_ADCQ_CFG(MX25_CFG_X_MEASUREMENT), 119 + MX25_ADCQ_CFG_YPLL_OFF | 120 + MX25_ADCQ_CFG_XNUR_LOW | 121 + MX25_ADCQ_CFG_XPUL_HIGH | 122 + MX25_ADCQ_CFG_REFP_XP | 123 + MX25_ADCQ_CFG_IN_YP | 124 + MX25_ADCQ_CFG_REFN_XN | 125 + MX25_ADCQ_CFG_NOS(priv->sample_count) | 126 + MX25_ADCQ_CFG_SETTLING_TIME(settling_cnt)); 127 + 128 + /* Y Measurement */ 129 + regmap_write(priv->regs, MX25_ADCQ_CFG(MX25_CFG_Y_MEASUREMENT), 130 + MX25_ADCQ_CFG_YNLR | 131 + MX25_ADCQ_CFG_YPLL_HIGH | 132 + MX25_ADCQ_CFG_XNUR_OFF | 133 + MX25_ADCQ_CFG_XPUL_OFF | 134 + MX25_ADCQ_CFG_REFP_YP | 135 + MX25_ADCQ_CFG_IN_XP | 136 + MX25_ADCQ_CFG_REFN_YN | 137 + MX25_ADCQ_CFG_NOS(priv->sample_count) | 138 + MX25_ADCQ_CFG_SETTLING_TIME(settling_cnt)); 139 + 140 + /* Enable the touch detection right now */ 141 + regmap_write(priv->core_regs, MX25_TSC_TICR, touch_detect_cfg | 142 + MX25_ADCQ_CFG_IGS); 143 + } 144 + 145 + static int imx25_setup_queue_4wire(struct mx25_tcq_priv *priv, 146 + unsigned settling_cnt, int *items) 147 + { 148 + imx25_setup_queue_cfgs(priv, settling_cnt); 149 + 150 + /* Setup the conversion queue */ 151 + regmap_write(priv->regs, MX25_ADCQ_ITEM_7_0, 152 + MX25_ADCQ_ITEM(0, MX25_CFG_PRECHARGE) | 153 + MX25_ADCQ_ITEM(1, MX25_CFG_TOUCH_DETECT) | 154 + MX25_ADCQ_ITEM(2, MX25_CFG_X_MEASUREMENT) | 155 + MX25_ADCQ_ITEM(3, MX25_CFG_Y_MEASUREMENT) | 156 + MX25_ADCQ_ITEM(4, MX25_CFG_PRECHARGE) | 157 + MX25_ADCQ_ITEM(5, MX25_CFG_TOUCH_DETECT)); 158 + 159 + /* 160 + * We measure X/Y with 'sample_count' number of samples and execute a 161 + * touch detection twice, with 1 sample each 162 + */ 163 + priv->expected_samples = priv->sample_count * 2 + 2; 164 + *items = 6; 165 + 166 + return 0; 167 + } 168 + 169 + static void mx25_tcq_disable_touch_irq(struct mx25_tcq_priv *priv) 170 + { 171 + regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_PDMSK, 172 + MX25_ADCQ_CR_PDMSK); 173 + } 174 + 175 + static void mx25_tcq_enable_touch_irq(struct mx25_tcq_priv *priv) 176 + { 177 + regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_PDMSK, 0); 178 + } 179 + 180 + static void mx25_tcq_disable_fifo_irq(struct mx25_tcq_priv *priv) 181 + { 182 + regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_FDRY_IRQ, 183 + MX25_ADCQ_MR_FDRY_IRQ); 184 + } 185 + 186 + static void mx25_tcq_enable_fifo_irq(struct mx25_tcq_priv *priv) 187 + { 188 + regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_FDRY_IRQ, 0); 189 + } 190 + 191 + static void mx25_tcq_force_queue_start(struct mx25_tcq_priv *priv) 192 + { 193 + regmap_update_bits(priv->regs, MX25_ADCQ_CR, 194 + MX25_ADCQ_CR_FQS, 195 + MX25_ADCQ_CR_FQS); 196 + } 197 + 198 + static void mx25_tcq_force_queue_stop(struct mx25_tcq_priv *priv) 199 + { 200 + regmap_update_bits(priv->regs, MX25_ADCQ_CR, 201 + MX25_ADCQ_CR_FQS, 0); 202 + } 203 + 204 + static void mx25_tcq_fifo_reset(struct mx25_tcq_priv *priv) 205 + { 206 + u32 tcqcr; 207 + 208 + regmap_read(priv->regs, MX25_ADCQ_CR, &tcqcr); 209 + regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FRST, 210 + MX25_ADCQ_CR_FRST); 211 + regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FRST, 0); 212 + regmap_write(priv->regs, MX25_ADCQ_CR, tcqcr); 213 + } 214 + 215 + static void mx25_tcq_re_enable_touch_detection(struct mx25_tcq_priv *priv) 216 + { 217 + /* stop the queue from looping */ 218 + mx25_tcq_force_queue_stop(priv); 219 + 220 + /* for a clean touch detection, preload the X plane */ 221 + regmap_write(priv->core_regs, MX25_TSC_TICR, MX25_PRECHARGE_VALUE); 222 + 223 + /* waste some time now to pre-load the X plate to high voltage */ 224 + mx25_tcq_fifo_reset(priv); 225 + 226 + /* re-enable the detection right now */ 227 + regmap_write(priv->core_regs, MX25_TSC_TICR, 228 + MX25_TOUCH_DETECT_VALUE | MX25_ADCQ_CFG_IGS); 229 + 230 + regmap_update_bits(priv->regs, MX25_ADCQ_SR, MX25_ADCQ_SR_PD, 231 + MX25_ADCQ_SR_PD); 232 + 233 + /* enable the pen down event to be a source for the interrupt */ 234 + regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_PD_IRQ, 0); 235 + 236 + /* lets fire the next IRQ if someone touches the touchscreen */ 237 + mx25_tcq_enable_touch_irq(priv); 238 + } 239 + 240 + static void mx25_tcq_create_event_for_4wire(struct mx25_tcq_priv *priv, 241 + u32 *sample_buf, 242 + unsigned int samples) 243 + { 244 + unsigned int x_pos = 0; 245 + unsigned int y_pos = 0; 246 + unsigned int touch_pre = 0; 247 + unsigned int touch_post = 0; 248 + unsigned int i; 249 + 250 + for (i = 0; i < samples; i++) { 251 + unsigned int index = MX25_ADCQ_FIFO_ID(sample_buf[i]); 252 + unsigned int val = MX25_ADCQ_FIFO_DATA(sample_buf[i]); 253 + 254 + switch (index) { 255 + case 1: 256 + touch_pre = val; 257 + break; 258 + case 2: 259 + x_pos = val; 260 + break; 261 + case 3: 262 + y_pos = val; 263 + break; 264 + case 5: 265 + touch_post = val; 266 + break; 267 + default: 268 + dev_dbg(priv->dev, "Dropped samples because of invalid index %d\n", 269 + index); 270 + return; 271 + } 272 + } 273 + 274 + if (samples != 0) { 275 + /* 276 + * only if both touch measures are below a threshold, 277 + * the position is valid 278 + */ 279 + if (touch_pre < priv->pen_threshold && 280 + touch_post < priv->pen_threshold) { 281 + /* valid samples, generate a report */ 282 + x_pos /= priv->sample_count; 283 + y_pos /= priv->sample_count; 284 + input_report_abs(priv->idev, ABS_X, x_pos); 285 + input_report_abs(priv->idev, ABS_Y, y_pos); 286 + input_report_key(priv->idev, BTN_TOUCH, 1); 287 + input_sync(priv->idev); 288 + 289 + /* get next sample */ 290 + mx25_tcq_enable_fifo_irq(priv); 291 + } else if (touch_pre >= priv->pen_threshold && 292 + touch_post >= priv->pen_threshold) { 293 + /* 294 + * if both samples are invalid, 295 + * generate a release report 296 + */ 297 + input_report_key(priv->idev, BTN_TOUCH, 0); 298 + input_sync(priv->idev); 299 + mx25_tcq_re_enable_touch_detection(priv); 300 + } else { 301 + /* 302 + * if only one of both touch measurements are 303 + * below the threshold, still some bouncing 304 + * happens. Take additional samples in this 305 + * case to be sure 306 + */ 307 + mx25_tcq_enable_fifo_irq(priv); 308 + } 309 + } 310 + } 311 + 312 + static irqreturn_t mx25_tcq_irq_thread(int irq, void *dev_id) 313 + { 314 + struct mx25_tcq_priv *priv = dev_id; 315 + u32 sample_buf[TSC_MAX_SAMPLES]; 316 + unsigned int samples; 317 + u32 stats; 318 + unsigned int i; 319 + 320 + /* 321 + * Check how many samples are available. We always have to read exactly 322 + * sample_count samples from the fifo, or a multiple of sample_count. 323 + * Otherwise we mixup samples into different touch events. 324 + */ 325 + regmap_read(priv->regs, MX25_ADCQ_SR, &stats); 326 + samples = MX25_ADCQ_SR_FDN(stats); 327 + samples -= samples % priv->sample_count; 328 + 329 + if (!samples) 330 + return IRQ_HANDLED; 331 + 332 + for (i = 0; i != samples; ++i) 333 + regmap_read(priv->regs, MX25_ADCQ_FIFO, &sample_buf[i]); 334 + 335 + mx25_tcq_create_event_for_4wire(priv, sample_buf, samples); 336 + 337 + return IRQ_HANDLED; 338 + } 339 + 340 + static irqreturn_t mx25_tcq_irq(int irq, void *dev_id) 341 + { 342 + struct mx25_tcq_priv *priv = dev_id; 343 + u32 stat; 344 + int ret = IRQ_HANDLED; 345 + 346 + regmap_read(priv->regs, MX25_ADCQ_SR, &stat); 347 + 348 + if (stat & (MX25_ADCQ_SR_FRR | MX25_ADCQ_SR_FUR | MX25_ADCQ_SR_FOR)) 349 + mx25_tcq_re_enable_touch_detection(priv); 350 + 351 + if (stat & MX25_ADCQ_SR_PD) { 352 + mx25_tcq_disable_touch_irq(priv); 353 + mx25_tcq_force_queue_start(priv); 354 + mx25_tcq_enable_fifo_irq(priv); 355 + } 356 + 357 + if (stat & MX25_ADCQ_SR_FDRY) { 358 + mx25_tcq_disable_fifo_irq(priv); 359 + ret = IRQ_WAKE_THREAD; 360 + } 361 + 362 + regmap_update_bits(priv->regs, MX25_ADCQ_SR, MX25_ADCQ_SR_FRR | 363 + MX25_ADCQ_SR_FUR | MX25_ADCQ_SR_FOR | 364 + MX25_ADCQ_SR_PD, 365 + MX25_ADCQ_SR_FRR | MX25_ADCQ_SR_FUR | 366 + MX25_ADCQ_SR_FOR | MX25_ADCQ_SR_PD); 367 + 368 + return ret; 369 + } 370 + 371 + /* configure the state machine for a 4-wire touchscreen */ 372 + static int mx25_tcq_init(struct mx25_tcq_priv *priv) 373 + { 374 + u32 tgcr; 375 + unsigned int ipg_div; 376 + unsigned int adc_period; 377 + unsigned int debounce_cnt; 378 + unsigned int settling_cnt; 379 + int itemct; 380 + int error; 381 + 382 + regmap_read(priv->core_regs, MX25_TSC_TGCR, &tgcr); 383 + ipg_div = max_t(unsigned int, 4, MX25_TGCR_GET_ADCCLK(tgcr)); 384 + adc_period = USEC_PER_SEC * ipg_div * 2 + 2; 385 + adc_period /= clk_get_rate(priv->clk) / 1000 + 1; 386 + debounce_cnt = DIV_ROUND_UP(priv->pen_debounce, adc_period * 8) - 1; 387 + settling_cnt = DIV_ROUND_UP(priv->settling_time, adc_period * 8) - 1; 388 + 389 + /* Reset */ 390 + regmap_write(priv->regs, MX25_ADCQ_CR, 391 + MX25_ADCQ_CR_QRST | MX25_ADCQ_CR_FRST); 392 + regmap_update_bits(priv->regs, MX25_ADCQ_CR, 393 + MX25_ADCQ_CR_QRST | MX25_ADCQ_CR_FRST, 0); 394 + 395 + /* up to 128 * 8 ADC clocks are possible */ 396 + if (debounce_cnt > 127) 397 + debounce_cnt = 127; 398 + 399 + /* up to 255 * 8 ADC clocks are possible */ 400 + if (settling_cnt > 255) 401 + settling_cnt = 255; 402 + 403 + error = imx25_setup_queue_4wire(priv, settling_cnt, &itemct); 404 + if (error) 405 + return error; 406 + 407 + regmap_update_bits(priv->regs, MX25_ADCQ_CR, 408 + MX25_ADCQ_CR_LITEMID_MASK | MX25_ADCQ_CR_WMRK_MASK, 409 + MX25_ADCQ_CR_LITEMID(itemct - 1) | 410 + MX25_ADCQ_CR_WMRK(priv->expected_samples - 1)); 411 + 412 + /* setup debounce count */ 413 + regmap_update_bits(priv->core_regs, MX25_TSC_TGCR, 414 + MX25_TGCR_PDBTIME_MASK, 415 + MX25_TGCR_PDBTIME(debounce_cnt)); 416 + 417 + /* enable debounce */ 418 + regmap_update_bits(priv->core_regs, MX25_TSC_TGCR, MX25_TGCR_PDBEN, 419 + MX25_TGCR_PDBEN); 420 + regmap_update_bits(priv->core_regs, MX25_TSC_TGCR, MX25_TGCR_PDEN, 421 + MX25_TGCR_PDEN); 422 + 423 + /* enable the engine on demand */ 424 + regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_QSM_MASK, 425 + MX25_ADCQ_CR_QSM_FQS); 426 + 427 + /* Enable repeat and repeat wait */ 428 + regmap_update_bits(priv->regs, MX25_ADCQ_CR, 429 + MX25_ADCQ_CR_RPT | MX25_ADCQ_CR_RWAIT_MASK, 430 + MX25_ADCQ_CR_RPT | 431 + MX25_ADCQ_CR_RWAIT(MX25_TSC_REPEAT_WAIT)); 432 + 433 + return 0; 434 + } 435 + 436 + static int mx25_tcq_parse_dt(struct platform_device *pdev, 437 + struct mx25_tcq_priv *priv) 438 + { 439 + struct device_node *np = pdev->dev.of_node; 440 + u32 wires; 441 + int error; 442 + 443 + /* Setup defaults */ 444 + priv->pen_threshold = 500; 445 + priv->sample_count = 3; 446 + priv->pen_debounce = 1000000; 447 + priv->settling_time = 250000; 448 + 449 + error = of_property_read_u32(np, "fsl,wires", &wires); 450 + if (error) { 451 + dev_err(&pdev->dev, "Failed to find fsl,wires properties\n"); 452 + return error; 453 + } 454 + 455 + if (wires == 4) { 456 + priv->mode = MX25_TS_4WIRE; 457 + } else { 458 + dev_err(&pdev->dev, "%u-wire mode not supported\n", wires); 459 + return -EINVAL; 460 + } 461 + 462 + /* These are optional, we don't care about the return values */ 463 + of_property_read_u32(np, "fsl,pen-threshold", &priv->pen_threshold); 464 + of_property_read_u32(np, "fsl,settling-time-ns", &priv->settling_time); 465 + of_property_read_u32(np, "fsl,pen-debounce-ns", &priv->pen_debounce); 466 + 467 + return 0; 468 + } 469 + 470 + static int mx25_tcq_open(struct input_dev *idev) 471 + { 472 + struct device *dev = &idev->dev; 473 + struct mx25_tcq_priv *priv = dev_get_drvdata(dev); 474 + int error; 475 + 476 + error = clk_prepare_enable(priv->clk); 477 + if (error) { 478 + dev_err(dev, "Failed to enable ipg clock\n"); 479 + return error; 480 + } 481 + 482 + error = mx25_tcq_init(priv); 483 + if (error) { 484 + dev_err(dev, "Failed to init tcq\n"); 485 + clk_disable_unprepare(priv->clk); 486 + return error; 487 + } 488 + 489 + mx25_tcq_re_enable_touch_detection(priv); 490 + 491 + return 0; 492 + } 493 + 494 + static void mx25_tcq_close(struct input_dev *idev) 495 + { 496 + struct mx25_tcq_priv *priv = input_get_drvdata(idev); 497 + 498 + mx25_tcq_force_queue_stop(priv); 499 + mx25_tcq_disable_touch_irq(priv); 500 + mx25_tcq_disable_fifo_irq(priv); 501 + clk_disable_unprepare(priv->clk); 502 + } 503 + 504 + static int mx25_tcq_probe(struct platform_device *pdev) 505 + { 506 + struct device *dev = &pdev->dev; 507 + struct input_dev *idev; 508 + struct mx25_tcq_priv *priv; 509 + struct mx25_tsadc *tsadc = dev_get_drvdata(pdev->dev.parent); 510 + struct resource *res; 511 + void __iomem *mem; 512 + int error; 513 + 514 + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 515 + if (!priv) 516 + return -ENOMEM; 517 + priv->dev = dev; 518 + 519 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 520 + mem = devm_ioremap_resource(dev, res); 521 + if (IS_ERR(mem)) 522 + return PTR_ERR(mem); 523 + 524 + error = mx25_tcq_parse_dt(pdev, priv); 525 + if (error) 526 + return error; 527 + 528 + priv->regs = devm_regmap_init_mmio(dev, mem, &mx25_tcq_regconfig); 529 + if (IS_ERR(priv->regs)) { 530 + dev_err(dev, "Failed to initialize regmap\n"); 531 + return PTR_ERR(priv->regs); 532 + } 533 + 534 + priv->irq = platform_get_irq(pdev, 0); 535 + if (priv->irq <= 0) { 536 + dev_err(dev, "Failed to get IRQ\n"); 537 + return priv->irq; 538 + } 539 + 540 + idev = devm_input_allocate_device(dev); 541 + if (!idev) { 542 + dev_err(dev, "Failed to allocate input device\n"); 543 + return -ENOMEM; 544 + } 545 + 546 + idev->name = mx25_tcq_name; 547 + input_set_capability(idev, EV_KEY, BTN_TOUCH); 548 + input_set_abs_params(idev, ABS_X, 0, 0xfff, 0, 0); 549 + input_set_abs_params(idev, ABS_Y, 0, 0xfff, 0, 0); 550 + 551 + idev->id.bustype = BUS_HOST; 552 + idev->open = mx25_tcq_open; 553 + idev->close = mx25_tcq_close; 554 + 555 + priv->idev = idev; 556 + input_set_drvdata(idev, priv); 557 + 558 + priv->core_regs = tsadc->regs; 559 + if (!priv->core_regs) 560 + return -EINVAL; 561 + 562 + priv->clk = tsadc->clk; 563 + if (!priv->clk) 564 + return -EINVAL; 565 + 566 + platform_set_drvdata(pdev, priv); 567 + 568 + error = devm_request_threaded_irq(dev, priv->irq, mx25_tcq_irq, 569 + mx25_tcq_irq_thread, 0, pdev->name, 570 + priv); 571 + if (error) { 572 + dev_err(dev, "Failed requesting IRQ\n"); 573 + return error; 574 + } 575 + 576 + error = input_register_device(idev); 577 + if (error) { 578 + dev_err(dev, "Failed to register input device\n"); 579 + return error; 580 + } 581 + 582 + return 0; 583 + } 584 + 585 + static struct platform_driver mx25_tcq_driver = { 586 + .driver = { 587 + .name = "mx25-tcq", 588 + .of_match_table = mx25_tcq_ids, 589 + }, 590 + .probe = mx25_tcq_probe, 591 + }; 592 + module_platform_driver(mx25_tcq_driver); 593 + 594 + MODULE_DESCRIPTION("TS input driver for Freescale mx25"); 595 + MODULE_AUTHOR("Markus Pargmann <mpa@pengutronix.de>"); 596 + MODULE_LICENSE("GPL v2");
+38 -16
drivers/mfd/Kconfig
··· 91 91 Support for the BCM590xx PMUs from Broadcom 92 92 93 93 config MFD_AXP20X 94 - bool "X-Powers AXP20X" 94 + tristate 95 95 select MFD_CORE 96 - select REGMAP_I2C 97 96 select REGMAP_IRQ 98 - depends on I2C=y 97 + 98 + config MFD_AXP20X_I2C 99 + tristate "X-Powers AXP series PMICs with I2C" 100 + select MFD_AXP20X 101 + select REGMAP_I2C 102 + depends on I2C 99 103 help 100 - If you say Y here you get support for the X-Powers AXP202, AXP209 and 101 - AXP288 power management IC (PMIC). 104 + If you say Y here you get support for the X-Powers AXP series power 105 + management ICs (PMICs) controlled with I2C. 106 + This driver include only the core APIs. You have to select individual 107 + components like regulators or the PEK (Power Enable Key) under the 108 + corresponding menus. 109 + 110 + config MFD_AXP20X_RSB 111 + tristate "X-Powers AXP series PMICs with RSB" 112 + select MFD_AXP20X 113 + depends on SUNXI_RSB 114 + help 115 + If you say Y here you get support for the X-Powers AXP series power 116 + management ICs (PMICs) controlled with RSB. 102 117 This driver include only the core APIs. You have to select individual 103 118 components like regulators or the PEK (Power Enable Key) under the 104 119 corresponding menus. ··· 285 270 select MFD_MC13XXX 286 271 help 287 272 Select this if your MC13xxx is connected via an I2C bus. 273 + 274 + config MFD_MX25_TSADC 275 + tristate "Freescale i.MX25 integrated Touchscreen and ADC unit" 276 + select REGMAP_MMIO 277 + depends on (SOC_IMX25 && OF) || COMPILE_TEST 278 + help 279 + Enable support for the integrated Touchscreen and ADC unit of the 280 + i.MX25 processors. They consist of a conversion queue for general 281 + purpose ADC and a queue for Touchscreens. 288 282 289 283 config MFD_HI6421_PMIC 290 284 tristate "HiSilicon Hi6421 PMU/Codec IC" ··· 1205 1181 Power Management chips. 1206 1182 1207 1183 config MFD_TPS65912 1208 - bool "TI TPS65912 Power Management chip" 1209 - depends on GPIOLIB 1184 + tristate 1210 1185 select MFD_CORE 1211 - help 1212 - If you say yes here you get support for the TPS65912 series of 1213 - PM chips. 1186 + select REGMAP 1187 + select REGMAP_IRQ 1214 1188 1215 1189 config MFD_TPS65912_I2C 1216 - bool "TI TPS65912 Power Management chip with I2C" 1217 - select MFD_CORE 1190 + tristate "TI TPS65912 Power Management chip with I2C" 1218 1191 select MFD_TPS65912 1219 - depends on I2C=y && GPIOLIB 1192 + select REGMAP_I2C 1193 + depends on I2C 1220 1194 help 1221 1195 If you say yes here you get support for the TPS65912 series of 1222 1196 PM chips with I2C interface. 1223 1197 1224 1198 config MFD_TPS65912_SPI 1225 - bool "TI TPS65912 Power Management chip with SPI" 1226 - select MFD_CORE 1199 + tristate "TI TPS65912 Power Management chip with SPI" 1227 1200 select MFD_TPS65912 1228 - depends on SPI_MASTER && GPIOLIB 1201 + select REGMAP_SPI 1202 + depends on SPI_MASTER 1229 1203 help 1230 1204 If you say yes here you get support for the TPS65912 series of 1231 1205 PM chips with SPI interface.
+5 -2
drivers/mfd/Makefile
··· 73 73 obj-$(CONFIG_MFD_TPS65217) += tps65217.o 74 74 obj-$(CONFIG_MFD_TPS65218) += tps65218.o 75 75 obj-$(CONFIG_MFD_TPS65910) += tps65910.o 76 - tps65912-objs := tps65912-core.o tps65912-irq.o 77 - obj-$(CONFIG_MFD_TPS65912) += tps65912.o 76 + obj-$(CONFIG_MFD_TPS65912) += tps65912-core.o 78 77 obj-$(CONFIG_MFD_TPS65912_I2C) += tps65912-i2c.o 79 78 obj-$(CONFIG_MFD_TPS65912_SPI) += tps65912-spi.o 80 79 obj-$(CONFIG_MFD_TPS80031) += tps80031.o ··· 83 84 obj-$(CONFIG_TWL4030_POWER) += twl4030-power.o 84 85 obj-$(CONFIG_MFD_TWL4030_AUDIO) += twl4030-audio.o 85 86 obj-$(CONFIG_TWL6040_CORE) += twl6040.o 87 + 88 + obj-$(CONFIG_MFD_MX25_TSADC) += fsl-imx25-tsadc.o 86 89 87 90 obj-$(CONFIG_MFD_MC13XXX) += mc13xxx-core.o 88 91 obj-$(CONFIG_MFD_MC13XXX_SPI) += mc13xxx-spi.o ··· 112 111 obj-$(CONFIG_MFD_DA9052_SPI) += da9052-spi.o 113 112 obj-$(CONFIG_MFD_DA9052_I2C) += da9052-i2c.o 114 113 obj-$(CONFIG_MFD_AXP20X) += axp20x.o 114 + obj-$(CONFIG_MFD_AXP20X_I2C) += axp20x-i2c.o 115 + obj-$(CONFIG_MFD_AXP20X_RSB) += axp20x-rsb.o 115 116 116 117 obj-$(CONFIG_MFD_LP3943) += lp3943.o 117 118 obj-$(CONFIG_MFD_LP8788) += lp8788.o lp8788-irq.o
+104
drivers/mfd/axp20x-i2c.c
··· 1 + /* 2 + * I2C driver for the X-Powers' Power Management ICs 3 + * 4 + * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC 5 + * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature 6 + * as well as configurable GPIOs. 7 + * 8 + * This driver supports the I2C variants. 9 + * 10 + * Copyright (C) 2014 Carlo Caione 11 + * 12 + * Author: Carlo Caione <carlo@caione.org> 13 + * 14 + * This program is free software; you can redistribute it and/or modify 15 + * it under the terms of the GNU General Public License version 2 as 16 + * published by the Free Software Foundation. 17 + */ 18 + 19 + #include <linux/acpi.h> 20 + #include <linux/err.h> 21 + #include <linux/i2c.h> 22 + #include <linux/module.h> 23 + #include <linux/mfd/axp20x.h> 24 + #include <linux/of.h> 25 + #include <linux/regmap.h> 26 + #include <linux/slab.h> 27 + 28 + static int axp20x_i2c_probe(struct i2c_client *i2c, 29 + const struct i2c_device_id *id) 30 + { 31 + struct axp20x_dev *axp20x; 32 + int ret; 33 + 34 + axp20x = devm_kzalloc(&i2c->dev, sizeof(*axp20x), GFP_KERNEL); 35 + if (!axp20x) 36 + return -ENOMEM; 37 + 38 + axp20x->dev = &i2c->dev; 39 + axp20x->irq = i2c->irq; 40 + dev_set_drvdata(axp20x->dev, axp20x); 41 + 42 + ret = axp20x_match_device(axp20x); 43 + if (ret) 44 + return ret; 45 + 46 + axp20x->regmap = devm_regmap_init_i2c(i2c, axp20x->regmap_cfg); 47 + if (IS_ERR(axp20x->regmap)) { 48 + ret = PTR_ERR(axp20x->regmap); 49 + dev_err(&i2c->dev, "regmap init failed: %d\n", ret); 50 + return ret; 51 + } 52 + 53 + return axp20x_device_probe(axp20x); 54 + } 55 + 56 + static int axp20x_i2c_remove(struct i2c_client *i2c) 57 + { 58 + struct axp20x_dev *axp20x = i2c_get_clientdata(i2c); 59 + 60 + return axp20x_device_remove(axp20x); 61 + } 62 + 63 + static const struct of_device_id axp20x_i2c_of_match[] = { 64 + { .compatible = "x-powers,axp152", .data = (void *)AXP152_ID }, 65 + { .compatible = "x-powers,axp202", .data = (void *)AXP202_ID }, 66 + { .compatible = "x-powers,axp209", .data = (void *)AXP209_ID }, 67 + { .compatible = "x-powers,axp221", .data = (void *)AXP221_ID }, 68 + { }, 69 + }; 70 + MODULE_DEVICE_TABLE(of, axp20x_i2c_of_match); 71 + 72 + /* 73 + * This is useless for OF-enabled devices, but it is needed by I2C subsystem 74 + */ 75 + static const struct i2c_device_id axp20x_i2c_id[] = { 76 + { }, 77 + }; 78 + MODULE_DEVICE_TABLE(i2c, axp20x_i2c_id); 79 + 80 + static const struct acpi_device_id axp20x_i2c_acpi_match[] = { 81 + { 82 + .id = "INT33F4", 83 + .driver_data = AXP288_ID, 84 + }, 85 + { }, 86 + }; 87 + MODULE_DEVICE_TABLE(acpi, axp20x_i2c_acpi_match); 88 + 89 + static struct i2c_driver axp20x_i2c_driver = { 90 + .driver = { 91 + .name = "axp20x-i2c", 92 + .of_match_table = of_match_ptr(axp20x_i2c_of_match), 93 + .acpi_match_table = ACPI_PTR(axp20x_i2c_acpi_match), 94 + }, 95 + .probe = axp20x_i2c_probe, 96 + .remove = axp20x_i2c_remove, 97 + .id_table = axp20x_i2c_id, 98 + }; 99 + 100 + module_i2c_driver(axp20x_i2c_driver); 101 + 102 + MODULE_DESCRIPTION("PMIC MFD I2C driver for AXP20X"); 103 + MODULE_AUTHOR("Carlo Caione <carlo@caione.org>"); 104 + MODULE_LICENSE("GPL");
+80
drivers/mfd/axp20x-rsb.c
··· 1 + /* 2 + * RSB driver for the X-Powers' Power Management ICs 3 + * 4 + * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC 5 + * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature 6 + * as well as configurable GPIOs. 7 + * 8 + * This driver supports the RSB variants. 9 + * 10 + * Copyright (C) 2015 Chen-Yu Tsai 11 + * 12 + * Author: Chen-Yu Tsai <wens@csie.org> 13 + * 14 + * This program is free software; you can redistribute it and/or modify 15 + * it under the terms of the GNU General Public License version 2 as 16 + * published by the Free Software Foundation. 17 + */ 18 + 19 + #include <linux/acpi.h> 20 + #include <linux/err.h> 21 + #include <linux/mfd/axp20x.h> 22 + #include <linux/module.h> 23 + #include <linux/of.h> 24 + #include <linux/regmap.h> 25 + #include <linux/slab.h> 26 + #include <linux/sunxi-rsb.h> 27 + 28 + static int axp20x_rsb_probe(struct sunxi_rsb_device *rdev) 29 + { 30 + struct axp20x_dev *axp20x; 31 + int ret; 32 + 33 + axp20x = devm_kzalloc(&rdev->dev, sizeof(*axp20x), GFP_KERNEL); 34 + if (!axp20x) 35 + return -ENOMEM; 36 + 37 + axp20x->dev = &rdev->dev; 38 + axp20x->irq = rdev->irq; 39 + dev_set_drvdata(&rdev->dev, axp20x); 40 + 41 + ret = axp20x_match_device(axp20x); 42 + if (ret) 43 + return ret; 44 + 45 + axp20x->regmap = devm_regmap_init_sunxi_rsb(rdev, axp20x->regmap_cfg); 46 + if (IS_ERR(axp20x->regmap)) { 47 + ret = PTR_ERR(axp20x->regmap); 48 + dev_err(&rdev->dev, "regmap init failed: %d\n", ret); 49 + return ret; 50 + } 51 + 52 + return axp20x_device_probe(axp20x); 53 + } 54 + 55 + static int axp20x_rsb_remove(struct sunxi_rsb_device *rdev) 56 + { 57 + struct axp20x_dev *axp20x = sunxi_rsb_device_get_drvdata(rdev); 58 + 59 + return axp20x_device_remove(axp20x); 60 + } 61 + 62 + static const struct of_device_id axp20x_rsb_of_match[] = { 63 + { .compatible = "x-powers,axp223", .data = (void *)AXP223_ID }, 64 + { }, 65 + }; 66 + MODULE_DEVICE_TABLE(of, axp20x_rsb_of_match); 67 + 68 + static struct sunxi_rsb_driver axp20x_rsb_driver = { 69 + .driver = { 70 + .name = "axp20x-rsb", 71 + .of_match_table = of_match_ptr(axp20x_rsb_of_match), 72 + }, 73 + .probe = axp20x_rsb_probe, 74 + .remove = axp20x_rsb_remove, 75 + }; 76 + module_sunxi_rsb_driver(axp20x_rsb_driver); 77 + 78 + MODULE_DESCRIPTION("PMIC MFD sunXi RSB driver for AXP20X"); 79 + MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>"); 80 + MODULE_LICENSE("GPL v2");
+25 -80
drivers/mfd/axp20x.c
··· 1 1 /* 2 - * axp20x.c - MFD core driver for the X-Powers' Power Management ICs 2 + * MFD core driver for the X-Powers' Power Management ICs 3 3 * 4 4 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC 5 5 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature 6 6 * as well as configurable GPIOs. 7 + * 8 + * This file contains the interface independent core functions. 9 + * 10 + * Copyright (C) 2014 Carlo Caione 7 11 * 8 12 * Author: Carlo Caione <carlo@caione.org> 9 13 * ··· 17 13 */ 18 14 19 15 #include <linux/err.h> 20 - #include <linux/i2c.h> 21 16 #include <linux/interrupt.h> 22 17 #include <linux/kernel.h> 23 18 #include <linux/module.h> 24 19 #include <linux/pm_runtime.h> 25 20 #include <linux/regmap.h> 26 - #include <linux/slab.h> 27 21 #include <linux/regulator/consumer.h> 28 22 #include <linux/mfd/axp20x.h> 29 23 #include <linux/mfd/core.h> 30 24 #include <linux/of_device.h> 31 - #include <linux/of_irq.h> 32 25 #include <linux/acpi.h> 33 26 34 27 #define AXP20X_OFF 0x80 ··· 35 34 "AXP202", 36 35 "AXP209", 37 36 "AXP221", 37 + "AXP223", 38 38 "AXP288", 39 39 }; 40 40 ··· 378 376 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1), 379 377 }; 380 378 381 - static const struct of_device_id axp20x_of_match[] = { 382 - { .compatible = "x-powers,axp152", .data = (void *) AXP152_ID }, 383 - { .compatible = "x-powers,axp202", .data = (void *) AXP202_ID }, 384 - { .compatible = "x-powers,axp209", .data = (void *) AXP209_ID }, 385 - { .compatible = "x-powers,axp221", .data = (void *) AXP221_ID }, 386 - { }, 387 - }; 388 - MODULE_DEVICE_TABLE(of, axp20x_of_match); 389 - 390 - /* 391 - * This is useless for OF-enabled devices, but it is needed by I2C subsystem 392 - */ 393 - static const struct i2c_device_id axp20x_i2c_id[] = { 394 - { }, 395 - }; 396 - MODULE_DEVICE_TABLE(i2c, axp20x_i2c_id); 397 - 398 - static const struct acpi_device_id axp20x_acpi_match[] = { 399 - { 400 - .id = "INT33F4", 401 - .driver_data = AXP288_ID, 402 - }, 403 - { }, 404 - }; 405 - MODULE_DEVICE_TABLE(acpi, axp20x_acpi_match); 406 - 407 379 static const struct regmap_irq_chip axp152_regmap_irq_chip = { 408 380 .name = "axp152_irq_chip", 409 381 .status_base = AXP152_IRQ1_STATE, ··· 582 606 AXP20X_OFF); 583 607 } 584 608 585 - static int axp20x_match_device(struct axp20x_dev *axp20x, struct device *dev) 609 + int axp20x_match_device(struct axp20x_dev *axp20x) 586 610 { 611 + struct device *dev = axp20x->dev; 587 612 const struct acpi_device_id *acpi_id; 588 613 const struct of_device_id *of_id; 589 614 590 615 if (dev->of_node) { 591 - of_id = of_match_device(axp20x_of_match, dev); 616 + of_id = of_match_device(dev->driver->of_match_table, dev); 592 617 if (!of_id) { 593 618 dev_err(dev, "Unable to match OF ID\n"); 594 619 return -ENODEV; 595 620 } 596 - axp20x->variant = (long) of_id->data; 621 + axp20x->variant = (long)of_id->data; 597 622 } else { 598 623 acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev); 599 624 if (!acpi_id || !acpi_id->driver_data) { 600 625 dev_err(dev, "Unable to match ACPI ID and data\n"); 601 626 return -ENODEV; 602 627 } 603 - axp20x->variant = (long) acpi_id->driver_data; 628 + axp20x->variant = (long)acpi_id->driver_data; 604 629 } 605 630 606 631 switch (axp20x->variant) { ··· 619 642 axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip; 620 643 break; 621 644 case AXP221_ID: 645 + case AXP223_ID: 622 646 axp20x->nr_cells = ARRAY_SIZE(axp22x_cells); 623 647 axp20x->cells = axp22x_cells; 624 648 axp20x->regmap_cfg = &axp22x_regmap_config; ··· 636 658 return -EINVAL; 637 659 } 638 660 dev_info(dev, "AXP20x variant %s found\n", 639 - axp20x_model_names[axp20x->variant]); 661 + axp20x_model_names[axp20x->variant]); 640 662 641 663 return 0; 642 664 } 665 + EXPORT_SYMBOL(axp20x_match_device); 643 666 644 - static int axp20x_i2c_probe(struct i2c_client *i2c, 645 - const struct i2c_device_id *id) 667 + int axp20x_device_probe(struct axp20x_dev *axp20x) 646 668 { 647 - struct axp20x_dev *axp20x; 648 669 int ret; 649 670 650 - axp20x = devm_kzalloc(&i2c->dev, sizeof(*axp20x), GFP_KERNEL); 651 - if (!axp20x) 652 - return -ENOMEM; 653 - 654 - ret = axp20x_match_device(axp20x, &i2c->dev); 655 - if (ret) 656 - return ret; 657 - 658 - axp20x->i2c_client = i2c; 659 - axp20x->dev = &i2c->dev; 660 - dev_set_drvdata(axp20x->dev, axp20x); 661 - 662 - axp20x->regmap = devm_regmap_init_i2c(i2c, axp20x->regmap_cfg); 663 - if (IS_ERR(axp20x->regmap)) { 664 - ret = PTR_ERR(axp20x->regmap); 665 - dev_err(&i2c->dev, "regmap init failed: %d\n", ret); 666 - return ret; 667 - } 668 - 669 - ret = regmap_add_irq_chip(axp20x->regmap, i2c->irq, 671 + ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq, 670 672 IRQF_ONESHOT | IRQF_SHARED, -1, 671 673 axp20x->regmap_irq_chip, 672 674 &axp20x->regmap_irqc); 673 675 if (ret) { 674 - dev_err(&i2c->dev, "failed to add irq chip: %d\n", ret); 676 + dev_err(axp20x->dev, "failed to add irq chip: %d\n", ret); 675 677 return ret; 676 678 } 677 679 678 680 ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells, 679 - axp20x->nr_cells, NULL, 0, NULL); 681 + axp20x->nr_cells, NULL, 0, NULL); 680 682 681 683 if (ret) { 682 - dev_err(&i2c->dev, "failed to add MFD devices: %d\n", ret); 683 - regmap_del_irq_chip(i2c->irq, axp20x->regmap_irqc); 684 + dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret); 685 + regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc); 684 686 return ret; 685 687 } 686 688 ··· 669 711 pm_power_off = axp20x_power_off; 670 712 } 671 713 672 - dev_info(&i2c->dev, "AXP20X driver loaded\n"); 714 + dev_info(axp20x->dev, "AXP20X driver loaded\n"); 673 715 674 716 return 0; 675 717 } 718 + EXPORT_SYMBOL(axp20x_device_probe); 676 719 677 - static int axp20x_i2c_remove(struct i2c_client *i2c) 720 + int axp20x_device_remove(struct axp20x_dev *axp20x) 678 721 { 679 - struct axp20x_dev *axp20x = i2c_get_clientdata(i2c); 680 - 681 722 if (axp20x == axp20x_pm_power_off) { 682 723 axp20x_pm_power_off = NULL; 683 724 pm_power_off = NULL; 684 725 } 685 726 686 727 mfd_remove_devices(axp20x->dev); 687 - regmap_del_irq_chip(axp20x->i2c_client->irq, axp20x->regmap_irqc); 728 + regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc); 688 729 689 730 return 0; 690 731 } 691 - 692 - static struct i2c_driver axp20x_i2c_driver = { 693 - .driver = { 694 - .name = "axp20x", 695 - .of_match_table = of_match_ptr(axp20x_of_match), 696 - .acpi_match_table = ACPI_PTR(axp20x_acpi_match), 697 - }, 698 - .probe = axp20x_i2c_probe, 699 - .remove = axp20x_i2c_remove, 700 - .id_table = axp20x_i2c_id, 701 - }; 702 - 703 - module_i2c_driver(axp20x_i2c_driver); 732 + EXPORT_SYMBOL(axp20x_device_remove); 704 733 705 734 MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X"); 706 735 MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
+203
drivers/mfd/fsl-imx25-tsadc.c
··· 1 + /* 2 + * Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de> 3 + * 4 + * This program is free software; you can redistribute it and/or modify it under 5 + * the terms of the GNU General Public License version 2 as published by the 6 + * Free Software Foundation. 7 + */ 8 + 9 + #include <linux/clk.h> 10 + #include <linux/interrupt.h> 11 + #include <linux/irqchip/chained_irq.h> 12 + #include <linux/irqdesc.h> 13 + #include <linux/irqdomain.h> 14 + #include <linux/irq.h> 15 + #include <linux/mfd/imx25-tsadc.h> 16 + #include <linux/module.h> 17 + #include <linux/of.h> 18 + #include <linux/of_platform.h> 19 + #include <linux/platform_device.h> 20 + #include <linux/regmap.h> 21 + 22 + static struct regmap_config mx25_tsadc_regmap_config = { 23 + .fast_io = true, 24 + .max_register = 8, 25 + .reg_bits = 32, 26 + .val_bits = 32, 27 + .reg_stride = 4, 28 + }; 29 + 30 + static void mx25_tsadc_irq_handler(struct irq_desc *desc) 31 + { 32 + struct mx25_tsadc *tsadc = irq_desc_get_handler_data(desc); 33 + struct irq_chip *chip = irq_desc_get_chip(desc); 34 + u32 status; 35 + 36 + chained_irq_enter(chip, desc); 37 + 38 + regmap_read(tsadc->regs, MX25_TSC_TGSR, &status); 39 + 40 + if (status & MX25_TGSR_GCQ_INT) 41 + generic_handle_irq(irq_find_mapping(tsadc->domain, 1)); 42 + 43 + if (status & MX25_TGSR_TCQ_INT) 44 + generic_handle_irq(irq_find_mapping(tsadc->domain, 0)); 45 + 46 + chained_irq_exit(chip, desc); 47 + } 48 + 49 + static int mx25_tsadc_domain_map(struct irq_domain *d, unsigned int irq, 50 + irq_hw_number_t hwirq) 51 + { 52 + struct mx25_tsadc *tsadc = d->host_data; 53 + 54 + irq_set_chip_data(irq, tsadc); 55 + irq_set_chip_and_handler(irq, &dummy_irq_chip, 56 + handle_level_irq); 57 + irq_modify_status(irq, IRQ_NOREQUEST, IRQ_NOPROBE); 58 + 59 + return 0; 60 + } 61 + 62 + static struct irq_domain_ops mx25_tsadc_domain_ops = { 63 + .map = mx25_tsadc_domain_map, 64 + .xlate = irq_domain_xlate_onecell, 65 + }; 66 + 67 + static int mx25_tsadc_setup_irq(struct platform_device *pdev, 68 + struct mx25_tsadc *tsadc) 69 + { 70 + struct device *dev = &pdev->dev; 71 + struct device_node *np = dev->of_node; 72 + int irq; 73 + 74 + irq = platform_get_irq(pdev, 0); 75 + if (irq <= 0) { 76 + dev_err(dev, "Failed to get irq\n"); 77 + return irq; 78 + } 79 + 80 + tsadc->domain = irq_domain_add_simple(np, 2, 0, &mx25_tsadc_domain_ops, 81 + tsadc); 82 + if (!tsadc->domain) { 83 + dev_err(dev, "Failed to add irq domain\n"); 84 + return -ENOMEM; 85 + } 86 + 87 + irq_set_chained_handler(irq, mx25_tsadc_irq_handler); 88 + irq_set_handler_data(irq, tsadc); 89 + 90 + return 0; 91 + } 92 + 93 + static void mx25_tsadc_setup_clk(struct platform_device *pdev, 94 + struct mx25_tsadc *tsadc) 95 + { 96 + unsigned clk_div; 97 + 98 + /* 99 + * According to the datasheet the ADC clock should never 100 + * exceed 1,75 MHz. Base clock is the IPG and the ADC unit uses 101 + * a funny clock divider. To keep the ADC conversion time constant 102 + * adapt the ADC internal clock divider to the IPG clock rate. 103 + */ 104 + 105 + dev_dbg(&pdev->dev, "Found master clock at %lu Hz\n", 106 + clk_get_rate(tsadc->clk)); 107 + 108 + clk_div = DIV_ROUND_UP(clk_get_rate(tsadc->clk), 1750000); 109 + dev_dbg(&pdev->dev, "Setting up ADC clock divider to %u\n", clk_div); 110 + 111 + /* adc clock = IPG clock / (2 * div + 2) */ 112 + clk_div -= 2; 113 + clk_div /= 2; 114 + 115 + /* 116 + * the ADC clock divider changes its behaviour when values below 4 117 + * are used: it is fixed to "/ 10" in this case 118 + */ 119 + clk_div = max_t(unsigned, 4, clk_div); 120 + 121 + dev_dbg(&pdev->dev, "Resulting ADC conversion clock at %lu Hz\n", 122 + clk_get_rate(tsadc->clk) / (2 * clk_div + 2)); 123 + 124 + regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, 125 + MX25_TGCR_ADCCLKCFG(0x1f), 126 + MX25_TGCR_ADCCLKCFG(clk_div)); 127 + } 128 + 129 + static int mx25_tsadc_probe(struct platform_device *pdev) 130 + { 131 + struct device *dev = &pdev->dev; 132 + struct device_node *np = dev->of_node; 133 + struct mx25_tsadc *tsadc; 134 + struct resource *res; 135 + int ret; 136 + void __iomem *iomem; 137 + 138 + tsadc = devm_kzalloc(dev, sizeof(*tsadc), GFP_KERNEL); 139 + if (!tsadc) 140 + return -ENOMEM; 141 + 142 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 143 + iomem = devm_ioremap_resource(dev, res); 144 + if (IS_ERR(iomem)) 145 + return PTR_ERR(iomem); 146 + 147 + tsadc->regs = devm_regmap_init_mmio(dev, iomem, 148 + &mx25_tsadc_regmap_config); 149 + if (IS_ERR(tsadc->regs)) { 150 + dev_err(dev, "Failed to initialize regmap\n"); 151 + return PTR_ERR(tsadc->regs); 152 + } 153 + 154 + tsadc->clk = devm_clk_get(dev, "ipg"); 155 + if (IS_ERR(tsadc->clk)) { 156 + dev_err(dev, "Failed to get ipg clock\n"); 157 + return PTR_ERR(tsadc->clk); 158 + } 159 + 160 + /* setup clock according to the datasheet */ 161 + mx25_tsadc_setup_clk(pdev, tsadc); 162 + 163 + /* Enable clock and reset the component */ 164 + regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_CLK_EN, 165 + MX25_TGCR_CLK_EN); 166 + regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_TSC_RST, 167 + MX25_TGCR_TSC_RST); 168 + 169 + /* Setup powersaving mode, but enable internal reference voltage */ 170 + regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_POWERMODE_MASK, 171 + MX25_TGCR_POWERMODE_SAVE); 172 + regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_INTREFEN, 173 + MX25_TGCR_INTREFEN); 174 + 175 + ret = mx25_tsadc_setup_irq(pdev, tsadc); 176 + if (ret) 177 + return ret; 178 + 179 + platform_set_drvdata(pdev, tsadc); 180 + 181 + of_platform_populate(np, NULL, NULL, dev); 182 + 183 + return 0; 184 + } 185 + 186 + static const struct of_device_id mx25_tsadc_ids[] = { 187 + { .compatible = "fsl,imx25-tsadc" }, 188 + { /* Sentinel */ } 189 + }; 190 + 191 + static struct platform_driver mx25_tsadc_driver = { 192 + .driver = { 193 + .name = "mx25-tsadc", 194 + .of_match_table = of_match_ptr(mx25_tsadc_ids), 195 + }, 196 + .probe = mx25_tsadc_probe, 197 + }; 198 + module_platform_driver(mx25_tsadc_driver); 199 + 200 + MODULE_DESCRIPTION("MFD for ADC/TSC for Freescale mx25"); 201 + MODULE_AUTHOR("Markus Pargmann <mpa@pengutronix.de>"); 202 + MODULE_LICENSE("GPL v2"); 203 + MODULE_ALIAS("platform:mx25-tsadc");
+88 -152
drivers/mfd/tps65912-core.c
··· 1 1 /* 2 - * tps65912-core.c -- TI TPS65912x 2 + * Core functions for TI TPS65912x PMICs 3 3 * 4 - * Copyright 2011 Texas Instruments Inc. 4 + * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/ 5 + * Andrew F. Davis <afd@ti.com> 5 6 * 6 - * Author: Margarita Olaya Cabrera <magi@slimlogic.co.uk> 7 + * This program is free software; you can redistribute it and/or 8 + * modify it under the terms of the GNU General Public License version 2 as 9 + * published by the Free Software Foundation. 7 10 * 8 - * This program is free software; you can redistribute it and/or modify it 9 - * under the terms of the GNU General Public License as published by the 10 - * Free Software Foundation; either version 2 of the License, or (at your 11 - * option) any later version. 11 + * This program is distributed "as is" WITHOUT ANY WARRANTY of any 12 + * kind, whether expressed or implied; without even the implied warranty 13 + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 + * GNU General Public License version 2 for more details. 12 15 * 13 - * This driver is based on wm8350 implementation. 16 + * Based on the TPS65218 driver and the previous TPS65912 driver by 17 + * Margarita Olaya Cabrera <magi@slimlogic.co.uk> 14 18 */ 15 19 16 - #include <linux/module.h> 17 - #include <linux/moduleparam.h> 18 - #include <linux/slab.h> 19 - #include <linux/gpio.h> 20 + #include <linux/interrupt.h> 20 21 #include <linux/mfd/core.h> 22 + #include <linux/module.h> 23 + 21 24 #include <linux/mfd/tps65912.h> 22 25 23 - static const struct mfd_cell tps65912s[] = { 24 - { 25 - .name = "tps65912-pmic", 26 - }, 26 + static const struct mfd_cell tps65912_cells[] = { 27 + { .name = "tps65912-regulator", }, 28 + { .name = "tps65912-gpio", }, 27 29 }; 28 30 29 - int tps65912_set_bits(struct tps65912 *tps65912, u8 reg, u8 mask) 31 + static const struct regmap_irq tps65912_irqs[] = { 32 + /* INT_STS IRQs */ 33 + REGMAP_IRQ_REG(TPS65912_IRQ_PWRHOLD_F, 0, TPS65912_INT_STS_PWRHOLD_F), 34 + REGMAP_IRQ_REG(TPS65912_IRQ_VMON, 0, TPS65912_INT_STS_VMON), 35 + REGMAP_IRQ_REG(TPS65912_IRQ_PWRON, 0, TPS65912_INT_STS_PWRON), 36 + REGMAP_IRQ_REG(TPS65912_IRQ_PWRON_LP, 0, TPS65912_INT_STS_PWRON_LP), 37 + REGMAP_IRQ_REG(TPS65912_IRQ_PWRHOLD_R, 0, TPS65912_INT_STS_PWRHOLD_R), 38 + REGMAP_IRQ_REG(TPS65912_IRQ_HOTDIE, 0, TPS65912_INT_STS_HOTDIE), 39 + REGMAP_IRQ_REG(TPS65912_IRQ_GPIO1_R, 0, TPS65912_INT_STS_GPIO1_R), 40 + REGMAP_IRQ_REG(TPS65912_IRQ_GPIO1_F, 0, TPS65912_INT_STS_GPIO1_F), 41 + /* INT_STS2 IRQs */ 42 + REGMAP_IRQ_REG(TPS65912_IRQ_GPIO2_R, 1, TPS65912_INT_STS2_GPIO2_R), 43 + REGMAP_IRQ_REG(TPS65912_IRQ_GPIO2_F, 1, TPS65912_INT_STS2_GPIO2_F), 44 + REGMAP_IRQ_REG(TPS65912_IRQ_GPIO3_R, 1, TPS65912_INT_STS2_GPIO3_R), 45 + REGMAP_IRQ_REG(TPS65912_IRQ_GPIO3_F, 1, TPS65912_INT_STS2_GPIO3_F), 46 + REGMAP_IRQ_REG(TPS65912_IRQ_GPIO4_R, 1, TPS65912_INT_STS2_GPIO4_R), 47 + REGMAP_IRQ_REG(TPS65912_IRQ_GPIO4_F, 1, TPS65912_INT_STS2_GPIO4_F), 48 + REGMAP_IRQ_REG(TPS65912_IRQ_GPIO5_R, 1, TPS65912_INT_STS2_GPIO5_R), 49 + REGMAP_IRQ_REG(TPS65912_IRQ_GPIO5_F, 1, TPS65912_INT_STS2_GPIO5_F), 50 + /* INT_STS3 IRQs */ 51 + REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_DCDC1, 2, TPS65912_INT_STS3_PGOOD_DCDC1), 52 + REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_DCDC2, 2, TPS65912_INT_STS3_PGOOD_DCDC2), 53 + REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_DCDC3, 2, TPS65912_INT_STS3_PGOOD_DCDC3), 54 + REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_DCDC4, 2, TPS65912_INT_STS3_PGOOD_DCDC4), 55 + REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO1, 2, TPS65912_INT_STS3_PGOOD_LDO1), 56 + REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO2, 2, TPS65912_INT_STS3_PGOOD_LDO2), 57 + REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO3, 2, TPS65912_INT_STS3_PGOOD_LDO3), 58 + REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO4, 2, TPS65912_INT_STS3_PGOOD_LDO4), 59 + /* INT_STS4 IRQs */ 60 + REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO5, 3, TPS65912_INT_STS4_PGOOD_LDO5), 61 + REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO6, 3, TPS65912_INT_STS4_PGOOD_LDO6), 62 + REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO7, 3, TPS65912_INT_STS4_PGOOD_LDO7), 63 + REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO8, 3, TPS65912_INT_STS4_PGOOD_LDO8), 64 + REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO9, 3, TPS65912_INT_STS4_PGOOD_LDO9), 65 + REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO10, 3, TPS65912_INT_STS4_PGOOD_LDO10), 66 + }; 67 + 68 + static struct regmap_irq_chip tps65912_irq_chip = { 69 + .name = "tps65912", 70 + .irqs = tps65912_irqs, 71 + .num_irqs = ARRAY_SIZE(tps65912_irqs), 72 + .num_regs = 4, 73 + .irq_reg_stride = 2, 74 + .mask_base = TPS65912_INT_MSK, 75 + .status_base = TPS65912_INT_STS, 76 + .ack_base = TPS65912_INT_STS, 77 + .init_ack_masked = true, 78 + }; 79 + 80 + int tps65912_device_init(struct tps65912 *tps) 30 81 { 31 - u8 data; 32 - int err; 82 + int ret; 33 83 34 - mutex_lock(&tps65912->io_mutex); 84 + ret = regmap_add_irq_chip(tps->regmap, tps->irq, IRQF_ONESHOT, 0, 85 + &tps65912_irq_chip, &tps->irq_data); 86 + if (ret) 87 + return ret; 35 88 36 - err = tps65912->read(tps65912, reg, 1, &data); 37 - if (err) { 38 - dev_err(tps65912->dev, "Read from reg 0x%x failed\n", reg); 39 - goto out; 89 + ret = mfd_add_devices(tps->dev, PLATFORM_DEVID_AUTO, tps65912_cells, 90 + ARRAY_SIZE(tps65912_cells), NULL, 0, 91 + regmap_irq_get_domain(tps->irq_data)); 92 + if (ret) { 93 + regmap_del_irq_chip(tps->irq, tps->irq_data); 94 + return ret; 40 95 } 41 96 42 - data |= mask; 43 - err = tps65912->write(tps65912, reg, 1, &data); 44 - if (err) 45 - dev_err(tps65912->dev, "Write to reg 0x%x failed\n", reg); 46 - 47 - out: 48 - mutex_unlock(&tps65912->io_mutex); 49 - return err; 97 + return 0; 50 98 } 51 - EXPORT_SYMBOL_GPL(tps65912_set_bits); 99 + EXPORT_SYMBOL_GPL(tps65912_device_init); 52 100 53 - int tps65912_clear_bits(struct tps65912 *tps65912, u8 reg, u8 mask) 101 + int tps65912_device_exit(struct tps65912 *tps) 54 102 { 55 - u8 data; 56 - int err; 103 + regmap_del_irq_chip(tps->irq, tps->irq_data); 57 104 58 - mutex_lock(&tps65912->io_mutex); 59 - err = tps65912->read(tps65912, reg, 1, &data); 60 - if (err) { 61 - dev_err(tps65912->dev, "Read from reg 0x%x failed\n", reg); 62 - goto out; 63 - } 64 - 65 - data &= ~mask; 66 - err = tps65912->write(tps65912, reg, 1, &data); 67 - if (err) 68 - dev_err(tps65912->dev, "Write to reg 0x%x failed\n", reg); 69 - 70 - out: 71 - mutex_unlock(&tps65912->io_mutex); 72 - return err; 105 + return 0; 73 106 } 74 - EXPORT_SYMBOL_GPL(tps65912_clear_bits); 107 + EXPORT_SYMBOL_GPL(tps65912_device_exit); 75 108 76 - static inline int tps65912_read(struct tps65912 *tps65912, u8 reg) 77 - { 78 - u8 val; 79 - int err; 80 - 81 - err = tps65912->read(tps65912, reg, 1, &val); 82 - if (err < 0) 83 - return err; 84 - 85 - return val; 86 - } 87 - 88 - static inline int tps65912_write(struct tps65912 *tps65912, u8 reg, u8 val) 89 - { 90 - return tps65912->write(tps65912, reg, 1, &val); 91 - } 92 - 93 - int tps65912_reg_read(struct tps65912 *tps65912, u8 reg) 94 - { 95 - int data; 96 - 97 - mutex_lock(&tps65912->io_mutex); 98 - 99 - data = tps65912_read(tps65912, reg); 100 - if (data < 0) 101 - dev_err(tps65912->dev, "Read from reg 0x%x failed\n", reg); 102 - 103 - mutex_unlock(&tps65912->io_mutex); 104 - return data; 105 - } 106 - EXPORT_SYMBOL_GPL(tps65912_reg_read); 107 - 108 - int tps65912_reg_write(struct tps65912 *tps65912, u8 reg, u8 val) 109 - { 110 - int err; 111 - 112 - mutex_lock(&tps65912->io_mutex); 113 - 114 - err = tps65912_write(tps65912, reg, val); 115 - if (err < 0) 116 - dev_err(tps65912->dev, "Write for reg 0x%x failed\n", reg); 117 - 118 - mutex_unlock(&tps65912->io_mutex); 119 - return err; 120 - } 121 - EXPORT_SYMBOL_GPL(tps65912_reg_write); 122 - 123 - int tps65912_device_init(struct tps65912 *tps65912) 124 - { 125 - struct tps65912_board *pmic_plat_data = dev_get_platdata(tps65912->dev); 126 - struct tps65912_platform_data *init_data; 127 - int ret, dcdc_avs, value; 128 - 129 - init_data = kzalloc(sizeof(struct tps65912_platform_data), GFP_KERNEL); 130 - if (init_data == NULL) 131 - return -ENOMEM; 132 - 133 - mutex_init(&tps65912->io_mutex); 134 - dev_set_drvdata(tps65912->dev, tps65912); 135 - 136 - dcdc_avs = (pmic_plat_data->is_dcdc1_avs << 0 | 137 - pmic_plat_data->is_dcdc2_avs << 1 | 138 - pmic_plat_data->is_dcdc3_avs << 2 | 139 - pmic_plat_data->is_dcdc4_avs << 3); 140 - if (dcdc_avs) { 141 - tps65912->read(tps65912, TPS65912_I2C_SPI_CFG, 1, &value); 142 - dcdc_avs |= value; 143 - tps65912->write(tps65912, TPS65912_I2C_SPI_CFG, 1, &dcdc_avs); 144 - } 145 - 146 - ret = mfd_add_devices(tps65912->dev, -1, 147 - tps65912s, ARRAY_SIZE(tps65912s), 148 - NULL, 0, NULL); 149 - if (ret < 0) 150 - goto err; 151 - 152 - init_data->irq = pmic_plat_data->irq; 153 - init_data->irq_base = pmic_plat_data->irq_base; 154 - ret = tps65912_irq_init(tps65912, init_data->irq, init_data); 155 - if (ret < 0) 156 - goto err; 157 - 158 - kfree(init_data); 159 - return ret; 160 - 161 - err: 162 - kfree(init_data); 163 - mfd_remove_devices(tps65912->dev); 164 - return ret; 165 - } 166 - 167 - void tps65912_device_exit(struct tps65912 *tps65912) 168 - { 169 - mfd_remove_devices(tps65912->dev); 170 - tps65912_irq_exit(tps65912); 171 - } 172 - 173 - MODULE_AUTHOR("Margarita Olaya <magi@slimlogic.co.uk>"); 174 - MODULE_DESCRIPTION("TPS65912x chip family multi-function driver"); 175 - MODULE_LICENSE("GPL"); 109 + MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>"); 110 + MODULE_DESCRIPTION("TPS65912x MFD Driver"); 111 + MODULE_LICENSE("GPL v2");
+52 -112
drivers/mfd/tps65912-i2c.c
··· 1 1 /* 2 - * tps65912-i2c.c -- I2C access for TI TPS65912x PMIC 2 + * I2C access driver for TI TPS65912x PMICs 3 3 * 4 - * Copyright 2011 Texas Instruments Inc. 4 + * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/ 5 + * Andrew F. Davis <afd@ti.com> 5 6 * 6 - * Author: Margarita Olaya Cabrera <magi@slimlogic.co.uk> 7 + * This program is free software; you can redistribute it and/or 8 + * modify it under the terms of the GNU General Public License version 2 as 9 + * published by the Free Software Foundation. 7 10 * 8 - * This program is free software; you can redistribute it and/or modify it 9 - * under the terms of the GNU General Public License as published by the 10 - * Free Software Foundation; either version 2 of the License, or (at your 11 - * option) any later version. 11 + * This program is distributed "as is" WITHOUT ANY WARRANTY of any 12 + * kind, whether expressed or implied; without even the implied warranty 13 + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 + * GNU General Public License version 2 for more details. 12 15 * 13 - * This driver is based on wm8350 implementation. 16 + * Based on the TPS65218 driver and the previous TPS65912 driver by 17 + * Margarita Olaya Cabrera <magi@slimlogic.co.uk> 14 18 */ 15 19 16 - #include <linux/module.h> 17 - #include <linux/moduleparam.h> 18 - #include <linux/init.h> 19 - #include <linux/slab.h> 20 - #include <linux/gpio.h> 21 20 #include <linux/i2c.h> 22 - #include <linux/mfd/core.h> 21 + #include <linux/module.h> 22 + #include <linux/regmap.h> 23 + 23 24 #include <linux/mfd/tps65912.h> 24 25 25 - static int tps65912_i2c_read(struct tps65912 *tps65912, u8 reg, 26 - int bytes, void *dest) 26 + static const struct of_device_id tps65912_i2c_of_match_table[] = { 27 + { .compatible = "ti,tps65912", }, 28 + { /* sentinel */ } 29 + }; 30 + 31 + static int tps65912_i2c_probe(struct i2c_client *client, 32 + const struct i2c_device_id *ids) 27 33 { 28 - struct i2c_client *i2c = tps65912->control_data; 29 - struct i2c_msg xfer[2]; 30 - int ret; 34 + struct tps65912 *tps; 31 35 32 - /* Write register */ 33 - xfer[0].addr = i2c->addr; 34 - xfer[0].flags = 0; 35 - xfer[0].len = 1; 36 - xfer[0].buf = &reg; 37 - 38 - /* Read data */ 39 - xfer[1].addr = i2c->addr; 40 - xfer[1].flags = I2C_M_RD; 41 - xfer[1].len = bytes; 42 - xfer[1].buf = dest; 43 - 44 - ret = i2c_transfer(i2c->adapter, xfer, 2); 45 - if (ret == 2) 46 - ret = 0; 47 - else if (ret >= 0) 48 - ret = -EIO; 49 - return ret; 50 - } 51 - 52 - static int tps65912_i2c_write(struct tps65912 *tps65912, u8 reg, 53 - int bytes, void *src) 54 - { 55 - struct i2c_client *i2c = tps65912->control_data; 56 - /* we add 1 byte for device register */ 57 - u8 msg[TPS6591X_MAX_REGISTER + 1]; 58 - int ret; 59 - 60 - if (bytes > TPS6591X_MAX_REGISTER) 61 - return -EINVAL; 62 - 63 - msg[0] = reg; 64 - memcpy(&msg[1], src, bytes); 65 - 66 - ret = i2c_master_send(i2c, msg, bytes + 1); 67 - if (ret < 0) 68 - return ret; 69 - if (ret != bytes + 1) 70 - return -EIO; 71 - 72 - return 0; 73 - } 74 - 75 - static int tps65912_i2c_probe(struct i2c_client *i2c, 76 - const struct i2c_device_id *id) 77 - { 78 - struct tps65912 *tps65912; 79 - 80 - tps65912 = devm_kzalloc(&i2c->dev, 81 - sizeof(struct tps65912), GFP_KERNEL); 82 - if (tps65912 == NULL) 36 + tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL); 37 + if (!tps) 83 38 return -ENOMEM; 84 39 85 - i2c_set_clientdata(i2c, tps65912); 86 - tps65912->dev = &i2c->dev; 87 - tps65912->control_data = i2c; 88 - tps65912->read = tps65912_i2c_read; 89 - tps65912->write = tps65912_i2c_write; 40 + i2c_set_clientdata(client, tps); 41 + tps->dev = &client->dev; 42 + tps->irq = client->irq; 90 43 91 - return tps65912_device_init(tps65912); 44 + tps->regmap = devm_regmap_init_i2c(client, &tps65912_regmap_config); 45 + if (IS_ERR(tps->regmap)) { 46 + dev_err(tps->dev, "Failed to initialize register map\n"); 47 + return PTR_ERR(tps->regmap); 48 + } 49 + 50 + return tps65912_device_init(tps); 92 51 } 93 52 94 - static int tps65912_i2c_remove(struct i2c_client *i2c) 53 + static int tps65912_i2c_remove(struct i2c_client *client) 95 54 { 96 - struct tps65912 *tps65912 = i2c_get_clientdata(i2c); 55 + struct tps65912 *tps = i2c_get_clientdata(client); 97 56 98 - tps65912_device_exit(tps65912); 99 - 100 - return 0; 57 + return tps65912_device_exit(tps); 101 58 } 102 59 103 - static const struct i2c_device_id tps65912_i2c_id[] = { 104 - {"tps65912", 0 }, 105 - { } 60 + static const struct i2c_device_id tps65912_i2c_id_table[] = { 61 + { "tps65912", 0 }, 62 + { /* sentinel */ } 106 63 }; 107 - MODULE_DEVICE_TABLE(i2c, tps65912_i2c_id); 64 + MODULE_DEVICE_TABLE(i2c, tps65912_i2c_id_table); 108 65 109 66 static struct i2c_driver tps65912_i2c_driver = { 110 - .driver = { 111 - .name = "tps65912", 67 + .driver = { 68 + .name = "tps65912", 69 + .of_match_table = tps65912_i2c_of_match_table, 112 70 }, 113 - .probe = tps65912_i2c_probe, 114 - .remove = tps65912_i2c_remove, 115 - .id_table = tps65912_i2c_id, 71 + .probe = tps65912_i2c_probe, 72 + .remove = tps65912_i2c_remove, 73 + .id_table = tps65912_i2c_id_table, 116 74 }; 75 + module_i2c_driver(tps65912_i2c_driver); 117 76 118 - static int __init tps65912_i2c_init(void) 119 - { 120 - int ret; 121 - 122 - ret = i2c_add_driver(&tps65912_i2c_driver); 123 - if (ret != 0) 124 - pr_err("Failed to register TPS65912 I2C driver: %d\n", ret); 125 - 126 - return ret; 127 - } 128 - /* init early so consumer devices can complete system boot */ 129 - subsys_initcall(tps65912_i2c_init); 130 - 131 - static void __exit tps65912_i2c_exit(void) 132 - { 133 - i2c_del_driver(&tps65912_i2c_driver); 134 - } 135 - module_exit(tps65912_i2c_exit); 136 - 137 - MODULE_AUTHOR("Margarita Olaya <magi@slimlogic.co.uk>"); 138 - MODULE_DESCRIPTION("TPS6591x chip family multi-function driver"); 139 - MODULE_LICENSE("GPL"); 77 + MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>"); 78 + MODULE_DESCRIPTION("TPS65912x I2C Interface Driver"); 79 + MODULE_LICENSE("GPL v2");
-217
drivers/mfd/tps65912-irq.c
··· 1 - /* 2 - * tps65912-irq.c -- TI TPS6591x 3 - * 4 - * Copyright 2011 Texas Instruments Inc. 5 - * 6 - * Author: Margarita Olaya <magi@slimlogic.co.uk> 7 - * 8 - * This program is free software; you can redistribute it and/or modify it 9 - * under the terms of the GNU General Public License as published by the 10 - * Free Software Foundation; either version 2 of the License, or (at your 11 - * option) any later version. 12 - * 13 - * This driver is based on wm8350 implementation. 14 - */ 15 - 16 - #include <linux/kernel.h> 17 - #include <linux/module.h> 18 - #include <linux/bug.h> 19 - #include <linux/device.h> 20 - #include <linux/interrupt.h> 21 - #include <linux/irq.h> 22 - #include <linux/gpio.h> 23 - #include <linux/mfd/tps65912.h> 24 - 25 - static inline int irq_to_tps65912_irq(struct tps65912 *tps65912, 26 - int irq) 27 - { 28 - return irq - tps65912->irq_base; 29 - } 30 - 31 - /* 32 - * This is a threaded IRQ handler so can access I2C/SPI. Since the 33 - * IRQ handler explicitly clears the IRQ it handles the IRQ line 34 - * will be reasserted and the physical IRQ will be handled again if 35 - * another interrupt is asserted while we run - in the normal course 36 - * of events this is a rare occurrence so we save I2C/SPI reads. We're 37 - * also assuming that it's rare to get lots of interrupts firing 38 - * simultaneously so try to minimise I/O. 39 - */ 40 - static irqreturn_t tps65912_irq(int irq, void *irq_data) 41 - { 42 - struct tps65912 *tps65912 = irq_data; 43 - u32 irq_sts; 44 - u32 irq_mask; 45 - u8 reg; 46 - int i; 47 - 48 - 49 - tps65912->read(tps65912, TPS65912_INT_STS, 1, &reg); 50 - irq_sts = reg; 51 - tps65912->read(tps65912, TPS65912_INT_STS2, 1, &reg); 52 - irq_sts |= reg << 8; 53 - tps65912->read(tps65912, TPS65912_INT_STS3, 1, &reg); 54 - irq_sts |= reg << 16; 55 - tps65912->read(tps65912, TPS65912_INT_STS4, 1, &reg); 56 - irq_sts |= reg << 24; 57 - 58 - tps65912->read(tps65912, TPS65912_INT_MSK, 1, &reg); 59 - irq_mask = reg; 60 - tps65912->read(tps65912, TPS65912_INT_MSK2, 1, &reg); 61 - irq_mask |= reg << 8; 62 - tps65912->read(tps65912, TPS65912_INT_MSK3, 1, &reg); 63 - irq_mask |= reg << 16; 64 - tps65912->read(tps65912, TPS65912_INT_MSK4, 1, &reg); 65 - irq_mask |= reg << 24; 66 - 67 - irq_sts &= ~irq_mask; 68 - if (!irq_sts) 69 - return IRQ_NONE; 70 - 71 - for (i = 0; i < tps65912->irq_num; i++) { 72 - if (!(irq_sts & (1 << i))) 73 - continue; 74 - 75 - handle_nested_irq(tps65912->irq_base + i); 76 - } 77 - 78 - /* Write the STS register back to clear IRQs we handled */ 79 - reg = irq_sts & 0xFF; 80 - irq_sts >>= 8; 81 - if (reg) 82 - tps65912->write(tps65912, TPS65912_INT_STS, 1, &reg); 83 - reg = irq_sts & 0xFF; 84 - irq_sts >>= 8; 85 - if (reg) 86 - tps65912->write(tps65912, TPS65912_INT_STS2, 1, &reg); 87 - reg = irq_sts & 0xFF; 88 - irq_sts >>= 8; 89 - if (reg) 90 - tps65912->write(tps65912, TPS65912_INT_STS3, 1, &reg); 91 - reg = irq_sts & 0xFF; 92 - if (reg) 93 - tps65912->write(tps65912, TPS65912_INT_STS4, 1, &reg); 94 - 95 - return IRQ_HANDLED; 96 - } 97 - 98 - static void tps65912_irq_lock(struct irq_data *data) 99 - { 100 - struct tps65912 *tps65912 = irq_data_get_irq_chip_data(data); 101 - 102 - mutex_lock(&tps65912->irq_lock); 103 - } 104 - 105 - static void tps65912_irq_sync_unlock(struct irq_data *data) 106 - { 107 - struct tps65912 *tps65912 = irq_data_get_irq_chip_data(data); 108 - u32 reg_mask; 109 - u8 reg; 110 - 111 - tps65912->read(tps65912, TPS65912_INT_MSK, 1, &reg); 112 - reg_mask = reg; 113 - tps65912->read(tps65912, TPS65912_INT_MSK2, 1, &reg); 114 - reg_mask |= reg << 8; 115 - tps65912->read(tps65912, TPS65912_INT_MSK3, 1, &reg); 116 - reg_mask |= reg << 16; 117 - tps65912->read(tps65912, TPS65912_INT_MSK4, 1, &reg); 118 - reg_mask |= reg << 24; 119 - 120 - if (tps65912->irq_mask != reg_mask) { 121 - reg = tps65912->irq_mask & 0xFF; 122 - tps65912->write(tps65912, TPS65912_INT_MSK, 1, &reg); 123 - reg = tps65912->irq_mask >> 8 & 0xFF; 124 - tps65912->write(tps65912, TPS65912_INT_MSK2, 1, &reg); 125 - reg = tps65912->irq_mask >> 16 & 0xFF; 126 - tps65912->write(tps65912, TPS65912_INT_MSK3, 1, &reg); 127 - reg = tps65912->irq_mask >> 24 & 0xFF; 128 - tps65912->write(tps65912, TPS65912_INT_MSK4, 1, &reg); 129 - } 130 - 131 - mutex_unlock(&tps65912->irq_lock); 132 - } 133 - 134 - static void tps65912_irq_enable(struct irq_data *data) 135 - { 136 - struct tps65912 *tps65912 = irq_data_get_irq_chip_data(data); 137 - 138 - tps65912->irq_mask &= ~(1 << irq_to_tps65912_irq(tps65912, data->irq)); 139 - } 140 - 141 - static void tps65912_irq_disable(struct irq_data *data) 142 - { 143 - struct tps65912 *tps65912 = irq_data_get_irq_chip_data(data); 144 - 145 - tps65912->irq_mask |= (1 << irq_to_tps65912_irq(tps65912, data->irq)); 146 - } 147 - 148 - static struct irq_chip tps65912_irq_chip = { 149 - .name = "tps65912", 150 - .irq_bus_lock = tps65912_irq_lock, 151 - .irq_bus_sync_unlock = tps65912_irq_sync_unlock, 152 - .irq_disable = tps65912_irq_disable, 153 - .irq_enable = tps65912_irq_enable, 154 - }; 155 - 156 - int tps65912_irq_init(struct tps65912 *tps65912, int irq, 157 - struct tps65912_platform_data *pdata) 158 - { 159 - int ret, cur_irq; 160 - int flags = IRQF_ONESHOT; 161 - u8 reg; 162 - 163 - if (!irq) { 164 - dev_warn(tps65912->dev, "No interrupt support, no core IRQ\n"); 165 - return 0; 166 - } 167 - 168 - if (!pdata || !pdata->irq_base) { 169 - dev_warn(tps65912->dev, "No interrupt support, no IRQ base\n"); 170 - return 0; 171 - } 172 - 173 - /* Clear unattended interrupts */ 174 - tps65912->read(tps65912, TPS65912_INT_STS, 1, &reg); 175 - tps65912->write(tps65912, TPS65912_INT_STS, 1, &reg); 176 - tps65912->read(tps65912, TPS65912_INT_STS2, 1, &reg); 177 - tps65912->write(tps65912, TPS65912_INT_STS2, 1, &reg); 178 - tps65912->read(tps65912, TPS65912_INT_STS3, 1, &reg); 179 - tps65912->write(tps65912, TPS65912_INT_STS3, 1, &reg); 180 - tps65912->read(tps65912, TPS65912_INT_STS4, 1, &reg); 181 - tps65912->write(tps65912, TPS65912_INT_STS4, 1, &reg); 182 - 183 - /* Mask top level interrupts */ 184 - tps65912->irq_mask = 0xFFFFFFFF; 185 - 186 - mutex_init(&tps65912->irq_lock); 187 - tps65912->chip_irq = irq; 188 - tps65912->irq_base = pdata->irq_base; 189 - 190 - tps65912->irq_num = TPS65912_NUM_IRQ; 191 - 192 - /* Register with genirq */ 193 - for (cur_irq = tps65912->irq_base; 194 - cur_irq < tps65912->irq_num + tps65912->irq_base; 195 - cur_irq++) { 196 - irq_set_chip_data(cur_irq, tps65912); 197 - irq_set_chip_and_handler(cur_irq, &tps65912_irq_chip, 198 - handle_edge_irq); 199 - irq_set_nested_thread(cur_irq, 1); 200 - irq_clear_status_flags(cur_irq, IRQ_NOREQUEST | IRQ_NOPROBE); 201 - } 202 - 203 - ret = request_threaded_irq(irq, NULL, tps65912_irq, flags, 204 - "tps65912", tps65912); 205 - 206 - irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW); 207 - if (ret != 0) 208 - dev_err(tps65912->dev, "Failed to request IRQ: %d\n", ret); 209 - 210 - return ret; 211 - } 212 - 213 - int tps65912_irq_exit(struct tps65912 *tps65912) 214 - { 215 - free_irq(tps65912->chip_irq, tps65912); 216 - return 0; 217 - }
+49 -111
drivers/mfd/tps65912-spi.c
··· 1 1 /* 2 - * tps65912-spi.c -- SPI access for TI TPS65912x PMIC 2 + * SPI access driver for TI TPS65912x PMICs 3 3 * 4 - * Copyright 2011 Texas Instruments Inc. 4 + * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/ 5 + * Andrew F. Davis <afd@ti.com> 5 6 * 6 - * Author: Margarita Olaya Cabrera <magi@slimlogic.co.uk> 7 + * This program is free software; you can redistribute it and/or 8 + * modify it under the terms of the GNU General Public License version 2 as 9 + * published by the Free Software Foundation. 7 10 * 8 - * This program is free software; you can redistribute it and/or modify it 9 - * under the terms of the GNU General Public License as published by the 10 - * Free Software Foundation; either version 2 of the License, or (at your 11 - * option) any later version. 11 + * This program is distributed "as is" WITHOUT ANY WARRANTY of any 12 + * kind, whether expressed or implied; without even the implied warranty 13 + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 + * GNU General Public License version 2 for more details. 12 15 * 13 - * This driver is based on wm8350 implementation. 16 + * Based on the TPS65218 driver and the previous TPS65912 driver by 17 + * Margarita Olaya Cabrera <magi@slimlogic.co.uk> 14 18 */ 15 19 16 20 #include <linux/module.h> 17 - #include <linux/moduleparam.h> 18 - #include <linux/init.h> 19 - #include <linux/slab.h> 20 - #include <linux/gpio.h> 21 + #include <linux/regmap.h> 21 22 #include <linux/spi/spi.h> 22 - #include <linux/mfd/core.h> 23 + 23 24 #include <linux/mfd/tps65912.h> 24 25 25 - static int tps65912_spi_write(struct tps65912 *tps65912, u8 addr, 26 - int bytes, void *src) 27 - { 28 - struct spi_device *spi = tps65912->control_data; 29 - u8 *data = (u8 *) src; 30 - int ret; 31 - /* bit 23 is the read/write bit */ 32 - unsigned long spi_data = 1 << 23 | addr << 15 | *data; 33 - struct spi_transfer xfer; 34 - struct spi_message msg; 35 - u32 tx_buf; 36 - 37 - tx_buf = spi_data; 38 - 39 - xfer.tx_buf = &tx_buf; 40 - xfer.rx_buf = NULL; 41 - xfer.len = sizeof(unsigned long); 42 - xfer.bits_per_word = 24; 43 - 44 - spi_message_init(&msg); 45 - spi_message_add_tail(&xfer, &msg); 46 - 47 - ret = spi_sync(spi, &msg); 48 - return ret; 49 - } 50 - 51 - static int tps65912_spi_read(struct tps65912 *tps65912, u8 addr, 52 - int bytes, void *dest) 53 - { 54 - struct spi_device *spi = tps65912->control_data; 55 - /* bit 23 is the read/write bit */ 56 - unsigned long spi_data = 0 << 23 | addr << 15; 57 - struct spi_transfer xfer; 58 - struct spi_message msg; 59 - int ret; 60 - u8 *data = (u8 *) dest; 61 - u32 tx_buf, rx_buf; 62 - 63 - tx_buf = spi_data; 64 - rx_buf = 0; 65 - 66 - xfer.tx_buf = &tx_buf; 67 - xfer.rx_buf = &rx_buf; 68 - xfer.len = sizeof(unsigned long); 69 - xfer.bits_per_word = 24; 70 - 71 - spi_message_init(&msg); 72 - spi_message_add_tail(&xfer, &msg); 73 - 74 - if (spi == NULL) 75 - return 0; 76 - 77 - ret = spi_sync(spi, &msg); 78 - if (ret == 0) 79 - *data = (u8) (rx_buf & 0xFF); 80 - return ret; 81 - } 26 + static const struct of_device_id tps65912_spi_of_match_table[] = { 27 + { .compatible = "ti,tps65912", }, 28 + { /* sentinel */ } 29 + }; 82 30 83 31 static int tps65912_spi_probe(struct spi_device *spi) 84 32 { 85 - struct tps65912 *tps65912; 33 + struct tps65912 *tps; 86 34 87 - tps65912 = devm_kzalloc(&spi->dev, 88 - sizeof(struct tps65912), GFP_KERNEL); 89 - if (tps65912 == NULL) 35 + tps = devm_kzalloc(&spi->dev, sizeof(*tps), GFP_KERNEL); 36 + if (!tps) 90 37 return -ENOMEM; 91 38 92 - tps65912->dev = &spi->dev; 93 - tps65912->control_data = spi; 94 - tps65912->read = tps65912_spi_read; 95 - tps65912->write = tps65912_spi_write; 39 + spi_set_drvdata(spi, tps); 40 + tps->dev = &spi->dev; 41 + tps->irq = spi->irq; 96 42 97 - spi_set_drvdata(spi, tps65912); 43 + tps->regmap = devm_regmap_init_spi(spi, &tps65912_regmap_config); 44 + if (IS_ERR(tps->regmap)) { 45 + dev_err(tps->dev, "Failed to initialize register map\n"); 46 + return PTR_ERR(tps->regmap); 47 + } 98 48 99 - return tps65912_device_init(tps65912); 49 + return tps65912_device_init(tps); 100 50 } 101 51 102 - static int tps65912_spi_remove(struct spi_device *spi) 52 + static int tps65912_spi_remove(struct spi_device *client) 103 53 { 104 - struct tps65912 *tps65912 = spi_get_drvdata(spi); 54 + struct tps65912 *tps = spi_get_drvdata(client); 105 55 106 - tps65912_device_exit(tps65912); 107 - 108 - return 0; 56 + return tps65912_device_exit(tps); 109 57 } 58 + 59 + static const struct spi_device_id tps65912_spi_id_table[] = { 60 + { "tps65912", 0 }, 61 + { /* sentinel */ } 62 + }; 63 + MODULE_DEVICE_TABLE(spi, tps65912_spi_id_table); 110 64 111 65 static struct spi_driver tps65912_spi_driver = { 112 - .driver = { 113 - .name = "tps65912", 66 + .driver = { 67 + .name = "tps65912", 68 + .of_match_table = tps65912_spi_of_match_table, 114 69 }, 115 - .probe = tps65912_spi_probe, 116 - .remove = tps65912_spi_remove, 70 + .probe = tps65912_spi_probe, 71 + .remove = tps65912_spi_remove, 72 + .id_table = tps65912_spi_id_table, 117 73 }; 74 + module_spi_driver(tps65912_spi_driver); 118 75 119 - static int __init tps65912_spi_init(void) 120 - { 121 - int ret; 122 - 123 - ret = spi_register_driver(&tps65912_spi_driver); 124 - if (ret != 0) 125 - pr_err("Failed to register TPS65912 SPI driver: %d\n", ret); 126 - 127 - return 0; 128 - } 129 - /* init early so consumer devices can complete system boot */ 130 - subsys_initcall(tps65912_spi_init); 131 - 132 - static void __exit tps65912_spi_exit(void) 133 - { 134 - spi_unregister_driver(&tps65912_spi_driver); 135 - } 136 - module_exit(tps65912_spi_exit); 137 - 138 - MODULE_AUTHOR("Margarita Olaya <magi@slimlogic.co.uk>"); 139 - MODULE_DESCRIPTION("SPI support for TPS65912 chip family mfd"); 140 - MODULE_LICENSE("GPL"); 76 + MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>"); 77 + MODULE_DESCRIPTION("TPS65912x SPI Interface Driver"); 78 + MODULE_LICENSE("GPL v2");
+1 -1
drivers/regulator/Kconfig
··· 762 762 763 763 config REGULATOR_TPS65912 764 764 tristate "TI TPS65912 Power regulator" 765 - depends on (MFD_TPS65912_I2C || MFD_TPS65912_SPI) 765 + depends on MFD_TPS65912 766 766 help 767 767 This driver supports TPS65912 voltage regulator chip. 768 768
+3
drivers/regulator/axp20x-regulator.c
··· 244 244 step = 75; 245 245 break; 246 246 case AXP221_ID: 247 + case AXP223_ID: 247 248 min = 1800; 248 249 max = 4050; 249 250 def = 3000; ··· 323 322 break; 324 323 325 324 case AXP221_ID: 325 + case AXP223_ID: 326 326 if (id < AXP22X_DCDC1 || id > AXP22X_DCDC5) 327 327 return -EINVAL; 328 328 ··· 362 360 nregulators = AXP20X_REG_ID_MAX; 363 361 break; 364 362 case AXP221_ID: 363 + case AXP223_ID: 365 364 regulators = axp22x_regulators; 366 365 nregulators = AXP22X_REG_ID_MAX; 367 366 break;
+120 -493
drivers/regulator/tps65912-regulator.c
··· 1 1 /* 2 - * tps65912.c -- TI tps65912 2 + * Regulator driver for TI TPS65912x PMICs 3 3 * 4 - * Copyright 2011 Texas Instruments Inc. 4 + * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/ 5 + * Andrew F. Davis <afd@ti.com> 5 6 * 6 - * Author: Margarita Olaya Cabrera <magi@slimlogic.co.uk> 7 + * This program is free software; you can redistribute it and/or 8 + * modify it under the terms of the GNU General Public License version 2 as 9 + * published by the Free Software Foundation. 7 10 * 8 - * This program is free software; you can redistribute it and/or modify it 9 - * under the terms of the GNU General Public License as published by the 10 - * Free Software Foundation; either version 2 of the License, or (at your 11 - * option) any later version. 11 + * This program is distributed "as is" WITHOUT ANY WARRANTY of any 12 + * kind, whether expressed or implied; without even the implied warranty 13 + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 + * GNU General Public License version 2 for more details. 12 15 * 13 - * This driver is based on wm8350 implementation. 16 + * Based on the TPS65218 driver and the previous TPS65912 driver by 17 + * Margarita Olaya Cabrera <magi@slimlogic.co.uk> 14 18 */ 15 19 16 - #include <linux/kernel.h> 17 20 #include <linux/module.h> 18 - #include <linux/init.h> 19 - #include <linux/err.h> 20 21 #include <linux/platform_device.h> 21 22 #include <linux/regulator/driver.h> 22 - #include <linux/regulator/machine.h> 23 - #include <linux/slab.h> 24 - #include <linux/gpio.h> 23 + 25 24 #include <linux/mfd/tps65912.h> 26 25 27 - /* DCDC's */ 28 - #define TPS65912_REG_DCDC1 0 29 - #define TPS65912_REG_DCDC2 1 30 - #define TPS65912_REG_DCDC3 2 31 - #define TPS65912_REG_DCDC4 3 26 + enum tps65912_regulators { DCDC1, DCDC2, DCDC3, DCDC4, LDO1, LDO2, LDO3, 27 + LDO4, LDO5, LDO6, LDO7, LDO8, LDO9, LDO10 }; 32 28 33 - /* LDOs */ 34 - #define TPS65912_REG_LDO1 4 35 - #define TPS65912_REG_LDO2 5 36 - #define TPS65912_REG_LDO3 6 37 - #define TPS65912_REG_LDO4 7 38 - #define TPS65912_REG_LDO5 8 39 - #define TPS65912_REG_LDO6 9 40 - #define TPS65912_REG_LDO7 10 41 - #define TPS65912_REG_LDO8 11 42 - #define TPS65912_REG_LDO9 12 43 - #define TPS65912_REG_LDO10 13 29 + #define TPS65912_REGULATOR(_name, _id, _of_match, _ops, _vr, _er, _lr) \ 30 + [_id] = { \ 31 + .name = _name, \ 32 + .of_match = _of_match, \ 33 + .regulators_node = "regulators", \ 34 + .id = _id, \ 35 + .ops = &_ops, \ 36 + .n_voltages = 64, \ 37 + .type = REGULATOR_VOLTAGE, \ 38 + .owner = THIS_MODULE, \ 39 + .vsel_reg = _vr, \ 40 + .vsel_mask = 0x3f, \ 41 + .enable_reg = _er, \ 42 + .enable_mask = BIT(7), \ 43 + .volt_table = NULL, \ 44 + .linear_ranges = _lr, \ 45 + .n_linear_ranges = ARRAY_SIZE(_lr), \ 46 + } 44 47 45 - /* Number of step-down converters available */ 46 - #define TPS65912_NUM_DCDC 4 47 - 48 - /* Number of LDO voltage regulators available */ 49 - #define TPS65912_NUM_LDO 10 50 - 51 - /* Number of total regulators available */ 52 - #define TPS65912_NUM_REGULATOR (TPS65912_NUM_DCDC + TPS65912_NUM_LDO) 53 - 54 - #define TPS65912_REG_ENABLED 0x80 55 - #define OP_SELREG_MASK 0x40 56 - #define OP_SELREG_SHIFT 6 57 - 58 - struct tps_info { 59 - const char *name; 60 - }; 61 - 62 - static struct tps_info tps65912_regs[] = { 63 - { 64 - .name = "DCDC1", 65 - }, 66 - { 67 - .name = "DCDC2", 68 - }, 69 - { 70 - .name = "DCDC3", 71 - }, 72 - { 73 - .name = "DCDC4", 74 - }, 75 - { 76 - .name = "LDO1", 77 - }, 78 - { 79 - .name = "LDO2", 80 - }, 81 - { 82 - .name = "LDO3", 83 - }, 84 - { 85 - .name = "LDO4", 86 - }, 87 - { 88 - .name = "LDO5", 89 - }, 90 - { 91 - .name = "LDO6", 92 - }, 93 - { 94 - .name = "LDO7", 95 - }, 96 - { 97 - .name = "LDO8", 98 - }, 99 - { 100 - .name = "LDO9", 101 - }, 102 - { 103 - .name = "LDO10", 104 - }, 105 - }; 106 - 107 - struct tps65912_reg { 108 - struct regulator_desc desc[TPS65912_NUM_REGULATOR]; 109 - struct tps65912 *mfd; 110 - struct regulator_dev *rdev[TPS65912_NUM_REGULATOR]; 111 - struct tps_info *info[TPS65912_NUM_REGULATOR]; 112 - /* for read/write access */ 113 - struct mutex io_lock; 114 - int mode; 115 - int (*get_ctrl_reg)(int); 116 - int dcdc_range[TPS65912_NUM_DCDC]; 117 - int pwm_mode_reg; 118 - int eco_reg; 48 + static const struct regulator_linear_range tps65912_dcdc_ranges[] = { 49 + REGULATOR_LINEAR_RANGE(500000, 0x0, 0x3f, 50000), 119 50 }; 120 51 121 52 static const struct regulator_linear_range tps65912_ldo_ranges[] = { 122 - REGULATOR_LINEAR_RANGE(800000, 0, 32, 25000), 123 - REGULATOR_LINEAR_RANGE(1650000, 33, 60, 50000), 124 - REGULATOR_LINEAR_RANGE(3100000, 61, 63, 100000), 53 + REGULATOR_LINEAR_RANGE(800000, 0x0, 0x20, 25000), 54 + REGULATOR_LINEAR_RANGE(1650000, 0x21, 0x3c, 50000), 55 + REGULATOR_LINEAR_RANGE(3100000, 0x3d, 0x3f, 100000), 125 56 }; 126 - 127 - static int tps65912_get_range(struct tps65912_reg *pmic, int id) 128 - { 129 - struct tps65912 *mfd = pmic->mfd; 130 - int range; 131 - 132 - switch (id) { 133 - case TPS65912_REG_DCDC1: 134 - range = tps65912_reg_read(mfd, TPS65912_DCDC1_LIMIT); 135 - break; 136 - case TPS65912_REG_DCDC2: 137 - range = tps65912_reg_read(mfd, TPS65912_DCDC2_LIMIT); 138 - break; 139 - case TPS65912_REG_DCDC3: 140 - range = tps65912_reg_read(mfd, TPS65912_DCDC3_LIMIT); 141 - break; 142 - case TPS65912_REG_DCDC4: 143 - range = tps65912_reg_read(mfd, TPS65912_DCDC4_LIMIT); 144 - break; 145 - default: 146 - return 0; 147 - } 148 - 149 - if (range >= 0) 150 - range = (range & DCDC_LIMIT_RANGE_MASK) 151 - >> DCDC_LIMIT_RANGE_SHIFT; 152 - 153 - pmic->dcdc_range[id] = range; 154 - return range; 155 - } 156 - 157 - static unsigned long tps65912_vsel_to_uv_range0(u8 vsel) 158 - { 159 - unsigned long uv; 160 - 161 - uv = ((vsel * 12500) + 500000); 162 - return uv; 163 - } 164 - 165 - static unsigned long tps65912_vsel_to_uv_range1(u8 vsel) 166 - { 167 - unsigned long uv; 168 - 169 - uv = ((vsel * 12500) + 700000); 170 - return uv; 171 - } 172 - 173 - static unsigned long tps65912_vsel_to_uv_range2(u8 vsel) 174 - { 175 - unsigned long uv; 176 - 177 - uv = ((vsel * 25000) + 500000); 178 - return uv; 179 - } 180 - 181 - static unsigned long tps65912_vsel_to_uv_range3(u8 vsel) 182 - { 183 - unsigned long uv; 184 - 185 - if (vsel == 0x3f) 186 - uv = 3800000; 187 - else 188 - uv = ((vsel * 50000) + 500000); 189 - 190 - return uv; 191 - } 192 - 193 - static int tps65912_get_ctrl_register(int id) 194 - { 195 - if (id >= TPS65912_REG_DCDC1 && id <= TPS65912_REG_LDO4) 196 - return id * 3 + TPS65912_DCDC1_AVS; 197 - else if (id >= TPS65912_REG_LDO5 && id <= TPS65912_REG_LDO10) 198 - return id - TPS65912_REG_LDO5 + TPS65912_LDO5; 199 - else 200 - return -EINVAL; 201 - } 202 - 203 - static int tps65912_get_sel_register(struct tps65912_reg *pmic, int id) 204 - { 205 - struct tps65912 *mfd = pmic->mfd; 206 - int opvsel; 207 - u8 reg = 0; 208 - 209 - if (id >= TPS65912_REG_DCDC1 && id <= TPS65912_REG_LDO4) { 210 - opvsel = tps65912_reg_read(mfd, id * 3 + TPS65912_DCDC1_OP); 211 - if (opvsel & OP_SELREG_MASK) 212 - reg = id * 3 + TPS65912_DCDC1_AVS; 213 - else 214 - reg = id * 3 + TPS65912_DCDC1_OP; 215 - } else if (id >= TPS65912_REG_LDO5 && id <= TPS65912_REG_LDO10) { 216 - reg = id - TPS65912_REG_LDO5 + TPS65912_LDO5; 217 - } else { 218 - return -EINVAL; 219 - } 220 - 221 - return reg; 222 - } 223 - 224 - static int tps65912_get_mode_regiters(struct tps65912_reg *pmic, int id) 225 - { 226 - switch (id) { 227 - case TPS65912_REG_DCDC1: 228 - pmic->pwm_mode_reg = TPS65912_DCDC1_CTRL; 229 - pmic->eco_reg = TPS65912_DCDC1_AVS; 230 - break; 231 - case TPS65912_REG_DCDC2: 232 - pmic->pwm_mode_reg = TPS65912_DCDC2_CTRL; 233 - pmic->eco_reg = TPS65912_DCDC2_AVS; 234 - break; 235 - case TPS65912_REG_DCDC3: 236 - pmic->pwm_mode_reg = TPS65912_DCDC3_CTRL; 237 - pmic->eco_reg = TPS65912_DCDC3_AVS; 238 - break; 239 - case TPS65912_REG_DCDC4: 240 - pmic->pwm_mode_reg = TPS65912_DCDC4_CTRL; 241 - pmic->eco_reg = TPS65912_DCDC4_AVS; 242 - break; 243 - default: 244 - return -EINVAL; 245 - } 246 - 247 - return 0; 248 - } 249 - 250 - static int tps65912_reg_is_enabled(struct regulator_dev *dev) 251 - { 252 - struct tps65912_reg *pmic = rdev_get_drvdata(dev); 253 - struct tps65912 *mfd = pmic->mfd; 254 - int reg, value, id = rdev_get_id(dev); 255 - 256 - if (id < TPS65912_REG_DCDC1 || id > TPS65912_REG_LDO10) 257 - return -EINVAL; 258 - 259 - reg = pmic->get_ctrl_reg(id); 260 - if (reg < 0) 261 - return reg; 262 - 263 - value = tps65912_reg_read(mfd, reg); 264 - if (value < 0) 265 - return value; 266 - 267 - return value & TPS65912_REG_ENABLED; 268 - } 269 - 270 - static int tps65912_reg_enable(struct regulator_dev *dev) 271 - { 272 - struct tps65912_reg *pmic = rdev_get_drvdata(dev); 273 - struct tps65912 *mfd = pmic->mfd; 274 - int id = rdev_get_id(dev); 275 - int reg; 276 - 277 - if (id < TPS65912_REG_DCDC1 || id > TPS65912_REG_LDO10) 278 - return -EINVAL; 279 - 280 - reg = pmic->get_ctrl_reg(id); 281 - if (reg < 0) 282 - return reg; 283 - 284 - return tps65912_set_bits(mfd, reg, TPS65912_REG_ENABLED); 285 - } 286 - 287 - static int tps65912_reg_disable(struct regulator_dev *dev) 288 - { 289 - struct tps65912_reg *pmic = rdev_get_drvdata(dev); 290 - struct tps65912 *mfd = pmic->mfd; 291 - int id = rdev_get_id(dev), reg; 292 - 293 - reg = pmic->get_ctrl_reg(id); 294 - if (reg < 0) 295 - return reg; 296 - 297 - return tps65912_clear_bits(mfd, reg, TPS65912_REG_ENABLED); 298 - } 299 - 300 - static int tps65912_set_mode(struct regulator_dev *dev, unsigned int mode) 301 - { 302 - struct tps65912_reg *pmic = rdev_get_drvdata(dev); 303 - struct tps65912 *mfd = pmic->mfd; 304 - int pwm_mode, eco, id = rdev_get_id(dev); 305 - 306 - tps65912_get_mode_regiters(pmic, id); 307 - 308 - pwm_mode = tps65912_reg_read(mfd, pmic->pwm_mode_reg); 309 - eco = tps65912_reg_read(mfd, pmic->eco_reg); 310 - 311 - pwm_mode &= DCDCCTRL_DCDC_MODE_MASK; 312 - eco &= DCDC_AVS_ECO_MASK; 313 - 314 - switch (mode) { 315 - case REGULATOR_MODE_FAST: 316 - /* Verify if mode alredy set */ 317 - if (pwm_mode && !eco) 318 - break; 319 - tps65912_set_bits(mfd, pmic->pwm_mode_reg, DCDCCTRL_DCDC_MODE_MASK); 320 - tps65912_clear_bits(mfd, pmic->eco_reg, DCDC_AVS_ECO_MASK); 321 - break; 322 - case REGULATOR_MODE_NORMAL: 323 - case REGULATOR_MODE_IDLE: 324 - if (!pwm_mode && !eco) 325 - break; 326 - tps65912_clear_bits(mfd, pmic->pwm_mode_reg, DCDCCTRL_DCDC_MODE_MASK); 327 - tps65912_clear_bits(mfd, pmic->eco_reg, DCDC_AVS_ECO_MASK); 328 - break; 329 - case REGULATOR_MODE_STANDBY: 330 - if (!pwm_mode && eco) 331 - break; 332 - tps65912_clear_bits(mfd, pmic->pwm_mode_reg, DCDCCTRL_DCDC_MODE_MASK); 333 - tps65912_set_bits(mfd, pmic->eco_reg, DCDC_AVS_ECO_MASK); 334 - break; 335 - default: 336 - return -EINVAL; 337 - } 338 - 339 - return 0; 340 - } 341 - 342 - static unsigned int tps65912_get_mode(struct regulator_dev *dev) 343 - { 344 - struct tps65912_reg *pmic = rdev_get_drvdata(dev); 345 - struct tps65912 *mfd = pmic->mfd; 346 - int pwm_mode, eco, mode = 0, id = rdev_get_id(dev); 347 - 348 - tps65912_get_mode_regiters(pmic, id); 349 - 350 - pwm_mode = tps65912_reg_read(mfd, pmic->pwm_mode_reg); 351 - eco = tps65912_reg_read(mfd, pmic->eco_reg); 352 - 353 - pwm_mode &= DCDCCTRL_DCDC_MODE_MASK; 354 - eco &= DCDC_AVS_ECO_MASK; 355 - 356 - if (pwm_mode && !eco) 357 - mode = REGULATOR_MODE_FAST; 358 - else if (!pwm_mode && !eco) 359 - mode = REGULATOR_MODE_NORMAL; 360 - else if (!pwm_mode && eco) 361 - mode = REGULATOR_MODE_STANDBY; 362 - 363 - return mode; 364 - } 365 - 366 - static int tps65912_list_voltage(struct regulator_dev *dev, unsigned selector) 367 - { 368 - struct tps65912_reg *pmic = rdev_get_drvdata(dev); 369 - int range, voltage = 0, id = rdev_get_id(dev); 370 - 371 - if (id > TPS65912_REG_DCDC4) 372 - return -EINVAL; 373 - 374 - range = pmic->dcdc_range[id]; 375 - 376 - switch (range) { 377 - case 0: 378 - /* 0.5 - 1.2875V in 12.5mV steps */ 379 - voltage = tps65912_vsel_to_uv_range0(selector); 380 - break; 381 - case 1: 382 - /* 0.7 - 1.4875V in 12.5mV steps */ 383 - voltage = tps65912_vsel_to_uv_range1(selector); 384 - break; 385 - case 2: 386 - /* 0.5 - 2.075V in 25mV steps */ 387 - voltage = tps65912_vsel_to_uv_range2(selector); 388 - break; 389 - case 3: 390 - /* 0.5 - 3.8V in 50mV steps */ 391 - voltage = tps65912_vsel_to_uv_range3(selector); 392 - break; 393 - } 394 - return voltage; 395 - } 396 - 397 - static int tps65912_get_voltage_sel(struct regulator_dev *dev) 398 - { 399 - struct tps65912_reg *pmic = rdev_get_drvdata(dev); 400 - struct tps65912 *mfd = pmic->mfd; 401 - int id = rdev_get_id(dev); 402 - int reg, vsel; 403 - 404 - reg = tps65912_get_sel_register(pmic, id); 405 - if (reg < 0) 406 - return reg; 407 - 408 - vsel = tps65912_reg_read(mfd, reg); 409 - vsel &= 0x3F; 410 - 411 - return vsel; 412 - } 413 - 414 - static int tps65912_set_voltage_sel(struct regulator_dev *dev, 415 - unsigned selector) 416 - { 417 - struct tps65912_reg *pmic = rdev_get_drvdata(dev); 418 - struct tps65912 *mfd = pmic->mfd; 419 - int id = rdev_get_id(dev); 420 - int value; 421 - u8 reg; 422 - 423 - reg = tps65912_get_sel_register(pmic, id); 424 - value = tps65912_reg_read(mfd, reg); 425 - value &= 0xC0; 426 - return tps65912_reg_write(mfd, reg, selector | value); 427 - } 428 57 429 58 /* Operations permitted on DCDCx */ 430 59 static struct regulator_ops tps65912_ops_dcdc = { 431 - .is_enabled = tps65912_reg_is_enabled, 432 - .enable = tps65912_reg_enable, 433 - .disable = tps65912_reg_disable, 434 - .set_mode = tps65912_set_mode, 435 - .get_mode = tps65912_get_mode, 436 - .get_voltage_sel = tps65912_get_voltage_sel, 437 - .set_voltage_sel = tps65912_set_voltage_sel, 438 - .list_voltage = tps65912_list_voltage, 60 + .is_enabled = regulator_is_enabled_regmap, 61 + .enable = regulator_enable_regmap, 62 + .disable = regulator_disable_regmap, 63 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 64 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 65 + .list_voltage = regulator_list_voltage_linear_range, 439 66 }; 440 67 441 68 /* Operations permitted on LDOx */ 442 69 static struct regulator_ops tps65912_ops_ldo = { 443 - .is_enabled = tps65912_reg_is_enabled, 444 - .enable = tps65912_reg_enable, 445 - .disable = tps65912_reg_disable, 446 - .get_voltage_sel = tps65912_get_voltage_sel, 447 - .set_voltage_sel = tps65912_set_voltage_sel, 448 - .list_voltage = regulator_list_voltage_linear_range, 449 - .map_voltage = regulator_map_voltage_linear_range, 70 + .is_enabled = regulator_is_enabled_regmap, 71 + .enable = regulator_enable_regmap, 72 + .disable = regulator_disable_regmap, 73 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 74 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 75 + .list_voltage = regulator_list_voltage_linear_range, 76 + .map_voltage = regulator_map_voltage_linear_range, 450 77 }; 451 78 452 - static int tps65912_probe(struct platform_device *pdev) 79 + static const struct regulator_desc regulators[] = { 80 + TPS65912_REGULATOR("DCDC1", DCDC1, "dcdc1", tps65912_ops_dcdc, 81 + TPS65912_DCDC1_OP, TPS65912_DCDC1_CTRL, 82 + tps65912_dcdc_ranges), 83 + TPS65912_REGULATOR("DCDC2", DCDC2, "dcdc2", tps65912_ops_dcdc, 84 + TPS65912_DCDC2_OP, TPS65912_DCDC2_CTRL, 85 + tps65912_dcdc_ranges), 86 + TPS65912_REGULATOR("DCDC3", DCDC3, "dcdc3", tps65912_ops_dcdc, 87 + TPS65912_DCDC3_OP, TPS65912_DCDC3_CTRL, 88 + tps65912_dcdc_ranges), 89 + TPS65912_REGULATOR("DCDC4", DCDC4, "dcdc4", tps65912_ops_dcdc, 90 + TPS65912_DCDC4_OP, TPS65912_DCDC4_CTRL, 91 + tps65912_dcdc_ranges), 92 + TPS65912_REGULATOR("LDO1", LDO1, "ldo1", tps65912_ops_ldo, 93 + TPS65912_LDO1_OP, TPS65912_LDO1_AVS, 94 + tps65912_ldo_ranges), 95 + TPS65912_REGULATOR("LDO2", LDO2, "ldo2", tps65912_ops_ldo, 96 + TPS65912_LDO2_OP, TPS65912_LDO2_AVS, 97 + tps65912_ldo_ranges), 98 + TPS65912_REGULATOR("LDO3", LDO3, "ldo3", tps65912_ops_ldo, 99 + TPS65912_LDO3_OP, TPS65912_LDO3_AVS, 100 + tps65912_ldo_ranges), 101 + TPS65912_REGULATOR("LDO4", LDO4, "ldo4", tps65912_ops_ldo, 102 + TPS65912_LDO4_OP, TPS65912_LDO4_AVS, 103 + tps65912_ldo_ranges), 104 + TPS65912_REGULATOR("LDO5", LDO5, "ldo5", tps65912_ops_ldo, 105 + TPS65912_LDO5, TPS65912_LDO5, 106 + tps65912_ldo_ranges), 107 + TPS65912_REGULATOR("LDO6", LDO6, "ldo6", tps65912_ops_ldo, 108 + TPS65912_LDO6, TPS65912_LDO6, 109 + tps65912_ldo_ranges), 110 + TPS65912_REGULATOR("LDO7", LDO7, "ldo7", tps65912_ops_ldo, 111 + TPS65912_LDO7, TPS65912_LDO7, 112 + tps65912_ldo_ranges), 113 + TPS65912_REGULATOR("LDO8", LDO8, "ldo8", tps65912_ops_ldo, 114 + TPS65912_LDO8, TPS65912_LDO8, 115 + tps65912_ldo_ranges), 116 + TPS65912_REGULATOR("LDO9", LDO9, "ldo9", tps65912_ops_ldo, 117 + TPS65912_LDO9, TPS65912_LDO9, 118 + tps65912_ldo_ranges), 119 + TPS65912_REGULATOR("LDO10", LDO10, "ldo10", tps65912_ops_ldo, 120 + TPS65912_LDO10, TPS65912_LDO10, 121 + tps65912_ldo_ranges), 122 + }; 123 + 124 + static int tps65912_regulator_probe(struct platform_device *pdev) 453 125 { 454 - struct tps65912 *tps65912 = dev_get_drvdata(pdev->dev.parent); 126 + struct tps65912 *tps = dev_get_drvdata(pdev->dev.parent); 455 127 struct regulator_config config = { }; 456 - struct tps_info *info; 457 - struct regulator_init_data *reg_data; 458 128 struct regulator_dev *rdev; 459 - struct tps65912_reg *pmic; 460 - struct tps65912_board *pmic_plat_data; 461 129 int i; 462 130 463 - pmic_plat_data = dev_get_platdata(tps65912->dev); 464 - if (!pmic_plat_data) 465 - return -EINVAL; 131 + platform_set_drvdata(pdev, tps); 466 132 467 - reg_data = pmic_plat_data->tps65912_pmic_init_data; 133 + config.dev = &pdev->dev; 134 + config.driver_data = tps; 135 + config.dev->of_node = tps->dev->of_node; 136 + config.regmap = tps->regmap; 468 137 469 - pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL); 470 - if (!pmic) 471 - return -ENOMEM; 472 - 473 - mutex_init(&pmic->io_lock); 474 - pmic->mfd = tps65912; 475 - platform_set_drvdata(pdev, pmic); 476 - 477 - pmic->get_ctrl_reg = &tps65912_get_ctrl_register; 478 - info = tps65912_regs; 479 - 480 - for (i = 0; i < TPS65912_NUM_REGULATOR; i++, info++, reg_data++) { 481 - int range = 0; 482 - /* Register the regulators */ 483 - pmic->info[i] = info; 484 - 485 - pmic->desc[i].name = info->name; 486 - pmic->desc[i].id = i; 487 - pmic->desc[i].n_voltages = 64; 488 - if (i > TPS65912_REG_DCDC4) { 489 - pmic->desc[i].ops = &tps65912_ops_ldo; 490 - pmic->desc[i].linear_ranges = tps65912_ldo_ranges; 491 - pmic->desc[i].n_linear_ranges = 492 - ARRAY_SIZE(tps65912_ldo_ranges); 493 - } else { 494 - pmic->desc[i].ops = &tps65912_ops_dcdc; 495 - } 496 - pmic->desc[i].type = REGULATOR_VOLTAGE; 497 - pmic->desc[i].owner = THIS_MODULE; 498 - range = tps65912_get_range(pmic, i); 499 - 500 - config.dev = tps65912->dev; 501 - config.init_data = reg_data; 502 - config.driver_data = pmic; 503 - 504 - rdev = devm_regulator_register(&pdev->dev, &pmic->desc[i], 138 + for (i = 0; i < ARRAY_SIZE(regulators); i++) { 139 + rdev = devm_regulator_register(&pdev->dev, &regulators[i], 505 140 &config); 506 141 if (IS_ERR(rdev)) { 507 - dev_err(tps65912->dev, 508 - "failed to register %s regulator\n", 142 + dev_err(tps->dev, "failed to register %s regulator\n", 509 143 pdev->name); 510 144 return PTR_ERR(rdev); 511 145 } 512 - 513 - /* Save regulator for cleanup */ 514 - pmic->rdev[i] = rdev; 515 146 } 147 + 516 148 return 0; 517 149 } 518 150 519 - static struct platform_driver tps65912_driver = { 520 - .driver = { 521 - .name = "tps65912-pmic", 522 - }, 523 - .probe = tps65912_probe, 151 + static const struct platform_device_id tps65912_regulator_id_table[] = { 152 + { "tps65912-regulator", }, 153 + { /* sentinel */ } 524 154 }; 155 + MODULE_DEVICE_TABLE(platform, tps65912_regulator_id_table); 525 156 526 - static int __init tps65912_init(void) 527 - { 528 - return platform_driver_register(&tps65912_driver); 529 - } 530 - subsys_initcall(tps65912_init); 157 + static struct platform_driver tps65912_regulator_driver = { 158 + .driver = { 159 + .name = "tps65912-regulator", 160 + }, 161 + .probe = tps65912_regulator_probe, 162 + .id_table = tps65912_regulator_id_table, 163 + }; 164 + module_platform_driver(tps65912_regulator_driver); 531 165 532 - static void __exit tps65912_cleanup(void) 533 - { 534 - platform_driver_unregister(&tps65912_driver); 535 - } 536 - module_exit(tps65912_cleanup); 537 - 538 - MODULE_AUTHOR("Margarita Olaya Cabrera <magi@slimlogic.co.uk>"); 166 + MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>"); 539 167 MODULE_DESCRIPTION("TPS65912 voltage regulator driver"); 540 168 MODULE_LICENSE("GPL v2"); 541 - MODULE_ALIAS("platform:tps65912-pmic");
+18
include/dt-bindings/iio/adc/fsl-imx25-gcq.h
··· 1 + /* 2 + * This header provides constants for configuring the I.MX25 ADC 3 + */ 4 + 5 + #ifndef _DT_BINDINGS_IIO_ADC_FS_IMX25_GCQ_H 6 + #define _DT_BINDINGS_IIO_ADC_FS_IMX25_GCQ_H 7 + 8 + #define MX25_ADC_REFP_YP 0 /* YP voltage reference */ 9 + #define MX25_ADC_REFP_XP 1 /* XP voltage reference */ 10 + #define MX25_ADC_REFP_EXT 2 /* External voltage reference */ 11 + #define MX25_ADC_REFP_INT 3 /* Internal voltage reference */ 12 + 13 + #define MX25_ADC_REFN_XN 0 /* XN ground reference */ 14 + #define MX25_ADC_REFN_YN 1 /* YN ground reference */ 15 + #define MX25_ADC_REFN_NGND 2 /* Internal ground reference */ 16 + #define MX25_ADC_REFN_NGND2 3 /* External ground reference */ 17 + 18 + #endif
+33 -1
include/linux/mfd/axp20x.h
··· 18 18 AXP202_ID, 19 19 AXP209_ID, 20 20 AXP221_ID, 21 + AXP223_ID, 21 22 AXP288_ID, 22 23 NR_AXP20X_VARIANTS, 23 24 }; ··· 397 396 398 397 struct axp20x_dev { 399 398 struct device *dev; 400 - struct i2c_client *i2c_client; 399 + int irq; 401 400 struct regmap *regmap; 402 401 struct regmap_irq_chip_data *regmap_irqc; 403 402 long variant; ··· 462 461 463 462 return result; 464 463 } 464 + 465 + /** 466 + * axp20x_match_device(): Setup axp20x variant related fields 467 + * 468 + * @axp20x: axp20x device to setup (.dev field must be set) 469 + * @dev: device associated with this axp20x device 470 + * 471 + * This lets the axp20x core configure the mfd cells and register maps 472 + * for later use. 473 + */ 474 + int axp20x_match_device(struct axp20x_dev *axp20x); 475 + 476 + /** 477 + * axp20x_device_probe(): Probe a configured axp20x device 478 + * 479 + * @axp20x: axp20x device to probe (must be configured) 480 + * 481 + * This function lets the axp20x core register the axp20x mfd devices 482 + * and irqchip. The axp20x device passed in must be fully configured 483 + * with axp20x_match_device, its irq set, and regmap created. 484 + */ 485 + int axp20x_device_probe(struct axp20x_dev *axp20x); 486 + 487 + /** 488 + * axp20x_device_probe(): Remove a axp20x device 489 + * 490 + * @axp20x: axp20x device to remove 491 + * 492 + * This tells the axp20x core to remove the associated mfd devices 493 + */ 494 + int axp20x_device_remove(struct axp20x_dev *axp20x); 465 495 466 496 #endif /* __LINUX_MFD_AXP20X_H */
+140
include/linux/mfd/imx25-tsadc.h
··· 1 + #ifndef _LINUX_INCLUDE_MFD_IMX25_TSADC_H_ 2 + #define _LINUX_INCLUDE_MFD_IMX25_TSADC_H_ 3 + 4 + struct regmap; 5 + struct clk; 6 + 7 + struct mx25_tsadc { 8 + struct regmap *regs; 9 + struct irq_domain *domain; 10 + struct clk *clk; 11 + }; 12 + 13 + #define MX25_TSC_TGCR 0x00 14 + #define MX25_TSC_TGSR 0x04 15 + #define MX25_TSC_TICR 0x08 16 + 17 + /* The same register layout for TC and GC queue */ 18 + #define MX25_ADCQ_FIFO 0x00 19 + #define MX25_ADCQ_CR 0x04 20 + #define MX25_ADCQ_SR 0x08 21 + #define MX25_ADCQ_MR 0x0c 22 + #define MX25_ADCQ_ITEM_7_0 0x20 23 + #define MX25_ADCQ_ITEM_15_8 0x24 24 + #define MX25_ADCQ_CFG(n) (0x40 + ((n) * 0x4)) 25 + 26 + #define MX25_ADCQ_MR_MASK 0xffffffff 27 + 28 + /* TGCR */ 29 + #define MX25_TGCR_PDBTIME(x) ((x) << 25) 30 + #define MX25_TGCR_PDBTIME_MASK GENMASK(31, 25) 31 + #define MX25_TGCR_PDBEN BIT(24) 32 + #define MX25_TGCR_PDEN BIT(23) 33 + #define MX25_TGCR_ADCCLKCFG(x) ((x) << 16) 34 + #define MX25_TGCR_GET_ADCCLK(x) (((x) >> 16) & 0x1f) 35 + #define MX25_TGCR_INTREFEN BIT(10) 36 + #define MX25_TGCR_POWERMODE_MASK GENMASK(9, 8) 37 + #define MX25_TGCR_POWERMODE_SAVE (1 << 8) 38 + #define MX25_TGCR_POWERMODE_ON (2 << 8) 39 + #define MX25_TGCR_STLC BIT(5) 40 + #define MX25_TGCR_SLPC BIT(4) 41 + #define MX25_TGCR_FUNC_RST BIT(2) 42 + #define MX25_TGCR_TSC_RST BIT(1) 43 + #define MX25_TGCR_CLK_EN BIT(0) 44 + 45 + /* TGSR */ 46 + #define MX25_TGSR_SLP_INT BIT(2) 47 + #define MX25_TGSR_GCQ_INT BIT(1) 48 + #define MX25_TGSR_TCQ_INT BIT(0) 49 + 50 + /* ADCQ_ITEM_* */ 51 + #define _MX25_ADCQ_ITEM(item, x) ((x) << ((item) * 4)) 52 + #define MX25_ADCQ_ITEM(item, x) ((item) >= 8 ? \ 53 + _MX25_ADCQ_ITEM((item) - 8, (x)) : _MX25_ADCQ_ITEM((item), (x))) 54 + 55 + /* ADCQ_FIFO (TCQFIFO and GCQFIFO) */ 56 + #define MX25_ADCQ_FIFO_DATA(x) (((x) >> 4) & 0xfff) 57 + #define MX25_ADCQ_FIFO_ID(x) ((x) & 0xf) 58 + 59 + /* ADCQ_CR (TCQR and GCQR) */ 60 + #define MX25_ADCQ_CR_PDCFG_LEVEL BIT(19) 61 + #define MX25_ADCQ_CR_PDMSK BIT(18) 62 + #define MX25_ADCQ_CR_FRST BIT(17) 63 + #define MX25_ADCQ_CR_QRST BIT(16) 64 + #define MX25_ADCQ_CR_RWAIT_MASK GENMASK(15, 12) 65 + #define MX25_ADCQ_CR_RWAIT(x) ((x) << 12) 66 + #define MX25_ADCQ_CR_WMRK_MASK GENMASK(11, 8) 67 + #define MX25_ADCQ_CR_WMRK(x) ((x) << 8) 68 + #define MX25_ADCQ_CR_LITEMID_MASK (0xf << 4) 69 + #define MX25_ADCQ_CR_LITEMID(x) ((x) << 4) 70 + #define MX25_ADCQ_CR_RPT BIT(3) 71 + #define MX25_ADCQ_CR_FQS BIT(2) 72 + #define MX25_ADCQ_CR_QSM_MASK GENMASK(1, 0) 73 + #define MX25_ADCQ_CR_QSM_PD 0x1 74 + #define MX25_ADCQ_CR_QSM_FQS 0x2 75 + #define MX25_ADCQ_CR_QSM_FQS_PD 0x3 76 + 77 + /* ADCQ_SR (TCQSR and GCQSR) */ 78 + #define MX25_ADCQ_SR_FDRY BIT(15) 79 + #define MX25_ADCQ_SR_FULL BIT(14) 80 + #define MX25_ADCQ_SR_EMPT BIT(13) 81 + #define MX25_ADCQ_SR_FDN(x) (((x) >> 8) & 0x1f) 82 + #define MX25_ADCQ_SR_FRR BIT(6) 83 + #define MX25_ADCQ_SR_FUR BIT(5) 84 + #define MX25_ADCQ_SR_FOR BIT(4) 85 + #define MX25_ADCQ_SR_EOQ BIT(1) 86 + #define MX25_ADCQ_SR_PD BIT(0) 87 + 88 + /* ADCQ_MR (TCQMR and GCQMR) */ 89 + #define MX25_ADCQ_MR_FDRY_DMA BIT(31) 90 + #define MX25_ADCQ_MR_FER_DMA BIT(22) 91 + #define MX25_ADCQ_MR_FUR_DMA BIT(21) 92 + #define MX25_ADCQ_MR_FOR_DMA BIT(20) 93 + #define MX25_ADCQ_MR_EOQ_DMA BIT(17) 94 + #define MX25_ADCQ_MR_PD_DMA BIT(16) 95 + #define MX25_ADCQ_MR_FDRY_IRQ BIT(15) 96 + #define MX25_ADCQ_MR_FER_IRQ BIT(6) 97 + #define MX25_ADCQ_MR_FUR_IRQ BIT(5) 98 + #define MX25_ADCQ_MR_FOR_IRQ BIT(4) 99 + #define MX25_ADCQ_MR_EOQ_IRQ BIT(1) 100 + #define MX25_ADCQ_MR_PD_IRQ BIT(0) 101 + 102 + /* ADCQ_CFG (TICR, TCC0-7,GCC0-7) */ 103 + #define MX25_ADCQ_CFG_SETTLING_TIME(x) ((x) << 24) 104 + #define MX25_ADCQ_CFG_IGS (1 << 20) 105 + #define MX25_ADCQ_CFG_NOS_MASK GENMASK(19, 16) 106 + #define MX25_ADCQ_CFG_NOS(x) (((x) - 1) << 16) 107 + #define MX25_ADCQ_CFG_WIPER (1 << 15) 108 + #define MX25_ADCQ_CFG_YNLR (1 << 14) 109 + #define MX25_ADCQ_CFG_YPLL_HIGH (0 << 12) 110 + #define MX25_ADCQ_CFG_YPLL_OFF (1 << 12) 111 + #define MX25_ADCQ_CFG_YPLL_LOW (3 << 12) 112 + #define MX25_ADCQ_CFG_XNUR_HIGH (0 << 10) 113 + #define MX25_ADCQ_CFG_XNUR_OFF (1 << 10) 114 + #define MX25_ADCQ_CFG_XNUR_LOW (3 << 10) 115 + #define MX25_ADCQ_CFG_XPUL_HIGH (0 << 9) 116 + #define MX25_ADCQ_CFG_XPUL_OFF (1 << 9) 117 + #define MX25_ADCQ_CFG_REFP(sel) ((sel) << 7) 118 + #define MX25_ADCQ_CFG_REFP_YP MX25_ADCQ_CFG_REFP(0) 119 + #define MX25_ADCQ_CFG_REFP_XP MX25_ADCQ_CFG_REFP(1) 120 + #define MX25_ADCQ_CFG_REFP_EXT MX25_ADCQ_CFG_REFP(2) 121 + #define MX25_ADCQ_CFG_REFP_INT MX25_ADCQ_CFG_REFP(3) 122 + #define MX25_ADCQ_CFG_REFP_MASK GENMASK(8, 7) 123 + #define MX25_ADCQ_CFG_IN(sel) ((sel) << 4) 124 + #define MX25_ADCQ_CFG_IN_XP MX25_ADCQ_CFG_IN(0) 125 + #define MX25_ADCQ_CFG_IN_YP MX25_ADCQ_CFG_IN(1) 126 + #define MX25_ADCQ_CFG_IN_XN MX25_ADCQ_CFG_IN(2) 127 + #define MX25_ADCQ_CFG_IN_YN MX25_ADCQ_CFG_IN(3) 128 + #define MX25_ADCQ_CFG_IN_WIPER MX25_ADCQ_CFG_IN(4) 129 + #define MX25_ADCQ_CFG_IN_AUX0 MX25_ADCQ_CFG_IN(5) 130 + #define MX25_ADCQ_CFG_IN_AUX1 MX25_ADCQ_CFG_IN(6) 131 + #define MX25_ADCQ_CFG_IN_AUX2 MX25_ADCQ_CFG_IN(7) 132 + #define MX25_ADCQ_CFG_REFN(sel) ((sel) << 2) 133 + #define MX25_ADCQ_CFG_REFN_XN MX25_ADCQ_CFG_REFN(0) 134 + #define MX25_ADCQ_CFG_REFN_YN MX25_ADCQ_CFG_REFN(1) 135 + #define MX25_ADCQ_CFG_REFN_NGND MX25_ADCQ_CFG_REFN(2) 136 + #define MX25_ADCQ_CFG_REFN_NGND2 MX25_ADCQ_CFG_REFN(3) 137 + #define MX25_ADCQ_CFG_REFN_MASK GENMASK(3, 2) 138 + #define MX25_ADCQ_CFG_PENIACK (1 << 1) 139 + 140 + #endif /* _LINUX_INCLUDE_MFD_IMX25_TSADC_H_ */
+113 -100
include/linux/mfd/tps65912.h
··· 1 1 /* 2 - * tps65912.h -- TI TPS6591x 2 + * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/ 3 + * Andrew F. Davis <afd@ti.com> 3 4 * 4 - * Copyright 2011 Texas Instruments Inc. 5 + * This program is free software; you can redistribute it and/or 6 + * modify it under the terms of the GNU General Public License version 2 as 7 + * published by the Free Software Foundation. 5 8 * 6 - * Author: Margarita Olaya <magi@slimlogic.co.uk> 9 + * This program is distributed "as is" WITHOUT ANY WARRANTY of any 10 + * kind, whether expressed or implied; without even the implied warranty 11 + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 + * GNU General Public License version 2 for more details. 7 13 * 8 - * This program is free software; you can redistribute it and/or modify it 9 - * under the terms of the GNU General Public License as published by the 10 - * Free Software Foundation; either version 2 of the License, or (at your 11 - * option) any later version. 12 - * 14 + * Based on the TPS65218 driver and the previous TPS65912 driver by 15 + * Margarita Olaya Cabrera <magi@slimlogic.co.uk> 13 16 */ 14 17 15 18 #ifndef __LINUX_MFD_TPS65912_H 16 19 #define __LINUX_MFD_TPS65912_H 17 20 18 - /* TPS regulator type list */ 19 - #define REGULATOR_LDO 0 20 - #define REGULATOR_DCDC 1 21 + #include <linux/device.h> 22 + #include <linux/regmap.h> 21 23 22 - /* 23 - * List of registers for TPS65912 24 - */ 25 - 24 + /* List of registers for TPS65912 */ 26 25 #define TPS65912_DCDC1_CTRL 0x00 27 26 #define TPS65912_DCDC2_CTRL 0x01 28 27 #define TPS65912_DCDC3_CTRL 0x02 ··· 125 126 #define TPS65912_VERNUM 0x64 126 127 #define TPS6591X_MAX_REGISTER 0x64 127 128 128 - /* IRQ Definitions */ 129 - #define TPS65912_IRQ_PWRHOLD_F 0 130 - #define TPS65912_IRQ_VMON 1 131 - #define TPS65912_IRQ_PWRON 2 132 - #define TPS65912_IRQ_PWRON_LP 3 133 - #define TPS65912_IRQ_PWRHOLD_R 4 134 - #define TPS65912_IRQ_HOTDIE 5 135 - #define TPS65912_IRQ_GPIO1_R 6 136 - #define TPS65912_IRQ_GPIO1_F 7 137 - #define TPS65912_IRQ_GPIO2_R 8 138 - #define TPS65912_IRQ_GPIO2_F 9 139 - #define TPS65912_IRQ_GPIO3_R 10 140 - #define TPS65912_IRQ_GPIO3_F 11 141 - #define TPS65912_IRQ_GPIO4_R 12 142 - #define TPS65912_IRQ_GPIO4_F 13 143 - #define TPS65912_IRQ_GPIO5_R 14 144 - #define TPS65912_IRQ_GPIO5_F 15 145 - #define TPS65912_IRQ_PGOOD_DCDC1 16 146 - #define TPS65912_IRQ_PGOOD_DCDC2 17 147 - #define TPS65912_IRQ_PGOOD_DCDC3 18 148 - #define TPS65912_IRQ_PGOOD_DCDC4 19 149 - #define TPS65912_IRQ_PGOOD_LDO1 20 150 - #define TPS65912_IRQ_PGOOD_LDO2 21 151 - #define TPS65912_IRQ_PGOOD_LDO3 22 152 - #define TPS65912_IRQ_PGOOD_LDO4 23 153 - #define TPS65912_IRQ_PGOOD_LDO5 24 154 - #define TPS65912_IRQ_PGOOD_LDO6 25 155 - #define TPS65912_IRQ_PGOOD_LDO7 26 156 - #define TPS65912_IRQ_PGOOD_LD08 27 157 - #define TPS65912_IRQ_PGOOD_LDO9 28 158 - #define TPS65912_IRQ_PGOOD_LDO10 29 129 + /* INT_STS Register field definitions */ 130 + #define TPS65912_INT_STS_PWRHOLD_F BIT(0) 131 + #define TPS65912_INT_STS_VMON BIT(1) 132 + #define TPS65912_INT_STS_PWRON BIT(2) 133 + #define TPS65912_INT_STS_PWRON_LP BIT(3) 134 + #define TPS65912_INT_STS_PWRHOLD_R BIT(4) 135 + #define TPS65912_INT_STS_HOTDIE BIT(5) 136 + #define TPS65912_INT_STS_GPIO1_R BIT(6) 137 + #define TPS65912_INT_STS_GPIO1_F BIT(7) 159 138 160 - #define TPS65912_NUM_IRQ 30 139 + /* INT_STS Register field definitions */ 140 + #define TPS65912_INT_STS2_GPIO2_R BIT(0) 141 + #define TPS65912_INT_STS2_GPIO2_F BIT(1) 142 + #define TPS65912_INT_STS2_GPIO3_R BIT(2) 143 + #define TPS65912_INT_STS2_GPIO3_F BIT(3) 144 + #define TPS65912_INT_STS2_GPIO4_R BIT(4) 145 + #define TPS65912_INT_STS2_GPIO4_F BIT(5) 146 + #define TPS65912_INT_STS2_GPIO5_R BIT(6) 147 + #define TPS65912_INT_STS2_GPIO5_F BIT(7) 161 148 162 - /* GPIO 1 and 2 Register Definitions */ 149 + /* INT_STS Register field definitions */ 150 + #define TPS65912_INT_STS3_PGOOD_DCDC1 BIT(0) 151 + #define TPS65912_INT_STS3_PGOOD_DCDC2 BIT(1) 152 + #define TPS65912_INT_STS3_PGOOD_DCDC3 BIT(2) 153 + #define TPS65912_INT_STS3_PGOOD_DCDC4 BIT(3) 154 + #define TPS65912_INT_STS3_PGOOD_LDO1 BIT(4) 155 + #define TPS65912_INT_STS3_PGOOD_LDO2 BIT(5) 156 + #define TPS65912_INT_STS3_PGOOD_LDO3 BIT(6) 157 + #define TPS65912_INT_STS3_PGOOD_LDO4 BIT(7) 158 + 159 + /* INT_STS Register field definitions */ 160 + #define TPS65912_INT_STS4_PGOOD_LDO5 BIT(0) 161 + #define TPS65912_INT_STS4_PGOOD_LDO6 BIT(1) 162 + #define TPS65912_INT_STS4_PGOOD_LDO7 BIT(2) 163 + #define TPS65912_INT_STS4_PGOOD_LDO8 BIT(3) 164 + #define TPS65912_INT_STS4_PGOOD_LDO9 BIT(4) 165 + #define TPS65912_INT_STS4_PGOOD_LDO10 BIT(5) 166 + 167 + /* GPIO 1 and 2 Register field definitions */ 163 168 #define GPIO_SLEEP_MASK 0x80 164 169 #define GPIO_SLEEP_SHIFT 7 165 170 #define GPIO_DEB_MASK 0x10 ··· 175 172 #define GPIO_SET_MASK 0x01 176 173 #define GPIO_SET_SHIFT 0 177 174 178 - /* GPIO 3 Register Definitions */ 175 + /* GPIO 3 Register field definitions */ 179 176 #define GPIO3_SLEEP_MASK 0x80 180 177 #define GPIO3_SLEEP_SHIFT 7 181 178 #define GPIO3_SEL_MASK 0x40 ··· 193 190 #define GPIO3_SET_MASK 0x01 194 191 #define GPIO3_SET_SHIFT 0 195 192 196 - /* GPIO 4 Register Definitions */ 193 + /* GPIO 4 Register field definitions */ 197 194 #define GPIO4_SLEEP_MASK 0x80 198 195 #define GPIO4_SLEEP_SHIFT 7 199 196 #define GPIO4_SEL_MASK 0x40 ··· 267 264 #define DCDC_LIMIT_MAX_SEL_MASK 0x3F 268 265 #define DCDC_LIMIT_MAX_SEL_SHIFT 0 269 266 270 - /** 271 - * struct tps65912_board 272 - * Board platform dat may be used to initialize regulators. 273 - */ 274 - struct tps65912_board { 275 - int is_dcdc1_avs; 276 - int is_dcdc2_avs; 277 - int is_dcdc3_avs; 278 - int is_dcdc4_avs; 279 - int irq; 280 - int irq_base; 281 - int gpio_base; 282 - struct regulator_init_data *tps65912_pmic_init_data; 267 + /* Define the TPS65912 IRQ numbers */ 268 + enum tps65912_irqs { 269 + /* INT_STS registers */ 270 + TPS65912_IRQ_PWRHOLD_F, 271 + TPS65912_IRQ_VMON, 272 + TPS65912_IRQ_PWRON, 273 + TPS65912_IRQ_PWRON_LP, 274 + TPS65912_IRQ_PWRHOLD_R, 275 + TPS65912_IRQ_HOTDIE, 276 + TPS65912_IRQ_GPIO1_R, 277 + TPS65912_IRQ_GPIO1_F, 278 + /* INT_STS2 registers */ 279 + TPS65912_IRQ_GPIO2_R, 280 + TPS65912_IRQ_GPIO2_F, 281 + TPS65912_IRQ_GPIO3_R, 282 + TPS65912_IRQ_GPIO3_F, 283 + TPS65912_IRQ_GPIO4_R, 284 + TPS65912_IRQ_GPIO4_F, 285 + TPS65912_IRQ_GPIO5_R, 286 + TPS65912_IRQ_GPIO5_F, 287 + /* INT_STS3 registers */ 288 + TPS65912_IRQ_PGOOD_DCDC1, 289 + TPS65912_IRQ_PGOOD_DCDC2, 290 + TPS65912_IRQ_PGOOD_DCDC3, 291 + TPS65912_IRQ_PGOOD_DCDC4, 292 + TPS65912_IRQ_PGOOD_LDO1, 293 + TPS65912_IRQ_PGOOD_LDO2, 294 + TPS65912_IRQ_PGOOD_LDO3, 295 + TPS65912_IRQ_PGOOD_LDO4, 296 + /* INT_STS4 registers */ 297 + TPS65912_IRQ_PGOOD_LDO5, 298 + TPS65912_IRQ_PGOOD_LDO6, 299 + TPS65912_IRQ_PGOOD_LDO7, 300 + TPS65912_IRQ_PGOOD_LDO8, 301 + TPS65912_IRQ_PGOOD_LDO9, 302 + TPS65912_IRQ_PGOOD_LDO10, 283 303 }; 284 304 285 - /** 286 - * struct tps65912 - tps65912 sub-driver chip access routines 305 + /* 306 + * struct tps65912 - state holder for the tps65912 driver 307 + * 308 + * Device data may be used to access the TPS65912 chip 287 309 */ 288 - 289 310 struct tps65912 { 290 311 struct device *dev; 291 - /* for read/write acces */ 292 - struct mutex io_mutex; 312 + struct regmap *regmap; 293 313 294 - /* For device IO interfaces: I2C or SPI */ 295 - void *control_data; 296 - 297 - int (*read)(struct tps65912 *tps65912, u8 reg, int size, void *dest); 298 - int (*write)(struct tps65912 *tps65912, u8 reg, int size, void *src); 299 - 300 - /* Client devices */ 301 - struct tps65912_pmic *pmic; 302 - 303 - /* GPIO Handling */ 304 - struct gpio_chip gpio; 305 - 306 - /* IRQ Handling */ 307 - struct mutex irq_lock; 308 - int chip_irq; 309 - int irq_base; 310 - int irq_num; 311 - u32 irq_mask; 312 - }; 313 - 314 - struct tps65912_platform_data { 314 + /* IRQ Data */ 315 315 int irq; 316 - int irq_base; 316 + struct regmap_irq_chip_data *irq_data; 317 317 }; 318 318 319 - unsigned int tps_chip(void); 319 + static const struct regmap_range tps65912_yes_ranges[] = { 320 + regmap_reg_range(TPS65912_INT_STS, TPS65912_GPIO5), 321 + }; 320 322 321 - int tps65912_set_bits(struct tps65912 *tps65912, u8 reg, u8 mask); 322 - int tps65912_clear_bits(struct tps65912 *tps65912, u8 reg, u8 mask); 323 - int tps65912_reg_read(struct tps65912 *tps65912, u8 reg); 324 - int tps65912_reg_write(struct tps65912 *tps65912, u8 reg, u8 val); 325 - int tps65912_device_init(struct tps65912 *tps65912); 326 - void tps65912_device_exit(struct tps65912 *tps65912); 327 - int tps65912_irq_init(struct tps65912 *tps65912, int irq, 328 - struct tps65912_platform_data *pdata); 329 - int tps65912_irq_exit(struct tps65912 *tps65912); 323 + static const struct regmap_access_table tps65912_volatile_table = { 324 + .yes_ranges = tps65912_yes_ranges, 325 + .n_yes_ranges = ARRAY_SIZE(tps65912_yes_ranges), 326 + }; 327 + 328 + static const struct regmap_config tps65912_regmap_config = { 329 + .reg_bits = 8, 330 + .val_bits = 8, 331 + .cache_type = REGCACHE_RBTREE, 332 + .volatile_table = &tps65912_volatile_table, 333 + }; 334 + 335 + int tps65912_device_init(struct tps65912 *tps); 336 + int tps65912_device_exit(struct tps65912 *tps); 330 337 331 338 #endif /* __LINUX_MFD_TPS65912_H */