···11+Freescale i.MX25 ADC GCQ device22+33+This is a generic conversion queue device that can convert any of the44+analog inputs using the ADC unit of the i.MX25.55+66+Required properties:77+ - compatible: Should be "fsl,imx25-gcq".88+ - reg: Should be the register range of the module.99+ - interrupts: Should be the interrupt number of the module.1010+ Typically this is <1>.1111+ - interrupt-parent: phandle to the tsadc module of the i.MX25.1212+ - #address-cells: Should be <1> (setting for the subnodes)1313+ - #size-cells: Should be <0> (setting for the subnodes)1414+1515+Optional properties:1616+ - vref-ext-supply: The regulator supplying the ADC reference voltage.1717+ Required when at least one subnode uses the this reference.1818+ - vref-xp-supply: The regulator supplying the ADC reference voltage on pin XP.1919+ Required when at least one subnode uses this reference.2020+ - vref-yp-supply: The regulator supplying the ADC reference voltage on pin YP.2121+ Required when at least one subnode uses this reference.2222+2323+Sub-nodes:2424+Optionally you can define subnodes which define the reference voltage2525+for the analog inputs.2626+2727+Required properties for subnodes:2828+ - reg: Should be the number of the analog input.2929+ 0: xp3030+ 1: yp3131+ 2: xn3232+ 3: yn3333+ 4: wiper3434+ 5: inaux03535+ 6: inaux13636+ 7: inaux23737+Optional properties for subnodes:3838+ - fsl,adc-refp: specifies the positive reference input as defined in3939+ <dt-bindings/iio/adc/fsl-imx25-gcq.h>4040+ - fsl,adc-refn: specifies the negative reference input as defined in4141+ <dt-bindings/iio/adc/fsl-imx25-gcq.h>4242+4343+Example:4444+4545+ adc: adc@50030800 {4646+ compatible = "fsl,imx25-gcq";4747+ reg = <0x50030800 0x60>;4848+ interrupt-parent = <&tscadc>;4949+ interrupts = <1>;5050+ #address-cells = <1>;5151+ #size-cells = <0>;5252+5353+ inaux@5 {5454+ reg = <5>;5555+ fsl,adc-refp = <MX25_ADC_REFP_INT>;5656+ fsl,adc-refn = <MX25_ADC_REFN_NGND>;5757+ };5858+ };
···11+Freescale mx25 TS conversion queue module22+33+mx25 touchscreen conversion queue module which controls the ADC unit of the44+mx25 for attached touchscreens.55+66+Required properties:77+ - compatible: Should be "fsl,imx25-tcq".88+ - reg: Memory range of the device.99+ - interrupts: Should be the interrupt number associated with this module within1010+ the tscadc unit (<0>).1111+ - interrupt-parent: Should be a phandle to the tscadc unit.1212+ - fsl,wires: Should be '<4>' or '<5>'1313+1414+Optional properties:1515+ - fsl,pen-debounce-ns: Pen debounce time in nanoseconds.1616+ - fsl,pen-threshold: Pen-down threshold for the touchscreen. This is a value1717+ between 1 and 4096. It is the ratio between the internal reference voltage1818+ and the measured voltage after the plate was precharged. Resistence between1919+ plates and therefore the voltage decreases with pressure so that a smaller2020+ value is equivalent to a higher pressure.2121+ - fsl,settling-time-ns: Settling time in nanoseconds. The settling time is before2222+ the actual touch detection to wait for an even charge distribution in the2323+ plate.2424+2525+This device includes two conversion queues which can be added as subnodes.2626+The first queue is for the touchscreen, the second for general purpose ADC.2727+2828+Example:2929+ tsc: tcq@50030400 {3030+ compatible = "fsl,imx25-tcq";3131+ reg = <0x50030400 0x60>;3232+ interrupt-parent = <&tscadc>;3333+ interrupts = <0>;3434+ fsl,wires = <4>;3535+ };
+4-3
Documentation/devicetree/bindings/mfd/axp20x.txt
···55axp202 (X-Powers)66axp209 (X-Powers)77axp221 (X-Powers)88+axp223 (X-Powers)89910Required properties:1011- compatible: "x-powers,axp152", "x-powers,axp202", "x-powers,axp209",1111- "x-powers,axp221"1212-- reg: The I2C slave address for the AXP chip1212+ "x-powers,axp221", "x-powers,axp223"1313+- reg: The I2C slave address or RSB hardware address for the AXP chip1314- interrupt-parent: The parent interrupt controller1415- interrupts: SoC NMI / GPIO interrupt connected to the PMIC's IRQ pin1516- interrupt-controller: The PMIC has its own internal IRQs···5251LDO4 : LDO : ldo24in-supply : shared supply5352LDO5 : LDO : ldo5in-supply54535555-AXP221 regulators, type, and corresponding input supply names:5454+AXP221/AXP223 regulators, type, and corresponding input supply names:56555756Regulator Type Supply Name Notes5857--------- ---- ----------- -----
···11+Freescale MX25 ADC/TSC MultiFunction Device (MFD)22+33+This device combines two general purpose conversion queues one used for general44+ADC and the other used for touchscreens.55+66+Required properties:77+ - compatible: Should be "fsl,imx25-tsadc".88+ - reg: Start address and size of the memory area of99+ the device1010+ - interrupts: Interrupt for this device1111+ (See: ../interrupt-controller/interrupts.txt)1212+ - clocks: An 'ipg' clock (See: ../clock/clock-bindings.txt)1313+ - interrupt-controller: This device is an interrupt controller. It1414+ controls the interrupts of both1515+ conversion queues.1616+ - #interrupt-cells: Should be '<1>'.1717+ - #address-cells: Should be '<1>'.1818+ - #size-cells: Should be '<1>'.1919+2020+This device includes two conversion queues which can be added as subnodes.2121+The first queue is for the touchscreen, the second for general purpose ADC.2222+2323+Example:2424+ tscadc: tscadc@50030000 {2525+ compatible = "fsl,imx25-tsadc";2626+ reg = <0x50030000 0xc>;2727+ interrupts = <46>;2828+ clocks = <&clks 119>;2929+ clock-names = "ipg";3030+ interrupt-controller;3131+ #interrupt-cells = <1>;3232+ #address-cells = <1>;3333+ #size-cells = <1>;3434+ ranges;3535+3636+ tsc: tcq@50030400 {3737+ compatible = "fsl,imx25-tcq";3838+ reg = <0x50030400 0x60>;3939+ ...4040+ };4141+4242+ adc: gcq@50030800 {4343+ compatible = "fsl,imx25-gcq";4444+ reg = <0x50030800 0x60>;4545+ ...4646+ };4747+ };
···11+* TPS65912 Power Management Integrated Circuit bindings22+33+Required properties:44+ - compatible : Should be "ti,tps65912".55+ - reg : Slave address or chip select number (I2C / SPI).66+ - interrupt-parent : The parent interrupt controller.77+ - interrupts : The interrupt line the device is connected to.88+ - interrupt-controller : Marks the device node as an interrupt controller.99+ - #interrupt-cells : The number of cells to describe an IRQ, should be 2.1010+ The first cell is the IRQ number.1111+ The second cell is the flags, encoded as trigger1212+ masks from ../interrupt-controller/interrupts.txt.1313+ - gpio-controller : Marks the device node as a GPIO Controller.1414+ - #gpio-cells : Should be two. The first cell is the pin number and1515+ the second cell is used to specify flags.1616+ See ../gpio/gpio.txt for more information.1717+ - regulators: : List of child nodes that specify the regulator1818+ initialization data. Child nodes must be named1919+ after their hardware counterparts: dcdc[1-4] and2020+ ldo[1-10]. Each child nodes is defined using the2121+ standard binding for regulators.2222+2323+Example:2424+2525+ pmic: tps65912@2d {2626+ compatible = "ti,tps65912";2727+ reg = <0x2d>;2828+ interrupt-parent = <&gpio1>;2929+ interrupts = <28 IRQ_TYPE_LEVEL_LOW>;3030+ interrupt-controller;3131+ #interrupt-cells = <2>;3232+ gpio-controller;3333+ #gpio-cells = <2>;3434+3535+ regulators {3636+ dcdc1 {3737+ regulator-name = "vdd_core";3838+ regulator-min-microvolt = <912000>;3939+ regulator-max-microvolt = <1144000>;4040+ regulator-boot-on;4141+ regulator-always-on;4242+ };4343+4444+ ldo1 {4545+ regulator-name = "ldo1";4646+ regulator-min-microvolt = <1900000>;4747+ regulator-max-microvolt = <1900000>;4848+ };4949+ };5050+ };
+1-1
drivers/gpio/Kconfig
···860860861861config GPIO_TPS65912862862 tristate "TI TPS65912 GPIO"863863- depends on (MFD_TPS65912_I2C || MFD_TPS65912_SPI)863863+ depends on MFD_TPS65912864864 help865865 This driver supports TPS65912 gpio chip866866
+93-86
drivers/gpio/gpio-tps65912.c
···11/*22- * Copyright 2011 Texas Instruments Inc.22+ * GPIO driver for TI TPS65912x PMICs33 *44- * Author: Margarita Olaya <magi@slimlogic.co.uk>44+ * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/55+ * Andrew F. Davis <afd@ti.com>56 *66- * This program is free software; you can redistribute it and/or modify it77- * under the terms of the GNU General Public License as published by the88- * Free Software Foundation; either version 2 of the License, or (at your99- * option) any later version.77+ * This program is free software; you can redistribute it and/or88+ * modify it under the terms of the GNU General Public License version 2 as99+ * published by the Free Software Foundation.1010 *1111- * This driver is based on wm8350 implementation.1111+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any1212+ * kind, whether expressed or implied; without even the implied warranty1313+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the1414+ * GNU General Public License version 2 for more details.1515+ *1616+ * Based on the Arizona GPIO driver and the previous TPS65912 driver by1717+ * Margarita Olaya Cabrera <magi@slimlogic.co.uk>1218 */13191414-#include <linux/kernel.h>1515-#include <linux/module.h>1616-#include <linux/errno.h>1720#include <linux/gpio.h>1818-#include <linux/mfd/core.h>2121+#include <linux/module.h>1922#include <linux/platform_device.h>2020-#include <linux/seq_file.h>2121-#include <linux/slab.h>2323+2224#include <linux/mfd/tps65912.h>23252424-struct tps65912_gpio_data {2525- struct tps65912 *tps65912;2626+struct tps65912_gpio {2627 struct gpio_chip gpio_chip;2828+ struct tps65912 *tps;2729};3030+3131+static int tps65912_gpio_get_direction(struct gpio_chip *gc,3232+ unsigned offset)3333+{3434+ struct tps65912_gpio *gpio = gpiochip_get_data(gc);3535+3636+ int ret, val;3737+3838+ ret = regmap_read(gpio->tps->regmap, TPS65912_GPIO1 + offset, &val);3939+ if (ret)4040+ return ret;4141+4242+ if (val & GPIO_CFG_MASK)4343+ return GPIOF_DIR_OUT;4444+ else4545+ return GPIOF_DIR_IN;4646+}4747+4848+static int tps65912_gpio_direction_input(struct gpio_chip *gc, unsigned offset)4949+{5050+ struct tps65912_gpio *gpio = gpiochip_get_data(gc);5151+5252+ return regmap_update_bits(gpio->tps->regmap, TPS65912_GPIO1 + offset,5353+ GPIO_CFG_MASK, 0);5454+}5555+5656+static int tps65912_gpio_direction_output(struct gpio_chip *gc,5757+ unsigned offset, int value)5858+{5959+ struct tps65912_gpio *gpio = gpiochip_get_data(gc);6060+6161+ /* Set the initial value */6262+ regmap_update_bits(gpio->tps->regmap, TPS65912_GPIO1 + offset,6363+ GPIO_SET_MASK, value ? GPIO_SET_MASK : 0);6464+6565+ return regmap_update_bits(gpio->tps->regmap, TPS65912_GPIO1 + offset,6666+ GPIO_CFG_MASK, GPIO_CFG_MASK);6767+}28682969static int tps65912_gpio_get(struct gpio_chip *gc, unsigned offset)3070{3131- struct tps65912_gpio_data *tps65912_gpio = gpiochip_get_data(gc);3232- struct tps65912 *tps65912 = tps65912_gpio->tps65912;3333- int val;7171+ struct tps65912_gpio *gpio = gpiochip_get_data(gc);7272+ int ret, val;34733535- val = tps65912_reg_read(tps65912, TPS65912_GPIO1 + offset);7474+ ret = regmap_read(gpio->tps->regmap, TPS65912_GPIO1 + offset, &val);7575+ if (ret)7676+ return ret;36773778 if (val & GPIO_STS_MASK)3879 return 1;···8443static void tps65912_gpio_set(struct gpio_chip *gc, unsigned offset,8544 int value)8645{8787- struct tps65912_gpio_data *tps65912_gpio = gpiochip_get_data(gc);8888- struct tps65912 *tps65912 = tps65912_gpio->tps65912;4646+ struct tps65912_gpio *gpio = gpiochip_get_data(gc);89479090- if (value)9191- tps65912_set_bits(tps65912, TPS65912_GPIO1 + offset,9292- GPIO_SET_MASK);9393- else9494- tps65912_clear_bits(tps65912, TPS65912_GPIO1 + offset,9595- GPIO_SET_MASK);9696-}9797-9898-static int tps65912_gpio_output(struct gpio_chip *gc, unsigned offset,9999- int value)100100-{101101- struct tps65912_gpio_data *tps65912_gpio = gpiochip_get_data(gc);102102- struct tps65912 *tps65912 = tps65912_gpio->tps65912;103103-104104- /* Set the initial value */105105- tps65912_gpio_set(gc, offset, value);106106-107107- return tps65912_set_bits(tps65912, TPS65912_GPIO1 + offset,108108- GPIO_CFG_MASK);109109-}110110-111111-static int tps65912_gpio_input(struct gpio_chip *gc, unsigned offset)112112-{113113- struct tps65912_gpio_data *tps65912_gpio = gpiochip_get_data(gc);114114- struct tps65912 *tps65912 = tps65912_gpio->tps65912;115115-116116- return tps65912_clear_bits(tps65912, TPS65912_GPIO1 + offset,117117- GPIO_CFG_MASK);4848+ regmap_update_bits(gpio->tps->regmap, TPS65912_GPIO1 + offset,4949+ GPIO_SET_MASK, value ? GPIO_SET_MASK : 0);11850}1195112052static struct gpio_chip template_chip = {121121- .label = "tps65912",5353+ .label = "tps65912-gpio",12254 .owner = THIS_MODULE,123123- .direction_input = tps65912_gpio_input,124124- .direction_output = tps65912_gpio_output,5555+ .get_direction = tps65912_gpio_get_direction,5656+ .direction_input = tps65912_gpio_direction_input,5757+ .direction_output = tps65912_gpio_direction_output,12558 .get = tps65912_gpio_get,12659 .set = tps65912_gpio_set,127127- .can_sleep = true,128128- .ngpio = 5,12960 .base = -1,6161+ .ngpio = 5,6262+ .can_sleep = true,13063};1316413265static int tps65912_gpio_probe(struct platform_device *pdev)13366{134134- struct tps65912 *tps65912 = dev_get_drvdata(pdev->dev.parent);135135- struct tps65912_board *pdata = dev_get_platdata(tps65912->dev);136136- struct tps65912_gpio_data *tps65912_gpio;6767+ struct tps65912 *tps = dev_get_drvdata(pdev->dev.parent);6868+ struct tps65912_gpio *gpio;13769 int ret;13870139139- tps65912_gpio = devm_kzalloc(&pdev->dev, sizeof(*tps65912_gpio),140140- GFP_KERNEL);141141- if (tps65912_gpio == NULL)7171+ gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);7272+ if (!gpio)14273 return -ENOMEM;14374144144- tps65912_gpio->tps65912 = tps65912;145145- tps65912_gpio->gpio_chip = template_chip;146146- tps65912_gpio->gpio_chip.parent = &pdev->dev;147147- if (pdata && pdata->gpio_base)148148- tps65912_gpio->gpio_chip.base = pdata->gpio_base;7575+ gpio->tps = dev_get_drvdata(pdev->dev.parent);7676+ gpio->gpio_chip = template_chip;7777+ gpio->gpio_chip.parent = tps->dev;14978150150- ret = gpiochip_add_data(&tps65912_gpio->gpio_chip, tps65912_gpio);7979+ ret = gpiochip_add_data(&gpio->gpio_chip, gpio);15180 if (ret < 0) {152152- dev_err(&pdev->dev, "Failed to register gpiochip, %d\n", ret);8181+ dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret);15382 return ret;15483 }15584156156- platform_set_drvdata(pdev, tps65912_gpio);8585+ platform_set_drvdata(pdev, gpio);15786158158- return ret;8787+ return 0;15988}1608916190static int tps65912_gpio_remove(struct platform_device *pdev)16291{163163- struct tps65912_gpio_data *tps65912_gpio = platform_get_drvdata(pdev);9292+ struct tps65912_gpio *gpio = platform_get_drvdata(pdev);16493165165- gpiochip_remove(&tps65912_gpio->gpio_chip);9494+ gpiochip_remove(&gpio->gpio_chip);9595+16696 return 0;16797}9898+9999+static const struct platform_device_id tps65912_gpio_id_table[] = {100100+ { "tps65912-gpio", },101101+ { /* sentinel */ }102102+};103103+MODULE_DEVICE_TABLE(platform, tps65912_gpio_id_table);168104169105static struct platform_driver tps65912_gpio_driver = {170106 .driver = {···149131 },150132 .probe = tps65912_gpio_probe,151133 .remove = tps65912_gpio_remove,134134+ .id_table = tps65912_gpio_id_table,152135};136136+module_platform_driver(tps65912_gpio_driver);153137154154-static int __init tps65912_gpio_init(void)155155-{156156- return platform_driver_register(&tps65912_gpio_driver);157157-}158158-subsys_initcall(tps65912_gpio_init);159159-160160-static void __exit tps65912_gpio_exit(void)161161-{162162- platform_driver_unregister(&tps65912_gpio_driver);163163-}164164-module_exit(tps65912_gpio_exit);165165-166166-MODULE_AUTHOR("Margarita Olaya Cabrera <magi@slimlogic.co.uk>");167167-MODULE_DESCRIPTION("GPIO interface for TPS65912 PMICs");138138+MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");139139+MODULE_DESCRIPTION("TPS65912 GPIO driver");168140MODULE_LICENSE("GPL v2");169169-MODULE_ALIAS("platform:tps65912-gpio");
+7
drivers/iio/adc/Kconfig
···183183 To compile this driver as a module, choose M here: the module will be184184 called exynos_adc.185185186186+config FSL_MX25_ADC187187+ tristate "Freescale MX25 ADC driver"188188+ depends on MFD_MX25_TSADC189189+ help190190+ Generic Conversion Queue driver used for general purpose ADC in the191191+ MX25. This driver supports single measurements using the MX25 ADC.192192+186193config HI8435187194 tristate "Holt Integrated Circuits HI-8435 threshold detector"188195 select IIO_TRIGGERED_EVENT
···11+/*22+ * Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de>33+ *44+ * This program is free software; you can redistribute it and/or modify it under55+ * the terms of the GNU General Public License version 2 as published by the66+ * Free Software Foundation.77+ *88+ * This is the driver for the imx25 GCQ (Generic Conversion Queue)99+ * connected to the imx25 ADC.1010+ */1111+1212+#include <dt-bindings/iio/adc/fsl-imx25-gcq.h>1313+#include <linux/clk.h>1414+#include <linux/iio/iio.h>1515+#include <linux/interrupt.h>1616+#include <linux/mfd/imx25-tsadc.h>1717+#include <linux/module.h>1818+#include <linux/of.h>1919+#include <linux/platform_device.h>2020+#include <linux/regmap.h>2121+#include <linux/regulator/consumer.h>2222+2323+#define MX25_GCQ_TIMEOUT (msecs_to_jiffies(2000))2424+2525+static const char * const driver_name = "mx25-gcq";2626+2727+enum mx25_gcq_cfgs {2828+ MX25_CFG_XP = 0,2929+ MX25_CFG_YP,3030+ MX25_CFG_XN,3131+ MX25_CFG_YN,3232+ MX25_CFG_WIPER,3333+ MX25_CFG_INAUX0,3434+ MX25_CFG_INAUX1,3535+ MX25_CFG_INAUX2,3636+ MX25_NUM_CFGS,3737+};3838+3939+struct mx25_gcq_priv {4040+ struct regmap *regs;4141+ struct completion completed;4242+ struct clk *clk;4343+ int irq;4444+ struct regulator *vref[4];4545+ u32 channel_vref_mv[MX25_NUM_CFGS];4646+};4747+4848+#define MX25_CQG_CHAN(chan, id) {\4949+ .type = IIO_VOLTAGE,\5050+ .indexed = 1,\5151+ .channel = chan,\5252+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \5353+ BIT(IIO_CHAN_INFO_SCALE),\5454+ .datasheet_name = id,\5555+}5656+5757+static const struct iio_chan_spec mx25_gcq_channels[MX25_NUM_CFGS] = {5858+ MX25_CQG_CHAN(MX25_CFG_XP, "xp"),5959+ MX25_CQG_CHAN(MX25_CFG_YP, "yp"),6060+ MX25_CQG_CHAN(MX25_CFG_XN, "xn"),6161+ MX25_CQG_CHAN(MX25_CFG_YN, "yn"),6262+ MX25_CQG_CHAN(MX25_CFG_WIPER, "wiper"),6363+ MX25_CQG_CHAN(MX25_CFG_INAUX0, "inaux0"),6464+ MX25_CQG_CHAN(MX25_CFG_INAUX1, "inaux1"),6565+ MX25_CQG_CHAN(MX25_CFG_INAUX2, "inaux2"),6666+};6767+6868+static const char * const mx25_gcq_refp_names[] = {6969+ [MX25_ADC_REFP_YP] = "yp",7070+ [MX25_ADC_REFP_XP] = "xp",7171+ [MX25_ADC_REFP_INT] = "int",7272+ [MX25_ADC_REFP_EXT] = "ext",7373+};7474+7575+static irqreturn_t mx25_gcq_irq(int irq, void *data)7676+{7777+ struct mx25_gcq_priv *priv = data;7878+ u32 stats;7979+8080+ regmap_read(priv->regs, MX25_ADCQ_SR, &stats);8181+8282+ if (stats & MX25_ADCQ_SR_EOQ) {8383+ regmap_update_bits(priv->regs, MX25_ADCQ_MR,8484+ MX25_ADCQ_MR_EOQ_IRQ, MX25_ADCQ_MR_EOQ_IRQ);8585+ complete(&priv->completed);8686+ }8787+8888+ /* Disable conversion queue run */8989+ regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS, 0);9090+9191+ /* Acknowledge all possible irqs */9292+ regmap_write(priv->regs, MX25_ADCQ_SR, MX25_ADCQ_SR_FRR |9393+ MX25_ADCQ_SR_FUR | MX25_ADCQ_SR_FOR |9494+ MX25_ADCQ_SR_EOQ | MX25_ADCQ_SR_PD);9595+9696+ return IRQ_HANDLED;9797+}9898+9999+static int mx25_gcq_get_raw_value(struct device *dev,100100+ struct iio_chan_spec const *chan,101101+ struct mx25_gcq_priv *priv,102102+ int *val)103103+{104104+ long timeout;105105+ u32 data;106106+107107+ /* Setup the configuration we want to use */108108+ regmap_write(priv->regs, MX25_ADCQ_ITEM_7_0,109109+ MX25_ADCQ_ITEM(0, chan->channel));110110+111111+ regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_EOQ_IRQ, 0);112112+113113+ /* Trigger queue for one run */114114+ regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS,115115+ MX25_ADCQ_CR_FQS);116116+117117+ timeout = wait_for_completion_interruptible_timeout(118118+ &priv->completed, MX25_GCQ_TIMEOUT);119119+ if (timeout < 0) {120120+ dev_err(dev, "ADC wait for measurement failed\n");121121+ return timeout;122122+ } else if (timeout == 0) {123123+ dev_err(dev, "ADC timed out\n");124124+ return -ETIMEDOUT;125125+ }126126+127127+ regmap_read(priv->regs, MX25_ADCQ_FIFO, &data);128128+129129+ *val = MX25_ADCQ_FIFO_DATA(data);130130+131131+ return IIO_VAL_INT;132132+}133133+134134+static int mx25_gcq_read_raw(struct iio_dev *indio_dev,135135+ struct iio_chan_spec const *chan, int *val,136136+ int *val2, long mask)137137+{138138+ struct mx25_gcq_priv *priv = iio_priv(indio_dev);139139+ int ret;140140+141141+ switch (mask) {142142+ case IIO_CHAN_INFO_RAW:143143+ mutex_lock(&indio_dev->mlock);144144+ ret = mx25_gcq_get_raw_value(&indio_dev->dev, chan, priv, val);145145+ mutex_unlock(&indio_dev->mlock);146146+ return ret;147147+148148+ case IIO_CHAN_INFO_SCALE:149149+ *val = priv->channel_vref_mv[chan->channel];150150+ *val2 = 12;151151+ return IIO_VAL_FRACTIONAL_LOG2;152152+153153+ default:154154+ return -EINVAL;155155+ }156156+}157157+158158+static const struct iio_info mx25_gcq_iio_info = {159159+ .read_raw = mx25_gcq_read_raw,160160+};161161+162162+static const struct regmap_config mx25_gcq_regconfig = {163163+ .max_register = 0x5c,164164+ .reg_bits = 32,165165+ .val_bits = 32,166166+ .reg_stride = 4,167167+};168168+169169+static int mx25_gcq_setup_cfgs(struct platform_device *pdev,170170+ struct mx25_gcq_priv *priv)171171+{172172+ struct device_node *np = pdev->dev.of_node;173173+ struct device_node *child;174174+ struct device *dev = &pdev->dev;175175+ unsigned int refp_used[4] = {};176176+ int ret, i;177177+178178+ /*179179+ * Setup all configurations registers with a default conversion180180+ * configuration for each input181181+ */182182+ for (i = 0; i < MX25_NUM_CFGS; ++i)183183+ regmap_write(priv->regs, MX25_ADCQ_CFG(i),184184+ MX25_ADCQ_CFG_YPLL_OFF |185185+ MX25_ADCQ_CFG_XNUR_OFF |186186+ MX25_ADCQ_CFG_XPUL_OFF |187187+ MX25_ADCQ_CFG_REFP_INT |188188+ MX25_ADCQ_CFG_IN(i) |189189+ MX25_ADCQ_CFG_REFN_NGND2);190190+191191+ /*192192+ * First get all regulators to store them in channel_vref_mv if193193+ * necessary. Later we use that information for proper IIO scale194194+ * information.195195+ */196196+ priv->vref[MX25_ADC_REFP_INT] = NULL;197197+ priv->vref[MX25_ADC_REFP_EXT] =198198+ devm_regulator_get_optional(&pdev->dev, "vref-ext");199199+ priv->vref[MX25_ADC_REFP_XP] =200200+ devm_regulator_get_optional(&pdev->dev, "vref-xp");201201+ priv->vref[MX25_ADC_REFP_YP] =202202+ devm_regulator_get_optional(&pdev->dev, "vref-yp");203203+204204+ for_each_child_of_node(np, child) {205205+ u32 reg;206206+ u32 refp = MX25_ADCQ_CFG_REFP_INT;207207+ u32 refn = MX25_ADCQ_CFG_REFN_NGND2;208208+209209+ ret = of_property_read_u32(child, "reg", ®);210210+ if (ret) {211211+ dev_err(dev, "Failed to get reg property\n");212212+ return ret;213213+ }214214+215215+ if (reg >= MX25_NUM_CFGS) {216216+ dev_err(dev,217217+ "reg value is greater than the number of available configuration registers\n");218218+ return -EINVAL;219219+ }220220+221221+ of_property_read_u32(child, "fsl,adc-refp", &refp);222222+ of_property_read_u32(child, "fsl,adc-refn", &refn);223223+224224+ switch (refp) {225225+ case MX25_ADC_REFP_EXT:226226+ case MX25_ADC_REFP_XP:227227+ case MX25_ADC_REFP_YP:228228+ if (IS_ERR(priv->vref[refp])) {229229+ dev_err(dev, "Error, trying to use external voltage reference without a vref-%s regulator.",230230+ mx25_gcq_refp_names[refp]);231231+ return PTR_ERR(priv->vref[refp]);232232+ }233233+ priv->channel_vref_mv[reg] =234234+ regulator_get_voltage(priv->vref[refp]);235235+ /* Conversion from uV to mV */236236+ priv->channel_vref_mv[reg] /= 1000;237237+ break;238238+ case MX25_ADC_REFP_INT:239239+ priv->channel_vref_mv[reg] = 2500;240240+ break;241241+ default:242242+ dev_err(dev, "Invalid positive reference %d\n", refp);243243+ return -EINVAL;244244+ }245245+246246+ ++refp_used[refp];247247+248248+ /*249249+ * Shift the read values to the correct positions within the250250+ * register.251251+ */252252+ refp = MX25_ADCQ_CFG_REFP(refp);253253+ refn = MX25_ADCQ_CFG_REFN(refn);254254+255255+ if ((refp & MX25_ADCQ_CFG_REFP_MASK) != refp) {256256+ dev_err(dev, "Invalid fsl,adc-refp property value\n");257257+ return -EINVAL;258258+ }259259+ if ((refn & MX25_ADCQ_CFG_REFN_MASK) != refn) {260260+ dev_err(dev, "Invalid fsl,adc-refn property value\n");261261+ return -EINVAL;262262+ }263263+264264+ regmap_update_bits(priv->regs, MX25_ADCQ_CFG(reg),265265+ MX25_ADCQ_CFG_REFP_MASK |266266+ MX25_ADCQ_CFG_REFN_MASK,267267+ refp | refn);268268+ }269269+ regmap_update_bits(priv->regs, MX25_ADCQ_CR,270270+ MX25_ADCQ_CR_FRST | MX25_ADCQ_CR_QRST,271271+ MX25_ADCQ_CR_FRST | MX25_ADCQ_CR_QRST);272272+273273+ regmap_write(priv->regs, MX25_ADCQ_CR,274274+ MX25_ADCQ_CR_PDMSK | MX25_ADCQ_CR_QSM_FQS);275275+276276+ /* Remove unused regulators */277277+ for (i = 0; i != 4; ++i) {278278+ if (!refp_used[i]) {279279+ if (!IS_ERR_OR_NULL(priv->vref[i]))280280+ devm_regulator_put(priv->vref[i]);281281+ priv->vref[i] = NULL;282282+ }283283+ }284284+285285+ return 0;286286+}287287+288288+static int mx25_gcq_probe(struct platform_device *pdev)289289+{290290+ struct iio_dev *indio_dev;291291+ struct mx25_gcq_priv *priv;292292+ struct mx25_tsadc *tsadc = dev_get_drvdata(pdev->dev.parent);293293+ struct device *dev = &pdev->dev;294294+ struct resource *res;295295+ void __iomem *mem;296296+ int ret;297297+ int i;298298+299299+ indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*priv));300300+ if (!indio_dev)301301+ return -ENOMEM;302302+303303+ priv = iio_priv(indio_dev);304304+305305+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);306306+ mem = devm_ioremap_resource(dev, res);307307+ if (IS_ERR(mem))308308+ return PTR_ERR(mem);309309+310310+ priv->regs = devm_regmap_init_mmio(dev, mem, &mx25_gcq_regconfig);311311+ if (IS_ERR(priv->regs)) {312312+ dev_err(dev, "Failed to initialize regmap\n");313313+ return PTR_ERR(priv->regs);314314+ }315315+316316+ init_completion(&priv->completed);317317+318318+ ret = mx25_gcq_setup_cfgs(pdev, priv);319319+ if (ret)320320+ return ret;321321+322322+ for (i = 0; i != 4; ++i) {323323+ if (!priv->vref[i])324324+ continue;325325+326326+ ret = regulator_enable(priv->vref[i]);327327+ if (ret)328328+ goto err_regulator_disable;329329+ }330330+331331+ priv->clk = tsadc->clk;332332+ ret = clk_prepare_enable(priv->clk);333333+ if (ret) {334334+ dev_err(dev, "Failed to enable clock\n");335335+ goto err_vref_disable;336336+ }337337+338338+ priv->irq = platform_get_irq(pdev, 0);339339+ if (priv->irq <= 0) {340340+ dev_err(dev, "Failed to get IRQ\n");341341+ ret = priv->irq;342342+ if (!ret)343343+ ret = -ENXIO;344344+ goto err_clk_unprepare;345345+ }346346+347347+ ret = request_irq(priv->irq, mx25_gcq_irq, 0, pdev->name, priv);348348+ if (ret) {349349+ dev_err(dev, "Failed requesting IRQ\n");350350+ goto err_clk_unprepare;351351+ }352352+353353+ indio_dev->dev.parent = &pdev->dev;354354+ indio_dev->channels = mx25_gcq_channels;355355+ indio_dev->num_channels = ARRAY_SIZE(mx25_gcq_channels);356356+ indio_dev->info = &mx25_gcq_iio_info;357357+ indio_dev->name = driver_name;358358+359359+ ret = iio_device_register(indio_dev);360360+ if (ret) {361361+ dev_err(dev, "Failed to register iio device\n");362362+ goto err_irq_free;363363+ }364364+365365+ platform_set_drvdata(pdev, indio_dev);366366+367367+ return 0;368368+369369+err_irq_free:370370+ free_irq(priv->irq, priv);371371+err_clk_unprepare:372372+ clk_disable_unprepare(priv->clk);373373+err_vref_disable:374374+ i = 4;375375+err_regulator_disable:376376+ for (; i-- > 0;) {377377+ if (priv->vref[i])378378+ regulator_disable(priv->vref[i]);379379+ }380380+ return ret;381381+}382382+383383+static int mx25_gcq_remove(struct platform_device *pdev)384384+{385385+ struct iio_dev *indio_dev = platform_get_drvdata(pdev);386386+ struct mx25_gcq_priv *priv = iio_priv(indio_dev);387387+ int i;388388+389389+ iio_device_unregister(indio_dev);390390+ free_irq(priv->irq, priv);391391+ clk_disable_unprepare(priv->clk);392392+ for (i = 4; i-- > 0;) {393393+ if (priv->vref[i])394394+ regulator_disable(priv->vref[i]);395395+ }396396+397397+ return 0;398398+}399399+400400+static const struct of_device_id mx25_gcq_ids[] = {401401+ { .compatible = "fsl,imx25-gcq", },402402+ { /* Sentinel */ }403403+};404404+405405+static struct platform_driver mx25_gcq_driver = {406406+ .driver = {407407+ .name = "mx25-gcq",408408+ .of_match_table = mx25_gcq_ids,409409+ },410410+ .probe = mx25_gcq_probe,411411+ .remove = mx25_gcq_remove,412412+};413413+module_platform_driver(mx25_gcq_driver);414414+415415+MODULE_DESCRIPTION("ADC driver for Freescale mx25");416416+MODULE_AUTHOR("Markus Pargmann <mpa@pengutronix.de>");417417+MODULE_LICENSE("GPL v2");
+9
drivers/input/touchscreen/Kconfig
···822822 To compile this driver as a module, choose M here: the823823 module will be called usbtouchscreen.824824825825+config TOUCHSCREEN_MX25826826+ tristate "Freescale i.MX25 touchscreen input driver"827827+ depends on MFD_MX25_TSADC828828+ help829829+ Enable support for touchscreen connected to your i.MX25.830830+831831+ To compile this driver as a module, choose M here: the832832+ module will be called fsl-imx25-tcq.833833+825834config TOUCHSCREEN_MC13783826835 tristate "Freescale MC13783 touchscreen input driver"827836 depends on MFD_MC13XXX
···11+/*22+ * Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de>33+ *44+ * This program is free software; you can redistribute it and/or modify it under55+ * the terms of the GNU General Public License version 2 as published by the66+ * Free Software Foundation.77+ *88+ * Based on driver from 2011:99+ * Juergen Beisert, Pengutronix <kernel@pengutronix.de>1010+ *1111+ * This is the driver for the imx25 TCQ (Touchscreen Conversion Queue)1212+ * connected to the imx25 ADC.1313+ */1414+1515+#include <linux/clk.h>1616+#include <linux/device.h>1717+#include <linux/input.h>1818+#include <linux/interrupt.h>1919+#include <linux/mfd/imx25-tsadc.h>2020+#include <linux/module.h>2121+#include <linux/of.h>2222+#include <linux/platform_device.h>2323+#include <linux/regmap.h>2424+2525+static const char mx25_tcq_name[] = "mx25-tcq";2626+2727+enum mx25_tcq_mode {2828+ MX25_TS_4WIRE,2929+};3030+3131+struct mx25_tcq_priv {3232+ struct regmap *regs;3333+ struct regmap *core_regs;3434+ struct input_dev *idev;3535+ enum mx25_tcq_mode mode;3636+ unsigned int pen_threshold;3737+ unsigned int sample_count;3838+ unsigned int expected_samples;3939+ unsigned int pen_debounce;4040+ unsigned int settling_time;4141+ struct clk *clk;4242+ int irq;4343+ struct device *dev;4444+};4545+4646+static struct regmap_config mx25_tcq_regconfig = {4747+ .fast_io = true,4848+ .max_register = 0x5c,4949+ .reg_bits = 32,5050+ .val_bits = 32,5151+ .reg_stride = 4,5252+};5353+5454+static const struct of_device_id mx25_tcq_ids[] = {5555+ { .compatible = "fsl,imx25-tcq", },5656+ { /* Sentinel */ }5757+};5858+5959+#define TSC_4WIRE_PRE_INDEX 06060+#define TSC_4WIRE_X_INDEX 16161+#define TSC_4WIRE_Y_INDEX 26262+#define TSC_4WIRE_POST_INDEX 36363+#define TSC_4WIRE_LEAVE 46464+6565+#define MX25_TSC_DEF_THRESHOLD 806666+#define TSC_MAX_SAMPLES 166767+6868+#define MX25_TSC_REPEAT_WAIT 146969+7070+enum mx25_adc_configurations {7171+ MX25_CFG_PRECHARGE = 0,7272+ MX25_CFG_TOUCH_DETECT,7373+ MX25_CFG_X_MEASUREMENT,7474+ MX25_CFG_Y_MEASUREMENT,7575+};7676+7777+#define MX25_PRECHARGE_VALUE (\7878+ MX25_ADCQ_CFG_YPLL_OFF | \7979+ MX25_ADCQ_CFG_XNUR_OFF | \8080+ MX25_ADCQ_CFG_XPUL_HIGH | \8181+ MX25_ADCQ_CFG_REFP_INT | \8282+ MX25_ADCQ_CFG_IN_XP | \8383+ MX25_ADCQ_CFG_REFN_NGND2 | \8484+ MX25_ADCQ_CFG_IGS)8585+8686+#define MX25_TOUCH_DETECT_VALUE (\8787+ MX25_ADCQ_CFG_YNLR | \8888+ MX25_ADCQ_CFG_YPLL_OFF | \8989+ MX25_ADCQ_CFG_XNUR_OFF | \9090+ MX25_ADCQ_CFG_XPUL_OFF | \9191+ MX25_ADCQ_CFG_REFP_INT | \9292+ MX25_ADCQ_CFG_IN_XP | \9393+ MX25_ADCQ_CFG_REFN_NGND2 | \9494+ MX25_ADCQ_CFG_PENIACK)9595+9696+static void imx25_setup_queue_cfgs(struct mx25_tcq_priv *priv,9797+ unsigned int settling_cnt)9898+{9999+ u32 precharge_cfg =100100+ MX25_PRECHARGE_VALUE |101101+ MX25_ADCQ_CFG_SETTLING_TIME(settling_cnt);102102+ u32 touch_detect_cfg =103103+ MX25_TOUCH_DETECT_VALUE |104104+ MX25_ADCQ_CFG_NOS(1) |105105+ MX25_ADCQ_CFG_SETTLING_TIME(settling_cnt);106106+107107+ regmap_write(priv->core_regs, MX25_TSC_TICR, precharge_cfg);108108+109109+ /* PRECHARGE */110110+ regmap_write(priv->regs, MX25_ADCQ_CFG(MX25_CFG_PRECHARGE),111111+ precharge_cfg);112112+113113+ /* TOUCH_DETECT */114114+ regmap_write(priv->regs, MX25_ADCQ_CFG(MX25_CFG_TOUCH_DETECT),115115+ touch_detect_cfg);116116+117117+ /* X Measurement */118118+ regmap_write(priv->regs, MX25_ADCQ_CFG(MX25_CFG_X_MEASUREMENT),119119+ MX25_ADCQ_CFG_YPLL_OFF |120120+ MX25_ADCQ_CFG_XNUR_LOW |121121+ MX25_ADCQ_CFG_XPUL_HIGH |122122+ MX25_ADCQ_CFG_REFP_XP |123123+ MX25_ADCQ_CFG_IN_YP |124124+ MX25_ADCQ_CFG_REFN_XN |125125+ MX25_ADCQ_CFG_NOS(priv->sample_count) |126126+ MX25_ADCQ_CFG_SETTLING_TIME(settling_cnt));127127+128128+ /* Y Measurement */129129+ regmap_write(priv->regs, MX25_ADCQ_CFG(MX25_CFG_Y_MEASUREMENT),130130+ MX25_ADCQ_CFG_YNLR |131131+ MX25_ADCQ_CFG_YPLL_HIGH |132132+ MX25_ADCQ_CFG_XNUR_OFF |133133+ MX25_ADCQ_CFG_XPUL_OFF |134134+ MX25_ADCQ_CFG_REFP_YP |135135+ MX25_ADCQ_CFG_IN_XP |136136+ MX25_ADCQ_CFG_REFN_YN |137137+ MX25_ADCQ_CFG_NOS(priv->sample_count) |138138+ MX25_ADCQ_CFG_SETTLING_TIME(settling_cnt));139139+140140+ /* Enable the touch detection right now */141141+ regmap_write(priv->core_regs, MX25_TSC_TICR, touch_detect_cfg |142142+ MX25_ADCQ_CFG_IGS);143143+}144144+145145+static int imx25_setup_queue_4wire(struct mx25_tcq_priv *priv,146146+ unsigned settling_cnt, int *items)147147+{148148+ imx25_setup_queue_cfgs(priv, settling_cnt);149149+150150+ /* Setup the conversion queue */151151+ regmap_write(priv->regs, MX25_ADCQ_ITEM_7_0,152152+ MX25_ADCQ_ITEM(0, MX25_CFG_PRECHARGE) |153153+ MX25_ADCQ_ITEM(1, MX25_CFG_TOUCH_DETECT) |154154+ MX25_ADCQ_ITEM(2, MX25_CFG_X_MEASUREMENT) |155155+ MX25_ADCQ_ITEM(3, MX25_CFG_Y_MEASUREMENT) |156156+ MX25_ADCQ_ITEM(4, MX25_CFG_PRECHARGE) |157157+ MX25_ADCQ_ITEM(5, MX25_CFG_TOUCH_DETECT));158158+159159+ /*160160+ * We measure X/Y with 'sample_count' number of samples and execute a161161+ * touch detection twice, with 1 sample each162162+ */163163+ priv->expected_samples = priv->sample_count * 2 + 2;164164+ *items = 6;165165+166166+ return 0;167167+}168168+169169+static void mx25_tcq_disable_touch_irq(struct mx25_tcq_priv *priv)170170+{171171+ regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_PDMSK,172172+ MX25_ADCQ_CR_PDMSK);173173+}174174+175175+static void mx25_tcq_enable_touch_irq(struct mx25_tcq_priv *priv)176176+{177177+ regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_PDMSK, 0);178178+}179179+180180+static void mx25_tcq_disable_fifo_irq(struct mx25_tcq_priv *priv)181181+{182182+ regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_FDRY_IRQ,183183+ MX25_ADCQ_MR_FDRY_IRQ);184184+}185185+186186+static void mx25_tcq_enable_fifo_irq(struct mx25_tcq_priv *priv)187187+{188188+ regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_FDRY_IRQ, 0);189189+}190190+191191+static void mx25_tcq_force_queue_start(struct mx25_tcq_priv *priv)192192+{193193+ regmap_update_bits(priv->regs, MX25_ADCQ_CR,194194+ MX25_ADCQ_CR_FQS,195195+ MX25_ADCQ_CR_FQS);196196+}197197+198198+static void mx25_tcq_force_queue_stop(struct mx25_tcq_priv *priv)199199+{200200+ regmap_update_bits(priv->regs, MX25_ADCQ_CR,201201+ MX25_ADCQ_CR_FQS, 0);202202+}203203+204204+static void mx25_tcq_fifo_reset(struct mx25_tcq_priv *priv)205205+{206206+ u32 tcqcr;207207+208208+ regmap_read(priv->regs, MX25_ADCQ_CR, &tcqcr);209209+ regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FRST,210210+ MX25_ADCQ_CR_FRST);211211+ regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FRST, 0);212212+ regmap_write(priv->regs, MX25_ADCQ_CR, tcqcr);213213+}214214+215215+static void mx25_tcq_re_enable_touch_detection(struct mx25_tcq_priv *priv)216216+{217217+ /* stop the queue from looping */218218+ mx25_tcq_force_queue_stop(priv);219219+220220+ /* for a clean touch detection, preload the X plane */221221+ regmap_write(priv->core_regs, MX25_TSC_TICR, MX25_PRECHARGE_VALUE);222222+223223+ /* waste some time now to pre-load the X plate to high voltage */224224+ mx25_tcq_fifo_reset(priv);225225+226226+ /* re-enable the detection right now */227227+ regmap_write(priv->core_regs, MX25_TSC_TICR,228228+ MX25_TOUCH_DETECT_VALUE | MX25_ADCQ_CFG_IGS);229229+230230+ regmap_update_bits(priv->regs, MX25_ADCQ_SR, MX25_ADCQ_SR_PD,231231+ MX25_ADCQ_SR_PD);232232+233233+ /* enable the pen down event to be a source for the interrupt */234234+ regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_PD_IRQ, 0);235235+236236+ /* lets fire the next IRQ if someone touches the touchscreen */237237+ mx25_tcq_enable_touch_irq(priv);238238+}239239+240240+static void mx25_tcq_create_event_for_4wire(struct mx25_tcq_priv *priv,241241+ u32 *sample_buf,242242+ unsigned int samples)243243+{244244+ unsigned int x_pos = 0;245245+ unsigned int y_pos = 0;246246+ unsigned int touch_pre = 0;247247+ unsigned int touch_post = 0;248248+ unsigned int i;249249+250250+ for (i = 0; i < samples; i++) {251251+ unsigned int index = MX25_ADCQ_FIFO_ID(sample_buf[i]);252252+ unsigned int val = MX25_ADCQ_FIFO_DATA(sample_buf[i]);253253+254254+ switch (index) {255255+ case 1:256256+ touch_pre = val;257257+ break;258258+ case 2:259259+ x_pos = val;260260+ break;261261+ case 3:262262+ y_pos = val;263263+ break;264264+ case 5:265265+ touch_post = val;266266+ break;267267+ default:268268+ dev_dbg(priv->dev, "Dropped samples because of invalid index %d\n",269269+ index);270270+ return;271271+ }272272+ }273273+274274+ if (samples != 0) {275275+ /*276276+ * only if both touch measures are below a threshold,277277+ * the position is valid278278+ */279279+ if (touch_pre < priv->pen_threshold &&280280+ touch_post < priv->pen_threshold) {281281+ /* valid samples, generate a report */282282+ x_pos /= priv->sample_count;283283+ y_pos /= priv->sample_count;284284+ input_report_abs(priv->idev, ABS_X, x_pos);285285+ input_report_abs(priv->idev, ABS_Y, y_pos);286286+ input_report_key(priv->idev, BTN_TOUCH, 1);287287+ input_sync(priv->idev);288288+289289+ /* get next sample */290290+ mx25_tcq_enable_fifo_irq(priv);291291+ } else if (touch_pre >= priv->pen_threshold &&292292+ touch_post >= priv->pen_threshold) {293293+ /*294294+ * if both samples are invalid,295295+ * generate a release report296296+ */297297+ input_report_key(priv->idev, BTN_TOUCH, 0);298298+ input_sync(priv->idev);299299+ mx25_tcq_re_enable_touch_detection(priv);300300+ } else {301301+ /*302302+ * if only one of both touch measurements are303303+ * below the threshold, still some bouncing304304+ * happens. Take additional samples in this305305+ * case to be sure306306+ */307307+ mx25_tcq_enable_fifo_irq(priv);308308+ }309309+ }310310+}311311+312312+static irqreturn_t mx25_tcq_irq_thread(int irq, void *dev_id)313313+{314314+ struct mx25_tcq_priv *priv = dev_id;315315+ u32 sample_buf[TSC_MAX_SAMPLES];316316+ unsigned int samples;317317+ u32 stats;318318+ unsigned int i;319319+320320+ /*321321+ * Check how many samples are available. We always have to read exactly322322+ * sample_count samples from the fifo, or a multiple of sample_count.323323+ * Otherwise we mixup samples into different touch events.324324+ */325325+ regmap_read(priv->regs, MX25_ADCQ_SR, &stats);326326+ samples = MX25_ADCQ_SR_FDN(stats);327327+ samples -= samples % priv->sample_count;328328+329329+ if (!samples)330330+ return IRQ_HANDLED;331331+332332+ for (i = 0; i != samples; ++i)333333+ regmap_read(priv->regs, MX25_ADCQ_FIFO, &sample_buf[i]);334334+335335+ mx25_tcq_create_event_for_4wire(priv, sample_buf, samples);336336+337337+ return IRQ_HANDLED;338338+}339339+340340+static irqreturn_t mx25_tcq_irq(int irq, void *dev_id)341341+{342342+ struct mx25_tcq_priv *priv = dev_id;343343+ u32 stat;344344+ int ret = IRQ_HANDLED;345345+346346+ regmap_read(priv->regs, MX25_ADCQ_SR, &stat);347347+348348+ if (stat & (MX25_ADCQ_SR_FRR | MX25_ADCQ_SR_FUR | MX25_ADCQ_SR_FOR))349349+ mx25_tcq_re_enable_touch_detection(priv);350350+351351+ if (stat & MX25_ADCQ_SR_PD) {352352+ mx25_tcq_disable_touch_irq(priv);353353+ mx25_tcq_force_queue_start(priv);354354+ mx25_tcq_enable_fifo_irq(priv);355355+ }356356+357357+ if (stat & MX25_ADCQ_SR_FDRY) {358358+ mx25_tcq_disable_fifo_irq(priv);359359+ ret = IRQ_WAKE_THREAD;360360+ }361361+362362+ regmap_update_bits(priv->regs, MX25_ADCQ_SR, MX25_ADCQ_SR_FRR |363363+ MX25_ADCQ_SR_FUR | MX25_ADCQ_SR_FOR |364364+ MX25_ADCQ_SR_PD,365365+ MX25_ADCQ_SR_FRR | MX25_ADCQ_SR_FUR |366366+ MX25_ADCQ_SR_FOR | MX25_ADCQ_SR_PD);367367+368368+ return ret;369369+}370370+371371+/* configure the state machine for a 4-wire touchscreen */372372+static int mx25_tcq_init(struct mx25_tcq_priv *priv)373373+{374374+ u32 tgcr;375375+ unsigned int ipg_div;376376+ unsigned int adc_period;377377+ unsigned int debounce_cnt;378378+ unsigned int settling_cnt;379379+ int itemct;380380+ int error;381381+382382+ regmap_read(priv->core_regs, MX25_TSC_TGCR, &tgcr);383383+ ipg_div = max_t(unsigned int, 4, MX25_TGCR_GET_ADCCLK(tgcr));384384+ adc_period = USEC_PER_SEC * ipg_div * 2 + 2;385385+ adc_period /= clk_get_rate(priv->clk) / 1000 + 1;386386+ debounce_cnt = DIV_ROUND_UP(priv->pen_debounce, adc_period * 8) - 1;387387+ settling_cnt = DIV_ROUND_UP(priv->settling_time, adc_period * 8) - 1;388388+389389+ /* Reset */390390+ regmap_write(priv->regs, MX25_ADCQ_CR,391391+ MX25_ADCQ_CR_QRST | MX25_ADCQ_CR_FRST);392392+ regmap_update_bits(priv->regs, MX25_ADCQ_CR,393393+ MX25_ADCQ_CR_QRST | MX25_ADCQ_CR_FRST, 0);394394+395395+ /* up to 128 * 8 ADC clocks are possible */396396+ if (debounce_cnt > 127)397397+ debounce_cnt = 127;398398+399399+ /* up to 255 * 8 ADC clocks are possible */400400+ if (settling_cnt > 255)401401+ settling_cnt = 255;402402+403403+ error = imx25_setup_queue_4wire(priv, settling_cnt, &itemct);404404+ if (error)405405+ return error;406406+407407+ regmap_update_bits(priv->regs, MX25_ADCQ_CR,408408+ MX25_ADCQ_CR_LITEMID_MASK | MX25_ADCQ_CR_WMRK_MASK,409409+ MX25_ADCQ_CR_LITEMID(itemct - 1) |410410+ MX25_ADCQ_CR_WMRK(priv->expected_samples - 1));411411+412412+ /* setup debounce count */413413+ regmap_update_bits(priv->core_regs, MX25_TSC_TGCR,414414+ MX25_TGCR_PDBTIME_MASK,415415+ MX25_TGCR_PDBTIME(debounce_cnt));416416+417417+ /* enable debounce */418418+ regmap_update_bits(priv->core_regs, MX25_TSC_TGCR, MX25_TGCR_PDBEN,419419+ MX25_TGCR_PDBEN);420420+ regmap_update_bits(priv->core_regs, MX25_TSC_TGCR, MX25_TGCR_PDEN,421421+ MX25_TGCR_PDEN);422422+423423+ /* enable the engine on demand */424424+ regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_QSM_MASK,425425+ MX25_ADCQ_CR_QSM_FQS);426426+427427+ /* Enable repeat and repeat wait */428428+ regmap_update_bits(priv->regs, MX25_ADCQ_CR,429429+ MX25_ADCQ_CR_RPT | MX25_ADCQ_CR_RWAIT_MASK,430430+ MX25_ADCQ_CR_RPT |431431+ MX25_ADCQ_CR_RWAIT(MX25_TSC_REPEAT_WAIT));432432+433433+ return 0;434434+}435435+436436+static int mx25_tcq_parse_dt(struct platform_device *pdev,437437+ struct mx25_tcq_priv *priv)438438+{439439+ struct device_node *np = pdev->dev.of_node;440440+ u32 wires;441441+ int error;442442+443443+ /* Setup defaults */444444+ priv->pen_threshold = 500;445445+ priv->sample_count = 3;446446+ priv->pen_debounce = 1000000;447447+ priv->settling_time = 250000;448448+449449+ error = of_property_read_u32(np, "fsl,wires", &wires);450450+ if (error) {451451+ dev_err(&pdev->dev, "Failed to find fsl,wires properties\n");452452+ return error;453453+ }454454+455455+ if (wires == 4) {456456+ priv->mode = MX25_TS_4WIRE;457457+ } else {458458+ dev_err(&pdev->dev, "%u-wire mode not supported\n", wires);459459+ return -EINVAL;460460+ }461461+462462+ /* These are optional, we don't care about the return values */463463+ of_property_read_u32(np, "fsl,pen-threshold", &priv->pen_threshold);464464+ of_property_read_u32(np, "fsl,settling-time-ns", &priv->settling_time);465465+ of_property_read_u32(np, "fsl,pen-debounce-ns", &priv->pen_debounce);466466+467467+ return 0;468468+}469469+470470+static int mx25_tcq_open(struct input_dev *idev)471471+{472472+ struct device *dev = &idev->dev;473473+ struct mx25_tcq_priv *priv = dev_get_drvdata(dev);474474+ int error;475475+476476+ error = clk_prepare_enable(priv->clk);477477+ if (error) {478478+ dev_err(dev, "Failed to enable ipg clock\n");479479+ return error;480480+ }481481+482482+ error = mx25_tcq_init(priv);483483+ if (error) {484484+ dev_err(dev, "Failed to init tcq\n");485485+ clk_disable_unprepare(priv->clk);486486+ return error;487487+ }488488+489489+ mx25_tcq_re_enable_touch_detection(priv);490490+491491+ return 0;492492+}493493+494494+static void mx25_tcq_close(struct input_dev *idev)495495+{496496+ struct mx25_tcq_priv *priv = input_get_drvdata(idev);497497+498498+ mx25_tcq_force_queue_stop(priv);499499+ mx25_tcq_disable_touch_irq(priv);500500+ mx25_tcq_disable_fifo_irq(priv);501501+ clk_disable_unprepare(priv->clk);502502+}503503+504504+static int mx25_tcq_probe(struct platform_device *pdev)505505+{506506+ struct device *dev = &pdev->dev;507507+ struct input_dev *idev;508508+ struct mx25_tcq_priv *priv;509509+ struct mx25_tsadc *tsadc = dev_get_drvdata(pdev->dev.parent);510510+ struct resource *res;511511+ void __iomem *mem;512512+ int error;513513+514514+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);515515+ if (!priv)516516+ return -ENOMEM;517517+ priv->dev = dev;518518+519519+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);520520+ mem = devm_ioremap_resource(dev, res);521521+ if (IS_ERR(mem))522522+ return PTR_ERR(mem);523523+524524+ error = mx25_tcq_parse_dt(pdev, priv);525525+ if (error)526526+ return error;527527+528528+ priv->regs = devm_regmap_init_mmio(dev, mem, &mx25_tcq_regconfig);529529+ if (IS_ERR(priv->regs)) {530530+ dev_err(dev, "Failed to initialize regmap\n");531531+ return PTR_ERR(priv->regs);532532+ }533533+534534+ priv->irq = platform_get_irq(pdev, 0);535535+ if (priv->irq <= 0) {536536+ dev_err(dev, "Failed to get IRQ\n");537537+ return priv->irq;538538+ }539539+540540+ idev = devm_input_allocate_device(dev);541541+ if (!idev) {542542+ dev_err(dev, "Failed to allocate input device\n");543543+ return -ENOMEM;544544+ }545545+546546+ idev->name = mx25_tcq_name;547547+ input_set_capability(idev, EV_KEY, BTN_TOUCH);548548+ input_set_abs_params(idev, ABS_X, 0, 0xfff, 0, 0);549549+ input_set_abs_params(idev, ABS_Y, 0, 0xfff, 0, 0);550550+551551+ idev->id.bustype = BUS_HOST;552552+ idev->open = mx25_tcq_open;553553+ idev->close = mx25_tcq_close;554554+555555+ priv->idev = idev;556556+ input_set_drvdata(idev, priv);557557+558558+ priv->core_regs = tsadc->regs;559559+ if (!priv->core_regs)560560+ return -EINVAL;561561+562562+ priv->clk = tsadc->clk;563563+ if (!priv->clk)564564+ return -EINVAL;565565+566566+ platform_set_drvdata(pdev, priv);567567+568568+ error = devm_request_threaded_irq(dev, priv->irq, mx25_tcq_irq,569569+ mx25_tcq_irq_thread, 0, pdev->name,570570+ priv);571571+ if (error) {572572+ dev_err(dev, "Failed requesting IRQ\n");573573+ return error;574574+ }575575+576576+ error = input_register_device(idev);577577+ if (error) {578578+ dev_err(dev, "Failed to register input device\n");579579+ return error;580580+ }581581+582582+ return 0;583583+}584584+585585+static struct platform_driver mx25_tcq_driver = {586586+ .driver = {587587+ .name = "mx25-tcq",588588+ .of_match_table = mx25_tcq_ids,589589+ },590590+ .probe = mx25_tcq_probe,591591+};592592+module_platform_driver(mx25_tcq_driver);593593+594594+MODULE_DESCRIPTION("TS input driver for Freescale mx25");595595+MODULE_AUTHOR("Markus Pargmann <mpa@pengutronix.de>");596596+MODULE_LICENSE("GPL v2");
+38-16
drivers/mfd/Kconfig
···9191 Support for the BCM590xx PMUs from Broadcom92929393config MFD_AXP20X9494- bool "X-Powers AXP20X"9494+ tristate9595 select MFD_CORE9696- select REGMAP_I2C9796 select REGMAP_IRQ9898- depends on I2C=y9797+9898+config MFD_AXP20X_I2C9999+ tristate "X-Powers AXP series PMICs with I2C"100100+ select MFD_AXP20X101101+ select REGMAP_I2C102102+ depends on I2C99103 help100100- If you say Y here you get support for the X-Powers AXP202, AXP209 and101101- AXP288 power management IC (PMIC).104104+ If you say Y here you get support for the X-Powers AXP series power105105+ management ICs (PMICs) controlled with I2C.106106+ This driver include only the core APIs. You have to select individual107107+ components like regulators or the PEK (Power Enable Key) under the108108+ corresponding menus.109109+110110+config MFD_AXP20X_RSB111111+ tristate "X-Powers AXP series PMICs with RSB"112112+ select MFD_AXP20X113113+ depends on SUNXI_RSB114114+ help115115+ If you say Y here you get support for the X-Powers AXP series power116116+ management ICs (PMICs) controlled with RSB.102117 This driver include only the core APIs. You have to select individual103118 components like regulators or the PEK (Power Enable Key) under the104119 corresponding menus.···285270 select MFD_MC13XXX286271 help287272 Select this if your MC13xxx is connected via an I2C bus.273273+274274+config MFD_MX25_TSADC275275+ tristate "Freescale i.MX25 integrated Touchscreen and ADC unit"276276+ select REGMAP_MMIO277277+ depends on (SOC_IMX25 && OF) || COMPILE_TEST278278+ help279279+ Enable support for the integrated Touchscreen and ADC unit of the280280+ i.MX25 processors. They consist of a conversion queue for general281281+ purpose ADC and a queue for Touchscreens.288282289283config MFD_HI6421_PMIC290284 tristate "HiSilicon Hi6421 PMU/Codec IC"···12051181 Power Management chips.1206118212071183config MFD_TPS6591212081208- bool "TI TPS65912 Power Management chip"12091209- depends on GPIOLIB11841184+ tristate12101185 select MFD_CORE12111211- help12121212- If you say yes here you get support for the TPS65912 series of12131213- PM chips.11861186+ select REGMAP11871187+ select REGMAP_IRQ1214118812151189config MFD_TPS65912_I2C12161216- bool "TI TPS65912 Power Management chip with I2C"12171217- select MFD_CORE11901190+ tristate "TI TPS65912 Power Management chip with I2C"12181191 select MFD_TPS6591212191219- depends on I2C=y && GPIOLIB11921192+ select REGMAP_I2C11931193+ depends on I2C12201194 help12211195 If you say yes here you get support for the TPS65912 series of12221196 PM chips with I2C interface.1223119712241198config MFD_TPS65912_SPI12251225- bool "TI TPS65912 Power Management chip with SPI"12261226- select MFD_CORE11991199+ tristate "TI TPS65912 Power Management chip with SPI"12271200 select MFD_TPS6591212281228- depends on SPI_MASTER && GPIOLIB12011201+ select REGMAP_SPI12021202+ depends on SPI_MASTER12291203 help12301204 If you say yes here you get support for the TPS65912 series of12311205 PM chips with SPI interface.
···11+/*22+ * I2C driver for the X-Powers' Power Management ICs33+ *44+ * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC55+ * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature66+ * as well as configurable GPIOs.77+ *88+ * This driver supports the I2C variants.99+ *1010+ * Copyright (C) 2014 Carlo Caione1111+ *1212+ * Author: Carlo Caione <carlo@caione.org>1313+ *1414+ * This program is free software; you can redistribute it and/or modify1515+ * it under the terms of the GNU General Public License version 2 as1616+ * published by the Free Software Foundation.1717+ */1818+1919+#include <linux/acpi.h>2020+#include <linux/err.h>2121+#include <linux/i2c.h>2222+#include <linux/module.h>2323+#include <linux/mfd/axp20x.h>2424+#include <linux/of.h>2525+#include <linux/regmap.h>2626+#include <linux/slab.h>2727+2828+static int axp20x_i2c_probe(struct i2c_client *i2c,2929+ const struct i2c_device_id *id)3030+{3131+ struct axp20x_dev *axp20x;3232+ int ret;3333+3434+ axp20x = devm_kzalloc(&i2c->dev, sizeof(*axp20x), GFP_KERNEL);3535+ if (!axp20x)3636+ return -ENOMEM;3737+3838+ axp20x->dev = &i2c->dev;3939+ axp20x->irq = i2c->irq;4040+ dev_set_drvdata(axp20x->dev, axp20x);4141+4242+ ret = axp20x_match_device(axp20x);4343+ if (ret)4444+ return ret;4545+4646+ axp20x->regmap = devm_regmap_init_i2c(i2c, axp20x->regmap_cfg);4747+ if (IS_ERR(axp20x->regmap)) {4848+ ret = PTR_ERR(axp20x->regmap);4949+ dev_err(&i2c->dev, "regmap init failed: %d\n", ret);5050+ return ret;5151+ }5252+5353+ return axp20x_device_probe(axp20x);5454+}5555+5656+static int axp20x_i2c_remove(struct i2c_client *i2c)5757+{5858+ struct axp20x_dev *axp20x = i2c_get_clientdata(i2c);5959+6060+ return axp20x_device_remove(axp20x);6161+}6262+6363+static const struct of_device_id axp20x_i2c_of_match[] = {6464+ { .compatible = "x-powers,axp152", .data = (void *)AXP152_ID },6565+ { .compatible = "x-powers,axp202", .data = (void *)AXP202_ID },6666+ { .compatible = "x-powers,axp209", .data = (void *)AXP209_ID },6767+ { .compatible = "x-powers,axp221", .data = (void *)AXP221_ID },6868+ { },6969+};7070+MODULE_DEVICE_TABLE(of, axp20x_i2c_of_match);7171+7272+/*7373+ * This is useless for OF-enabled devices, but it is needed by I2C subsystem7474+ */7575+static const struct i2c_device_id axp20x_i2c_id[] = {7676+ { },7777+};7878+MODULE_DEVICE_TABLE(i2c, axp20x_i2c_id);7979+8080+static const struct acpi_device_id axp20x_i2c_acpi_match[] = {8181+ {8282+ .id = "INT33F4",8383+ .driver_data = AXP288_ID,8484+ },8585+ { },8686+};8787+MODULE_DEVICE_TABLE(acpi, axp20x_i2c_acpi_match);8888+8989+static struct i2c_driver axp20x_i2c_driver = {9090+ .driver = {9191+ .name = "axp20x-i2c",9292+ .of_match_table = of_match_ptr(axp20x_i2c_of_match),9393+ .acpi_match_table = ACPI_PTR(axp20x_i2c_acpi_match),9494+ },9595+ .probe = axp20x_i2c_probe,9696+ .remove = axp20x_i2c_remove,9797+ .id_table = axp20x_i2c_id,9898+};9999+100100+module_i2c_driver(axp20x_i2c_driver);101101+102102+MODULE_DESCRIPTION("PMIC MFD I2C driver for AXP20X");103103+MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");104104+MODULE_LICENSE("GPL");
+80
drivers/mfd/axp20x-rsb.c
···11+/*22+ * RSB driver for the X-Powers' Power Management ICs33+ *44+ * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC55+ * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature66+ * as well as configurable GPIOs.77+ *88+ * This driver supports the RSB variants.99+ *1010+ * Copyright (C) 2015 Chen-Yu Tsai1111+ *1212+ * Author: Chen-Yu Tsai <wens@csie.org>1313+ *1414+ * This program is free software; you can redistribute it and/or modify1515+ * it under the terms of the GNU General Public License version 2 as1616+ * published by the Free Software Foundation.1717+ */1818+1919+#include <linux/acpi.h>2020+#include <linux/err.h>2121+#include <linux/mfd/axp20x.h>2222+#include <linux/module.h>2323+#include <linux/of.h>2424+#include <linux/regmap.h>2525+#include <linux/slab.h>2626+#include <linux/sunxi-rsb.h>2727+2828+static int axp20x_rsb_probe(struct sunxi_rsb_device *rdev)2929+{3030+ struct axp20x_dev *axp20x;3131+ int ret;3232+3333+ axp20x = devm_kzalloc(&rdev->dev, sizeof(*axp20x), GFP_KERNEL);3434+ if (!axp20x)3535+ return -ENOMEM;3636+3737+ axp20x->dev = &rdev->dev;3838+ axp20x->irq = rdev->irq;3939+ dev_set_drvdata(&rdev->dev, axp20x);4040+4141+ ret = axp20x_match_device(axp20x);4242+ if (ret)4343+ return ret;4444+4545+ axp20x->regmap = devm_regmap_init_sunxi_rsb(rdev, axp20x->regmap_cfg);4646+ if (IS_ERR(axp20x->regmap)) {4747+ ret = PTR_ERR(axp20x->regmap);4848+ dev_err(&rdev->dev, "regmap init failed: %d\n", ret);4949+ return ret;5050+ }5151+5252+ return axp20x_device_probe(axp20x);5353+}5454+5555+static int axp20x_rsb_remove(struct sunxi_rsb_device *rdev)5656+{5757+ struct axp20x_dev *axp20x = sunxi_rsb_device_get_drvdata(rdev);5858+5959+ return axp20x_device_remove(axp20x);6060+}6161+6262+static const struct of_device_id axp20x_rsb_of_match[] = {6363+ { .compatible = "x-powers,axp223", .data = (void *)AXP223_ID },6464+ { },6565+};6666+MODULE_DEVICE_TABLE(of, axp20x_rsb_of_match);6767+6868+static struct sunxi_rsb_driver axp20x_rsb_driver = {6969+ .driver = {7070+ .name = "axp20x-rsb",7171+ .of_match_table = of_match_ptr(axp20x_rsb_of_match),7272+ },7373+ .probe = axp20x_rsb_probe,7474+ .remove = axp20x_rsb_remove,7575+};7676+module_sunxi_rsb_driver(axp20x_rsb_driver);7777+7878+MODULE_DESCRIPTION("PMIC MFD sunXi RSB driver for AXP20X");7979+MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");8080+MODULE_LICENSE("GPL v2");
+25-80
drivers/mfd/axp20x.c
···11/*22- * axp20x.c - MFD core driver for the X-Powers' Power Management ICs22+ * MFD core driver for the X-Powers' Power Management ICs33 *44 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC55 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature66 * as well as configurable GPIOs.77+ *88+ * This file contains the interface independent core functions.99+ *1010+ * Copyright (C) 2014 Carlo Caione711 *812 * Author: Carlo Caione <carlo@caione.org>913 *···1713 */18141915#include <linux/err.h>2020-#include <linux/i2c.h>2116#include <linux/interrupt.h>2217#include <linux/kernel.h>2318#include <linux/module.h>2419#include <linux/pm_runtime.h>2520#include <linux/regmap.h>2626-#include <linux/slab.h>2721#include <linux/regulator/consumer.h>2822#include <linux/mfd/axp20x.h>2923#include <linux/mfd/core.h>3024#include <linux/of_device.h>3131-#include <linux/of_irq.h>3225#include <linux/acpi.h>33263427#define AXP20X_OFF 0x80···3534 "AXP202",3635 "AXP209",3736 "AXP221",3737+ "AXP223",3838 "AXP288",3939};4040···378376 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1),379377};380378381381-static const struct of_device_id axp20x_of_match[] = {382382- { .compatible = "x-powers,axp152", .data = (void *) AXP152_ID },383383- { .compatible = "x-powers,axp202", .data = (void *) AXP202_ID },384384- { .compatible = "x-powers,axp209", .data = (void *) AXP209_ID },385385- { .compatible = "x-powers,axp221", .data = (void *) AXP221_ID },386386- { },387387-};388388-MODULE_DEVICE_TABLE(of, axp20x_of_match);389389-390390-/*391391- * This is useless for OF-enabled devices, but it is needed by I2C subsystem392392- */393393-static const struct i2c_device_id axp20x_i2c_id[] = {394394- { },395395-};396396-MODULE_DEVICE_TABLE(i2c, axp20x_i2c_id);397397-398398-static const struct acpi_device_id axp20x_acpi_match[] = {399399- {400400- .id = "INT33F4",401401- .driver_data = AXP288_ID,402402- },403403- { },404404-};405405-MODULE_DEVICE_TABLE(acpi, axp20x_acpi_match);406406-407379static const struct regmap_irq_chip axp152_regmap_irq_chip = {408380 .name = "axp152_irq_chip",409381 .status_base = AXP152_IRQ1_STATE,···582606 AXP20X_OFF);583607}584608585585-static int axp20x_match_device(struct axp20x_dev *axp20x, struct device *dev)609609+int axp20x_match_device(struct axp20x_dev *axp20x)586610{611611+ struct device *dev = axp20x->dev;587612 const struct acpi_device_id *acpi_id;588613 const struct of_device_id *of_id;589614590615 if (dev->of_node) {591591- of_id = of_match_device(axp20x_of_match, dev);616616+ of_id = of_match_device(dev->driver->of_match_table, dev);592617 if (!of_id) {593618 dev_err(dev, "Unable to match OF ID\n");594619 return -ENODEV;595620 }596596- axp20x->variant = (long) of_id->data;621621+ axp20x->variant = (long)of_id->data;597622 } else {598623 acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev);599624 if (!acpi_id || !acpi_id->driver_data) {600625 dev_err(dev, "Unable to match ACPI ID and data\n");601626 return -ENODEV;602627 }603603- axp20x->variant = (long) acpi_id->driver_data;628628+ axp20x->variant = (long)acpi_id->driver_data;604629 }605630606631 switch (axp20x->variant) {···619642 axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip;620643 break;621644 case AXP221_ID:645645+ case AXP223_ID:622646 axp20x->nr_cells = ARRAY_SIZE(axp22x_cells);623647 axp20x->cells = axp22x_cells;624648 axp20x->regmap_cfg = &axp22x_regmap_config;···636658 return -EINVAL;637659 }638660 dev_info(dev, "AXP20x variant %s found\n",639639- axp20x_model_names[axp20x->variant]);661661+ axp20x_model_names[axp20x->variant]);640662641663 return 0;642664}665665+EXPORT_SYMBOL(axp20x_match_device);643666644644-static int axp20x_i2c_probe(struct i2c_client *i2c,645645- const struct i2c_device_id *id)667667+int axp20x_device_probe(struct axp20x_dev *axp20x)646668{647647- struct axp20x_dev *axp20x;648669 int ret;649670650650- axp20x = devm_kzalloc(&i2c->dev, sizeof(*axp20x), GFP_KERNEL);651651- if (!axp20x)652652- return -ENOMEM;653653-654654- ret = axp20x_match_device(axp20x, &i2c->dev);655655- if (ret)656656- return ret;657657-658658- axp20x->i2c_client = i2c;659659- axp20x->dev = &i2c->dev;660660- dev_set_drvdata(axp20x->dev, axp20x);661661-662662- axp20x->regmap = devm_regmap_init_i2c(i2c, axp20x->regmap_cfg);663663- if (IS_ERR(axp20x->regmap)) {664664- ret = PTR_ERR(axp20x->regmap);665665- dev_err(&i2c->dev, "regmap init failed: %d\n", ret);666666- return ret;667667- }668668-669669- ret = regmap_add_irq_chip(axp20x->regmap, i2c->irq,671671+ ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq,670672 IRQF_ONESHOT | IRQF_SHARED, -1,671673 axp20x->regmap_irq_chip,672674 &axp20x->regmap_irqc);673675 if (ret) {674674- dev_err(&i2c->dev, "failed to add irq chip: %d\n", ret);676676+ dev_err(axp20x->dev, "failed to add irq chip: %d\n", ret);675677 return ret;676678 }677679678680 ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells,679679- axp20x->nr_cells, NULL, 0, NULL);681681+ axp20x->nr_cells, NULL, 0, NULL);680682681683 if (ret) {682682- dev_err(&i2c->dev, "failed to add MFD devices: %d\n", ret);683683- regmap_del_irq_chip(i2c->irq, axp20x->regmap_irqc);684684+ dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret);685685+ regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);684686 return ret;685687 }686688···669711 pm_power_off = axp20x_power_off;670712 }671713672672- dev_info(&i2c->dev, "AXP20X driver loaded\n");714714+ dev_info(axp20x->dev, "AXP20X driver loaded\n");673715674716 return 0;675717}718718+EXPORT_SYMBOL(axp20x_device_probe);676719677677-static int axp20x_i2c_remove(struct i2c_client *i2c)720720+int axp20x_device_remove(struct axp20x_dev *axp20x)678721{679679- struct axp20x_dev *axp20x = i2c_get_clientdata(i2c);680680-681722 if (axp20x == axp20x_pm_power_off) {682723 axp20x_pm_power_off = NULL;683724 pm_power_off = NULL;684725 }685726686727 mfd_remove_devices(axp20x->dev);687687- regmap_del_irq_chip(axp20x->i2c_client->irq, axp20x->regmap_irqc);728728+ regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);688729689730 return 0;690731}691691-692692-static struct i2c_driver axp20x_i2c_driver = {693693- .driver = {694694- .name = "axp20x",695695- .of_match_table = of_match_ptr(axp20x_of_match),696696- .acpi_match_table = ACPI_PTR(axp20x_acpi_match),697697- },698698- .probe = axp20x_i2c_probe,699699- .remove = axp20x_i2c_remove,700700- .id_table = axp20x_i2c_id,701701-};702702-703703-module_i2c_driver(axp20x_i2c_driver);732732+EXPORT_SYMBOL(axp20x_device_remove);704733705734MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X");706735MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
+203
drivers/mfd/fsl-imx25-tsadc.c
···11+/*22+ * Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de>33+ *44+ * This program is free software; you can redistribute it and/or modify it under55+ * the terms of the GNU General Public License version 2 as published by the66+ * Free Software Foundation.77+ */88+99+#include <linux/clk.h>1010+#include <linux/interrupt.h>1111+#include <linux/irqchip/chained_irq.h>1212+#include <linux/irqdesc.h>1313+#include <linux/irqdomain.h>1414+#include <linux/irq.h>1515+#include <linux/mfd/imx25-tsadc.h>1616+#include <linux/module.h>1717+#include <linux/of.h>1818+#include <linux/of_platform.h>1919+#include <linux/platform_device.h>2020+#include <linux/regmap.h>2121+2222+static struct regmap_config mx25_tsadc_regmap_config = {2323+ .fast_io = true,2424+ .max_register = 8,2525+ .reg_bits = 32,2626+ .val_bits = 32,2727+ .reg_stride = 4,2828+};2929+3030+static void mx25_tsadc_irq_handler(struct irq_desc *desc)3131+{3232+ struct mx25_tsadc *tsadc = irq_desc_get_handler_data(desc);3333+ struct irq_chip *chip = irq_desc_get_chip(desc);3434+ u32 status;3535+3636+ chained_irq_enter(chip, desc);3737+3838+ regmap_read(tsadc->regs, MX25_TSC_TGSR, &status);3939+4040+ if (status & MX25_TGSR_GCQ_INT)4141+ generic_handle_irq(irq_find_mapping(tsadc->domain, 1));4242+4343+ if (status & MX25_TGSR_TCQ_INT)4444+ generic_handle_irq(irq_find_mapping(tsadc->domain, 0));4545+4646+ chained_irq_exit(chip, desc);4747+}4848+4949+static int mx25_tsadc_domain_map(struct irq_domain *d, unsigned int irq,5050+ irq_hw_number_t hwirq)5151+{5252+ struct mx25_tsadc *tsadc = d->host_data;5353+5454+ irq_set_chip_data(irq, tsadc);5555+ irq_set_chip_and_handler(irq, &dummy_irq_chip,5656+ handle_level_irq);5757+ irq_modify_status(irq, IRQ_NOREQUEST, IRQ_NOPROBE);5858+5959+ return 0;6060+}6161+6262+static struct irq_domain_ops mx25_tsadc_domain_ops = {6363+ .map = mx25_tsadc_domain_map,6464+ .xlate = irq_domain_xlate_onecell,6565+};6666+6767+static int mx25_tsadc_setup_irq(struct platform_device *pdev,6868+ struct mx25_tsadc *tsadc)6969+{7070+ struct device *dev = &pdev->dev;7171+ struct device_node *np = dev->of_node;7272+ int irq;7373+7474+ irq = platform_get_irq(pdev, 0);7575+ if (irq <= 0) {7676+ dev_err(dev, "Failed to get irq\n");7777+ return irq;7878+ }7979+8080+ tsadc->domain = irq_domain_add_simple(np, 2, 0, &mx25_tsadc_domain_ops,8181+ tsadc);8282+ if (!tsadc->domain) {8383+ dev_err(dev, "Failed to add irq domain\n");8484+ return -ENOMEM;8585+ }8686+8787+ irq_set_chained_handler(irq, mx25_tsadc_irq_handler);8888+ irq_set_handler_data(irq, tsadc);8989+9090+ return 0;9191+}9292+9393+static void mx25_tsadc_setup_clk(struct platform_device *pdev,9494+ struct mx25_tsadc *tsadc)9595+{9696+ unsigned clk_div;9797+9898+ /*9999+ * According to the datasheet the ADC clock should never100100+ * exceed 1,75 MHz. Base clock is the IPG and the ADC unit uses101101+ * a funny clock divider. To keep the ADC conversion time constant102102+ * adapt the ADC internal clock divider to the IPG clock rate.103103+ */104104+105105+ dev_dbg(&pdev->dev, "Found master clock at %lu Hz\n",106106+ clk_get_rate(tsadc->clk));107107+108108+ clk_div = DIV_ROUND_UP(clk_get_rate(tsadc->clk), 1750000);109109+ dev_dbg(&pdev->dev, "Setting up ADC clock divider to %u\n", clk_div);110110+111111+ /* adc clock = IPG clock / (2 * div + 2) */112112+ clk_div -= 2;113113+ clk_div /= 2;114114+115115+ /*116116+ * the ADC clock divider changes its behaviour when values below 4117117+ * are used: it is fixed to "/ 10" in this case118118+ */119119+ clk_div = max_t(unsigned, 4, clk_div);120120+121121+ dev_dbg(&pdev->dev, "Resulting ADC conversion clock at %lu Hz\n",122122+ clk_get_rate(tsadc->clk) / (2 * clk_div + 2));123123+124124+ regmap_update_bits(tsadc->regs, MX25_TSC_TGCR,125125+ MX25_TGCR_ADCCLKCFG(0x1f),126126+ MX25_TGCR_ADCCLKCFG(clk_div));127127+}128128+129129+static int mx25_tsadc_probe(struct platform_device *pdev)130130+{131131+ struct device *dev = &pdev->dev;132132+ struct device_node *np = dev->of_node;133133+ struct mx25_tsadc *tsadc;134134+ struct resource *res;135135+ int ret;136136+ void __iomem *iomem;137137+138138+ tsadc = devm_kzalloc(dev, sizeof(*tsadc), GFP_KERNEL);139139+ if (!tsadc)140140+ return -ENOMEM;141141+142142+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);143143+ iomem = devm_ioremap_resource(dev, res);144144+ if (IS_ERR(iomem))145145+ return PTR_ERR(iomem);146146+147147+ tsadc->regs = devm_regmap_init_mmio(dev, iomem,148148+ &mx25_tsadc_regmap_config);149149+ if (IS_ERR(tsadc->regs)) {150150+ dev_err(dev, "Failed to initialize regmap\n");151151+ return PTR_ERR(tsadc->regs);152152+ }153153+154154+ tsadc->clk = devm_clk_get(dev, "ipg");155155+ if (IS_ERR(tsadc->clk)) {156156+ dev_err(dev, "Failed to get ipg clock\n");157157+ return PTR_ERR(tsadc->clk);158158+ }159159+160160+ /* setup clock according to the datasheet */161161+ mx25_tsadc_setup_clk(pdev, tsadc);162162+163163+ /* Enable clock and reset the component */164164+ regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_CLK_EN,165165+ MX25_TGCR_CLK_EN);166166+ regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_TSC_RST,167167+ MX25_TGCR_TSC_RST);168168+169169+ /* Setup powersaving mode, but enable internal reference voltage */170170+ regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_POWERMODE_MASK,171171+ MX25_TGCR_POWERMODE_SAVE);172172+ regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_INTREFEN,173173+ MX25_TGCR_INTREFEN);174174+175175+ ret = mx25_tsadc_setup_irq(pdev, tsadc);176176+ if (ret)177177+ return ret;178178+179179+ platform_set_drvdata(pdev, tsadc);180180+181181+ of_platform_populate(np, NULL, NULL, dev);182182+183183+ return 0;184184+}185185+186186+static const struct of_device_id mx25_tsadc_ids[] = {187187+ { .compatible = "fsl,imx25-tsadc" },188188+ { /* Sentinel */ }189189+};190190+191191+static struct platform_driver mx25_tsadc_driver = {192192+ .driver = {193193+ .name = "mx25-tsadc",194194+ .of_match_table = of_match_ptr(mx25_tsadc_ids),195195+ },196196+ .probe = mx25_tsadc_probe,197197+};198198+module_platform_driver(mx25_tsadc_driver);199199+200200+MODULE_DESCRIPTION("MFD for ADC/TSC for Freescale mx25");201201+MODULE_AUTHOR("Markus Pargmann <mpa@pengutronix.de>");202202+MODULE_LICENSE("GPL v2");203203+MODULE_ALIAS("platform:mx25-tsadc");
+88-152
drivers/mfd/tps65912-core.c
···11/*22- * tps65912-core.c -- TI TPS65912x22+ * Core functions for TI TPS65912x PMICs33 *44- * Copyright 2011 Texas Instruments Inc.44+ * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/55+ * Andrew F. Davis <afd@ti.com>56 *66- * Author: Margarita Olaya Cabrera <magi@slimlogic.co.uk>77+ * This program is free software; you can redistribute it and/or88+ * modify it under the terms of the GNU General Public License version 2 as99+ * published by the Free Software Foundation.710 *88- * This program is free software; you can redistribute it and/or modify it99- * under the terms of the GNU General Public License as published by the1010- * Free Software Foundation; either version 2 of the License, or (at your1111- * option) any later version.1111+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any1212+ * kind, whether expressed or implied; without even the implied warranty1313+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the1414+ * GNU General Public License version 2 for more details.1215 *1313- * This driver is based on wm8350 implementation.1616+ * Based on the TPS65218 driver and the previous TPS65912 driver by1717+ * Margarita Olaya Cabrera <magi@slimlogic.co.uk>1418 */15191616-#include <linux/module.h>1717-#include <linux/moduleparam.h>1818-#include <linux/slab.h>1919-#include <linux/gpio.h>2020+#include <linux/interrupt.h>2021#include <linux/mfd/core.h>2222+#include <linux/module.h>2323+2124#include <linux/mfd/tps65912.h>22252323-static const struct mfd_cell tps65912s[] = {2424- {2525- .name = "tps65912-pmic",2626- },2626+static const struct mfd_cell tps65912_cells[] = {2727+ { .name = "tps65912-regulator", },2828+ { .name = "tps65912-gpio", },2729};28302929-int tps65912_set_bits(struct tps65912 *tps65912, u8 reg, u8 mask)3131+static const struct regmap_irq tps65912_irqs[] = {3232+ /* INT_STS IRQs */3333+ REGMAP_IRQ_REG(TPS65912_IRQ_PWRHOLD_F, 0, TPS65912_INT_STS_PWRHOLD_F),3434+ REGMAP_IRQ_REG(TPS65912_IRQ_VMON, 0, TPS65912_INT_STS_VMON),3535+ REGMAP_IRQ_REG(TPS65912_IRQ_PWRON, 0, TPS65912_INT_STS_PWRON),3636+ REGMAP_IRQ_REG(TPS65912_IRQ_PWRON_LP, 0, TPS65912_INT_STS_PWRON_LP),3737+ REGMAP_IRQ_REG(TPS65912_IRQ_PWRHOLD_R, 0, TPS65912_INT_STS_PWRHOLD_R),3838+ REGMAP_IRQ_REG(TPS65912_IRQ_HOTDIE, 0, TPS65912_INT_STS_HOTDIE),3939+ REGMAP_IRQ_REG(TPS65912_IRQ_GPIO1_R, 0, TPS65912_INT_STS_GPIO1_R),4040+ REGMAP_IRQ_REG(TPS65912_IRQ_GPIO1_F, 0, TPS65912_INT_STS_GPIO1_F),4141+ /* INT_STS2 IRQs */4242+ REGMAP_IRQ_REG(TPS65912_IRQ_GPIO2_R, 1, TPS65912_INT_STS2_GPIO2_R),4343+ REGMAP_IRQ_REG(TPS65912_IRQ_GPIO2_F, 1, TPS65912_INT_STS2_GPIO2_F),4444+ REGMAP_IRQ_REG(TPS65912_IRQ_GPIO3_R, 1, TPS65912_INT_STS2_GPIO3_R),4545+ REGMAP_IRQ_REG(TPS65912_IRQ_GPIO3_F, 1, TPS65912_INT_STS2_GPIO3_F),4646+ REGMAP_IRQ_REG(TPS65912_IRQ_GPIO4_R, 1, TPS65912_INT_STS2_GPIO4_R),4747+ REGMAP_IRQ_REG(TPS65912_IRQ_GPIO4_F, 1, TPS65912_INT_STS2_GPIO4_F),4848+ REGMAP_IRQ_REG(TPS65912_IRQ_GPIO5_R, 1, TPS65912_INT_STS2_GPIO5_R),4949+ REGMAP_IRQ_REG(TPS65912_IRQ_GPIO5_F, 1, TPS65912_INT_STS2_GPIO5_F),5050+ /* INT_STS3 IRQs */5151+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_DCDC1, 2, TPS65912_INT_STS3_PGOOD_DCDC1),5252+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_DCDC2, 2, TPS65912_INT_STS3_PGOOD_DCDC2),5353+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_DCDC3, 2, TPS65912_INT_STS3_PGOOD_DCDC3),5454+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_DCDC4, 2, TPS65912_INT_STS3_PGOOD_DCDC4),5555+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO1, 2, TPS65912_INT_STS3_PGOOD_LDO1),5656+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO2, 2, TPS65912_INT_STS3_PGOOD_LDO2),5757+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO3, 2, TPS65912_INT_STS3_PGOOD_LDO3),5858+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO4, 2, TPS65912_INT_STS3_PGOOD_LDO4),5959+ /* INT_STS4 IRQs */6060+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO5, 3, TPS65912_INT_STS4_PGOOD_LDO5),6161+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO6, 3, TPS65912_INT_STS4_PGOOD_LDO6),6262+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO7, 3, TPS65912_INT_STS4_PGOOD_LDO7),6363+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO8, 3, TPS65912_INT_STS4_PGOOD_LDO8),6464+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO9, 3, TPS65912_INT_STS4_PGOOD_LDO9),6565+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO10, 3, TPS65912_INT_STS4_PGOOD_LDO10),6666+};6767+6868+static struct regmap_irq_chip tps65912_irq_chip = {6969+ .name = "tps65912",7070+ .irqs = tps65912_irqs,7171+ .num_irqs = ARRAY_SIZE(tps65912_irqs),7272+ .num_regs = 4,7373+ .irq_reg_stride = 2,7474+ .mask_base = TPS65912_INT_MSK,7575+ .status_base = TPS65912_INT_STS,7676+ .ack_base = TPS65912_INT_STS,7777+ .init_ack_masked = true,7878+};7979+8080+int tps65912_device_init(struct tps65912 *tps)3081{3131- u8 data;3232- int err;8282+ int ret;33833434- mutex_lock(&tps65912->io_mutex);8484+ ret = regmap_add_irq_chip(tps->regmap, tps->irq, IRQF_ONESHOT, 0,8585+ &tps65912_irq_chip, &tps->irq_data);8686+ if (ret)8787+ return ret;35883636- err = tps65912->read(tps65912, reg, 1, &data);3737- if (err) {3838- dev_err(tps65912->dev, "Read from reg 0x%x failed\n", reg);3939- goto out;8989+ ret = mfd_add_devices(tps->dev, PLATFORM_DEVID_AUTO, tps65912_cells,9090+ ARRAY_SIZE(tps65912_cells), NULL, 0,9191+ regmap_irq_get_domain(tps->irq_data));9292+ if (ret) {9393+ regmap_del_irq_chip(tps->irq, tps->irq_data);9494+ return ret;4095 }41964242- data |= mask;4343- err = tps65912->write(tps65912, reg, 1, &data);4444- if (err)4545- dev_err(tps65912->dev, "Write to reg 0x%x failed\n", reg);4646-4747-out:4848- mutex_unlock(&tps65912->io_mutex);4949- return err;9797+ return 0;5098}5151-EXPORT_SYMBOL_GPL(tps65912_set_bits);9999+EXPORT_SYMBOL_GPL(tps65912_device_init);521005353-int tps65912_clear_bits(struct tps65912 *tps65912, u8 reg, u8 mask)101101+int tps65912_device_exit(struct tps65912 *tps)54102{5555- u8 data;5656- int err;103103+ regmap_del_irq_chip(tps->irq, tps->irq_data);571045858- mutex_lock(&tps65912->io_mutex);5959- err = tps65912->read(tps65912, reg, 1, &data);6060- if (err) {6161- dev_err(tps65912->dev, "Read from reg 0x%x failed\n", reg);6262- goto out;6363- }6464-6565- data &= ~mask;6666- err = tps65912->write(tps65912, reg, 1, &data);6767- if (err)6868- dev_err(tps65912->dev, "Write to reg 0x%x failed\n", reg);6969-7070-out:7171- mutex_unlock(&tps65912->io_mutex);7272- return err;105105+ return 0;73106}7474-EXPORT_SYMBOL_GPL(tps65912_clear_bits);107107+EXPORT_SYMBOL_GPL(tps65912_device_exit);751087676-static inline int tps65912_read(struct tps65912 *tps65912, u8 reg)7777-{7878- u8 val;7979- int err;8080-8181- err = tps65912->read(tps65912, reg, 1, &val);8282- if (err < 0)8383- return err;8484-8585- return val;8686-}8787-8888-static inline int tps65912_write(struct tps65912 *tps65912, u8 reg, u8 val)8989-{9090- return tps65912->write(tps65912, reg, 1, &val);9191-}9292-9393-int tps65912_reg_read(struct tps65912 *tps65912, u8 reg)9494-{9595- int data;9696-9797- mutex_lock(&tps65912->io_mutex);9898-9999- data = tps65912_read(tps65912, reg);100100- if (data < 0)101101- dev_err(tps65912->dev, "Read from reg 0x%x failed\n", reg);102102-103103- mutex_unlock(&tps65912->io_mutex);104104- return data;105105-}106106-EXPORT_SYMBOL_GPL(tps65912_reg_read);107107-108108-int tps65912_reg_write(struct tps65912 *tps65912, u8 reg, u8 val)109109-{110110- int err;111111-112112- mutex_lock(&tps65912->io_mutex);113113-114114- err = tps65912_write(tps65912, reg, val);115115- if (err < 0)116116- dev_err(tps65912->dev, "Write for reg 0x%x failed\n", reg);117117-118118- mutex_unlock(&tps65912->io_mutex);119119- return err;120120-}121121-EXPORT_SYMBOL_GPL(tps65912_reg_write);122122-123123-int tps65912_device_init(struct tps65912 *tps65912)124124-{125125- struct tps65912_board *pmic_plat_data = dev_get_platdata(tps65912->dev);126126- struct tps65912_platform_data *init_data;127127- int ret, dcdc_avs, value;128128-129129- init_data = kzalloc(sizeof(struct tps65912_platform_data), GFP_KERNEL);130130- if (init_data == NULL)131131- return -ENOMEM;132132-133133- mutex_init(&tps65912->io_mutex);134134- dev_set_drvdata(tps65912->dev, tps65912);135135-136136- dcdc_avs = (pmic_plat_data->is_dcdc1_avs << 0 |137137- pmic_plat_data->is_dcdc2_avs << 1 |138138- pmic_plat_data->is_dcdc3_avs << 2 |139139- pmic_plat_data->is_dcdc4_avs << 3);140140- if (dcdc_avs) {141141- tps65912->read(tps65912, TPS65912_I2C_SPI_CFG, 1, &value);142142- dcdc_avs |= value;143143- tps65912->write(tps65912, TPS65912_I2C_SPI_CFG, 1, &dcdc_avs);144144- }145145-146146- ret = mfd_add_devices(tps65912->dev, -1,147147- tps65912s, ARRAY_SIZE(tps65912s),148148- NULL, 0, NULL);149149- if (ret < 0)150150- goto err;151151-152152- init_data->irq = pmic_plat_data->irq;153153- init_data->irq_base = pmic_plat_data->irq_base;154154- ret = tps65912_irq_init(tps65912, init_data->irq, init_data);155155- if (ret < 0)156156- goto err;157157-158158- kfree(init_data);159159- return ret;160160-161161-err:162162- kfree(init_data);163163- mfd_remove_devices(tps65912->dev);164164- return ret;165165-}166166-167167-void tps65912_device_exit(struct tps65912 *tps65912)168168-{169169- mfd_remove_devices(tps65912->dev);170170- tps65912_irq_exit(tps65912);171171-}172172-173173-MODULE_AUTHOR("Margarita Olaya <magi@slimlogic.co.uk>");174174-MODULE_DESCRIPTION("TPS65912x chip family multi-function driver");175175-MODULE_LICENSE("GPL");109109+MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");110110+MODULE_DESCRIPTION("TPS65912x MFD Driver");111111+MODULE_LICENSE("GPL v2");
+52-112
drivers/mfd/tps65912-i2c.c
···11/*22- * tps65912-i2c.c -- I2C access for TI TPS65912x PMIC22+ * I2C access driver for TI TPS65912x PMICs33 *44- * Copyright 2011 Texas Instruments Inc.44+ * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/55+ * Andrew F. Davis <afd@ti.com>56 *66- * Author: Margarita Olaya Cabrera <magi@slimlogic.co.uk>77+ * This program is free software; you can redistribute it and/or88+ * modify it under the terms of the GNU General Public License version 2 as99+ * published by the Free Software Foundation.710 *88- * This program is free software; you can redistribute it and/or modify it99- * under the terms of the GNU General Public License as published by the1010- * Free Software Foundation; either version 2 of the License, or (at your1111- * option) any later version.1111+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any1212+ * kind, whether expressed or implied; without even the implied warranty1313+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the1414+ * GNU General Public License version 2 for more details.1215 *1313- * This driver is based on wm8350 implementation.1616+ * Based on the TPS65218 driver and the previous TPS65912 driver by1717+ * Margarita Olaya Cabrera <magi@slimlogic.co.uk>1418 */15191616-#include <linux/module.h>1717-#include <linux/moduleparam.h>1818-#include <linux/init.h>1919-#include <linux/slab.h>2020-#include <linux/gpio.h>2120#include <linux/i2c.h>2222-#include <linux/mfd/core.h>2121+#include <linux/module.h>2222+#include <linux/regmap.h>2323+2324#include <linux/mfd/tps65912.h>24252525-static int tps65912_i2c_read(struct tps65912 *tps65912, u8 reg,2626- int bytes, void *dest)2626+static const struct of_device_id tps65912_i2c_of_match_table[] = {2727+ { .compatible = "ti,tps65912", },2828+ { /* sentinel */ }2929+};3030+3131+static int tps65912_i2c_probe(struct i2c_client *client,3232+ const struct i2c_device_id *ids)2733{2828- struct i2c_client *i2c = tps65912->control_data;2929- struct i2c_msg xfer[2];3030- int ret;3434+ struct tps65912 *tps;31353232- /* Write register */3333- xfer[0].addr = i2c->addr;3434- xfer[0].flags = 0;3535- xfer[0].len = 1;3636- xfer[0].buf = ®3737-3838- /* Read data */3939- xfer[1].addr = i2c->addr;4040- xfer[1].flags = I2C_M_RD;4141- xfer[1].len = bytes;4242- xfer[1].buf = dest;4343-4444- ret = i2c_transfer(i2c->adapter, xfer, 2);4545- if (ret == 2)4646- ret = 0;4747- else if (ret >= 0)4848- ret = -EIO;4949- return ret;5050-}5151-5252-static int tps65912_i2c_write(struct tps65912 *tps65912, u8 reg,5353- int bytes, void *src)5454-{5555- struct i2c_client *i2c = tps65912->control_data;5656- /* we add 1 byte for device register */5757- u8 msg[TPS6591X_MAX_REGISTER + 1];5858- int ret;5959-6060- if (bytes > TPS6591X_MAX_REGISTER)6161- return -EINVAL;6262-6363- msg[0] = reg;6464- memcpy(&msg[1], src, bytes);6565-6666- ret = i2c_master_send(i2c, msg, bytes + 1);6767- if (ret < 0)6868- return ret;6969- if (ret != bytes + 1)7070- return -EIO;7171-7272- return 0;7373-}7474-7575-static int tps65912_i2c_probe(struct i2c_client *i2c,7676- const struct i2c_device_id *id)7777-{7878- struct tps65912 *tps65912;7979-8080- tps65912 = devm_kzalloc(&i2c->dev,8181- sizeof(struct tps65912), GFP_KERNEL);8282- if (tps65912 == NULL)3636+ tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL);3737+ if (!tps)8338 return -ENOMEM;84398585- i2c_set_clientdata(i2c, tps65912);8686- tps65912->dev = &i2c->dev;8787- tps65912->control_data = i2c;8888- tps65912->read = tps65912_i2c_read;8989- tps65912->write = tps65912_i2c_write;4040+ i2c_set_clientdata(client, tps);4141+ tps->dev = &client->dev;4242+ tps->irq = client->irq;90439191- return tps65912_device_init(tps65912);4444+ tps->regmap = devm_regmap_init_i2c(client, &tps65912_regmap_config);4545+ if (IS_ERR(tps->regmap)) {4646+ dev_err(tps->dev, "Failed to initialize register map\n");4747+ return PTR_ERR(tps->regmap);4848+ }4949+5050+ return tps65912_device_init(tps);9251}93529494-static int tps65912_i2c_remove(struct i2c_client *i2c)5353+static int tps65912_i2c_remove(struct i2c_client *client)9554{9696- struct tps65912 *tps65912 = i2c_get_clientdata(i2c);5555+ struct tps65912 *tps = i2c_get_clientdata(client);97569898- tps65912_device_exit(tps65912);9999-100100- return 0;5757+ return tps65912_device_exit(tps);10158}10259103103-static const struct i2c_device_id tps65912_i2c_id[] = {104104- {"tps65912", 0 },105105- { }6060+static const struct i2c_device_id tps65912_i2c_id_table[] = {6161+ { "tps65912", 0 },6262+ { /* sentinel */ }10663};107107-MODULE_DEVICE_TABLE(i2c, tps65912_i2c_id);6464+MODULE_DEVICE_TABLE(i2c, tps65912_i2c_id_table);1086510966static struct i2c_driver tps65912_i2c_driver = {110110- .driver = {111111- .name = "tps65912",6767+ .driver = {6868+ .name = "tps65912",6969+ .of_match_table = tps65912_i2c_of_match_table,11270 },113113- .probe = tps65912_i2c_probe,114114- .remove = tps65912_i2c_remove,115115- .id_table = tps65912_i2c_id,7171+ .probe = tps65912_i2c_probe,7272+ .remove = tps65912_i2c_remove,7373+ .id_table = tps65912_i2c_id_table,11674};7575+module_i2c_driver(tps65912_i2c_driver);11776118118-static int __init tps65912_i2c_init(void)119119-{120120- int ret;121121-122122- ret = i2c_add_driver(&tps65912_i2c_driver);123123- if (ret != 0)124124- pr_err("Failed to register TPS65912 I2C driver: %d\n", ret);125125-126126- return ret;127127-}128128-/* init early so consumer devices can complete system boot */129129-subsys_initcall(tps65912_i2c_init);130130-131131-static void __exit tps65912_i2c_exit(void)132132-{133133- i2c_del_driver(&tps65912_i2c_driver);134134-}135135-module_exit(tps65912_i2c_exit);136136-137137-MODULE_AUTHOR("Margarita Olaya <magi@slimlogic.co.uk>");138138-MODULE_DESCRIPTION("TPS6591x chip family multi-function driver");139139-MODULE_LICENSE("GPL");7777+MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");7878+MODULE_DESCRIPTION("TPS65912x I2C Interface Driver");7979+MODULE_LICENSE("GPL v2");
-217
drivers/mfd/tps65912-irq.c
···11-/*22- * tps65912-irq.c -- TI TPS6591x33- *44- * Copyright 2011 Texas Instruments Inc.55- *66- * Author: Margarita Olaya <magi@slimlogic.co.uk>77- *88- * This program is free software; you can redistribute it and/or modify it99- * under the terms of the GNU General Public License as published by the1010- * Free Software Foundation; either version 2 of the License, or (at your1111- * option) any later version.1212- *1313- * This driver is based on wm8350 implementation.1414- */1515-1616-#include <linux/kernel.h>1717-#include <linux/module.h>1818-#include <linux/bug.h>1919-#include <linux/device.h>2020-#include <linux/interrupt.h>2121-#include <linux/irq.h>2222-#include <linux/gpio.h>2323-#include <linux/mfd/tps65912.h>2424-2525-static inline int irq_to_tps65912_irq(struct tps65912 *tps65912,2626- int irq)2727-{2828- return irq - tps65912->irq_base;2929-}3030-3131-/*3232- * This is a threaded IRQ handler so can access I2C/SPI. Since the3333- * IRQ handler explicitly clears the IRQ it handles the IRQ line3434- * will be reasserted and the physical IRQ will be handled again if3535- * another interrupt is asserted while we run - in the normal course3636- * of events this is a rare occurrence so we save I2C/SPI reads. We're3737- * also assuming that it's rare to get lots of interrupts firing3838- * simultaneously so try to minimise I/O.3939- */4040-static irqreturn_t tps65912_irq(int irq, void *irq_data)4141-{4242- struct tps65912 *tps65912 = irq_data;4343- u32 irq_sts;4444- u32 irq_mask;4545- u8 reg;4646- int i;4747-4848-4949- tps65912->read(tps65912, TPS65912_INT_STS, 1, ®);5050- irq_sts = reg;5151- tps65912->read(tps65912, TPS65912_INT_STS2, 1, ®);5252- irq_sts |= reg << 8;5353- tps65912->read(tps65912, TPS65912_INT_STS3, 1, ®);5454- irq_sts |= reg << 16;5555- tps65912->read(tps65912, TPS65912_INT_STS4, 1, ®);5656- irq_sts |= reg << 24;5757-5858- tps65912->read(tps65912, TPS65912_INT_MSK, 1, ®);5959- irq_mask = reg;6060- tps65912->read(tps65912, TPS65912_INT_MSK2, 1, ®);6161- irq_mask |= reg << 8;6262- tps65912->read(tps65912, TPS65912_INT_MSK3, 1, ®);6363- irq_mask |= reg << 16;6464- tps65912->read(tps65912, TPS65912_INT_MSK4, 1, ®);6565- irq_mask |= reg << 24;6666-6767- irq_sts &= ~irq_mask;6868- if (!irq_sts)6969- return IRQ_NONE;7070-7171- for (i = 0; i < tps65912->irq_num; i++) {7272- if (!(irq_sts & (1 << i)))7373- continue;7474-7575- handle_nested_irq(tps65912->irq_base + i);7676- }7777-7878- /* Write the STS register back to clear IRQs we handled */7979- reg = irq_sts & 0xFF;8080- irq_sts >>= 8;8181- if (reg)8282- tps65912->write(tps65912, TPS65912_INT_STS, 1, ®);8383- reg = irq_sts & 0xFF;8484- irq_sts >>= 8;8585- if (reg)8686- tps65912->write(tps65912, TPS65912_INT_STS2, 1, ®);8787- reg = irq_sts & 0xFF;8888- irq_sts >>= 8;8989- if (reg)9090- tps65912->write(tps65912, TPS65912_INT_STS3, 1, ®);9191- reg = irq_sts & 0xFF;9292- if (reg)9393- tps65912->write(tps65912, TPS65912_INT_STS4, 1, ®);9494-9595- return IRQ_HANDLED;9696-}9797-9898-static void tps65912_irq_lock(struct irq_data *data)9999-{100100- struct tps65912 *tps65912 = irq_data_get_irq_chip_data(data);101101-102102- mutex_lock(&tps65912->irq_lock);103103-}104104-105105-static void tps65912_irq_sync_unlock(struct irq_data *data)106106-{107107- struct tps65912 *tps65912 = irq_data_get_irq_chip_data(data);108108- u32 reg_mask;109109- u8 reg;110110-111111- tps65912->read(tps65912, TPS65912_INT_MSK, 1, ®);112112- reg_mask = reg;113113- tps65912->read(tps65912, TPS65912_INT_MSK2, 1, ®);114114- reg_mask |= reg << 8;115115- tps65912->read(tps65912, TPS65912_INT_MSK3, 1, ®);116116- reg_mask |= reg << 16;117117- tps65912->read(tps65912, TPS65912_INT_MSK4, 1, ®);118118- reg_mask |= reg << 24;119119-120120- if (tps65912->irq_mask != reg_mask) {121121- reg = tps65912->irq_mask & 0xFF;122122- tps65912->write(tps65912, TPS65912_INT_MSK, 1, ®);123123- reg = tps65912->irq_mask >> 8 & 0xFF;124124- tps65912->write(tps65912, TPS65912_INT_MSK2, 1, ®);125125- reg = tps65912->irq_mask >> 16 & 0xFF;126126- tps65912->write(tps65912, TPS65912_INT_MSK3, 1, ®);127127- reg = tps65912->irq_mask >> 24 & 0xFF;128128- tps65912->write(tps65912, TPS65912_INT_MSK4, 1, ®);129129- }130130-131131- mutex_unlock(&tps65912->irq_lock);132132-}133133-134134-static void tps65912_irq_enable(struct irq_data *data)135135-{136136- struct tps65912 *tps65912 = irq_data_get_irq_chip_data(data);137137-138138- tps65912->irq_mask &= ~(1 << irq_to_tps65912_irq(tps65912, data->irq));139139-}140140-141141-static void tps65912_irq_disable(struct irq_data *data)142142-{143143- struct tps65912 *tps65912 = irq_data_get_irq_chip_data(data);144144-145145- tps65912->irq_mask |= (1 << irq_to_tps65912_irq(tps65912, data->irq));146146-}147147-148148-static struct irq_chip tps65912_irq_chip = {149149- .name = "tps65912",150150- .irq_bus_lock = tps65912_irq_lock,151151- .irq_bus_sync_unlock = tps65912_irq_sync_unlock,152152- .irq_disable = tps65912_irq_disable,153153- .irq_enable = tps65912_irq_enable,154154-};155155-156156-int tps65912_irq_init(struct tps65912 *tps65912, int irq,157157- struct tps65912_platform_data *pdata)158158-{159159- int ret, cur_irq;160160- int flags = IRQF_ONESHOT;161161- u8 reg;162162-163163- if (!irq) {164164- dev_warn(tps65912->dev, "No interrupt support, no core IRQ\n");165165- return 0;166166- }167167-168168- if (!pdata || !pdata->irq_base) {169169- dev_warn(tps65912->dev, "No interrupt support, no IRQ base\n");170170- return 0;171171- }172172-173173- /* Clear unattended interrupts */174174- tps65912->read(tps65912, TPS65912_INT_STS, 1, ®);175175- tps65912->write(tps65912, TPS65912_INT_STS, 1, ®);176176- tps65912->read(tps65912, TPS65912_INT_STS2, 1, ®);177177- tps65912->write(tps65912, TPS65912_INT_STS2, 1, ®);178178- tps65912->read(tps65912, TPS65912_INT_STS3, 1, ®);179179- tps65912->write(tps65912, TPS65912_INT_STS3, 1, ®);180180- tps65912->read(tps65912, TPS65912_INT_STS4, 1, ®);181181- tps65912->write(tps65912, TPS65912_INT_STS4, 1, ®);182182-183183- /* Mask top level interrupts */184184- tps65912->irq_mask = 0xFFFFFFFF;185185-186186- mutex_init(&tps65912->irq_lock);187187- tps65912->chip_irq = irq;188188- tps65912->irq_base = pdata->irq_base;189189-190190- tps65912->irq_num = TPS65912_NUM_IRQ;191191-192192- /* Register with genirq */193193- for (cur_irq = tps65912->irq_base;194194- cur_irq < tps65912->irq_num + tps65912->irq_base;195195- cur_irq++) {196196- irq_set_chip_data(cur_irq, tps65912);197197- irq_set_chip_and_handler(cur_irq, &tps65912_irq_chip,198198- handle_edge_irq);199199- irq_set_nested_thread(cur_irq, 1);200200- irq_clear_status_flags(cur_irq, IRQ_NOREQUEST | IRQ_NOPROBE);201201- }202202-203203- ret = request_threaded_irq(irq, NULL, tps65912_irq, flags,204204- "tps65912", tps65912);205205-206206- irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);207207- if (ret != 0)208208- dev_err(tps65912->dev, "Failed to request IRQ: %d\n", ret);209209-210210- return ret;211211-}212212-213213-int tps65912_irq_exit(struct tps65912 *tps65912)214214-{215215- free_irq(tps65912->chip_irq, tps65912);216216- return 0;217217-}
+49-111
drivers/mfd/tps65912-spi.c
···11/*22- * tps65912-spi.c -- SPI access for TI TPS65912x PMIC22+ * SPI access driver for TI TPS65912x PMICs33 *44- * Copyright 2011 Texas Instruments Inc.44+ * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/55+ * Andrew F. Davis <afd@ti.com>56 *66- * Author: Margarita Olaya Cabrera <magi@slimlogic.co.uk>77+ * This program is free software; you can redistribute it and/or88+ * modify it under the terms of the GNU General Public License version 2 as99+ * published by the Free Software Foundation.710 *88- * This program is free software; you can redistribute it and/or modify it99- * under the terms of the GNU General Public License as published by the1010- * Free Software Foundation; either version 2 of the License, or (at your1111- * option) any later version.1111+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any1212+ * kind, whether expressed or implied; without even the implied warranty1313+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the1414+ * GNU General Public License version 2 for more details.1215 *1313- * This driver is based on wm8350 implementation.1616+ * Based on the TPS65218 driver and the previous TPS65912 driver by1717+ * Margarita Olaya Cabrera <magi@slimlogic.co.uk>1418 */15191620#include <linux/module.h>1717-#include <linux/moduleparam.h>1818-#include <linux/init.h>1919-#include <linux/slab.h>2020-#include <linux/gpio.h>2121+#include <linux/regmap.h>2122#include <linux/spi/spi.h>2222-#include <linux/mfd/core.h>2323+2324#include <linux/mfd/tps65912.h>24252525-static int tps65912_spi_write(struct tps65912 *tps65912, u8 addr,2626- int bytes, void *src)2727-{2828- struct spi_device *spi = tps65912->control_data;2929- u8 *data = (u8 *) src;3030- int ret;3131- /* bit 23 is the read/write bit */3232- unsigned long spi_data = 1 << 23 | addr << 15 | *data;3333- struct spi_transfer xfer;3434- struct spi_message msg;3535- u32 tx_buf;3636-3737- tx_buf = spi_data;3838-3939- xfer.tx_buf = &tx_buf;4040- xfer.rx_buf = NULL;4141- xfer.len = sizeof(unsigned long);4242- xfer.bits_per_word = 24;4343-4444- spi_message_init(&msg);4545- spi_message_add_tail(&xfer, &msg);4646-4747- ret = spi_sync(spi, &msg);4848- return ret;4949-}5050-5151-static int tps65912_spi_read(struct tps65912 *tps65912, u8 addr,5252- int bytes, void *dest)5353-{5454- struct spi_device *spi = tps65912->control_data;5555- /* bit 23 is the read/write bit */5656- unsigned long spi_data = 0 << 23 | addr << 15;5757- struct spi_transfer xfer;5858- struct spi_message msg;5959- int ret;6060- u8 *data = (u8 *) dest;6161- u32 tx_buf, rx_buf;6262-6363- tx_buf = spi_data;6464- rx_buf = 0;6565-6666- xfer.tx_buf = &tx_buf;6767- xfer.rx_buf = &rx_buf;6868- xfer.len = sizeof(unsigned long);6969- xfer.bits_per_word = 24;7070-7171- spi_message_init(&msg);7272- spi_message_add_tail(&xfer, &msg);7373-7474- if (spi == NULL)7575- return 0;7676-7777- ret = spi_sync(spi, &msg);7878- if (ret == 0)7979- *data = (u8) (rx_buf & 0xFF);8080- return ret;8181-}2626+static const struct of_device_id tps65912_spi_of_match_table[] = {2727+ { .compatible = "ti,tps65912", },2828+ { /* sentinel */ }2929+};82308331static int tps65912_spi_probe(struct spi_device *spi)8432{8585- struct tps65912 *tps65912;3333+ struct tps65912 *tps;86348787- tps65912 = devm_kzalloc(&spi->dev,8888- sizeof(struct tps65912), GFP_KERNEL);8989- if (tps65912 == NULL)3535+ tps = devm_kzalloc(&spi->dev, sizeof(*tps), GFP_KERNEL);3636+ if (!tps)9037 return -ENOMEM;91389292- tps65912->dev = &spi->dev;9393- tps65912->control_data = spi;9494- tps65912->read = tps65912_spi_read;9595- tps65912->write = tps65912_spi_write;3939+ spi_set_drvdata(spi, tps);4040+ tps->dev = &spi->dev;4141+ tps->irq = spi->irq;96429797- spi_set_drvdata(spi, tps65912);4343+ tps->regmap = devm_regmap_init_spi(spi, &tps65912_regmap_config);4444+ if (IS_ERR(tps->regmap)) {4545+ dev_err(tps->dev, "Failed to initialize register map\n");4646+ return PTR_ERR(tps->regmap);4747+ }98489999- return tps65912_device_init(tps65912);4949+ return tps65912_device_init(tps);10050}10151102102-static int tps65912_spi_remove(struct spi_device *spi)5252+static int tps65912_spi_remove(struct spi_device *client)10353{104104- struct tps65912 *tps65912 = spi_get_drvdata(spi);5454+ struct tps65912 *tps = spi_get_drvdata(client);10555106106- tps65912_device_exit(tps65912);107107-108108- return 0;5656+ return tps65912_device_exit(tps);10957}5858+5959+static const struct spi_device_id tps65912_spi_id_table[] = {6060+ { "tps65912", 0 },6161+ { /* sentinel */ }6262+};6363+MODULE_DEVICE_TABLE(spi, tps65912_spi_id_table);1106411165static struct spi_driver tps65912_spi_driver = {112112- .driver = {113113- .name = "tps65912",6666+ .driver = {6767+ .name = "tps65912",6868+ .of_match_table = tps65912_spi_of_match_table,11469 },115115- .probe = tps65912_spi_probe,116116- .remove = tps65912_spi_remove,7070+ .probe = tps65912_spi_probe,7171+ .remove = tps65912_spi_remove,7272+ .id_table = tps65912_spi_id_table,11773};7474+module_spi_driver(tps65912_spi_driver);11875119119-static int __init tps65912_spi_init(void)120120-{121121- int ret;122122-123123- ret = spi_register_driver(&tps65912_spi_driver);124124- if (ret != 0)125125- pr_err("Failed to register TPS65912 SPI driver: %d\n", ret);126126-127127- return 0;128128-}129129-/* init early so consumer devices can complete system boot */130130-subsys_initcall(tps65912_spi_init);131131-132132-static void __exit tps65912_spi_exit(void)133133-{134134- spi_unregister_driver(&tps65912_spi_driver);135135-}136136-module_exit(tps65912_spi_exit);137137-138138-MODULE_AUTHOR("Margarita Olaya <magi@slimlogic.co.uk>");139139-MODULE_DESCRIPTION("SPI support for TPS65912 chip family mfd");140140-MODULE_LICENSE("GPL");7676+MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");7777+MODULE_DESCRIPTION("TPS65912x SPI Interface Driver");7878+MODULE_LICENSE("GPL v2");
+1-1
drivers/regulator/Kconfig
···762762763763config REGULATOR_TPS65912764764 tristate "TI TPS65912 Power regulator"765765- depends on (MFD_TPS65912_I2C || MFD_TPS65912_SPI)765765+ depends on MFD_TPS65912766766 help767767 This driver supports TPS65912 voltage regulator chip.768768
···11/*22- * tps65912.c -- TI tps6591222+ * Regulator driver for TI TPS65912x PMICs33 *44- * Copyright 2011 Texas Instruments Inc.44+ * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/55+ * Andrew F. Davis <afd@ti.com>56 *66- * Author: Margarita Olaya Cabrera <magi@slimlogic.co.uk>77+ * This program is free software; you can redistribute it and/or88+ * modify it under the terms of the GNU General Public License version 2 as99+ * published by the Free Software Foundation.710 *88- * This program is free software; you can redistribute it and/or modify it99- * under the terms of the GNU General Public License as published by the1010- * Free Software Foundation; either version 2 of the License, or (at your1111- * option) any later version.1111+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any1212+ * kind, whether expressed or implied; without even the implied warranty1313+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the1414+ * GNU General Public License version 2 for more details.1215 *1313- * This driver is based on wm8350 implementation.1616+ * Based on the TPS65218 driver and the previous TPS65912 driver by1717+ * Margarita Olaya Cabrera <magi@slimlogic.co.uk>1418 */15191616-#include <linux/kernel.h>1720#include <linux/module.h>1818-#include <linux/init.h>1919-#include <linux/err.h>2021#include <linux/platform_device.h>2122#include <linux/regulator/driver.h>2222-#include <linux/regulator/machine.h>2323-#include <linux/slab.h>2424-#include <linux/gpio.h>2323+2524#include <linux/mfd/tps65912.h>26252727-/* DCDC's */2828-#define TPS65912_REG_DCDC1 02929-#define TPS65912_REG_DCDC2 13030-#define TPS65912_REG_DCDC3 23131-#define TPS65912_REG_DCDC4 32626+enum tps65912_regulators { DCDC1, DCDC2, DCDC3, DCDC4, LDO1, LDO2, LDO3,2727+ LDO4, LDO5, LDO6, LDO7, LDO8, LDO9, LDO10 };32283333-/* LDOs */3434-#define TPS65912_REG_LDO1 43535-#define TPS65912_REG_LDO2 53636-#define TPS65912_REG_LDO3 63737-#define TPS65912_REG_LDO4 73838-#define TPS65912_REG_LDO5 83939-#define TPS65912_REG_LDO6 94040-#define TPS65912_REG_LDO7 104141-#define TPS65912_REG_LDO8 114242-#define TPS65912_REG_LDO9 124343-#define TPS65912_REG_LDO10 132929+#define TPS65912_REGULATOR(_name, _id, _of_match, _ops, _vr, _er, _lr) \3030+ [_id] = { \3131+ .name = _name, \3232+ .of_match = _of_match, \3333+ .regulators_node = "regulators", \3434+ .id = _id, \3535+ .ops = &_ops, \3636+ .n_voltages = 64, \3737+ .type = REGULATOR_VOLTAGE, \3838+ .owner = THIS_MODULE, \3939+ .vsel_reg = _vr, \4040+ .vsel_mask = 0x3f, \4141+ .enable_reg = _er, \4242+ .enable_mask = BIT(7), \4343+ .volt_table = NULL, \4444+ .linear_ranges = _lr, \4545+ .n_linear_ranges = ARRAY_SIZE(_lr), \4646+ }44474545-/* Number of step-down converters available */4646-#define TPS65912_NUM_DCDC 44747-4848-/* Number of LDO voltage regulators available */4949-#define TPS65912_NUM_LDO 105050-5151-/* Number of total regulators available */5252-#define TPS65912_NUM_REGULATOR (TPS65912_NUM_DCDC + TPS65912_NUM_LDO)5353-5454-#define TPS65912_REG_ENABLED 0x805555-#define OP_SELREG_MASK 0x405656-#define OP_SELREG_SHIFT 65757-5858-struct tps_info {5959- const char *name;6060-};6161-6262-static struct tps_info tps65912_regs[] = {6363- {6464- .name = "DCDC1",6565- },6666- {6767- .name = "DCDC2",6868- },6969- {7070- .name = "DCDC3",7171- },7272- {7373- .name = "DCDC4",7474- },7575- {7676- .name = "LDO1",7777- },7878- {7979- .name = "LDO2",8080- },8181- {8282- .name = "LDO3",8383- },8484- {8585- .name = "LDO4",8686- },8787- {8888- .name = "LDO5",8989- },9090- {9191- .name = "LDO6",9292- },9393- {9494- .name = "LDO7",9595- },9696- {9797- .name = "LDO8",9898- },9999- {100100- .name = "LDO9",101101- },102102- {103103- .name = "LDO10",104104- },105105-};106106-107107-struct tps65912_reg {108108- struct regulator_desc desc[TPS65912_NUM_REGULATOR];109109- struct tps65912 *mfd;110110- struct regulator_dev *rdev[TPS65912_NUM_REGULATOR];111111- struct tps_info *info[TPS65912_NUM_REGULATOR];112112- /* for read/write access */113113- struct mutex io_lock;114114- int mode;115115- int (*get_ctrl_reg)(int);116116- int dcdc_range[TPS65912_NUM_DCDC];117117- int pwm_mode_reg;118118- int eco_reg;4848+static const struct regulator_linear_range tps65912_dcdc_ranges[] = {4949+ REGULATOR_LINEAR_RANGE(500000, 0x0, 0x3f, 50000),11950};1205112152static const struct regulator_linear_range tps65912_ldo_ranges[] = {122122- REGULATOR_LINEAR_RANGE(800000, 0, 32, 25000),123123- REGULATOR_LINEAR_RANGE(1650000, 33, 60, 50000),124124- REGULATOR_LINEAR_RANGE(3100000, 61, 63, 100000),5353+ REGULATOR_LINEAR_RANGE(800000, 0x0, 0x20, 25000),5454+ REGULATOR_LINEAR_RANGE(1650000, 0x21, 0x3c, 50000),5555+ REGULATOR_LINEAR_RANGE(3100000, 0x3d, 0x3f, 100000),12556};126126-127127-static int tps65912_get_range(struct tps65912_reg *pmic, int id)128128-{129129- struct tps65912 *mfd = pmic->mfd;130130- int range;131131-132132- switch (id) {133133- case TPS65912_REG_DCDC1:134134- range = tps65912_reg_read(mfd, TPS65912_DCDC1_LIMIT);135135- break;136136- case TPS65912_REG_DCDC2:137137- range = tps65912_reg_read(mfd, TPS65912_DCDC2_LIMIT);138138- break;139139- case TPS65912_REG_DCDC3:140140- range = tps65912_reg_read(mfd, TPS65912_DCDC3_LIMIT);141141- break;142142- case TPS65912_REG_DCDC4:143143- range = tps65912_reg_read(mfd, TPS65912_DCDC4_LIMIT);144144- break;145145- default:146146- return 0;147147- }148148-149149- if (range >= 0)150150- range = (range & DCDC_LIMIT_RANGE_MASK)151151- >> DCDC_LIMIT_RANGE_SHIFT;152152-153153- pmic->dcdc_range[id] = range;154154- return range;155155-}156156-157157-static unsigned long tps65912_vsel_to_uv_range0(u8 vsel)158158-{159159- unsigned long uv;160160-161161- uv = ((vsel * 12500) + 500000);162162- return uv;163163-}164164-165165-static unsigned long tps65912_vsel_to_uv_range1(u8 vsel)166166-{167167- unsigned long uv;168168-169169- uv = ((vsel * 12500) + 700000);170170- return uv;171171-}172172-173173-static unsigned long tps65912_vsel_to_uv_range2(u8 vsel)174174-{175175- unsigned long uv;176176-177177- uv = ((vsel * 25000) + 500000);178178- return uv;179179-}180180-181181-static unsigned long tps65912_vsel_to_uv_range3(u8 vsel)182182-{183183- unsigned long uv;184184-185185- if (vsel == 0x3f)186186- uv = 3800000;187187- else188188- uv = ((vsel * 50000) + 500000);189189-190190- return uv;191191-}192192-193193-static int tps65912_get_ctrl_register(int id)194194-{195195- if (id >= TPS65912_REG_DCDC1 && id <= TPS65912_REG_LDO4)196196- return id * 3 + TPS65912_DCDC1_AVS;197197- else if (id >= TPS65912_REG_LDO5 && id <= TPS65912_REG_LDO10)198198- return id - TPS65912_REG_LDO5 + TPS65912_LDO5;199199- else200200- return -EINVAL;201201-}202202-203203-static int tps65912_get_sel_register(struct tps65912_reg *pmic, int id)204204-{205205- struct tps65912 *mfd = pmic->mfd;206206- int opvsel;207207- u8 reg = 0;208208-209209- if (id >= TPS65912_REG_DCDC1 && id <= TPS65912_REG_LDO4) {210210- opvsel = tps65912_reg_read(mfd, id * 3 + TPS65912_DCDC1_OP);211211- if (opvsel & OP_SELREG_MASK)212212- reg = id * 3 + TPS65912_DCDC1_AVS;213213- else214214- reg = id * 3 + TPS65912_DCDC1_OP;215215- } else if (id >= TPS65912_REG_LDO5 && id <= TPS65912_REG_LDO10) {216216- reg = id - TPS65912_REG_LDO5 + TPS65912_LDO5;217217- } else {218218- return -EINVAL;219219- }220220-221221- return reg;222222-}223223-224224-static int tps65912_get_mode_regiters(struct tps65912_reg *pmic, int id)225225-{226226- switch (id) {227227- case TPS65912_REG_DCDC1:228228- pmic->pwm_mode_reg = TPS65912_DCDC1_CTRL;229229- pmic->eco_reg = TPS65912_DCDC1_AVS;230230- break;231231- case TPS65912_REG_DCDC2:232232- pmic->pwm_mode_reg = TPS65912_DCDC2_CTRL;233233- pmic->eco_reg = TPS65912_DCDC2_AVS;234234- break;235235- case TPS65912_REG_DCDC3:236236- pmic->pwm_mode_reg = TPS65912_DCDC3_CTRL;237237- pmic->eco_reg = TPS65912_DCDC3_AVS;238238- break;239239- case TPS65912_REG_DCDC4:240240- pmic->pwm_mode_reg = TPS65912_DCDC4_CTRL;241241- pmic->eco_reg = TPS65912_DCDC4_AVS;242242- break;243243- default:244244- return -EINVAL;245245- }246246-247247- return 0;248248-}249249-250250-static int tps65912_reg_is_enabled(struct regulator_dev *dev)251251-{252252- struct tps65912_reg *pmic = rdev_get_drvdata(dev);253253- struct tps65912 *mfd = pmic->mfd;254254- int reg, value, id = rdev_get_id(dev);255255-256256- if (id < TPS65912_REG_DCDC1 || id > TPS65912_REG_LDO10)257257- return -EINVAL;258258-259259- reg = pmic->get_ctrl_reg(id);260260- if (reg < 0)261261- return reg;262262-263263- value = tps65912_reg_read(mfd, reg);264264- if (value < 0)265265- return value;266266-267267- return value & TPS65912_REG_ENABLED;268268-}269269-270270-static int tps65912_reg_enable(struct regulator_dev *dev)271271-{272272- struct tps65912_reg *pmic = rdev_get_drvdata(dev);273273- struct tps65912 *mfd = pmic->mfd;274274- int id = rdev_get_id(dev);275275- int reg;276276-277277- if (id < TPS65912_REG_DCDC1 || id > TPS65912_REG_LDO10)278278- return -EINVAL;279279-280280- reg = pmic->get_ctrl_reg(id);281281- if (reg < 0)282282- return reg;283283-284284- return tps65912_set_bits(mfd, reg, TPS65912_REG_ENABLED);285285-}286286-287287-static int tps65912_reg_disable(struct regulator_dev *dev)288288-{289289- struct tps65912_reg *pmic = rdev_get_drvdata(dev);290290- struct tps65912 *mfd = pmic->mfd;291291- int id = rdev_get_id(dev), reg;292292-293293- reg = pmic->get_ctrl_reg(id);294294- if (reg < 0)295295- return reg;296296-297297- return tps65912_clear_bits(mfd, reg, TPS65912_REG_ENABLED);298298-}299299-300300-static int tps65912_set_mode(struct regulator_dev *dev, unsigned int mode)301301-{302302- struct tps65912_reg *pmic = rdev_get_drvdata(dev);303303- struct tps65912 *mfd = pmic->mfd;304304- int pwm_mode, eco, id = rdev_get_id(dev);305305-306306- tps65912_get_mode_regiters(pmic, id);307307-308308- pwm_mode = tps65912_reg_read(mfd, pmic->pwm_mode_reg);309309- eco = tps65912_reg_read(mfd, pmic->eco_reg);310310-311311- pwm_mode &= DCDCCTRL_DCDC_MODE_MASK;312312- eco &= DCDC_AVS_ECO_MASK;313313-314314- switch (mode) {315315- case REGULATOR_MODE_FAST:316316- /* Verify if mode alredy set */317317- if (pwm_mode && !eco)318318- break;319319- tps65912_set_bits(mfd, pmic->pwm_mode_reg, DCDCCTRL_DCDC_MODE_MASK);320320- tps65912_clear_bits(mfd, pmic->eco_reg, DCDC_AVS_ECO_MASK);321321- break;322322- case REGULATOR_MODE_NORMAL:323323- case REGULATOR_MODE_IDLE:324324- if (!pwm_mode && !eco)325325- break;326326- tps65912_clear_bits(mfd, pmic->pwm_mode_reg, DCDCCTRL_DCDC_MODE_MASK);327327- tps65912_clear_bits(mfd, pmic->eco_reg, DCDC_AVS_ECO_MASK);328328- break;329329- case REGULATOR_MODE_STANDBY:330330- if (!pwm_mode && eco)331331- break;332332- tps65912_clear_bits(mfd, pmic->pwm_mode_reg, DCDCCTRL_DCDC_MODE_MASK);333333- tps65912_set_bits(mfd, pmic->eco_reg, DCDC_AVS_ECO_MASK);334334- break;335335- default:336336- return -EINVAL;337337- }338338-339339- return 0;340340-}341341-342342-static unsigned int tps65912_get_mode(struct regulator_dev *dev)343343-{344344- struct tps65912_reg *pmic = rdev_get_drvdata(dev);345345- struct tps65912 *mfd = pmic->mfd;346346- int pwm_mode, eco, mode = 0, id = rdev_get_id(dev);347347-348348- tps65912_get_mode_regiters(pmic, id);349349-350350- pwm_mode = tps65912_reg_read(mfd, pmic->pwm_mode_reg);351351- eco = tps65912_reg_read(mfd, pmic->eco_reg);352352-353353- pwm_mode &= DCDCCTRL_DCDC_MODE_MASK;354354- eco &= DCDC_AVS_ECO_MASK;355355-356356- if (pwm_mode && !eco)357357- mode = REGULATOR_MODE_FAST;358358- else if (!pwm_mode && !eco)359359- mode = REGULATOR_MODE_NORMAL;360360- else if (!pwm_mode && eco)361361- mode = REGULATOR_MODE_STANDBY;362362-363363- return mode;364364-}365365-366366-static int tps65912_list_voltage(struct regulator_dev *dev, unsigned selector)367367-{368368- struct tps65912_reg *pmic = rdev_get_drvdata(dev);369369- int range, voltage = 0, id = rdev_get_id(dev);370370-371371- if (id > TPS65912_REG_DCDC4)372372- return -EINVAL;373373-374374- range = pmic->dcdc_range[id];375375-376376- switch (range) {377377- case 0:378378- /* 0.5 - 1.2875V in 12.5mV steps */379379- voltage = tps65912_vsel_to_uv_range0(selector);380380- break;381381- case 1:382382- /* 0.7 - 1.4875V in 12.5mV steps */383383- voltage = tps65912_vsel_to_uv_range1(selector);384384- break;385385- case 2:386386- /* 0.5 - 2.075V in 25mV steps */387387- voltage = tps65912_vsel_to_uv_range2(selector);388388- break;389389- case 3:390390- /* 0.5 - 3.8V in 50mV steps */391391- voltage = tps65912_vsel_to_uv_range3(selector);392392- break;393393- }394394- return voltage;395395-}396396-397397-static int tps65912_get_voltage_sel(struct regulator_dev *dev)398398-{399399- struct tps65912_reg *pmic = rdev_get_drvdata(dev);400400- struct tps65912 *mfd = pmic->mfd;401401- int id = rdev_get_id(dev);402402- int reg, vsel;403403-404404- reg = tps65912_get_sel_register(pmic, id);405405- if (reg < 0)406406- return reg;407407-408408- vsel = tps65912_reg_read(mfd, reg);409409- vsel &= 0x3F;410410-411411- return vsel;412412-}413413-414414-static int tps65912_set_voltage_sel(struct regulator_dev *dev,415415- unsigned selector)416416-{417417- struct tps65912_reg *pmic = rdev_get_drvdata(dev);418418- struct tps65912 *mfd = pmic->mfd;419419- int id = rdev_get_id(dev);420420- int value;421421- u8 reg;422422-423423- reg = tps65912_get_sel_register(pmic, id);424424- value = tps65912_reg_read(mfd, reg);425425- value &= 0xC0;426426- return tps65912_reg_write(mfd, reg, selector | value);427427-}4285742958/* Operations permitted on DCDCx */43059static struct regulator_ops tps65912_ops_dcdc = {431431- .is_enabled = tps65912_reg_is_enabled,432432- .enable = tps65912_reg_enable,433433- .disable = tps65912_reg_disable,434434- .set_mode = tps65912_set_mode,435435- .get_mode = tps65912_get_mode,436436- .get_voltage_sel = tps65912_get_voltage_sel,437437- .set_voltage_sel = tps65912_set_voltage_sel,438438- .list_voltage = tps65912_list_voltage,6060+ .is_enabled = regulator_is_enabled_regmap,6161+ .enable = regulator_enable_regmap,6262+ .disable = regulator_disable_regmap,6363+ .get_voltage_sel = regulator_get_voltage_sel_regmap,6464+ .set_voltage_sel = regulator_set_voltage_sel_regmap,6565+ .list_voltage = regulator_list_voltage_linear_range,43966};4406744168/* Operations permitted on LDOx */44269static struct regulator_ops tps65912_ops_ldo = {443443- .is_enabled = tps65912_reg_is_enabled,444444- .enable = tps65912_reg_enable,445445- .disable = tps65912_reg_disable,446446- .get_voltage_sel = tps65912_get_voltage_sel,447447- .set_voltage_sel = tps65912_set_voltage_sel,448448- .list_voltage = regulator_list_voltage_linear_range,449449- .map_voltage = regulator_map_voltage_linear_range,7070+ .is_enabled = regulator_is_enabled_regmap,7171+ .enable = regulator_enable_regmap,7272+ .disable = regulator_disable_regmap,7373+ .get_voltage_sel = regulator_get_voltage_sel_regmap,7474+ .set_voltage_sel = regulator_set_voltage_sel_regmap,7575+ .list_voltage = regulator_list_voltage_linear_range,7676+ .map_voltage = regulator_map_voltage_linear_range,45077};45178452452-static int tps65912_probe(struct platform_device *pdev)7979+static const struct regulator_desc regulators[] = {8080+ TPS65912_REGULATOR("DCDC1", DCDC1, "dcdc1", tps65912_ops_dcdc,8181+ TPS65912_DCDC1_OP, TPS65912_DCDC1_CTRL,8282+ tps65912_dcdc_ranges),8383+ TPS65912_REGULATOR("DCDC2", DCDC2, "dcdc2", tps65912_ops_dcdc,8484+ TPS65912_DCDC2_OP, TPS65912_DCDC2_CTRL,8585+ tps65912_dcdc_ranges),8686+ TPS65912_REGULATOR("DCDC3", DCDC3, "dcdc3", tps65912_ops_dcdc,8787+ TPS65912_DCDC3_OP, TPS65912_DCDC3_CTRL,8888+ tps65912_dcdc_ranges),8989+ TPS65912_REGULATOR("DCDC4", DCDC4, "dcdc4", tps65912_ops_dcdc,9090+ TPS65912_DCDC4_OP, TPS65912_DCDC4_CTRL,9191+ tps65912_dcdc_ranges),9292+ TPS65912_REGULATOR("LDO1", LDO1, "ldo1", tps65912_ops_ldo,9393+ TPS65912_LDO1_OP, TPS65912_LDO1_AVS,9494+ tps65912_ldo_ranges),9595+ TPS65912_REGULATOR("LDO2", LDO2, "ldo2", tps65912_ops_ldo,9696+ TPS65912_LDO2_OP, TPS65912_LDO2_AVS,9797+ tps65912_ldo_ranges),9898+ TPS65912_REGULATOR("LDO3", LDO3, "ldo3", tps65912_ops_ldo,9999+ TPS65912_LDO3_OP, TPS65912_LDO3_AVS,100100+ tps65912_ldo_ranges),101101+ TPS65912_REGULATOR("LDO4", LDO4, "ldo4", tps65912_ops_ldo,102102+ TPS65912_LDO4_OP, TPS65912_LDO4_AVS,103103+ tps65912_ldo_ranges),104104+ TPS65912_REGULATOR("LDO5", LDO5, "ldo5", tps65912_ops_ldo,105105+ TPS65912_LDO5, TPS65912_LDO5,106106+ tps65912_ldo_ranges),107107+ TPS65912_REGULATOR("LDO6", LDO6, "ldo6", tps65912_ops_ldo,108108+ TPS65912_LDO6, TPS65912_LDO6,109109+ tps65912_ldo_ranges),110110+ TPS65912_REGULATOR("LDO7", LDO7, "ldo7", tps65912_ops_ldo,111111+ TPS65912_LDO7, TPS65912_LDO7,112112+ tps65912_ldo_ranges),113113+ TPS65912_REGULATOR("LDO8", LDO8, "ldo8", tps65912_ops_ldo,114114+ TPS65912_LDO8, TPS65912_LDO8,115115+ tps65912_ldo_ranges),116116+ TPS65912_REGULATOR("LDO9", LDO9, "ldo9", tps65912_ops_ldo,117117+ TPS65912_LDO9, TPS65912_LDO9,118118+ tps65912_ldo_ranges),119119+ TPS65912_REGULATOR("LDO10", LDO10, "ldo10", tps65912_ops_ldo,120120+ TPS65912_LDO10, TPS65912_LDO10,121121+ tps65912_ldo_ranges),122122+};123123+124124+static int tps65912_regulator_probe(struct platform_device *pdev)453125{454454- struct tps65912 *tps65912 = dev_get_drvdata(pdev->dev.parent);126126+ struct tps65912 *tps = dev_get_drvdata(pdev->dev.parent);455127 struct regulator_config config = { };456456- struct tps_info *info;457457- struct regulator_init_data *reg_data;458128 struct regulator_dev *rdev;459459- struct tps65912_reg *pmic;460460- struct tps65912_board *pmic_plat_data;461129 int i;462130463463- pmic_plat_data = dev_get_platdata(tps65912->dev);464464- if (!pmic_plat_data)465465- return -EINVAL;131131+ platform_set_drvdata(pdev, tps);466132467467- reg_data = pmic_plat_data->tps65912_pmic_init_data;133133+ config.dev = &pdev->dev;134134+ config.driver_data = tps;135135+ config.dev->of_node = tps->dev->of_node;136136+ config.regmap = tps->regmap;468137469469- pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);470470- if (!pmic)471471- return -ENOMEM;472472-473473- mutex_init(&pmic->io_lock);474474- pmic->mfd = tps65912;475475- platform_set_drvdata(pdev, pmic);476476-477477- pmic->get_ctrl_reg = &tps65912_get_ctrl_register;478478- info = tps65912_regs;479479-480480- for (i = 0; i < TPS65912_NUM_REGULATOR; i++, info++, reg_data++) {481481- int range = 0;482482- /* Register the regulators */483483- pmic->info[i] = info;484484-485485- pmic->desc[i].name = info->name;486486- pmic->desc[i].id = i;487487- pmic->desc[i].n_voltages = 64;488488- if (i > TPS65912_REG_DCDC4) {489489- pmic->desc[i].ops = &tps65912_ops_ldo;490490- pmic->desc[i].linear_ranges = tps65912_ldo_ranges;491491- pmic->desc[i].n_linear_ranges =492492- ARRAY_SIZE(tps65912_ldo_ranges);493493- } else {494494- pmic->desc[i].ops = &tps65912_ops_dcdc;495495- }496496- pmic->desc[i].type = REGULATOR_VOLTAGE;497497- pmic->desc[i].owner = THIS_MODULE;498498- range = tps65912_get_range(pmic, i);499499-500500- config.dev = tps65912->dev;501501- config.init_data = reg_data;502502- config.driver_data = pmic;503503-504504- rdev = devm_regulator_register(&pdev->dev, &pmic->desc[i],138138+ for (i = 0; i < ARRAY_SIZE(regulators); i++) {139139+ rdev = devm_regulator_register(&pdev->dev, ®ulators[i],505140 &config);506141 if (IS_ERR(rdev)) {507507- dev_err(tps65912->dev,508508- "failed to register %s regulator\n",142142+ dev_err(tps->dev, "failed to register %s regulator\n",509143 pdev->name);510144 return PTR_ERR(rdev);511145 }512512-513513- /* Save regulator for cleanup */514514- pmic->rdev[i] = rdev;515146 }147147+516148 return 0;517149}518150519519-static struct platform_driver tps65912_driver = {520520- .driver = {521521- .name = "tps65912-pmic",522522- },523523- .probe = tps65912_probe,151151+static const struct platform_device_id tps65912_regulator_id_table[] = {152152+ { "tps65912-regulator", },153153+ { /* sentinel */ }524154};155155+MODULE_DEVICE_TABLE(platform, tps65912_regulator_id_table);525156526526-static int __init tps65912_init(void)527527-{528528- return platform_driver_register(&tps65912_driver);529529-}530530-subsys_initcall(tps65912_init);157157+static struct platform_driver tps65912_regulator_driver = {158158+ .driver = {159159+ .name = "tps65912-regulator",160160+ },161161+ .probe = tps65912_regulator_probe,162162+ .id_table = tps65912_regulator_id_table,163163+};164164+module_platform_driver(tps65912_regulator_driver);531165532532-static void __exit tps65912_cleanup(void)533533-{534534- platform_driver_unregister(&tps65912_driver);535535-}536536-module_exit(tps65912_cleanup);537537-538538-MODULE_AUTHOR("Margarita Olaya Cabrera <magi@slimlogic.co.uk>");166166+MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");539167MODULE_DESCRIPTION("TPS65912 voltage regulator driver");540168MODULE_LICENSE("GPL v2");541541-MODULE_ALIAS("platform:tps65912-pmic");
+18
include/dt-bindings/iio/adc/fsl-imx25-gcq.h
···11+/*22+ * This header provides constants for configuring the I.MX25 ADC33+ */44+55+#ifndef _DT_BINDINGS_IIO_ADC_FS_IMX25_GCQ_H66+#define _DT_BINDINGS_IIO_ADC_FS_IMX25_GCQ_H77+88+#define MX25_ADC_REFP_YP 0 /* YP voltage reference */99+#define MX25_ADC_REFP_XP 1 /* XP voltage reference */1010+#define MX25_ADC_REFP_EXT 2 /* External voltage reference */1111+#define MX25_ADC_REFP_INT 3 /* Internal voltage reference */1212+1313+#define MX25_ADC_REFN_XN 0 /* XN ground reference */1414+#define MX25_ADC_REFN_YN 1 /* YN ground reference */1515+#define MX25_ADC_REFN_NGND 2 /* Internal ground reference */1616+#define MX25_ADC_REFN_NGND2 3 /* External ground reference */1717+1818+#endif
+33-1
include/linux/mfd/axp20x.h
···1818 AXP202_ID,1919 AXP209_ID,2020 AXP221_ID,2121+ AXP223_ID,2122 AXP288_ID,2223 NR_AXP20X_VARIANTS,2324};···397396398397struct axp20x_dev {399398 struct device *dev;400400- struct i2c_client *i2c_client;399399+ int irq;401400 struct regmap *regmap;402401 struct regmap_irq_chip_data *regmap_irqc;403402 long variant;···462461463462 return result;464463}464464+465465+/**466466+ * axp20x_match_device(): Setup axp20x variant related fields467467+ *468468+ * @axp20x: axp20x device to setup (.dev field must be set)469469+ * @dev: device associated with this axp20x device470470+ *471471+ * This lets the axp20x core configure the mfd cells and register maps472472+ * for later use.473473+ */474474+int axp20x_match_device(struct axp20x_dev *axp20x);475475+476476+/**477477+ * axp20x_device_probe(): Probe a configured axp20x device478478+ *479479+ * @axp20x: axp20x device to probe (must be configured)480480+ *481481+ * This function lets the axp20x core register the axp20x mfd devices482482+ * and irqchip. The axp20x device passed in must be fully configured483483+ * with axp20x_match_device, its irq set, and regmap created.484484+ */485485+int axp20x_device_probe(struct axp20x_dev *axp20x);486486+487487+/**488488+ * axp20x_device_probe(): Remove a axp20x device489489+ *490490+ * @axp20x: axp20x device to remove491491+ *492492+ * This tells the axp20x core to remove the associated mfd devices493493+ */494494+int axp20x_device_remove(struct axp20x_dev *axp20x);465495466496#endif /* __LINUX_MFD_AXP20X_H */