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ARM: dts: imx: align SPI NOR node name with dtschema

The node names should be generic and SPI NOR dtschema expects "flash".

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

authored by

Krzysztof Kozlowski and committed by
Shawn Guo ba9fe460 3d397a12

+34 -34
+1 -1
arch/arm/boot/dts/imx28-evk.dts
··· 129 129 pinctrl-0 = <&spi2_pins_a>; 130 130 status = "okay"; 131 131 132 - flash: m25p80@0 { 132 + flash: flash@0 { 133 133 #address-cells = <1>; 134 134 #size-cells = <1>; 135 135 compatible = "sst,sst25vf016b", "jedec,spi-nor";
+1 -1
arch/arm/boot/dts/imx28-m28evk.dts
··· 33 33 pinctrl-0 = <&spi2_pins_a>; 34 34 status = "okay"; 35 35 36 - flash: m25p80@0 { 36 + flash: flash@0 { 37 37 #address-cells = <1>; 38 38 #size-cells = <1>; 39 39 compatible = "m25p80", "jedec,spi-nor";
+1 -1
arch/arm/boot/dts/imx28-sps1.dts
··· 51 51 pinctrl-0 = <&spi2_pins_a>; 52 52 status = "okay"; 53 53 54 - flash: m25p80@0 { 54 + flash: flash@0 { 55 55 #address-cells = <1>; 56 56 #size-cells = <1>; 57 57 compatible = "everspin,mr25h256", "mr25h256";
+1 -1
arch/arm/boot/dts/imx6dl-rex-basic.dts
··· 19 19 }; 20 20 21 21 &ecspi3 { 22 - flash: m25p80@0 { 22 + flash: flash@0 { 23 23 compatible = "sst,sst25vf016b", "jedec,spi-nor"; 24 24 spi-max-frequency = <20000000>; 25 25 reg = <0>;
+1 -1
arch/arm/boot/dts/imx6q-ba16.dtsi
··· 142 142 pinctrl-0 = <&pinctrl_ecspi1>; 143 143 status = "okay"; 144 144 145 - flash: n25q032@0 { 145 + flash: flash@0 { 146 146 compatible = "jedec,spi-nor"; 147 147 #address-cells = <1>; 148 148 #size-cells = <1>;
+1 -1
arch/arm/boot/dts/imx6q-bx50v3.dtsi
··· 160 160 pinctrl-0 = <&pinctrl_ecspi5>; 161 161 status = "okay"; 162 162 163 - m25_eeprom: m25p80@0 { 163 + m25_eeprom: flash@0 { 164 164 compatible = "atmel,at25"; 165 165 spi-max-frequency = <10000000>; 166 166 size = <0x8000>;
+1 -1
arch/arm/boot/dts/imx6q-cm-fx6.dts
··· 260 260 pinctrl-0 = <&pinctrl_ecspi1>; 261 261 status = "okay"; 262 262 263 - m25p80@0 { 263 + flash@0 { 264 264 #address-cells = <1>; 265 265 #size-cells = <1>; 266 266 compatible = "st,m25p", "jedec,spi-nor";
+1 -1
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
··· 102 102 cs-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; 103 103 status = "okay"; 104 104 105 - flash: m25p80@0 { 105 + flash: flash@0 { 106 106 compatible = "m25p80", "jedec,spi-nor"; 107 107 spi-max-frequency = <40000000>; 108 108 reg = <0>;
+1 -1
arch/arm/boot/dts/imx6q-dms-ba16.dts
··· 47 47 pinctrl-0 = <&pinctrl_ecspi5>; 48 48 status = "okay"; 49 49 50 - m25_eeprom: m25p80@0 { 50 + m25_eeprom: flash@0 { 51 51 compatible = "atmel,at25256B", "atmel,at25"; 52 52 spi-max-frequency = <20000000>; 53 53 size = <0x8000>;
+1 -1
arch/arm/boot/dts/imx6q-gw5400-a.dts
··· 137 137 pinctrl-0 = <&pinctrl_ecspi1>; 138 138 status = "okay"; 139 139 140 - flash: m25p80@0 { 140 + flash: flash@0 { 141 141 compatible = "sst,w25q256", "jedec,spi-nor"; 142 142 spi-max-frequency = <30000000>; 143 143 reg = <0>;
+1 -1
arch/arm/boot/dts/imx6q-marsboard.dts
··· 100 100 cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; 101 101 status = "okay"; 102 102 103 - m25p80@0 { 103 + flash@0 { 104 104 compatible = "microchip,sst25vf016b"; 105 105 spi-max-frequency = <20000000>; 106 106 reg = <0>;
+1 -1
arch/arm/boot/dts/imx6q-rex-pro.dts
··· 19 19 }; 20 20 21 21 &ecspi3 { 22 - flash: m25p80@0 { 22 + flash: flash@0 { 23 23 compatible = "sst,sst25vf032b", "jedec,spi-nor"; 24 24 spi-max-frequency = <20000000>; 25 25 reg = <0>;
+1 -1
arch/arm/boot/dts/imx6qdl-aristainetos.dtsi
··· 96 96 pinctrl-0 = <&pinctrl_ecspi4>; 97 97 status = "okay"; 98 98 99 - flash: m25p80@0 { 99 + flash: flash@0 { 100 100 #address-cells = <1>; 101 101 #size-cells = <1>; 102 102 compatible = "micron,n25q128a11", "jedec,spi-nor";
+1 -1
arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
··· 131 131 pinctrl-0 = <&pinctrl_ecspi4>; 132 132 status = "okay"; 133 133 134 - flash: m25p80@1 { 134 + flash: flash@1 { 135 135 #address-cells = <1>; 136 136 #size-cells = <1>; 137 137 compatible = "micron,n25q128a11", "jedec,spi-nor";
+1 -1
arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
··· 35 35 pinctrl-0 = <&pinctrl_ecspi3>; 36 36 status = "okay"; 37 37 38 - flash: m25p80@0 { 38 + flash: flash@0 { 39 39 #address-cells = <1>; 40 40 #size-cells = <1>; 41 41 compatible = "sst,sst25vf040b", "jedec,spi-nor";
+1 -1
arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi
··· 258 258 status = "okay"; 259 259 260 260 /* default boot source: workaround #1 for errata ERR006282 */ 261 - smarc_flash: spi-flash@0 { 261 + smarc_flash: flash@0 { 262 262 compatible = "winbond,w25q16dw", "jedec,spi-nor"; 263 263 reg = <0>; 264 264 spi-max-frequency = <20000000>;
+1 -1
arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
··· 179 179 pinctrl-0 = <&pinctrl_ecspi1>; 180 180 status = "okay"; 181 181 182 - flash: m25p80@0 { 182 + flash: flash@0 { 183 183 compatible = "microchip,sst25vf016b"; 184 184 spi-max-frequency = <20000000>; 185 185 reg = <0>;
+1 -1
arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
··· 321 321 pinctrl-0 = <&pinctrl_ecspi1>; 322 322 status = "okay"; 323 323 324 - flash: m25p80@0 { 324 + flash: flash@0 { 325 325 compatible = "microchip,sst25vf016b"; 326 326 spi-max-frequency = <20000000>; 327 327 reg = <0>;
+1 -1
arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi
··· 252 252 pinctrl-0 = <&pinctrl_ecspi1>; 253 253 status = "okay"; 254 254 255 - flash: m25p80@0 { 255 + flash: flash@0 { 256 256 compatible = "microchip,sst25vf016b"; 257 257 spi-max-frequency = <20000000>; 258 258 reg = <0>;
+1 -1
arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
··· 237 237 pinctrl-0 = <&pinctrl_ecspi1>; 238 238 status = "okay"; 239 239 240 - flash: m25p80@0 { 240 + flash: flash@0 { 241 241 compatible = "sst,sst25vf016b", "jedec,spi-nor"; 242 242 spi-max-frequency = <20000000>; 243 243 reg = <0>;
+1 -1
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
··· 272 272 pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>; 273 273 status = "disabled"; /* pin conflict with WEIM NOR */ 274 274 275 - flash: m25p80@0 { 275 + flash: flash@0 { 276 276 #address-cells = <1>; 277 277 #size-cells = <1>; 278 278 compatible = "st,m25p32", "jedec,spi-nor";
+1 -1
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
··· 313 313 pinctrl-0 = <&pinctrl_ecspi1>; 314 314 status = "okay"; 315 315 316 - flash: m25p80@0 { 316 + flash: flash@0 { 317 317 compatible = "sst,sst25vf016b", "jedec,spi-nor"; 318 318 spi-max-frequency = <20000000>; 319 319 reg = <0>;
+1 -1
arch/arm/boot/dts/imx6qdl-sabresd.dtsi
··· 197 197 pinctrl-0 = <&pinctrl_ecspi1>; 198 198 status = "okay"; 199 199 200 - flash: m25p80@0 { 200 + flash: flash@0 { 201 201 #address-cells = <1>; 202 202 #size-cells = <1>; 203 203 compatible = "st,m25p32", "jedec,spi-nor";
+1 -1
arch/arm/boot/dts/imx6sl-evk.dts
··· 137 137 pinctrl-0 = <&pinctrl_ecspi1>; 138 138 status = "okay"; 139 139 140 - flash: m25p80@0 { 140 + flash: flash@0 { 141 141 #address-cells = <1>; 142 142 #size-cells = <1>; 143 143 compatible = "st,m25p32", "jedec,spi-nor";
+1 -1
arch/arm/boot/dts/imx6sx-nitrogen6sx.dts
··· 107 107 pinctrl-0 = <&pinctrl_ecspi1>; 108 108 status = "okay"; 109 109 110 - flash: m25p80@0 { 110 + flash: flash@0 { 111 111 compatible = "microchip,sst25vf016b"; 112 112 spi-max-frequency = <20000000>; 113 113 reg = <0>;
+2 -2
arch/arm/boot/dts/imx6sx-sdb-reva.dts
··· 123 123 pinctrl-0 = <&pinctrl_qspi2>; 124 124 status = "okay"; 125 125 126 - flash0: s25fl128s@0 { 126 + flash0: flash@0 { 127 127 reg = <0>; 128 128 #address-cells = <1>; 129 129 #size-cells = <1>; ··· 133 133 spi-tx-bus-width = <4>; 134 134 }; 135 135 136 - flash1: s25fl128s@2 { 136 + flash1: flash@2 { 137 137 reg = <2>; 138 138 #address-cells = <1>; 139 139 #size-cells = <1>;
+2 -2
arch/arm/boot/dts/imx6sx-sdb.dts
··· 108 108 pinctrl-0 = <&pinctrl_qspi2>; 109 109 status = "okay"; 110 110 111 - flash0: n25q256a@0 { 111 + flash0: flash@0 { 112 112 #address-cells = <1>; 113 113 #size-cells = <1>; 114 114 compatible = "micron,n25q256a", "jedec,spi-nor"; ··· 118 118 reg = <0>; 119 119 }; 120 120 121 - flash1: n25q256a@2 { 121 + flash1: flash@2 { 122 122 #address-cells = <1>; 123 123 #size-cells = <1>; 124 124 compatible = "micron,n25q256a", "jedec,spi-nor";
+1 -1
arch/arm/boot/dts/imx6ul-14x14-evk.dtsi
··· 286 286 pinctrl-0 = <&pinctrl_qspi>; 287 287 status = "okay"; 288 288 289 - flash0: n25q256a@0 { 289 + flash0: flash@0 { 290 290 #address-cells = <1>; 291 291 #size-cells = <1>; 292 292 compatible = "micron,n25q256a", "jedec,spi-nor";
+1 -1
arch/arm/boot/dts/imx6ul-kontron-n6310-som.dtsi
··· 19 19 }; 20 20 21 21 &qspi { 22 - spi-flash@0 { 22 + flash@0 { 23 23 #address-cells = <1>; 24 24 #size-cells = <1>; 25 25 compatible = "spi-nand";
+1 -1
arch/arm/boot/dts/imx6ul-kontron-n6311-som.dtsi
··· 18 18 }; 19 19 20 20 &qspi { 21 - spi-flash@0 { 21 + flash@0 { 22 22 #address-cells = <1>; 23 23 #size-cells = <1>; 24 24 compatible = "spi-nand";
+1 -1
arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi
··· 19 19 pinctrl-0 = <&pinctrl_ecspi2>; 20 20 status = "okay"; 21 21 22 - spi-flash@0 { 22 + flash@0 { 23 23 compatible = "mxicy,mx25v8035f", "jedec,spi-nor"; 24 24 spi-max-frequency = <50000000>; 25 25 reg = <0>;
+1 -1
arch/arm/boot/dts/imx6ull-kontron-n6411-som.dtsi
··· 18 18 }; 19 19 20 20 &qspi { 21 - spi-flash@0 { 21 + flash@0 { 22 22 #address-cells = <1>; 23 23 #size-cells = <1>; 24 24 compatible = "spi-nand";