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dt-bindings: gpio: gpio-xilinx: Convert Xilinx axi gpio binding to YAML

Convert Xilinx axi gpio binding documentation to YAML.

Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>

authored by

Srinivas Neeli and committed by
Bartosz Golaszewski
ba96b2e7 568035b0

+154 -48
-48
Documentation/devicetree/bindings/gpio/gpio-xilinx.txt
··· 1 - Xilinx plb/axi GPIO controller 2 - 3 - Dual channel GPIO controller with configurable number of pins 4 - (from 1 to 32 per channel). Every pin can be configured as 5 - input/output/tristate. Both channels share the same global IRQ but 6 - local interrupts can be enabled on channel basis. 7 - 8 - Required properties: 9 - - compatible : Should be "xlnx,xps-gpio-1.00.a" 10 - - reg : Address and length of the register set for the device 11 - - #gpio-cells : Should be two. The first cell is the pin number and the 12 - second cell is used to specify optional parameters (currently unused). 13 - - gpio-controller : Marks the device node as a GPIO controller. 14 - 15 - Optional properties: 16 - - clocks : Input clock specifier. Refer to common clock bindings. 17 - - interrupts : Interrupt mapping for GPIO IRQ. 18 - - xlnx,all-inputs : if n-th bit is setup, GPIO-n is input 19 - - xlnx,dout-default : if n-th bit is 1, GPIO-n default value is 1 20 - - xlnx,gpio-width : gpio width 21 - - xlnx,tri-default : if n-th bit is 1, GPIO-n is in tristate mode 22 - - xlnx,is-dual : if 1, controller also uses the second channel 23 - - xlnx,all-inputs-2 : as above but for the second channel 24 - - xlnx,dout-default-2 : as above but the second channel 25 - - xlnx,gpio2-width : as above but for the second channel 26 - - xlnx,tri-default-2 : as above but for the second channel 27 - 28 - 29 - Example: 30 - gpio: gpio@40000000 { 31 - #gpio-cells = <2>; 32 - compatible = "xlnx,xps-gpio-1.00.a"; 33 - clocks = <&clkc25>; 34 - gpio-controller ; 35 - interrupt-parent = <&microblaze_0_intc>; 36 - interrupts = < 6 2 >; 37 - reg = < 0x40000000 0x10000 >; 38 - xlnx,all-inputs = <0x0>; 39 - xlnx,all-inputs-2 = <0x0>; 40 - xlnx,dout-default = <0x0>; 41 - xlnx,dout-default-2 = <0x0>; 42 - xlnx,gpio-width = <0x2>; 43 - xlnx,gpio2-width = <0x2>; 44 - xlnx,interrupt-present = <0x1>; 45 - xlnx,is-dual = <0x1>; 46 - xlnx,tri-default = <0xffffffff>; 47 - xlnx,tri-default-2 = <0xffffffff>; 48 - } ;
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Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/gpio/xlnx,gpio-xilinx.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Xilinx AXI GPIO controller 8 + 9 + maintainers: 10 + - Neeli Srinivas <srinivas.neeli@xilinx.com> 11 + 12 + description: 13 + The AXI GPIO design provides a general purpose input/output interface 14 + to an AXI4-Lite interface. The AXI GPIO can be configured as either 15 + a single or a dual-channel device. The width of each channel is 16 + independently configurable. The channels can be configured to 17 + generate an interrupt when a transition on any of their inputs occurs. 18 + 19 + properties: 20 + compatible: 21 + enum: 22 + - xlnx,xps-gpio-1.00.a 23 + 24 + reg: 25 + maxItems: 1 26 + 27 + "#gpio-cells": 28 + const: 2 29 + 30 + interrupts: 31 + maxItems: 1 32 + 33 + gpio-controller: true 34 + 35 + gpio-line-names: 36 + description: strings describing the names of each gpio line 37 + minItems: 1 38 + maxItems: 64 39 + 40 + interrupt-controller: true 41 + 42 + "#interrupt-cells": 43 + const: 2 44 + 45 + clocks: 46 + maxItems: 1 47 + 48 + interrupt-names: true 49 + 50 + xlnx,all-inputs: 51 + $ref: /schemas/types.yaml#/definitions/uint32 52 + description: This option sets this GPIO channel1 bits in input mode. 53 + 54 + xlnx,all-inputs-2: 55 + $ref: /schemas/types.yaml#/definitions/uint32 56 + description: This option sets this GPIO channel2 bits in input mode. 57 + 58 + xlnx,all-outputs: 59 + $ref: /schemas/types.yaml#/definitions/uint32 60 + description: This option sets this GPIO channel1 bits in output mode. 61 + 62 + xlnx,all-outputs-2: 63 + $ref: /schemas/types.yaml#/definitions/uint32 64 + description: This option sets this GPIO channel2 bits in output mode. 65 + 66 + xlnx,dout-default: 67 + $ref: /schemas/types.yaml#/definitions/uint32 68 + description: Sets the default value of all the enabled bits of 69 + channel1. 70 + default: 0 71 + 72 + xlnx,dout-default-2: 73 + $ref: /schemas/types.yaml#/definitions/uint32 74 + description: Sets the default value of all the enabled bits of 75 + channel2. 76 + default: 0 77 + 78 + xlnx,gpio-width: 79 + $ref: /schemas/types.yaml#/definitions/uint32 80 + description: The value defines the bit width of the GPIO channel1. 81 + minimum: 1 82 + maximum: 32 83 + default: 32 84 + 85 + xlnx,gpio2-width: 86 + $ref: /schemas/types.yaml#/definitions/uint32 87 + description: The value defines the bit width of the GPIO channel2. 88 + minimum: 1 89 + maximum: 32 90 + default: 32 91 + 92 + xlnx,interrupt-present: 93 + $ref: /schemas/types.yaml#/definitions/uint32 94 + description: This parameter enables interrupt control logic 95 + and interrupt registers in GPIO module. 96 + minimum: 0 97 + maximum: 1 98 + default: 0 99 + 100 + xlnx,is-dual: 101 + $ref: /schemas/types.yaml#/definitions/uint32 102 + description: This parameter enables a second GPIO channel (GPIO2). 103 + minimum: 0 104 + maximum: 1 105 + default: 0 106 + 107 + xlnx,tri-default: 108 + $ref: /schemas/types.yaml#/definitions/uint32 109 + description: This value configures the input or output mode 110 + of each bit of GPIO channel1. 111 + 112 + xlnx,tri-default-2: 113 + $ref: /schemas/types.yaml#/definitions/uint32 114 + description: This value configures the input or output mode 115 + of each bit of GPIO channel2. 116 + 117 + required: 118 + - reg 119 + - compatible 120 + - gpio-controller 121 + - "#gpio-cells" 122 + 123 + unevaluatedProperties: false 124 + 125 + examples: 126 + - | 127 + #include <dt-bindings/interrupt-controller/arm-gic.h> 128 + 129 + gpio@e000a000 { 130 + compatible = "xlnx,xps-gpio-1.00.a"; 131 + reg = <0xa0020000 0x10000>; 132 + #gpio-cells = <2>; 133 + #interrupt-cells = <0x2>; 134 + clocks = <&zynqmp_clk 71>; 135 + gpio-controller; 136 + interrupt-controller; 137 + interrupt-names = "ip2intc_irpt"; 138 + interrupt-parent = <&gic>; 139 + interrupts = <0 89 4>; 140 + xlnx,all-inputs = <0x0>; 141 + xlnx,all-inputs-2 = <0x0>; 142 + xlnx,all-outputs = <0x0>; 143 + xlnx,all-outputs-2 = <0x0>; 144 + xlnx,dout-default = <0x0>; 145 + xlnx,dout-default-2 = <0x0>; 146 + xlnx,gpio-width = <0x20>; 147 + xlnx,gpio2-width = <0x20>; 148 + xlnx,interrupt-present = <0x1>; 149 + xlnx,is-dual = <0x1>; 150 + xlnx,tri-default = <0xFFFFFFFF>; 151 + xlnx,tri-default-2 = <0xFFFFFFFF>; 152 + }; 153 + 154 + ...