[ARM] 3711/1: AT91 timer update

Patch from Andrew Victor

The AIC interrupt controller is the same on the Atmel AT91RM9200,
AT91SAM9261 and AT91SAM9260 processors.

This patch removes any RM9200-specific naming from the IRQ driver, and
moves the AT91RM9200's default IRQ priority table into at91rm9200.c.

Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

authored by Andrew Victor and committed by Russell King ba854e18 5904a7f9

+66 -65
+45
arch/arm/mach-at91rm9200/at91rm9200.c
··· 107 iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); 108 } 109
··· 107 iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); 108 } 109 110 + /* 111 + * The default interrupt priority levels (0 = lowest, 7 = highest). 112 + */ 113 + static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = { 114 + 7, /* Advanced Interrupt Controller (FIQ) */ 115 + 7, /* System Peripherals */ 116 + 0, /* Parallel IO Controller A */ 117 + 0, /* Parallel IO Controller B */ 118 + 0, /* Parallel IO Controller C */ 119 + 0, /* Parallel IO Controller D */ 120 + 6, /* USART 0 */ 121 + 6, /* USART 1 */ 122 + 6, /* USART 2 */ 123 + 6, /* USART 3 */ 124 + 0, /* Multimedia Card Interface */ 125 + 4, /* USB Device Port */ 126 + 0, /* Two-Wire Interface */ 127 + 6, /* Serial Peripheral Interface */ 128 + 5, /* Serial Synchronous Controller 0 */ 129 + 5, /* Serial Synchronous Controller 1 */ 130 + 5, /* Serial Synchronous Controller 2 */ 131 + 0, /* Timer Counter 0 */ 132 + 0, /* Timer Counter 1 */ 133 + 0, /* Timer Counter 2 */ 134 + 0, /* Timer Counter 3 */ 135 + 0, /* Timer Counter 4 */ 136 + 0, /* Timer Counter 5 */ 137 + 3, /* USB Host port */ 138 + 3, /* Ethernet MAC */ 139 + 0, /* Advanced Interrupt Controller (IRQ0) */ 140 + 0, /* Advanced Interrupt Controller (IRQ1) */ 141 + 0, /* Advanced Interrupt Controller (IRQ2) */ 142 + 0, /* Advanced Interrupt Controller (IRQ3) */ 143 + 0, /* Advanced Interrupt Controller (IRQ4) */ 144 + 0, /* Advanced Interrupt Controller (IRQ5) */ 145 + 0 /* Advanced Interrupt Controller (IRQ6) */ 146 + }; 147 + 148 + void __init at91rm9200_init_irq(unsigned int priority[NR_AIC_IRQS]) 149 + { 150 + if (!priority) 151 + priority = at91rm9200_default_irq_priority; 152 + 153 + at91_aic_init(priority); 154 + }
+7 -1
arch/arm/mach-at91rm9200/generic.h
··· 8 * published by the Free Software Foundation. 9 */ 10 11 - void at91_gpio_irq_setup(unsigned banks); 12 13 struct sys_timer; 14 extern struct sys_timer at91rm9200_timer; 15 16 extern void __init at91rm9200_map_io(void); 17 18 extern int __init at91_clock_init(unsigned long main_clock); 19 struct device; 20 extern void __init at91_clock_associate(const char *id, struct device *dev, const char *func);
··· 8 * published by the Free Software Foundation. 9 */ 10 11 + /* Interrupts */ 12 + extern void __init at91rm9200_init_irq(unsigned int priority[]); 13 + extern void __init at91_aic_init(unsigned int priority[]); 14 + extern void __init at91_gpio_irq_setup(unsigned banks); 15 16 + /* Timer */ 17 struct sys_timer; 18 extern struct sys_timer at91rm9200_timer; 19 20 + /* Memory Map */ 21 extern void __init at91rm9200_map_io(void); 22 23 + /* Clocks */ 24 extern int __init at91_clock_init(unsigned long main_clock); 25 struct device; 26 extern void __init at91_clock_associate(const char *id, struct device *dev, const char *func);
+14 -56
arch/arm/mach-at91rm9200/irq.c
··· 36 37 #include "generic.h" 38 39 - /* 40 - * The default interrupt priority levels (0 = lowest, 7 = highest). 41 - */ 42 - static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = { 43 - 7, /* Advanced Interrupt Controller */ 44 - 7, /* System Peripheral */ 45 - 0, /* Parallel IO Controller A */ 46 - 0, /* Parallel IO Controller B */ 47 - 0, /* Parallel IO Controller C */ 48 - 0, /* Parallel IO Controller D */ 49 - 6, /* USART 0 */ 50 - 6, /* USART 1 */ 51 - 6, /* USART 2 */ 52 - 6, /* USART 3 */ 53 - 0, /* Multimedia Card Interface */ 54 - 4, /* USB Device Port */ 55 - 0, /* Two-Wire Interface */ 56 - 6, /* Serial Peripheral Interface */ 57 - 5, /* Serial Synchronous Controller */ 58 - 5, /* Serial Synchronous Controller */ 59 - 5, /* Serial Synchronous Controller */ 60 - 0, /* Timer Counter 0 */ 61 - 0, /* Timer Counter 1 */ 62 - 0, /* Timer Counter 2 */ 63 - 0, /* Timer Counter 3 */ 64 - 0, /* Timer Counter 4 */ 65 - 0, /* Timer Counter 5 */ 66 - 3, /* USB Host port */ 67 - 3, /* Ethernet MAC */ 68 - 0, /* Advanced Interrupt Controller */ 69 - 0, /* Advanced Interrupt Controller */ 70 - 0, /* Advanced Interrupt Controller */ 71 - 0, /* Advanced Interrupt Controller */ 72 - 0, /* Advanced Interrupt Controller */ 73 - 0, /* Advanced Interrupt Controller */ 74 - 0 /* Advanced Interrupt Controller */ 75 - }; 76 77 - 78 - static void at91rm9200_mask_irq(unsigned int irq) 79 { 80 /* Disable interrupt on AIC */ 81 at91_sys_write(AT91_AIC_IDCR, 1 << irq); 82 } 83 84 - static void at91rm9200_unmask_irq(unsigned int irq) 85 { 86 /* Enable interrupt on AIC */ 87 at91_sys_write(AT91_AIC_IECR, 1 << irq); 88 } 89 90 - static int at91rm9200_irq_type(unsigned irq, unsigned type) 91 { 92 unsigned int smr, srctype; 93 ··· 84 static u32 wakeups; 85 static u32 backups; 86 87 - static int at91rm9200_irq_set_wake(unsigned irq, unsigned value) 88 { 89 if (unlikely(irq >= 32)) 90 return -EINVAL; ··· 111 } 112 113 #else 114 - #define at91rm9200_irq_set_wake NULL 115 #endif 116 117 - static struct irqchip at91rm9200_irq_chip = { 118 - .ack = at91rm9200_mask_irq, 119 - .mask = at91rm9200_mask_irq, 120 - .unmask = at91rm9200_unmask_irq, 121 - .set_type = at91rm9200_irq_type, 122 - .set_wake = at91rm9200_irq_set_wake, 123 }; 124 125 /* 126 * Initialize the AIC interrupt controller. 127 */ 128 - void __init at91rm9200_init_irq(unsigned int priority[NR_AIC_IRQS]) 129 { 130 unsigned int i; 131 - 132 - /* No priority list specified for this board -> use defaults */ 133 - if (priority == NULL) 134 - priority = at91rm9200_default_irq_priority; 135 136 /* 137 * The IVR is used by macro get_irqnr_and_base to read and verify. ··· 136 for (i = 0; i < NR_AIC_IRQS; i++) { 137 /* Put irq number in Source Vector Register: */ 138 at91_sys_write(AT91_AIC_SVR(i), i); 139 - /* Store the Source Mode Register as defined in table above */ 140 at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); 141 142 - set_irq_chip(i, &at91rm9200_irq_chip); 143 set_irq_handler(i, do_level_IRQ); 144 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 145
··· 36 37 #include "generic.h" 38 39 40 + static void at91_aic_mask_irq(unsigned int irq) 41 { 42 /* Disable interrupt on AIC */ 43 at91_sys_write(AT91_AIC_IDCR, 1 << irq); 44 } 45 46 + static void at91_aic_unmask_irq(unsigned int irq) 47 { 48 /* Enable interrupt on AIC */ 49 at91_sys_write(AT91_AIC_IECR, 1 << irq); 50 } 51 52 + static int at91_aic_set_type(unsigned irq, unsigned type) 53 { 54 unsigned int smr, srctype; 55 ··· 122 static u32 wakeups; 123 static u32 backups; 124 125 + static int at91_aic_set_wake(unsigned irq, unsigned value) 126 { 127 if (unlikely(irq >= 32)) 128 return -EINVAL; ··· 149 } 150 151 #else 152 + #define at91_aic_set_wake NULL 153 #endif 154 155 + static struct irqchip at91_aic_chip = { 156 + .ack = at91_aic_mask_irq, 157 + .mask = at91_aic_mask_irq, 158 + .unmask = at91_aic_unmask_irq, 159 + .set_type = at91_aic_set_type, 160 + .set_wake = at91_aic_set_wake, 161 }; 162 163 /* 164 * Initialize the AIC interrupt controller. 165 */ 166 + void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS]) 167 { 168 unsigned int i; 169 170 /* 171 * The IVR is used by macro get_irqnr_and_base to read and verify. ··· 178 for (i = 0; i < NR_AIC_IRQS; i++) { 179 /* Put irq number in Source Vector Register: */ 180 at91_sys_write(AT91_AIC_SVR(i), i); 181 + /* Active Low interrupt, with the specified priority */ 182 at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); 183 184 + set_irq_chip(i, &at91_aic_chip); 185 set_irq_handler(i, do_level_IRQ); 186 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 187
-8
include/asm-arm/arch-at91rm9200/irqs.h
··· 39 */ 40 #define NR_IRQS (NR_AIC_IRQS + (4 * 32)) 41 42 - 43 - #ifndef __ASSEMBLY__ 44 - /* 45 - * Initialize the IRQ controller. 46 - */ 47 - extern void at91rm9200_init_irq(unsigned int priority[]); 48 - #endif 49 - 50 #endif
··· 39 */ 40 #define NR_IRQS (NR_AIC_IRQS + (4 * 32)) 41 42 #endif