tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next into for-davem

John W. Linville ba6e5eb1 f3116f62

+5628 -1505
+18 -7
MAINTAINERS
··· 1230 1230 F: drivers/block/aoe/ 1231 1231 1232 1232 ATHEROS ATH GENERIC UTILITIES 1233 - M: "Luis R. Rodriguez" <lrodriguez@atheros.com> 1233 + M: "Luis R. Rodriguez" <mcgrof@qca.qualcomm.com> 1234 1234 L: linux-wireless@vger.kernel.org 1235 1235 S: Supported 1236 1236 F: drivers/net/wireless/ath/* ··· 1238 1238 ATHEROS ATH5K WIRELESS DRIVER 1239 1239 M: Jiri Slaby <jirislaby@gmail.com> 1240 1240 M: Nick Kossifidis <mickflemm@gmail.com> 1241 - M: "Luis R. Rodriguez" <lrodriguez@atheros.com> 1241 + M: "Luis R. Rodriguez" <mcgrof@qca.qualcomm.com> 1242 1242 M: Bob Copeland <me@bobcopeland.com> 1243 1243 L: linux-wireless@vger.kernel.org 1244 1244 L: ath5k-devel@lists.ath5k.org ··· 1247 1247 F: drivers/net/wireless/ath/ath5k/ 1248 1248 1249 1249 ATHEROS ATH9K WIRELESS DRIVER 1250 - M: "Luis R. Rodriguez" <lrodriguez@atheros.com> 1251 - M: Jouni Malinen <jmalinen@atheros.com> 1252 - M: Vasanthakumar Thiagarajan <vasanth@atheros.com> 1253 - M: Senthil Balasubramanian <senthilkumar@atheros.com> 1250 + M: "Luis R. Rodriguez" <mcgrof@qca.qualcomm.com> 1251 + M: Jouni Malinen <jouni@qca.qualcomm.com> 1252 + M: Vasanthakumar Thiagarajan <vthiagar@qca.qualcomm.com> 1253 + M: Senthil Balasubramanian <senthilb@qca.qualcomm.com> 1254 1254 L: linux-wireless@vger.kernel.org 1255 1255 L: ath9k-devel@lists.ath9k.org 1256 1256 W: http://wireless.kernel.org/en/users/Drivers/ath9k ··· 1278 1278 ATLX ETHERNET DRIVERS 1279 1279 M: Jay Cliburn <jcliburn@gmail.com> 1280 1280 M: Chris Snook <chris.snook@gmail.com> 1281 - M: Jie Yang <jie.yang@atheros.com> 1281 + M: Jie Yang <yangjie@qca.qualcomm.com> 1282 1282 L: netdev@vger.kernel.org 1283 1283 W: http://sourceforge.net/projects/atl1 1284 1284 W: http://atl1.sourceforge.net ··· 4502 4502 W: http://www.qlogic.com 4503 4503 S: Supported 4504 4504 F: drivers/net/ethernet/qlogic/netxen/ 4505 + 4506 + NFC SUBSYSTEM 4507 + M: Lauro Ramos Venancio <lauro.venancio@openbossa.org> 4508 + M: Aloisio Almeida Jr <aloisio.almeida@openbossa.org> 4509 + M: Samuel Ortiz <sameo@linux.intel.com> 4510 + L: linux-wireless@vger.kernel.org 4511 + S: Maintained 4512 + F: net/nfc/ 4513 + F: include/linux/nfc.h 4514 + F: include/net/nfc.h 4515 + F: drivers/nfc/ 4505 4516 4506 4517 NFS, SUNRPC, AND LOCKD CLIENTS 4507 4518 M: Trond Myklebust <Trond.Myklebust@netapp.com>
+19 -1
drivers/bcma/driver_chipcommon_pmu.c
··· 90 90 } 91 91 } 92 92 93 + /* Disable to allow reading SPROM. Don't know the adventages of enabling it. */ 94 + void bcma_chipco_bcm4331_ext_pa_lines_ctl(struct bcma_drv_cc *cc, bool enable) 95 + { 96 + struct bcma_bus *bus = cc->core->bus; 97 + u32 val; 98 + 99 + val = bcma_cc_read32(cc, BCMA_CC_CHIPCTL); 100 + if (enable) { 101 + val |= BCMA_CHIPCTL_4331_EXTPA_EN; 102 + if (bus->chipinfo.pkg == 9 || bus->chipinfo.pkg == 11) 103 + val |= BCMA_CHIPCTL_4331_EXTPA_ON_GPIO2_5; 104 + } else { 105 + val &= ~BCMA_CHIPCTL_4331_EXTPA_EN; 106 + val &= ~BCMA_CHIPCTL_4331_EXTPA_ON_GPIO2_5; 107 + } 108 + bcma_cc_write32(cc, BCMA_CC_CHIPCTL, val); 109 + } 110 + 93 111 void bcma_pmu_workarounds(struct bcma_drv_cc *cc) 94 112 { 95 113 struct bcma_bus *bus = cc->core->bus; ··· 117 99 bcma_chipco_chipctl_maskset(cc, 0, ~0, 0x7); 118 100 break; 119 101 case 0x4331: 120 - pr_err("Enabling Ext PA lines not implemented\n"); 102 + /* BCM4331 workaround is SPROM-related, we put it in sprom.c */ 121 103 break; 122 104 case 43224: 123 105 if (bus->chipinfo.rev == 0) {
+1 -1
drivers/bcma/scan.c
··· 281 281 282 282 /* get & parse master ports */ 283 283 for (i = 0; i < ports[0]; i++) { 284 - u32 mst_port_d = bcma_erom_get_mst_port(bus, eromptr); 284 + s32 mst_port_d = bcma_erom_get_mst_port(bus, eromptr); 285 285 if (mst_port_d < 0) 286 286 return -EILSEQ; 287 287 }
+6
drivers/bcma/sprom.c
··· 152 152 if (!sprom) 153 153 return -ENOMEM; 154 154 155 + if (bus->chipinfo.id == 0x4331) 156 + bcma_chipco_bcm4331_ext_pa_lines_ctl(&bus->drv_cc, false); 157 + 155 158 /* Most cards have SPROM moved by additional offset 0x30 (48 dwords). 156 159 * According to brcm80211 this applies to cards with PCIe rev >= 6 157 160 * TODO: understand this condition and use it */ 158 161 offset = (bus->chipinfo.id == 0x4331) ? BCMA_CC_SPROM : 159 162 BCMA_CC_SPROM_PCIE6; 160 163 bcma_sprom_read(bus, offset, sprom); 164 + 165 + if (bus->chipinfo.id == 0x4331) 166 + bcma_chipco_bcm4331_ext_pa_lines_ctl(&bus->drv_cc, true); 161 167 162 168 err = bcma_sprom_valid(sprom); 163 169 if (err)
+2 -6
drivers/net/wireless/ath/ath9k/ar9002_hw.c
··· 303 303 * register as the other analog registers. Hence the 9 writes. 304 304 */ 305 305 static void ar9002_hw_configpcipowersave(struct ath_hw *ah, 306 - int restore, 307 - int power_off) 306 + bool power_off) 308 307 { 309 308 u8 i; 310 309 u32 val; 311 310 312 - if (ah->is_pciexpress != true || ah->aspm_enabled != true) 313 - return; 314 - 315 311 /* Nothing to do on restore for 11N */ 316 - if (!restore) { 312 + if (!power_off /* !restore */) { 317 313 if (AR_SREV_9280_20_OR_LATER(ah)) { 318 314 /* 319 315 * AR9280 2.0 or later chips use SerDes values from the
+1 -1
drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
··· 636 636 {0x00009e44, 0x02321e27, 0x02321e27, 0x02291e27, 0x02291e27}, 637 637 {0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012}, 638 638 {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000}, 639 - {0x0000a204, 0x000037c0, 0x000037c4, 0x000037c4, 0x000037c0}, 639 + {0x0000a204, 0x000036c0, 0x000036c4, 0x000036c4, 0x000036c0}, 640 640 {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004}, 641 641 {0x0000a22c, 0x01026a2f, 0x01026a2f, 0x01026a2f, 0x01026a2f}, 642 642 {0x0000a230, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b},
-15
drivers/net/wireless/ath/ath9k/ar9003_calib.c
··· 839 839 struct ath9k_channel *chan) 840 840 { 841 841 struct ath_common *common = ath9k_hw_common(ah); 842 - struct ath9k_hw_capabilities *pCap = &ah->caps; 843 - int val; 844 842 bool txiqcal_done = false; 845 - 846 - val = REG_READ(ah, AR_ENT_OTP); 847 - ath_dbg(common, ATH_DBG_CALIBRATE, "ath9k: AR_ENT_OTP 0x%x\n", val); 848 - 849 - /* Configure rx/tx chains before running AGC/TxiQ cals */ 850 - if (val & AR_ENT_OTP_CHAIN2_DISABLE) 851 - ar9003_hw_set_chain_masks(ah, 0x3, 0x3); 852 - else 853 - ar9003_hw_set_chain_masks(ah, pCap->rx_chainmask, 854 - pCap->tx_chainmask); 855 843 856 844 /* Do Tx IQ Calibration */ 857 845 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1, ··· 874 886 875 887 if (txiqcal_done) 876 888 ar9003_hw_tx_iq_cal_post_proc(ah); 877 - 878 - /* Revert chainmasks to their original values before NF cal */ 879 - ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask); 880 889 881 890 ath9k_hw_start_nfcal(ah, true); 882 891
+83 -6
drivers/net/wireless/ath/ath9k/ar9003_hw.c
··· 21 21 #include "ar9340_initvals.h" 22 22 #include "ar9330_1p1_initvals.h" 23 23 #include "ar9330_1p2_initvals.h" 24 + #include "ar9580_1p0_initvals.h" 24 25 25 26 /* General hardware code for the AR9003 hadware family */ 26 27 ··· 254 253 ar9485_1_1_pcie_phy_clkreq_disable_L1, 255 254 ARRAY_SIZE(ar9485_1_1_pcie_phy_clkreq_disable_L1), 256 255 2); 256 + } else if (AR_SREV_9580(ah)) { 257 + /* mac */ 258 + INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0); 259 + INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], 260 + ar9580_1p0_mac_core, 261 + ARRAY_SIZE(ar9580_1p0_mac_core), 2); 262 + INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST], 263 + ar9580_1p0_mac_postamble, 264 + ARRAY_SIZE(ar9580_1p0_mac_postamble), 5); 265 + 266 + /* bb */ 267 + INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0); 268 + INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE], 269 + ar9580_1p0_baseband_core, 270 + ARRAY_SIZE(ar9580_1p0_baseband_core), 2); 271 + INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST], 272 + ar9580_1p0_baseband_postamble, 273 + ARRAY_SIZE(ar9580_1p0_baseband_postamble), 5); 274 + 275 + /* radio */ 276 + INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0); 277 + INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE], 278 + ar9580_1p0_radio_core, 279 + ARRAY_SIZE(ar9580_1p0_radio_core), 2); 280 + INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], 281 + ar9580_1p0_radio_postamble, 282 + ARRAY_SIZE(ar9580_1p0_radio_postamble), 5); 283 + 284 + /* soc */ 285 + INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE], 286 + ar9580_1p0_soc_preamble, 287 + ARRAY_SIZE(ar9580_1p0_soc_preamble), 2); 288 + INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0); 289 + INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], 290 + ar9580_1p0_soc_postamble, 291 + ARRAY_SIZE(ar9580_1p0_soc_postamble), 5); 292 + 293 + /* rx/tx gain */ 294 + INIT_INI_ARRAY(&ah->iniModesRxGain, 295 + ar9580_1p0_rx_gain_table, 296 + ARRAY_SIZE(ar9580_1p0_rx_gain_table), 2); 297 + INIT_INI_ARRAY(&ah->iniModesTxGain, 298 + ar9580_1p0_low_ob_db_tx_gain_table, 299 + ARRAY_SIZE(ar9580_1p0_low_ob_db_tx_gain_table), 300 + 5); 301 + 302 + INIT_INI_ARRAY(&ah->iniModesAdditional, 303 + ar9580_1p0_modes_fast_clock, 304 + ARRAY_SIZE(ar9580_1p0_modes_fast_clock), 305 + 3); 257 306 } else { 258 307 /* mac */ 259 308 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0); ··· 399 348 ar9485_modes_lowest_ob_db_tx_gain_1_1, 400 349 ARRAY_SIZE(ar9485_modes_lowest_ob_db_tx_gain_1_1), 401 350 5); 351 + else if (AR_SREV_9580(ah)) 352 + INIT_INI_ARRAY(&ah->iniModesTxGain, 353 + ar9580_1p0_lowest_ob_db_tx_gain_table, 354 + ARRAY_SIZE(ar9580_1p0_lowest_ob_db_tx_gain_table), 355 + 5); 402 356 else 403 357 INIT_INI_ARRAY(&ah->iniModesTxGain, 404 358 ar9300Modes_lowest_ob_db_tx_gain_table_2p2, ··· 430 374 INIT_INI_ARRAY(&ah->iniModesTxGain, 431 375 ar9485Modes_high_ob_db_tx_gain_1_1, 432 376 ARRAY_SIZE(ar9485Modes_high_ob_db_tx_gain_1_1), 377 + 5); 378 + else if (AR_SREV_9580(ah)) 379 + INIT_INI_ARRAY(&ah->iniModesTxGain, 380 + ar9580_1p0_high_ob_db_tx_gain_table, 381 + ARRAY_SIZE(ar9580_1p0_high_ob_db_tx_gain_table), 433 382 5); 434 383 else 435 384 INIT_INI_ARRAY(&ah->iniModesTxGain, ··· 463 402 ar9485Modes_low_ob_db_tx_gain_1_1, 464 403 ARRAY_SIZE(ar9485Modes_low_ob_db_tx_gain_1_1), 465 404 5); 405 + else if (AR_SREV_9580(ah)) 406 + INIT_INI_ARRAY(&ah->iniModesTxGain, 407 + ar9580_1p0_low_ob_db_tx_gain_table, 408 + ARRAY_SIZE(ar9580_1p0_low_ob_db_tx_gain_table), 409 + 5); 466 410 else 467 411 INIT_INI_ARRAY(&ah->iniModesTxGain, 468 412 ar9300Modes_low_ob_db_tx_gain_table_2p2, ··· 495 429 ar9485Modes_high_power_tx_gain_1_1, 496 430 ARRAY_SIZE(ar9485Modes_high_power_tx_gain_1_1), 497 431 5); 432 + else if (AR_SREV_9580(ah)) 433 + INIT_INI_ARRAY(&ah->iniModesTxGain, 434 + ar9580_1p0_high_power_tx_gain_table, 435 + ARRAY_SIZE(ar9580_1p0_high_power_tx_gain_table), 436 + 5); 498 437 else 499 438 INIT_INI_ARRAY(&ah->iniModesTxGain, 500 439 ar9300Modes_high_power_tx_gain_table_2p2, ··· 534 463 ar9485Common_wo_xlna_rx_gain_1_1, 535 464 ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1), 536 465 2); 466 + else if (AR_SREV_9580(ah)) 467 + INIT_INI_ARRAY(&ah->iniModesRxGain, 468 + ar9580_1p0_rx_gain_table, 469 + ARRAY_SIZE(ar9580_1p0_rx_gain_table), 470 + 2); 537 471 else 538 472 INIT_INI_ARRAY(&ah->iniModesRxGain, 539 473 ar9300Common_rx_gain_table_2p2, ··· 566 490 ar9485Common_wo_xlna_rx_gain_1_1, 567 491 ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1), 568 492 2); 493 + else if (AR_SREV_9580(ah)) 494 + INIT_INI_ARRAY(&ah->iniModesRxGain, 495 + ar9580_1p0_wo_xlna_rx_gain_table, 496 + ARRAY_SIZE(ar9580_1p0_wo_xlna_rx_gain_table), 497 + 2); 569 498 else 570 499 INIT_INI_ARRAY(&ah->iniModesRxGain, 571 500 ar9300Common_wo_xlna_rx_gain_table_2p2, ··· 597 516 * register as the other analog registers. Hence the 9 writes. 598 517 */ 599 518 static void ar9003_hw_configpcipowersave(struct ath_hw *ah, 600 - int restore, 601 - int power_off) 519 + bool power_off) 602 520 { 603 - if (ah->is_pciexpress != true || ah->aspm_enabled != true) 604 - return; 605 - 606 521 /* Nothing to do on restore for 11N */ 607 - if (!restore) { 522 + if (!power_off /* !restore */) { 608 523 /* set bit 19 to allow forcing of pcie core into L1 state */ 609 524 REG_SET_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA); 610 525
+4 -28
drivers/net/wireless/ath/ath9k/ar9003_mac.c
··· 253 253 return -EIO; 254 254 } 255 255 256 - if (status & AR_TxOpExceeded) 257 - ts->ts_status |= ATH9K_TXERR_XTXOP; 258 256 ts->ts_rateindex = MS(status, AR_FinalTxIdx); 259 257 ts->ts_seqnum = MS(status, AR_SeqNum); 260 258 ts->tid = MS(status, AR_TxTid); ··· 262 264 ts->ts_status = 0; 263 265 ts->ts_flags = 0; 264 266 267 + if (status & AR_TxOpExceeded) 268 + ts->ts_status |= ATH9K_TXERR_XTXOP; 265 269 status = ACCESS_ONCE(ads->status2); 266 270 ts->ts_rssi_ctl0 = MS(status, AR_TxRSSIAnt00); 267 271 ts->ts_rssi_ctl1 = MS(status, AR_TxRSSIAnt01); ··· 415 415 static void ar9003_hw_set11n_aggr_first(struct ath_hw *ah, void *ds, 416 416 u32 aggrLen) 417 417 { 418 - #define FIRST_DESC_NDELIMS 60 419 418 struct ar9003_txc *ads = (struct ar9003_txc *) ds; 420 419 421 420 ads->ctl12 |= (AR_IsAggr | AR_MoreAggr); 422 421 423 - if (ah->ent_mode & AR_ENT_OTP_MPSD) { 424 - u32 ctl17, ndelim; 425 - /* 426 - * Add delimiter when using RTS/CTS with aggregation 427 - * and non enterprise AR9003 card 428 - */ 429 - ctl17 = ads->ctl17; 430 - ndelim = MS(ctl17, AR_PadDelim); 431 - 432 - if (ndelim < FIRST_DESC_NDELIMS) { 433 - aggrLen += (FIRST_DESC_NDELIMS - ndelim) * 4; 434 - ndelim = FIRST_DESC_NDELIMS; 435 - } 436 - 437 - ctl17 &= ~AR_AggrLen; 438 - ctl17 |= SM(aggrLen, AR_AggrLen); 439 - 440 - ctl17 &= ~AR_PadDelim; 441 - ctl17 |= SM(ndelim, AR_PadDelim); 442 - 443 - ads->ctl17 = ctl17; 444 - } else { 445 - ads->ctl17 &= ~AR_AggrLen; 446 - ads->ctl17 |= SM(aggrLen, AR_AggrLen); 447 - } 422 + ads->ctl17 &= ~AR_AggrLen; 423 + ads->ctl17 |= SM(aggrLen, AR_AggrLen); 448 424 } 449 425 450 426 static void ar9003_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds,
+2 -2
drivers/net/wireless/ath/ath9k/ar9003_phy.c
··· 482 482 (REG_READ(ah, AR_PHY_GEN_CTRL) & AR_PHY_GC_ENABLE_DAC_FIFO); 483 483 484 484 /* Enable 11n HT, 20 MHz */ 485 - phymode = AR_PHY_GC_HT_EN | AR_PHY_GC_SINGLE_HT_LTF1 | AR_PHY_GC_WALSH | 485 + phymode = AR_PHY_GC_HT_EN | AR_PHY_GC_SINGLE_HT_LTF1 | 486 486 AR_PHY_GC_SHORT_GI_40 | enableDacFifo; 487 487 488 488 /* Configure baseband for dynamic 20/40 operation */ ··· 540 540 udelay(synthDelay + BASE_ACTIVATE_DELAY); 541 541 } 542 542 543 - void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx) 543 + static void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx) 544 544 { 545 545 switch (rx) { 546 546 case 0x5:
-2
drivers/net/wireless/ath/ath9k/ar9003_phy.h
··· 1124 1124 #define AR_PHY_CL_TAB_CL_GAIN_MOD 0x1f 1125 1125 #define AR_PHY_CL_TAB_CL_GAIN_MOD_S 0 1126 1126 1127 - void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx); 1128 - 1129 1127 #endif /* AR9003_PHY_H */
+1673
drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
··· 1 + /* 2 + * Copyright (c) 2010 Atheros Communications Inc. 3 + * 4 + * Permission to use, copy, modify, and/or distribute this software for any 5 + * purpose with or without fee is hereby granted, provided that the above 6 + * copyright notice and this permission notice appear in all copies. 7 + * 8 + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 + */ 16 + 17 + #ifndef INITVALS_9580_1P0_H 18 + #define INITVALS_9580_1P0_H 19 + 20 + /* AR9580 1.0 */ 21 + 22 + static const u32 ar9580_1p0_modes_fast_clock[][3] = { 23 + /* Addr 5G_HT20 5G_HT40 */ 24 + {0x00001030, 0x00000268, 0x000004d0}, 25 + {0x00001070, 0x0000018c, 0x00000318}, 26 + {0x000010b0, 0x00000fd0, 0x00001fa0}, 27 + {0x00008014, 0x044c044c, 0x08980898}, 28 + {0x0000801c, 0x148ec02b, 0x148ec057}, 29 + {0x00008318, 0x000044c0, 0x00008980}, 30 + {0x00009e00, 0x0372131c, 0x0372131c}, 31 + {0x0000a230, 0x0000000b, 0x00000016}, 32 + {0x0000a254, 0x00000898, 0x00001130}, 33 + }; 34 + 35 + static const u32 ar9580_1p0_radio_postamble[][5] = { 36 + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ 37 + {0x0001609c, 0x0dd08f29, 0x0dd08f29, 0x0b283f31, 0x0b283f31}, 38 + {0x000160ac, 0xa4653c00, 0xa4653c00, 0x24652800, 0x24652800}, 39 + {0x000160b0, 0x03284f3e, 0x03284f3e, 0x05d08f20, 0x05d08f20}, 40 + {0x0001610c, 0x08000000, 0x00000000, 0x00000000, 0x00000000}, 41 + {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008}, 42 + {0x0001650c, 0x08000000, 0x00000000, 0x00000000, 0x00000000}, 43 + {0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008}, 44 + {0x0001690c, 0x08000000, 0x00000000, 0x00000000, 0x00000000}, 45 + {0x00016940, 0x10804008, 0x10804008, 0x50804008, 0x50804008}, 46 + }; 47 + 48 + static const u32 ar9580_1p0_baseband_core[][2] = { 49 + /* Addr allmodes */ 50 + {0x00009800, 0xafe68e30}, 51 + {0x00009804, 0xfd14e000}, 52 + {0x00009808, 0x9c0a9f6b}, 53 + {0x0000980c, 0x04900000}, 54 + {0x00009814, 0x3280c00a}, 55 + {0x00009818, 0x00000000}, 56 + {0x0000981c, 0x00020028}, 57 + {0x00009834, 0x6400a290}, 58 + {0x00009838, 0x0108ecff}, 59 + {0x0000983c, 0x0d000600}, 60 + {0x00009880, 0x201fff00}, 61 + {0x00009884, 0x00001042}, 62 + {0x000098a4, 0x00200400}, 63 + {0x000098b0, 0x32840bbe}, 64 + {0x000098d0, 0x004b6a8e}, 65 + {0x000098d4, 0x00000820}, 66 + {0x000098dc, 0x00000000}, 67 + {0x000098f0, 0x00000000}, 68 + {0x000098f4, 0x00000000}, 69 + {0x00009c04, 0xff55ff55}, 70 + {0x00009c08, 0x0320ff55}, 71 + {0x00009c0c, 0x00000000}, 72 + {0x00009c10, 0x00000000}, 73 + {0x00009c14, 0x00046384}, 74 + {0x00009c18, 0x05b6b440}, 75 + {0x00009c1c, 0x00b6b440}, 76 + {0x00009d00, 0xc080a333}, 77 + {0x00009d04, 0x40206c10}, 78 + {0x00009d08, 0x009c4060}, 79 + {0x00009d0c, 0x9883800a}, 80 + {0x00009d10, 0x01834061}, 81 + {0x00009d14, 0x00c0040b}, 82 + {0x00009d18, 0x00000000}, 83 + {0x00009e08, 0x0038230c}, 84 + {0x00009e24, 0x990bb515}, 85 + {0x00009e28, 0x0c6f0000}, 86 + {0x00009e30, 0x06336f77}, 87 + {0x00009e34, 0x6af6532f}, 88 + {0x00009e38, 0x0cc80c00}, 89 + {0x00009e40, 0x0d261820}, 90 + {0x00009e4c, 0x00001004}, 91 + {0x00009e50, 0x00ff03f1}, 92 + {0x00009e54, 0x00000000}, 93 + {0x00009fc0, 0x803e4788}, 94 + {0x00009fc4, 0x0001efb5}, 95 + {0x00009fcc, 0x40000014}, 96 + {0x00009fd0, 0x01193b93}, 97 + {0x0000a20c, 0x00000000}, 98 + {0x0000a220, 0x00000000}, 99 + {0x0000a224, 0x00000000}, 100 + {0x0000a228, 0x10002310}, 101 + {0x0000a23c, 0x00000000}, 102 + {0x0000a244, 0x0c000000}, 103 + {0x0000a2a0, 0x00000001}, 104 + {0x0000a2c0, 0x00000001}, 105 + {0x0000a2c8, 0x00000000}, 106 + {0x0000a2cc, 0x18c43433}, 107 + {0x0000a2d4, 0x00000000}, 108 + {0x0000a2ec, 0x00000000}, 109 + {0x0000a2f0, 0x00000000}, 110 + {0x0000a2f4, 0x00000000}, 111 + {0x0000a2f8, 0x00000000}, 112 + {0x0000a344, 0x00000000}, 113 + {0x0000a34c, 0x00000000}, 114 + {0x0000a350, 0x0000a000}, 115 + {0x0000a364, 0x00000000}, 116 + {0x0000a370, 0x00000000}, 117 + {0x0000a390, 0x00000001}, 118 + {0x0000a394, 0x00000444}, 119 + {0x0000a398, 0x001f0e0f}, 120 + {0x0000a39c, 0x0075393f}, 121 + {0x0000a3a0, 0xb79f6427}, 122 + {0x0000a3a4, 0x00000000}, 123 + {0x0000a3a8, 0xaaaaaaaa}, 124 + {0x0000a3ac, 0x3c466478}, 125 + {0x0000a3c0, 0x20202020}, 126 + {0x0000a3c4, 0x22222220}, 127 + {0x0000a3c8, 0x20200020}, 128 + {0x0000a3cc, 0x20202020}, 129 + {0x0000a3d0, 0x20202020}, 130 + {0x0000a3d4, 0x20202020}, 131 + {0x0000a3d8, 0x20202020}, 132 + {0x0000a3dc, 0x20202020}, 133 + {0x0000a3e0, 0x20202020}, 134 + {0x0000a3e4, 0x20202020}, 135 + {0x0000a3e8, 0x20202020}, 136 + {0x0000a3ec, 0x20202020}, 137 + {0x0000a3f0, 0x00000000}, 138 + {0x0000a3f4, 0x00000000}, 139 + {0x0000a3f8, 0x0c9bd380}, 140 + {0x0000a3fc, 0x000f0f01}, 141 + {0x0000a400, 0x8fa91f01}, 142 + {0x0000a404, 0x00000000}, 143 + {0x0000a408, 0x0e79e5c6}, 144 + {0x0000a40c, 0x00820820}, 145 + {0x0000a414, 0x1ce739ce}, 146 + {0x0000a418, 0x2d001dce}, 147 + {0x0000a41c, 0x1ce739ce}, 148 + {0x0000a420, 0x000001ce}, 149 + {0x0000a424, 0x1ce739ce}, 150 + {0x0000a428, 0x000001ce}, 151 + {0x0000a42c, 0x1ce739ce}, 152 + {0x0000a430, 0x1ce739ce}, 153 + {0x0000a434, 0x00000000}, 154 + {0x0000a438, 0x00001801}, 155 + {0x0000a43c, 0x00100000}, 156 + {0x0000a440, 0x00000000}, 157 + {0x0000a444, 0x00000000}, 158 + {0x0000a448, 0x05000080}, 159 + {0x0000a44c, 0x00000001}, 160 + {0x0000a450, 0x00010000}, 161 + {0x0000a458, 0x00000000}, 162 + {0x0000a640, 0x00000000}, 163 + {0x0000a644, 0x3fad9d74}, 164 + {0x0000a648, 0x0048060a}, 165 + {0x0000a64c, 0x00003c37}, 166 + {0x0000a670, 0x03020100}, 167 + {0x0000a674, 0x09080504}, 168 + {0x0000a678, 0x0d0c0b0a}, 169 + {0x0000a67c, 0x13121110}, 170 + {0x0000a680, 0x31301514}, 171 + {0x0000a684, 0x35343332}, 172 + {0x0000a688, 0x00000036}, 173 + {0x0000a690, 0x00000838}, 174 + {0x0000a7c0, 0x00000000}, 175 + {0x0000a7c4, 0xfffffffc}, 176 + {0x0000a7c8, 0x00000000}, 177 + {0x0000a7cc, 0x00000000}, 178 + {0x0000a7d0, 0x00000000}, 179 + {0x0000a7d4, 0x00000004}, 180 + {0x0000a7dc, 0x00000000}, 181 + {0x0000a8d0, 0x004b6a8e}, 182 + {0x0000a8d4, 0x00000820}, 183 + {0x0000a8dc, 0x00000000}, 184 + {0x0000a8f0, 0x00000000}, 185 + {0x0000a8f4, 0x00000000}, 186 + {0x0000b2d0, 0x00000080}, 187 + {0x0000b2d4, 0x00000000}, 188 + {0x0000b2ec, 0x00000000}, 189 + {0x0000b2f0, 0x00000000}, 190 + {0x0000b2f4, 0x00000000}, 191 + {0x0000b2f8, 0x00000000}, 192 + {0x0000b408, 0x0e79e5c0}, 193 + {0x0000b40c, 0x00820820}, 194 + {0x0000b420, 0x00000000}, 195 + {0x0000b8d0, 0x004b6a8e}, 196 + {0x0000b8d4, 0x00000820}, 197 + {0x0000b8dc, 0x00000000}, 198 + {0x0000b8f0, 0x00000000}, 199 + {0x0000b8f4, 0x00000000}, 200 + {0x0000c2d0, 0x00000080}, 201 + {0x0000c2d4, 0x00000000}, 202 + {0x0000c2ec, 0x00000000}, 203 + {0x0000c2f0, 0x00000000}, 204 + {0x0000c2f4, 0x00000000}, 205 + {0x0000c2f8, 0x00000000}, 206 + {0x0000c408, 0x0e79e5c0}, 207 + {0x0000c40c, 0x00820820}, 208 + {0x0000c420, 0x00000000}, 209 + }; 210 + 211 + static const u32 ar9580_1p0_mac_postamble[][5] = { 212 + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ 213 + {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160}, 214 + {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c}, 215 + {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38}, 216 + {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00}, 217 + {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b}, 218 + {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810}, 219 + {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a}, 220 + {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440}, 221 + }; 222 + 223 + static const u32 ar9580_1p0_low_ob_db_tx_gain_table[][5] = { 224 + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ 225 + {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352}, 226 + {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584}, 227 + {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800}, 228 + {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, 229 + {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, 230 + {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 231 + {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, 232 + {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004}, 233 + {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200}, 234 + {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202}, 235 + {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400}, 236 + {0x0000a518, 0x21002220, 0x21002220, 0x16000402, 0x16000402}, 237 + {0x0000a51c, 0x27002223, 0x27002223, 0x19000404, 0x19000404}, 238 + {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603}, 239 + {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02}, 240 + {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04}, 241 + {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20}, 242 + {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20}, 243 + {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22}, 244 + {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24}, 245 + {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640}, 246 + {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660}, 247 + {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861}, 248 + {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81}, 249 + {0x0000a54c, 0x5c02486b, 0x5c02486b, 0x47001a83, 0x47001a83}, 250 + {0x0000a550, 0x61024a6c, 0x61024a6c, 0x4a001c84, 0x4a001c84}, 251 + {0x0000a554, 0x66026a6c, 0x66026a6c, 0x4e001ce3, 0x4e001ce3}, 252 + {0x0000a558, 0x6b026e6c, 0x6b026e6c, 0x52001ce5, 0x52001ce5}, 253 + {0x0000a55c, 0x7002708c, 0x7002708c, 0x56001ce9, 0x56001ce9}, 254 + {0x0000a560, 0x7302b08a, 0x7302b08a, 0x5a001ceb, 0x5a001ceb}, 255 + {0x0000a564, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, 256 + {0x0000a568, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, 257 + {0x0000a56c, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, 258 + {0x0000a570, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, 259 + {0x0000a574, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, 260 + {0x0000a578, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, 261 + {0x0000a57c, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, 262 + {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, 263 + {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002}, 264 + {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004}, 265 + {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200}, 266 + {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202}, 267 + {0x0000a594, 0x1c800223, 0x1c800223, 0x12800400, 0x12800400}, 268 + {0x0000a598, 0x21802220, 0x21802220, 0x16800402, 0x16800402}, 269 + {0x0000a59c, 0x27802223, 0x27802223, 0x19800404, 0x19800404}, 270 + {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1c800603, 0x1c800603}, 271 + {0x0000a5a4, 0x2f822222, 0x2f822222, 0x21800a02, 0x21800a02}, 272 + {0x0000a5a8, 0x34822225, 0x34822225, 0x25800a04, 0x25800a04}, 273 + {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x28800a20, 0x28800a20}, 274 + {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2c800e20, 0x2c800e20}, 275 + {0x0000a5b4, 0x4282242a, 0x4282242a, 0x30800e22, 0x30800e22}, 276 + {0x0000a5b8, 0x4782244a, 0x4782244a, 0x34800e24, 0x34800e24}, 277 + {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x38801640, 0x38801640}, 278 + {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x3c801660, 0x3c801660}, 279 + {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3f801861, 0x3f801861}, 280 + {0x0000a5c8, 0x5782286c, 0x5782286c, 0x43801a81, 0x43801a81}, 281 + {0x0000a5cc, 0x5c82486b, 0x5c82486b, 0x47801a83, 0x47801a83}, 282 + {0x0000a5d0, 0x61824a6c, 0x61824a6c, 0x4a801c84, 0x4a801c84}, 283 + {0x0000a5d4, 0x66826a6c, 0x66826a6c, 0x4e801ce3, 0x4e801ce3}, 284 + {0x0000a5d8, 0x6b826e6c, 0x6b826e6c, 0x52801ce5, 0x52801ce5}, 285 + {0x0000a5dc, 0x7082708c, 0x7082708c, 0x56801ce9, 0x56801ce9}, 286 + {0x0000a5e0, 0x7382b08a, 0x7382b08a, 0x5a801ceb, 0x5a801ceb}, 287 + {0x0000a5e4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, 288 + {0x0000a5e8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, 289 + {0x0000a5ec, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, 290 + {0x0000a5f0, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, 291 + {0x0000a5f4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, 292 + {0x0000a5f8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, 293 + {0x0000a5fc, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, 294 + {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 295 + {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 296 + {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 297 + {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 298 + {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 299 + {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000}, 300 + {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501}, 301 + {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501}, 302 + {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03}, 303 + {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04}, 304 + {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04}, 305 + {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005}, 306 + {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, 307 + {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, 308 + {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, 309 + {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, 310 + {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352}, 311 + {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584}, 312 + {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800}, 313 + {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, 314 + {0x0000c2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352}, 315 + {0x0000c2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584}, 316 + {0x0000c2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800}, 317 + {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, 318 + {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, 319 + {0x00016048, 0x66480001, 0x66480001, 0x66480001, 0x66480001}, 320 + {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, 321 + {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, 322 + {0x00016448, 0x66480001, 0x66480001, 0x66480001, 0x66480001}, 323 + {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, 324 + {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, 325 + {0x00016848, 0x66480001, 0x66480001, 0x66480001, 0x66480001}, 326 + {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, 327 + }; 328 + 329 + static const u32 ar9580_1p0_high_power_tx_gain_table[][5] = { 330 + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ 331 + {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352}, 332 + {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584}, 333 + {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800}, 334 + {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, 335 + {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, 336 + {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 337 + {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, 338 + {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004}, 339 + {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200}, 340 + {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202}, 341 + {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400}, 342 + {0x0000a518, 0x21002220, 0x21002220, 0x16000402, 0x16000402}, 343 + {0x0000a51c, 0x27002223, 0x27002223, 0x19000404, 0x19000404}, 344 + {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603}, 345 + {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02}, 346 + {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04}, 347 + {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20}, 348 + {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20}, 349 + {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22}, 350 + {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24}, 351 + {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640}, 352 + {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660}, 353 + {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861}, 354 + {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81}, 355 + {0x0000a54c, 0x5c02486b, 0x5c02486b, 0x47001a83, 0x47001a83}, 356 + {0x0000a550, 0x61024a6c, 0x61024a6c, 0x4a001c84, 0x4a001c84}, 357 + {0x0000a554, 0x66026a6c, 0x66026a6c, 0x4e001ce3, 0x4e001ce3}, 358 + {0x0000a558, 0x6b026e6c, 0x6b026e6c, 0x52001ce5, 0x52001ce5}, 359 + {0x0000a55c, 0x7002708c, 0x7002708c, 0x56001ce9, 0x56001ce9}, 360 + {0x0000a560, 0x7302b08a, 0x7302b08a, 0x5a001ceb, 0x5a001ceb}, 361 + {0x0000a564, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, 362 + {0x0000a568, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, 363 + {0x0000a56c, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, 364 + {0x0000a570, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, 365 + {0x0000a574, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, 366 + {0x0000a578, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, 367 + {0x0000a57c, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, 368 + {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, 369 + {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002}, 370 + {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004}, 371 + {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200}, 372 + {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202}, 373 + {0x0000a594, 0x1c800223, 0x1c800223, 0x12800400, 0x12800400}, 374 + {0x0000a598, 0x21802220, 0x21802220, 0x16800402, 0x16800402}, 375 + {0x0000a59c, 0x27802223, 0x27802223, 0x19800404, 0x19800404}, 376 + {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1c800603, 0x1c800603}, 377 + {0x0000a5a4, 0x2f822222, 0x2f822222, 0x21800a02, 0x21800a02}, 378 + {0x0000a5a8, 0x34822225, 0x34822225, 0x25800a04, 0x25800a04}, 379 + {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x28800a20, 0x28800a20}, 380 + {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2c800e20, 0x2c800e20}, 381 + {0x0000a5b4, 0x4282242a, 0x4282242a, 0x30800e22, 0x30800e22}, 382 + {0x0000a5b8, 0x4782244a, 0x4782244a, 0x34800e24, 0x34800e24}, 383 + {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x38801640, 0x38801640}, 384 + {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x3c801660, 0x3c801660}, 385 + {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3f801861, 0x3f801861}, 386 + {0x0000a5c8, 0x5782286c, 0x5782286c, 0x43801a81, 0x43801a81}, 387 + {0x0000a5cc, 0x5c82486b, 0x5c82486b, 0x47801a83, 0x47801a83}, 388 + {0x0000a5d0, 0x61824a6c, 0x61824a6c, 0x4a801c84, 0x4a801c84}, 389 + {0x0000a5d4, 0x66826a6c, 0x66826a6c, 0x4e801ce3, 0x4e801ce3}, 390 + {0x0000a5d8, 0x6b826e6c, 0x6b826e6c, 0x52801ce5, 0x52801ce5}, 391 + {0x0000a5dc, 0x7082708c, 0x7082708c, 0x56801ce9, 0x56801ce9}, 392 + {0x0000a5e0, 0x7382b08a, 0x7382b08a, 0x5a801ceb, 0x5a801ceb}, 393 + {0x0000a5e4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, 394 + {0x0000a5e8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, 395 + {0x0000a5ec, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, 396 + {0x0000a5f0, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, 397 + {0x0000a5f4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, 398 + {0x0000a5f8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, 399 + {0x0000a5fc, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, 400 + {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 401 + {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 402 + {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 403 + {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 404 + {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 405 + {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000}, 406 + {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501}, 407 + {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501}, 408 + {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03}, 409 + {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04}, 410 + {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04}, 411 + {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005}, 412 + {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, 413 + {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, 414 + {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, 415 + {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, 416 + {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352}, 417 + {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584}, 418 + {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800}, 419 + {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, 420 + {0x0000c2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352}, 421 + {0x0000c2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584}, 422 + {0x0000c2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800}, 423 + {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, 424 + {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, 425 + {0x00016048, 0x66480001, 0x66480001, 0x66480001, 0x66480001}, 426 + {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, 427 + {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, 428 + {0x00016448, 0x66480001, 0x66480001, 0x66480001, 0x66480001}, 429 + {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, 430 + {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, 431 + {0x00016848, 0x66480001, 0x66480001, 0x66480001, 0x66480001}, 432 + {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, 433 + }; 434 + 435 + static const u32 ar9580_1p0_lowest_ob_db_tx_gain_table[][5] = { 436 + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ 437 + {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352}, 438 + {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584}, 439 + {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800}, 440 + {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, 441 + {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, 442 + {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 443 + {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, 444 + {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004}, 445 + {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200}, 446 + {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202}, 447 + {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400}, 448 + {0x0000a518, 0x21002220, 0x21002220, 0x16000402, 0x16000402}, 449 + {0x0000a51c, 0x27002223, 0x27002223, 0x19000404, 0x19000404}, 450 + {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603}, 451 + {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02}, 452 + {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04}, 453 + {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20}, 454 + {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20}, 455 + {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22}, 456 + {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24}, 457 + {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640}, 458 + {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660}, 459 + {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861}, 460 + {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81}, 461 + {0x0000a54c, 0x5c02486b, 0x5c02486b, 0x47001a83, 0x47001a83}, 462 + {0x0000a550, 0x61024a6c, 0x61024a6c, 0x4a001c84, 0x4a001c84}, 463 + {0x0000a554, 0x66026a6c, 0x66026a6c, 0x4e001ce3, 0x4e001ce3}, 464 + {0x0000a558, 0x6b026e6c, 0x6b026e6c, 0x52001ce5, 0x52001ce5}, 465 + {0x0000a55c, 0x7002708c, 0x7002708c, 0x56001ce9, 0x56001ce9}, 466 + {0x0000a560, 0x7302b08a, 0x7302b08a, 0x5a001ceb, 0x5a001ceb}, 467 + {0x0000a564, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, 468 + {0x0000a568, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, 469 + {0x0000a56c, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, 470 + {0x0000a570, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, 471 + {0x0000a574, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, 472 + {0x0000a578, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, 473 + {0x0000a57c, 0x7702b08c, 0x7702b08c, 0x5d001eec, 0x5d001eec}, 474 + {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, 475 + {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002}, 476 + {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004}, 477 + {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200}, 478 + {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202}, 479 + {0x0000a594, 0x1c800223, 0x1c800223, 0x12800400, 0x12800400}, 480 + {0x0000a598, 0x21802220, 0x21802220, 0x16800402, 0x16800402}, 481 + {0x0000a59c, 0x27802223, 0x27802223, 0x19800404, 0x19800404}, 482 + {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1c800603, 0x1c800603}, 483 + {0x0000a5a4, 0x2f822222, 0x2f822222, 0x21800a02, 0x21800a02}, 484 + {0x0000a5a8, 0x34822225, 0x34822225, 0x25800a04, 0x25800a04}, 485 + {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x28800a20, 0x28800a20}, 486 + {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2c800e20, 0x2c800e20}, 487 + {0x0000a5b4, 0x4282242a, 0x4282242a, 0x30800e22, 0x30800e22}, 488 + {0x0000a5b8, 0x4782244a, 0x4782244a, 0x34800e24, 0x34800e24}, 489 + {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x38801640, 0x38801640}, 490 + {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x3c801660, 0x3c801660}, 491 + {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3f801861, 0x3f801861}, 492 + {0x0000a5c8, 0x5782286c, 0x5782286c, 0x43801a81, 0x43801a81}, 493 + {0x0000a5cc, 0x5c82486b, 0x5c82486b, 0x47801a83, 0x47801a83}, 494 + {0x0000a5d0, 0x61824a6c, 0x61824a6c, 0x4a801c84, 0x4a801c84}, 495 + {0x0000a5d4, 0x66826a6c, 0x66826a6c, 0x4e801ce3, 0x4e801ce3}, 496 + {0x0000a5d8, 0x6b826e6c, 0x6b826e6c, 0x52801ce5, 0x52801ce5}, 497 + {0x0000a5dc, 0x7082708c, 0x7082708c, 0x56801ce9, 0x56801ce9}, 498 + {0x0000a5e0, 0x7382b08a, 0x7382b08a, 0x5a801ceb, 0x5a801ceb}, 499 + {0x0000a5e4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, 500 + {0x0000a5e8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, 501 + {0x0000a5ec, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, 502 + {0x0000a5f0, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, 503 + {0x0000a5f4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, 504 + {0x0000a5f8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, 505 + {0x0000a5fc, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, 506 + {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 507 + {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 508 + {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 509 + {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 510 + {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 511 + {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000}, 512 + {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501}, 513 + {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501}, 514 + {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03}, 515 + {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04}, 516 + {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04}, 517 + {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005}, 518 + {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, 519 + {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, 520 + {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, 521 + {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, 522 + {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352}, 523 + {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584}, 524 + {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800}, 525 + {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, 526 + {0x0000c2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352}, 527 + {0x0000c2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584}, 528 + {0x0000c2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800}, 529 + {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, 530 + {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, 531 + {0x00016048, 0x62480001, 0x62480001, 0x62480001, 0x62480001}, 532 + {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, 533 + {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, 534 + {0x00016448, 0x62480001, 0x62480001, 0x62480001, 0x62480001}, 535 + {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, 536 + {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, 537 + {0x00016848, 0x62480001, 0x62480001, 0x62480001, 0x62480001}, 538 + {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, 539 + }; 540 + 541 + static const u32 ar9580_1p0_baseband_core_txfir_coeff_japan_2484[][2] = { 542 + /* Addr allmodes */ 543 + {0x0000a398, 0x00000000}, 544 + {0x0000a39c, 0x6f7f0301}, 545 + {0x0000a3a0, 0xca9228ee}, 546 + }; 547 + 548 + static const u32 ar9580_1p0_mac_core[][2] = { 549 + /* Addr allmodes */ 550 + {0x00000008, 0x00000000}, 551 + {0x00000030, 0x00020085}, 552 + {0x00000034, 0x00000005}, 553 + {0x00000040, 0x00000000}, 554 + {0x00000044, 0x00000000}, 555 + {0x00000048, 0x00000008}, 556 + {0x0000004c, 0x00000010}, 557 + {0x00000050, 0x00000000}, 558 + {0x00001040, 0x002ffc0f}, 559 + {0x00001044, 0x002ffc0f}, 560 + {0x00001048, 0x002ffc0f}, 561 + {0x0000104c, 0x002ffc0f}, 562 + {0x00001050, 0x002ffc0f}, 563 + {0x00001054, 0x002ffc0f}, 564 + {0x00001058, 0x002ffc0f}, 565 + {0x0000105c, 0x002ffc0f}, 566 + {0x00001060, 0x002ffc0f}, 567 + {0x00001064, 0x002ffc0f}, 568 + {0x000010f0, 0x00000100}, 569 + {0x00001270, 0x00000000}, 570 + {0x000012b0, 0x00000000}, 571 + {0x000012f0, 0x00000000}, 572 + {0x0000143c, 0x00000000}, 573 + {0x0000147c, 0x00000000}, 574 + {0x00008000, 0x00000000}, 575 + {0x00008004, 0x00000000}, 576 + {0x00008008, 0x00000000}, 577 + {0x0000800c, 0x00000000}, 578 + {0x00008018, 0x00000000}, 579 + {0x00008020, 0x00000000}, 580 + {0x00008038, 0x00000000}, 581 + {0x0000803c, 0x00000000}, 582 + {0x00008040, 0x00000000}, 583 + {0x00008044, 0x00000000}, 584 + {0x00008048, 0x00000000}, 585 + {0x0000804c, 0xffffffff}, 586 + {0x00008054, 0x00000000}, 587 + {0x00008058, 0x00000000}, 588 + {0x0000805c, 0x000fc78f}, 589 + {0x00008060, 0x0000000f}, 590 + {0x00008064, 0x00000000}, 591 + {0x00008070, 0x00000310}, 592 + {0x00008074, 0x00000020}, 593 + {0x00008078, 0x00000000}, 594 + {0x0000809c, 0x0000000f}, 595 + {0x000080a0, 0x00000000}, 596 + {0x000080a4, 0x02ff0000}, 597 + {0x000080a8, 0x0e070605}, 598 + {0x000080ac, 0x0000000d}, 599 + {0x000080b0, 0x00000000}, 600 + {0x000080b4, 0x00000000}, 601 + {0x000080b8, 0x00000000}, 602 + {0x000080bc, 0x00000000}, 603 + {0x000080c0, 0x2a800000}, 604 + {0x000080c4, 0x06900168}, 605 + {0x000080c8, 0x13881c22}, 606 + {0x000080cc, 0x01f40000}, 607 + {0x000080d0, 0x00252500}, 608 + {0x000080d4, 0x00a00000}, 609 + {0x000080d8, 0x00400000}, 610 + {0x000080dc, 0x00000000}, 611 + {0x000080e0, 0xffffffff}, 612 + {0x000080e4, 0x0000ffff}, 613 + {0x000080e8, 0x3f3f3f3f}, 614 + {0x000080ec, 0x00000000}, 615 + {0x000080f0, 0x00000000}, 616 + {0x000080f4, 0x00000000}, 617 + {0x000080fc, 0x00020000}, 618 + {0x00008100, 0x00000000}, 619 + {0x00008108, 0x00000052}, 620 + {0x0000810c, 0x00000000}, 621 + {0x00008110, 0x00000000}, 622 + {0x00008114, 0x000007ff}, 623 + {0x00008118, 0x000000aa}, 624 + {0x0000811c, 0x00003210}, 625 + {0x00008124, 0x00000000}, 626 + {0x00008128, 0x00000000}, 627 + {0x0000812c, 0x00000000}, 628 + {0x00008130, 0x00000000}, 629 + {0x00008134, 0x00000000}, 630 + {0x00008138, 0x00000000}, 631 + {0x0000813c, 0x0000ffff}, 632 + {0x00008144, 0xffffffff}, 633 + {0x00008168, 0x00000000}, 634 + {0x0000816c, 0x00000000}, 635 + {0x000081c0, 0x00000000}, 636 + {0x000081c4, 0x33332210}, 637 + {0x000081ec, 0x00000000}, 638 + {0x000081f0, 0x00000000}, 639 + {0x000081f4, 0x00000000}, 640 + {0x000081f8, 0x00000000}, 641 + {0x000081fc, 0x00000000}, 642 + {0x00008240, 0x00100000}, 643 + {0x00008244, 0x0010f400}, 644 + {0x00008248, 0x00000800}, 645 + {0x0000824c, 0x0001e800}, 646 + {0x00008250, 0x00000000}, 647 + {0x00008254, 0x00000000}, 648 + {0x00008258, 0x00000000}, 649 + {0x0000825c, 0x40000000}, 650 + {0x00008260, 0x00080922}, 651 + {0x00008264, 0x9bc00010}, 652 + {0x00008268, 0xffffffff}, 653 + {0x0000826c, 0x0000ffff}, 654 + {0x00008270, 0x00000000}, 655 + {0x00008274, 0x40000000}, 656 + {0x00008278, 0x003e4180}, 657 + {0x0000827c, 0x00000004}, 658 + {0x00008284, 0x0000002c}, 659 + {0x00008288, 0x0000002c}, 660 + {0x0000828c, 0x000000ff}, 661 + {0x00008294, 0x00000000}, 662 + {0x00008298, 0x00000000}, 663 + {0x0000829c, 0x00000000}, 664 + {0x00008300, 0x00000140}, 665 + {0x00008314, 0x00000000}, 666 + {0x0000831c, 0x0000010d}, 667 + {0x00008328, 0x00000000}, 668 + {0x0000832c, 0x00000007}, 669 + {0x00008330, 0x00000302}, 670 + {0x00008334, 0x00000700}, 671 + {0x00008338, 0x00ff0000}, 672 + {0x0000833c, 0x02400000}, 673 + {0x00008340, 0x000107ff}, 674 + {0x00008344, 0xaa48105b}, 675 + {0x00008348, 0x008f0000}, 676 + {0x0000835c, 0x00000000}, 677 + {0x00008360, 0xffffffff}, 678 + {0x00008364, 0xffffffff}, 679 + {0x00008368, 0x00000000}, 680 + {0x00008370, 0x00000000}, 681 + {0x00008374, 0x000000ff}, 682 + {0x00008378, 0x00000000}, 683 + {0x0000837c, 0x00000000}, 684 + {0x00008380, 0xffffffff}, 685 + {0x00008384, 0xffffffff}, 686 + {0x00008390, 0xffffffff}, 687 + {0x00008394, 0xffffffff}, 688 + {0x00008398, 0x00000000}, 689 + {0x0000839c, 0x00000000}, 690 + {0x000083a0, 0x00000000}, 691 + {0x000083a4, 0x0000fa14}, 692 + {0x000083a8, 0x000f0c00}, 693 + {0x000083ac, 0x33332210}, 694 + {0x000083b0, 0x33332210}, 695 + {0x000083b4, 0x33332210}, 696 + {0x000083b8, 0x33332210}, 697 + {0x000083bc, 0x00000000}, 698 + {0x000083c0, 0x00000000}, 699 + {0x000083c4, 0x00000000}, 700 + {0x000083c8, 0x00000000}, 701 + {0x000083cc, 0x00000200}, 702 + {0x000083d0, 0x000301ff}, 703 + }; 704 + 705 + static const u32 ar9580_1p0_mixed_ob_db_tx_gain_table[][5] = { 706 + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ 707 + {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352}, 708 + {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584}, 709 + {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800}, 710 + {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, 711 + {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, 712 + {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 713 + {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, 714 + {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004}, 715 + {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200}, 716 + {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202}, 717 + {0x0000a514, 0x1c000223, 0x1c000223, 0x11000400, 0x11000400}, 718 + {0x0000a518, 0x21002220, 0x21002220, 0x15000402, 0x15000402}, 719 + {0x0000a51c, 0x27002223, 0x27002223, 0x19000404, 0x19000404}, 720 + {0x0000a520, 0x2b022220, 0x2b022220, 0x1b000603, 0x1b000603}, 721 + {0x0000a524, 0x2f022222, 0x2f022222, 0x1f000a02, 0x1f000a02}, 722 + {0x0000a528, 0x34022225, 0x34022225, 0x23000a04, 0x23000a04}, 723 + {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x26000a20, 0x26000a20}, 724 + {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2a000e20, 0x2a000e20}, 725 + {0x0000a534, 0x4202242a, 0x4202242a, 0x2e000e22, 0x2e000e22}, 726 + {0x0000a538, 0x4702244a, 0x4702244a, 0x31000e24, 0x31000e24}, 727 + {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x34001640, 0x34001640}, 728 + {0x0000a540, 0x4e02246c, 0x4e02246c, 0x38001660, 0x38001660}, 729 + {0x0000a544, 0x5302266c, 0x5302266c, 0x3b001861, 0x3b001861}, 730 + {0x0000a548, 0x5702286c, 0x5702286c, 0x3e001a81, 0x3e001a81}, 731 + {0x0000a54c, 0x5c02486b, 0x5c02486b, 0x42001a83, 0x42001a83}, 732 + {0x0000a550, 0x61024a6c, 0x61024a6c, 0x44001c84, 0x44001c84}, 733 + {0x0000a554, 0x66026a6c, 0x66026a6c, 0x48001ce3, 0x48001ce3}, 734 + {0x0000a558, 0x6b026e6c, 0x6b026e6c, 0x4c001ce5, 0x4c001ce5}, 735 + {0x0000a55c, 0x7002708c, 0x7002708c, 0x50001ce9, 0x50001ce9}, 736 + {0x0000a560, 0x7302b08a, 0x7302b08a, 0x54001ceb, 0x54001ceb}, 737 + {0x0000a564, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec}, 738 + {0x0000a568, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec}, 739 + {0x0000a56c, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec}, 740 + {0x0000a570, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec}, 741 + {0x0000a574, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec}, 742 + {0x0000a578, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec}, 743 + {0x0000a57c, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec}, 744 + {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, 745 + {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002}, 746 + {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004}, 747 + {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200}, 748 + {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202}, 749 + {0x0000a594, 0x1c800223, 0x1c800223, 0x11800400, 0x11800400}, 750 + {0x0000a598, 0x21802220, 0x21802220, 0x15800402, 0x15800402}, 751 + {0x0000a59c, 0x27802223, 0x27802223, 0x19800404, 0x19800404}, 752 + {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1b800603, 0x1b800603}, 753 + {0x0000a5a4, 0x2f822222, 0x2f822222, 0x1f800a02, 0x1f800a02}, 754 + {0x0000a5a8, 0x34822225, 0x34822225, 0x23800a04, 0x23800a04}, 755 + {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x26800a20, 0x26800a20}, 756 + {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2a800e20, 0x2a800e20}, 757 + {0x0000a5b4, 0x4282242a, 0x4282242a, 0x2e800e22, 0x2e800e22}, 758 + {0x0000a5b8, 0x4782244a, 0x4782244a, 0x31800e24, 0x31800e24}, 759 + {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x34801640, 0x34801640}, 760 + {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x38801660, 0x38801660}, 761 + {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3b801861, 0x3b801861}, 762 + {0x0000a5c8, 0x5782286c, 0x5782286c, 0x3e801a81, 0x3e801a81}, 763 + {0x0000a5cc, 0x5c82486b, 0x5c82486b, 0x42801a83, 0x42801a83}, 764 + {0x0000a5d0, 0x61824a6c, 0x61824a6c, 0x44801c84, 0x44801c84}, 765 + {0x0000a5d4, 0x66826a6c, 0x66826a6c, 0x48801ce3, 0x48801ce3}, 766 + {0x0000a5d8, 0x6b826e6c, 0x6b826e6c, 0x4c801ce5, 0x4c801ce5}, 767 + {0x0000a5dc, 0x7082708c, 0x7082708c, 0x50801ce9, 0x50801ce9}, 768 + {0x0000a5e0, 0x7382b08a, 0x7382b08a, 0x54801ceb, 0x54801ceb}, 769 + {0x0000a5e4, 0x7782b08c, 0x7782b08c, 0x56801eec, 0x56801eec}, 770 + {0x0000a5e8, 0x7782b08c, 0x7782b08c, 0x56801eec, 0x56801eec}, 771 + {0x0000a5ec, 0x7782b08c, 0x7782b08c, 0x56801eec, 0x56801eec}, 772 + {0x0000a5f0, 0x7782b08c, 0x7782b08c, 0x56801eec, 0x56801eec}, 773 + {0x0000a5f4, 0x7782b08c, 0x7782b08c, 0x56801eec, 0x56801eec}, 774 + {0x0000a5f8, 0x7782b08c, 0x7782b08c, 0x56801eec, 0x56801eec}, 775 + {0x0000a5fc, 0x7782b08c, 0x7782b08c, 0x56801eec, 0x56801eec}, 776 + {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 777 + {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 778 + {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 779 + {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 780 + {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 781 + {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000}, 782 + {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501}, 783 + {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501}, 784 + {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03}, 785 + {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04}, 786 + {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04}, 787 + {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005}, 788 + {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, 789 + {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, 790 + {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, 791 + {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, 792 + {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352}, 793 + {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584}, 794 + {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800}, 795 + {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, 796 + {0x0000c2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352}, 797 + {0x0000c2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584}, 798 + {0x0000c2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800}, 799 + {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, 800 + {0x00016044, 0x012492d4, 0x012492d4, 0x056db2e4, 0x056db2e4}, 801 + {0x00016048, 0x66480001, 0x66480001, 0x8e480001, 0x8e480001}, 802 + {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, 803 + {0x00016444, 0x012492d4, 0x012492d4, 0x056db2e4, 0x056db2e4}, 804 + {0x00016448, 0x66480001, 0x66480001, 0x8e480001, 0x8e480001}, 805 + {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, 806 + {0x00016844, 0x012492d4, 0x012492d4, 0x056db2e4, 0x056db2e4}, 807 + {0x00016848, 0x66480001, 0x66480001, 0x8e480001, 0x8e480001}, 808 + {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, 809 + }; 810 + 811 + static const u32 ar9580_1p0_wo_xlna_rx_gain_table[][2] = { 812 + /* Addr allmodes */ 813 + {0x0000a000, 0x00010000}, 814 + {0x0000a004, 0x00030002}, 815 + {0x0000a008, 0x00050004}, 816 + {0x0000a00c, 0x00810080}, 817 + {0x0000a010, 0x00830082}, 818 + {0x0000a014, 0x01810180}, 819 + {0x0000a018, 0x01830182}, 820 + {0x0000a01c, 0x01850184}, 821 + {0x0000a020, 0x01890188}, 822 + {0x0000a024, 0x018b018a}, 823 + {0x0000a028, 0x018d018c}, 824 + {0x0000a02c, 0x03820190}, 825 + {0x0000a030, 0x03840383}, 826 + {0x0000a034, 0x03880385}, 827 + {0x0000a038, 0x038a0389}, 828 + {0x0000a03c, 0x038c038b}, 829 + {0x0000a040, 0x0390038d}, 830 + {0x0000a044, 0x03920391}, 831 + {0x0000a048, 0x03940393}, 832 + {0x0000a04c, 0x03960395}, 833 + {0x0000a050, 0x00000000}, 834 + {0x0000a054, 0x00000000}, 835 + {0x0000a058, 0x00000000}, 836 + {0x0000a05c, 0x00000000}, 837 + {0x0000a060, 0x00000000}, 838 + {0x0000a064, 0x00000000}, 839 + {0x0000a068, 0x00000000}, 840 + {0x0000a06c, 0x00000000}, 841 + {0x0000a070, 0x00000000}, 842 + {0x0000a074, 0x00000000}, 843 + {0x0000a078, 0x00000000}, 844 + {0x0000a07c, 0x00000000}, 845 + {0x0000a080, 0x29292929}, 846 + {0x0000a084, 0x29292929}, 847 + {0x0000a088, 0x29292929}, 848 + {0x0000a08c, 0x29292929}, 849 + {0x0000a090, 0x22292929}, 850 + {0x0000a094, 0x1d1d2222}, 851 + {0x0000a098, 0x0c111117}, 852 + {0x0000a09c, 0x00030303}, 853 + {0x0000a0a0, 0x00000000}, 854 + {0x0000a0a4, 0x00000000}, 855 + {0x0000a0a8, 0x00000000}, 856 + {0x0000a0ac, 0x00000000}, 857 + {0x0000a0b0, 0x00000000}, 858 + {0x0000a0b4, 0x00000000}, 859 + {0x0000a0b8, 0x00000000}, 860 + {0x0000a0bc, 0x00000000}, 861 + {0x0000a0c0, 0x001f0000}, 862 + {0x0000a0c4, 0x01000101}, 863 + {0x0000a0c8, 0x011e011f}, 864 + {0x0000a0cc, 0x011c011d}, 865 + {0x0000a0d0, 0x02030204}, 866 + {0x0000a0d4, 0x02010202}, 867 + {0x0000a0d8, 0x021f0200}, 868 + {0x0000a0dc, 0x0302021e}, 869 + {0x0000a0e0, 0x03000301}, 870 + {0x0000a0e4, 0x031e031f}, 871 + {0x0000a0e8, 0x0402031d}, 872 + {0x0000a0ec, 0x04000401}, 873 + {0x0000a0f0, 0x041e041f}, 874 + {0x0000a0f4, 0x0502041d}, 875 + {0x0000a0f8, 0x05000501}, 876 + {0x0000a0fc, 0x051e051f}, 877 + {0x0000a100, 0x06010602}, 878 + {0x0000a104, 0x061f0600}, 879 + {0x0000a108, 0x061d061e}, 880 + {0x0000a10c, 0x07020703}, 881 + {0x0000a110, 0x07000701}, 882 + {0x0000a114, 0x00000000}, 883 + {0x0000a118, 0x00000000}, 884 + {0x0000a11c, 0x00000000}, 885 + {0x0000a120, 0x00000000}, 886 + {0x0000a124, 0x00000000}, 887 + {0x0000a128, 0x00000000}, 888 + {0x0000a12c, 0x00000000}, 889 + {0x0000a130, 0x00000000}, 890 + {0x0000a134, 0x00000000}, 891 + {0x0000a138, 0x00000000}, 892 + {0x0000a13c, 0x00000000}, 893 + {0x0000a140, 0x001f0000}, 894 + {0x0000a144, 0x01000101}, 895 + {0x0000a148, 0x011e011f}, 896 + {0x0000a14c, 0x011c011d}, 897 + {0x0000a150, 0x02030204}, 898 + {0x0000a154, 0x02010202}, 899 + {0x0000a158, 0x021f0200}, 900 + {0x0000a15c, 0x0302021e}, 901 + {0x0000a160, 0x03000301}, 902 + {0x0000a164, 0x031e031f}, 903 + {0x0000a168, 0x0402031d}, 904 + {0x0000a16c, 0x04000401}, 905 + {0x0000a170, 0x041e041f}, 906 + {0x0000a174, 0x0502041d}, 907 + {0x0000a178, 0x05000501}, 908 + {0x0000a17c, 0x051e051f}, 909 + {0x0000a180, 0x06010602}, 910 + {0x0000a184, 0x061f0600}, 911 + {0x0000a188, 0x061d061e}, 912 + {0x0000a18c, 0x07020703}, 913 + {0x0000a190, 0x07000701}, 914 + {0x0000a194, 0x00000000}, 915 + {0x0000a198, 0x00000000}, 916 + {0x0000a19c, 0x00000000}, 917 + {0x0000a1a0, 0x00000000}, 918 + {0x0000a1a4, 0x00000000}, 919 + {0x0000a1a8, 0x00000000}, 920 + {0x0000a1ac, 0x00000000}, 921 + {0x0000a1b0, 0x00000000}, 922 + {0x0000a1b4, 0x00000000}, 923 + {0x0000a1b8, 0x00000000}, 924 + {0x0000a1bc, 0x00000000}, 925 + {0x0000a1c0, 0x00000000}, 926 + {0x0000a1c4, 0x00000000}, 927 + {0x0000a1c8, 0x00000000}, 928 + {0x0000a1cc, 0x00000000}, 929 + {0x0000a1d0, 0x00000000}, 930 + {0x0000a1d4, 0x00000000}, 931 + {0x0000a1d8, 0x00000000}, 932 + {0x0000a1dc, 0x00000000}, 933 + {0x0000a1e0, 0x00000000}, 934 + {0x0000a1e4, 0x00000000}, 935 + {0x0000a1e8, 0x00000000}, 936 + {0x0000a1ec, 0x00000000}, 937 + {0x0000a1f0, 0x00000396}, 938 + {0x0000a1f4, 0x00000396}, 939 + {0x0000a1f8, 0x00000396}, 940 + {0x0000a1fc, 0x00000196}, 941 + {0x0000b000, 0x00010000}, 942 + {0x0000b004, 0x00030002}, 943 + {0x0000b008, 0x00050004}, 944 + {0x0000b00c, 0x00810080}, 945 + {0x0000b010, 0x00830082}, 946 + {0x0000b014, 0x01810180}, 947 + {0x0000b018, 0x01830182}, 948 + {0x0000b01c, 0x01850184}, 949 + {0x0000b020, 0x02810280}, 950 + {0x0000b024, 0x02830282}, 951 + {0x0000b028, 0x02850284}, 952 + {0x0000b02c, 0x02890288}, 953 + {0x0000b030, 0x028b028a}, 954 + {0x0000b034, 0x0388028c}, 955 + {0x0000b038, 0x038a0389}, 956 + {0x0000b03c, 0x038c038b}, 957 + {0x0000b040, 0x0390038d}, 958 + {0x0000b044, 0x03920391}, 959 + {0x0000b048, 0x03940393}, 960 + {0x0000b04c, 0x03960395}, 961 + {0x0000b050, 0x00000000}, 962 + {0x0000b054, 0x00000000}, 963 + {0x0000b058, 0x00000000}, 964 + {0x0000b05c, 0x00000000}, 965 + {0x0000b060, 0x00000000}, 966 + {0x0000b064, 0x00000000}, 967 + {0x0000b068, 0x00000000}, 968 + {0x0000b06c, 0x00000000}, 969 + {0x0000b070, 0x00000000}, 970 + {0x0000b074, 0x00000000}, 971 + {0x0000b078, 0x00000000}, 972 + {0x0000b07c, 0x00000000}, 973 + {0x0000b080, 0x32323232}, 974 + {0x0000b084, 0x2f2f3232}, 975 + {0x0000b088, 0x23282a2d}, 976 + {0x0000b08c, 0x1c1e2123}, 977 + {0x0000b090, 0x14171919}, 978 + {0x0000b094, 0x0e0e1214}, 979 + {0x0000b098, 0x03050707}, 980 + {0x0000b09c, 0x00030303}, 981 + {0x0000b0a0, 0x00000000}, 982 + {0x0000b0a4, 0x00000000}, 983 + {0x0000b0a8, 0x00000000}, 984 + {0x0000b0ac, 0x00000000}, 985 + {0x0000b0b0, 0x00000000}, 986 + {0x0000b0b4, 0x00000000}, 987 + {0x0000b0b8, 0x00000000}, 988 + {0x0000b0bc, 0x00000000}, 989 + {0x0000b0c0, 0x003f0020}, 990 + {0x0000b0c4, 0x00400041}, 991 + {0x0000b0c8, 0x0140005f}, 992 + {0x0000b0cc, 0x0160015f}, 993 + {0x0000b0d0, 0x017e017f}, 994 + {0x0000b0d4, 0x02410242}, 995 + {0x0000b0d8, 0x025f0240}, 996 + {0x0000b0dc, 0x027f0260}, 997 + {0x0000b0e0, 0x0341027e}, 998 + {0x0000b0e4, 0x035f0340}, 999 + {0x0000b0e8, 0x037f0360}, 1000 + {0x0000b0ec, 0x04400441}, 1001 + {0x0000b0f0, 0x0460045f}, 1002 + {0x0000b0f4, 0x0541047f}, 1003 + {0x0000b0f8, 0x055f0540}, 1004 + {0x0000b0fc, 0x057f0560}, 1005 + {0x0000b100, 0x06400641}, 1006 + {0x0000b104, 0x0660065f}, 1007 + {0x0000b108, 0x067e067f}, 1008 + {0x0000b10c, 0x07410742}, 1009 + {0x0000b110, 0x075f0740}, 1010 + {0x0000b114, 0x077f0760}, 1011 + {0x0000b118, 0x07800781}, 1012 + {0x0000b11c, 0x07a0079f}, 1013 + {0x0000b120, 0x07c107bf}, 1014 + {0x0000b124, 0x000007c0}, 1015 + {0x0000b128, 0x00000000}, 1016 + {0x0000b12c, 0x00000000}, 1017 + {0x0000b130, 0x00000000}, 1018 + {0x0000b134, 0x00000000}, 1019 + {0x0000b138, 0x00000000}, 1020 + {0x0000b13c, 0x00000000}, 1021 + {0x0000b140, 0x003f0020}, 1022 + {0x0000b144, 0x00400041}, 1023 + {0x0000b148, 0x0140005f}, 1024 + {0x0000b14c, 0x0160015f}, 1025 + {0x0000b150, 0x017e017f}, 1026 + {0x0000b154, 0x02410242}, 1027 + {0x0000b158, 0x025f0240}, 1028 + {0x0000b15c, 0x027f0260}, 1029 + {0x0000b160, 0x0341027e}, 1030 + {0x0000b164, 0x035f0340}, 1031 + {0x0000b168, 0x037f0360}, 1032 + {0x0000b16c, 0x04400441}, 1033 + {0x0000b170, 0x0460045f}, 1034 + {0x0000b174, 0x0541047f}, 1035 + {0x0000b178, 0x055f0540}, 1036 + {0x0000b17c, 0x057f0560}, 1037 + {0x0000b180, 0x06400641}, 1038 + {0x0000b184, 0x0660065f}, 1039 + {0x0000b188, 0x067e067f}, 1040 + {0x0000b18c, 0x07410742}, 1041 + {0x0000b190, 0x075f0740}, 1042 + {0x0000b194, 0x077f0760}, 1043 + {0x0000b198, 0x07800781}, 1044 + {0x0000b19c, 0x07a0079f}, 1045 + {0x0000b1a0, 0x07c107bf}, 1046 + {0x0000b1a4, 0x000007c0}, 1047 + {0x0000b1a8, 0x00000000}, 1048 + {0x0000b1ac, 0x00000000}, 1049 + {0x0000b1b0, 0x00000000}, 1050 + {0x0000b1b4, 0x00000000}, 1051 + {0x0000b1b8, 0x00000000}, 1052 + {0x0000b1bc, 0x00000000}, 1053 + {0x0000b1c0, 0x00000000}, 1054 + {0x0000b1c4, 0x00000000}, 1055 + {0x0000b1c8, 0x00000000}, 1056 + {0x0000b1cc, 0x00000000}, 1057 + {0x0000b1d0, 0x00000000}, 1058 + {0x0000b1d4, 0x00000000}, 1059 + {0x0000b1d8, 0x00000000}, 1060 + {0x0000b1dc, 0x00000000}, 1061 + {0x0000b1e0, 0x00000000}, 1062 + {0x0000b1e4, 0x00000000}, 1063 + {0x0000b1e8, 0x00000000}, 1064 + {0x0000b1ec, 0x00000000}, 1065 + {0x0000b1f0, 0x00000396}, 1066 + {0x0000b1f4, 0x00000396}, 1067 + {0x0000b1f8, 0x00000396}, 1068 + {0x0000b1fc, 0x00000196}, 1069 + }; 1070 + 1071 + static const u32 ar9580_1p0_soc_postamble[][5] = { 1072 + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ 1073 + {0x00007010, 0x00000023, 0x00000023, 0x00000023, 0x00000023}, 1074 + }; 1075 + 1076 + static const u32 ar9580_1p0_high_ob_db_tx_gain_table[][5] = { 1077 + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ 1078 + {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352}, 1079 + {0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584}, 1080 + {0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800}, 1081 + {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, 1082 + {0x0000a410, 0x000050d8, 0x000050d8, 0x000050d9, 0x000050d9}, 1083 + {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000}, 1084 + {0x0000a504, 0x04002222, 0x04002222, 0x04000002, 0x04000002}, 1085 + {0x0000a508, 0x09002421, 0x09002421, 0x08000004, 0x08000004}, 1086 + {0x0000a50c, 0x0d002621, 0x0d002621, 0x0b000200, 0x0b000200}, 1087 + {0x0000a510, 0x13004620, 0x13004620, 0x0f000202, 0x0f000202}, 1088 + {0x0000a514, 0x19004a20, 0x19004a20, 0x11000400, 0x11000400}, 1089 + {0x0000a518, 0x1d004e20, 0x1d004e20, 0x15000402, 0x15000402}, 1090 + {0x0000a51c, 0x21005420, 0x21005420, 0x19000404, 0x19000404}, 1091 + {0x0000a520, 0x26005e20, 0x26005e20, 0x1b000603, 0x1b000603}, 1092 + {0x0000a524, 0x2b005e40, 0x2b005e40, 0x1f000a02, 0x1f000a02}, 1093 + {0x0000a528, 0x2f005e42, 0x2f005e42, 0x23000a04, 0x23000a04}, 1094 + {0x0000a52c, 0x33005e44, 0x33005e44, 0x26000a20, 0x26000a20}, 1095 + {0x0000a530, 0x38005e65, 0x38005e65, 0x2a000e20, 0x2a000e20}, 1096 + {0x0000a534, 0x3c005e69, 0x3c005e69, 0x2e000e22, 0x2e000e22}, 1097 + {0x0000a538, 0x40005e6b, 0x40005e6b, 0x31000e24, 0x31000e24}, 1098 + {0x0000a53c, 0x44005e6d, 0x44005e6d, 0x34001640, 0x34001640}, 1099 + {0x0000a540, 0x49005e72, 0x49005e72, 0x38001660, 0x38001660}, 1100 + {0x0000a544, 0x4e005eb2, 0x4e005eb2, 0x3b001861, 0x3b001861}, 1101 + {0x0000a548, 0x53005f12, 0x53005f12, 0x3e001a81, 0x3e001a81}, 1102 + {0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83}, 1103 + {0x0000a550, 0x5e025f12, 0x5e025f12, 0x44001c84, 0x44001c84}, 1104 + {0x0000a554, 0x61027f12, 0x61027f12, 0x48001ce3, 0x48001ce3}, 1105 + {0x0000a558, 0x6702bf12, 0x6702bf12, 0x4c001ce5, 0x4c001ce5}, 1106 + {0x0000a55c, 0x6b02bf14, 0x6b02bf14, 0x50001ce9, 0x50001ce9}, 1107 + {0x0000a560, 0x6f02bf16, 0x6f02bf16, 0x54001ceb, 0x54001ceb}, 1108 + {0x0000a564, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, 1109 + {0x0000a568, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, 1110 + {0x0000a56c, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, 1111 + {0x0000a570, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, 1112 + {0x0000a574, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, 1113 + {0x0000a578, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, 1114 + {0x0000a57c, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec}, 1115 + {0x0000a580, 0x00802220, 0x00802220, 0x00800000, 0x00800000}, 1116 + {0x0000a584, 0x04802222, 0x04802222, 0x04800002, 0x04800002}, 1117 + {0x0000a588, 0x09802421, 0x09802421, 0x08800004, 0x08800004}, 1118 + {0x0000a58c, 0x0d802621, 0x0d802621, 0x0b800200, 0x0b800200}, 1119 + {0x0000a590, 0x13804620, 0x13804620, 0x0f800202, 0x0f800202}, 1120 + {0x0000a594, 0x19804a20, 0x19804a20, 0x11800400, 0x11800400}, 1121 + {0x0000a598, 0x1d804e20, 0x1d804e20, 0x15800402, 0x15800402}, 1122 + {0x0000a59c, 0x21805420, 0x21805420, 0x19800404, 0x19800404}, 1123 + {0x0000a5a0, 0x26805e20, 0x26805e20, 0x1b800603, 0x1b800603}, 1124 + {0x0000a5a4, 0x2b805e40, 0x2b805e40, 0x1f800a02, 0x1f800a02}, 1125 + {0x0000a5a8, 0x2f805e42, 0x2f805e42, 0x23800a04, 0x23800a04}, 1126 + {0x0000a5ac, 0x33805e44, 0x33805e44, 0x26800a20, 0x26800a20}, 1127 + {0x0000a5b0, 0x38805e65, 0x38805e65, 0x2a800e20, 0x2a800e20}, 1128 + {0x0000a5b4, 0x3c805e69, 0x3c805e69, 0x2e800e22, 0x2e800e22}, 1129 + {0x0000a5b8, 0x40805e6b, 0x40805e6b, 0x31800e24, 0x31800e24}, 1130 + {0x0000a5bc, 0x44805e6d, 0x44805e6d, 0x34801640, 0x34801640}, 1131 + {0x0000a5c0, 0x49805e72, 0x49805e72, 0x38801660, 0x38801660}, 1132 + {0x0000a5c4, 0x4e805eb2, 0x4e805eb2, 0x3b801861, 0x3b801861}, 1133 + {0x0000a5c8, 0x53805f12, 0x53805f12, 0x3e801a81, 0x3e801a81}, 1134 + {0x0000a5cc, 0x59825eb2, 0x59825eb2, 0x42801a83, 0x42801a83}, 1135 + {0x0000a5d0, 0x5e825f12, 0x5e825f12, 0x44801c84, 0x44801c84}, 1136 + {0x0000a5d4, 0x61827f12, 0x61827f12, 0x48801ce3, 0x48801ce3}, 1137 + {0x0000a5d8, 0x6782bf12, 0x6782bf12, 0x4c801ce5, 0x4c801ce5}, 1138 + {0x0000a5dc, 0x6b82bf14, 0x6b82bf14, 0x50801ce9, 0x50801ce9}, 1139 + {0x0000a5e0, 0x6f82bf16, 0x6f82bf16, 0x54801ceb, 0x54801ceb}, 1140 + {0x0000a5e4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, 1141 + {0x0000a5e8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, 1142 + {0x0000a5ec, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, 1143 + {0x0000a5f0, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, 1144 + {0x0000a5f4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, 1145 + {0x0000a5f8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, 1146 + {0x0000a5fc, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, 1147 + {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 1148 + {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 1149 + {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 1150 + {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 1151 + {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000}, 1152 + {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000}, 1153 + {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501}, 1154 + {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501}, 1155 + {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03}, 1156 + {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04}, 1157 + {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04}, 1158 + {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005}, 1159 + {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005}, 1160 + {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005}, 1161 + {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005}, 1162 + {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005}, 1163 + {0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352}, 1164 + {0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584}, 1165 + {0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800}, 1166 + {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, 1167 + {0x0000c2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352}, 1168 + {0x0000c2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584}, 1169 + {0x0000c2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800}, 1170 + {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000}, 1171 + {0x00016044, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4}, 1172 + {0x00016048, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001}, 1173 + {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, 1174 + {0x00016444, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4}, 1175 + {0x00016448, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001}, 1176 + {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, 1177 + {0x00016844, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4}, 1178 + {0x00016848, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001}, 1179 + {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, 1180 + }; 1181 + 1182 + static const u32 ar9580_1p0_soc_preamble[][2] = { 1183 + /* Addr allmodes */ 1184 + {0x000040a4, 0x00a0c1c9}, 1185 + {0x00007008, 0x00000000}, 1186 + {0x00007020, 0x00000000}, 1187 + {0x00007034, 0x00000002}, 1188 + {0x00007038, 0x000004c2}, 1189 + {0x00007048, 0x00000008}, 1190 + }; 1191 + 1192 + static const u32 ar9580_1p0_rx_gain_table[][2] = { 1193 + /* Addr allmodes */ 1194 + {0x0000a000, 0x00010000}, 1195 + {0x0000a004, 0x00030002}, 1196 + {0x0000a008, 0x00050004}, 1197 + {0x0000a00c, 0x00810080}, 1198 + {0x0000a010, 0x00830082}, 1199 + {0x0000a014, 0x01810180}, 1200 + {0x0000a018, 0x01830182}, 1201 + {0x0000a01c, 0x01850184}, 1202 + {0x0000a020, 0x01890188}, 1203 + {0x0000a024, 0x018b018a}, 1204 + {0x0000a028, 0x018d018c}, 1205 + {0x0000a02c, 0x01910190}, 1206 + {0x0000a030, 0x01930192}, 1207 + {0x0000a034, 0x01950194}, 1208 + {0x0000a038, 0x038a0196}, 1209 + {0x0000a03c, 0x038c038b}, 1210 + {0x0000a040, 0x0390038d}, 1211 + {0x0000a044, 0x03920391}, 1212 + {0x0000a048, 0x03940393}, 1213 + {0x0000a04c, 0x03960395}, 1214 + {0x0000a050, 0x00000000}, 1215 + {0x0000a054, 0x00000000}, 1216 + {0x0000a058, 0x00000000}, 1217 + {0x0000a05c, 0x00000000}, 1218 + {0x0000a060, 0x00000000}, 1219 + {0x0000a064, 0x00000000}, 1220 + {0x0000a068, 0x00000000}, 1221 + {0x0000a06c, 0x00000000}, 1222 + {0x0000a070, 0x00000000}, 1223 + {0x0000a074, 0x00000000}, 1224 + {0x0000a078, 0x00000000}, 1225 + {0x0000a07c, 0x00000000}, 1226 + {0x0000a080, 0x22222229}, 1227 + {0x0000a084, 0x1d1d1d1d}, 1228 + {0x0000a088, 0x1d1d1d1d}, 1229 + {0x0000a08c, 0x1d1d1d1d}, 1230 + {0x0000a090, 0x171d1d1d}, 1231 + {0x0000a094, 0x11111717}, 1232 + {0x0000a098, 0x00030311}, 1233 + {0x0000a09c, 0x00000000}, 1234 + {0x0000a0a0, 0x00000000}, 1235 + {0x0000a0a4, 0x00000000}, 1236 + {0x0000a0a8, 0x00000000}, 1237 + {0x0000a0ac, 0x00000000}, 1238 + {0x0000a0b0, 0x00000000}, 1239 + {0x0000a0b4, 0x00000000}, 1240 + {0x0000a0b8, 0x00000000}, 1241 + {0x0000a0bc, 0x00000000}, 1242 + {0x0000a0c0, 0x001f0000}, 1243 + {0x0000a0c4, 0x01000101}, 1244 + {0x0000a0c8, 0x011e011f}, 1245 + {0x0000a0cc, 0x011c011d}, 1246 + {0x0000a0d0, 0x02030204}, 1247 + {0x0000a0d4, 0x02010202}, 1248 + {0x0000a0d8, 0x021f0200}, 1249 + {0x0000a0dc, 0x0302021e}, 1250 + {0x0000a0e0, 0x03000301}, 1251 + {0x0000a0e4, 0x031e031f}, 1252 + {0x0000a0e8, 0x0402031d}, 1253 + {0x0000a0ec, 0x04000401}, 1254 + {0x0000a0f0, 0x041e041f}, 1255 + {0x0000a0f4, 0x0502041d}, 1256 + {0x0000a0f8, 0x05000501}, 1257 + {0x0000a0fc, 0x051e051f}, 1258 + {0x0000a100, 0x06010602}, 1259 + {0x0000a104, 0x061f0600}, 1260 + {0x0000a108, 0x061d061e}, 1261 + {0x0000a10c, 0x07020703}, 1262 + {0x0000a110, 0x07000701}, 1263 + {0x0000a114, 0x00000000}, 1264 + {0x0000a118, 0x00000000}, 1265 + {0x0000a11c, 0x00000000}, 1266 + {0x0000a120, 0x00000000}, 1267 + {0x0000a124, 0x00000000}, 1268 + {0x0000a128, 0x00000000}, 1269 + {0x0000a12c, 0x00000000}, 1270 + {0x0000a130, 0x00000000}, 1271 + {0x0000a134, 0x00000000}, 1272 + {0x0000a138, 0x00000000}, 1273 + {0x0000a13c, 0x00000000}, 1274 + {0x0000a140, 0x001f0000}, 1275 + {0x0000a144, 0x01000101}, 1276 + {0x0000a148, 0x011e011f}, 1277 + {0x0000a14c, 0x011c011d}, 1278 + {0x0000a150, 0x02030204}, 1279 + {0x0000a154, 0x02010202}, 1280 + {0x0000a158, 0x021f0200}, 1281 + {0x0000a15c, 0x0302021e}, 1282 + {0x0000a160, 0x03000301}, 1283 + {0x0000a164, 0x031e031f}, 1284 + {0x0000a168, 0x0402031d}, 1285 + {0x0000a16c, 0x04000401}, 1286 + {0x0000a170, 0x041e041f}, 1287 + {0x0000a174, 0x0502041d}, 1288 + {0x0000a178, 0x05000501}, 1289 + {0x0000a17c, 0x051e051f}, 1290 + {0x0000a180, 0x06010602}, 1291 + {0x0000a184, 0x061f0600}, 1292 + {0x0000a188, 0x061d061e}, 1293 + {0x0000a18c, 0x07020703}, 1294 + {0x0000a190, 0x07000701}, 1295 + {0x0000a194, 0x00000000}, 1296 + {0x0000a198, 0x00000000}, 1297 + {0x0000a19c, 0x00000000}, 1298 + {0x0000a1a0, 0x00000000}, 1299 + {0x0000a1a4, 0x00000000}, 1300 + {0x0000a1a8, 0x00000000}, 1301 + {0x0000a1ac, 0x00000000}, 1302 + {0x0000a1b0, 0x00000000}, 1303 + {0x0000a1b4, 0x00000000}, 1304 + {0x0000a1b8, 0x00000000}, 1305 + {0x0000a1bc, 0x00000000}, 1306 + {0x0000a1c0, 0x00000000}, 1307 + {0x0000a1c4, 0x00000000}, 1308 + {0x0000a1c8, 0x00000000}, 1309 + {0x0000a1cc, 0x00000000}, 1310 + {0x0000a1d0, 0x00000000}, 1311 + {0x0000a1d4, 0x00000000}, 1312 + {0x0000a1d8, 0x00000000}, 1313 + {0x0000a1dc, 0x00000000}, 1314 + {0x0000a1e0, 0x00000000}, 1315 + {0x0000a1e4, 0x00000000}, 1316 + {0x0000a1e8, 0x00000000}, 1317 + {0x0000a1ec, 0x00000000}, 1318 + {0x0000a1f0, 0x00000396}, 1319 + {0x0000a1f4, 0x00000396}, 1320 + {0x0000a1f8, 0x00000396}, 1321 + {0x0000a1fc, 0x00000196}, 1322 + {0x0000b000, 0x00010000}, 1323 + {0x0000b004, 0x00030002}, 1324 + {0x0000b008, 0x00050004}, 1325 + {0x0000b00c, 0x00810080}, 1326 + {0x0000b010, 0x00830082}, 1327 + {0x0000b014, 0x01810180}, 1328 + {0x0000b018, 0x01830182}, 1329 + {0x0000b01c, 0x01850184}, 1330 + {0x0000b020, 0x02810280}, 1331 + {0x0000b024, 0x02830282}, 1332 + {0x0000b028, 0x02850284}, 1333 + {0x0000b02c, 0x02890288}, 1334 + {0x0000b030, 0x028b028a}, 1335 + {0x0000b034, 0x0388028c}, 1336 + {0x0000b038, 0x038a0389}, 1337 + {0x0000b03c, 0x038c038b}, 1338 + {0x0000b040, 0x0390038d}, 1339 + {0x0000b044, 0x03920391}, 1340 + {0x0000b048, 0x03940393}, 1341 + {0x0000b04c, 0x03960395}, 1342 + {0x0000b050, 0x00000000}, 1343 + {0x0000b054, 0x00000000}, 1344 + {0x0000b058, 0x00000000}, 1345 + {0x0000b05c, 0x00000000}, 1346 + {0x0000b060, 0x00000000}, 1347 + {0x0000b064, 0x00000000}, 1348 + {0x0000b068, 0x00000000}, 1349 + {0x0000b06c, 0x00000000}, 1350 + {0x0000b070, 0x00000000}, 1351 + {0x0000b074, 0x00000000}, 1352 + {0x0000b078, 0x00000000}, 1353 + {0x0000b07c, 0x00000000}, 1354 + {0x0000b080, 0x2a2d2f32}, 1355 + {0x0000b084, 0x21232328}, 1356 + {0x0000b088, 0x19191c1e}, 1357 + {0x0000b08c, 0x12141417}, 1358 + {0x0000b090, 0x07070e0e}, 1359 + {0x0000b094, 0x03030305}, 1360 + {0x0000b098, 0x00000003}, 1361 + {0x0000b09c, 0x00000000}, 1362 + {0x0000b0a0, 0x00000000}, 1363 + {0x0000b0a4, 0x00000000}, 1364 + {0x0000b0a8, 0x00000000}, 1365 + {0x0000b0ac, 0x00000000}, 1366 + {0x0000b0b0, 0x00000000}, 1367 + {0x0000b0b4, 0x00000000}, 1368 + {0x0000b0b8, 0x00000000}, 1369 + {0x0000b0bc, 0x00000000}, 1370 + {0x0000b0c0, 0x003f0020}, 1371 + {0x0000b0c4, 0x00400041}, 1372 + {0x0000b0c8, 0x0140005f}, 1373 + {0x0000b0cc, 0x0160015f}, 1374 + {0x0000b0d0, 0x017e017f}, 1375 + {0x0000b0d4, 0x02410242}, 1376 + {0x0000b0d8, 0x025f0240}, 1377 + {0x0000b0dc, 0x027f0260}, 1378 + {0x0000b0e0, 0x0341027e}, 1379 + {0x0000b0e4, 0x035f0340}, 1380 + {0x0000b0e8, 0x037f0360}, 1381 + {0x0000b0ec, 0x04400441}, 1382 + {0x0000b0f0, 0x0460045f}, 1383 + {0x0000b0f4, 0x0541047f}, 1384 + {0x0000b0f8, 0x055f0540}, 1385 + {0x0000b0fc, 0x057f0560}, 1386 + {0x0000b100, 0x06400641}, 1387 + {0x0000b104, 0x0660065f}, 1388 + {0x0000b108, 0x067e067f}, 1389 + {0x0000b10c, 0x07410742}, 1390 + {0x0000b110, 0x075f0740}, 1391 + {0x0000b114, 0x077f0760}, 1392 + {0x0000b118, 0x07800781}, 1393 + {0x0000b11c, 0x07a0079f}, 1394 + {0x0000b120, 0x07c107bf}, 1395 + {0x0000b124, 0x000007c0}, 1396 + {0x0000b128, 0x00000000}, 1397 + {0x0000b12c, 0x00000000}, 1398 + {0x0000b130, 0x00000000}, 1399 + {0x0000b134, 0x00000000}, 1400 + {0x0000b138, 0x00000000}, 1401 + {0x0000b13c, 0x00000000}, 1402 + {0x0000b140, 0x003f0020}, 1403 + {0x0000b144, 0x00400041}, 1404 + {0x0000b148, 0x0140005f}, 1405 + {0x0000b14c, 0x0160015f}, 1406 + {0x0000b150, 0x017e017f}, 1407 + {0x0000b154, 0x02410242}, 1408 + {0x0000b158, 0x025f0240}, 1409 + {0x0000b15c, 0x027f0260}, 1410 + {0x0000b160, 0x0341027e}, 1411 + {0x0000b164, 0x035f0340}, 1412 + {0x0000b168, 0x037f0360}, 1413 + {0x0000b16c, 0x04400441}, 1414 + {0x0000b170, 0x0460045f}, 1415 + {0x0000b174, 0x0541047f}, 1416 + {0x0000b178, 0x055f0540}, 1417 + {0x0000b17c, 0x057f0560}, 1418 + {0x0000b180, 0x06400641}, 1419 + {0x0000b184, 0x0660065f}, 1420 + {0x0000b188, 0x067e067f}, 1421 + {0x0000b18c, 0x07410742}, 1422 + {0x0000b190, 0x075f0740}, 1423 + {0x0000b194, 0x077f0760}, 1424 + {0x0000b198, 0x07800781}, 1425 + {0x0000b19c, 0x07a0079f}, 1426 + {0x0000b1a0, 0x07c107bf}, 1427 + {0x0000b1a4, 0x000007c0}, 1428 + {0x0000b1a8, 0x00000000}, 1429 + {0x0000b1ac, 0x00000000}, 1430 + {0x0000b1b0, 0x00000000}, 1431 + {0x0000b1b4, 0x00000000}, 1432 + {0x0000b1b8, 0x00000000}, 1433 + {0x0000b1bc, 0x00000000}, 1434 + {0x0000b1c0, 0x00000000}, 1435 + {0x0000b1c4, 0x00000000}, 1436 + {0x0000b1c8, 0x00000000}, 1437 + {0x0000b1cc, 0x00000000}, 1438 + {0x0000b1d0, 0x00000000}, 1439 + {0x0000b1d4, 0x00000000}, 1440 + {0x0000b1d8, 0x00000000}, 1441 + {0x0000b1dc, 0x00000000}, 1442 + {0x0000b1e0, 0x00000000}, 1443 + {0x0000b1e4, 0x00000000}, 1444 + {0x0000b1e8, 0x00000000}, 1445 + {0x0000b1ec, 0x00000000}, 1446 + {0x0000b1f0, 0x00000396}, 1447 + {0x0000b1f4, 0x00000396}, 1448 + {0x0000b1f8, 0x00000396}, 1449 + {0x0000b1fc, 0x00000196}, 1450 + }; 1451 + 1452 + static const u32 ar9580_1p0_radio_core[][2] = { 1453 + /* Addr allmodes */ 1454 + {0x00016000, 0x36db6db6}, 1455 + {0x00016004, 0x6db6db40}, 1456 + {0x00016008, 0x73f00000}, 1457 + {0x0001600c, 0x00000000}, 1458 + {0x00016040, 0x7f80fff8}, 1459 + {0x0001604c, 0x76d005b5}, 1460 + {0x00016050, 0x556cf031}, 1461 + {0x00016054, 0x13449440}, 1462 + {0x00016058, 0x0c51c92c}, 1463 + {0x0001605c, 0x3db7fffc}, 1464 + {0x00016060, 0xfffffffc}, 1465 + {0x00016064, 0x000f0278}, 1466 + {0x0001606c, 0x6db60000}, 1467 + {0x00016080, 0x00000000}, 1468 + {0x00016084, 0x0e48048c}, 1469 + {0x00016088, 0x54214514}, 1470 + {0x0001608c, 0x119f481e}, 1471 + {0x00016090, 0x24926490}, 1472 + {0x00016098, 0xd2888888}, 1473 + {0x000160a0, 0x0a108ffe}, 1474 + {0x000160a4, 0x812fc370}, 1475 + {0x000160a8, 0x423c8000}, 1476 + {0x000160b4, 0x92480080}, 1477 + {0x000160c0, 0x00adb6d0}, 1478 + {0x000160c4, 0x6db6db60}, 1479 + {0x000160c8, 0x6db6db6c}, 1480 + {0x000160cc, 0x01e6c000}, 1481 + {0x00016100, 0x3fffbe01}, 1482 + {0x00016104, 0xfff80000}, 1483 + {0x00016108, 0x00080010}, 1484 + {0x00016144, 0x02084080}, 1485 + {0x00016148, 0x00000000}, 1486 + {0x00016280, 0x058a0001}, 1487 + {0x00016284, 0x3d840208}, 1488 + {0x00016288, 0x05a20408}, 1489 + {0x0001628c, 0x00038c07}, 1490 + {0x00016290, 0x00000004}, 1491 + {0x00016294, 0x458aa14f}, 1492 + {0x00016380, 0x00000000}, 1493 + {0x00016384, 0x00000000}, 1494 + {0x00016388, 0x00800700}, 1495 + {0x0001638c, 0x00800700}, 1496 + {0x00016390, 0x00800700}, 1497 + {0x00016394, 0x00000000}, 1498 + {0x00016398, 0x00000000}, 1499 + {0x0001639c, 0x00000000}, 1500 + {0x000163a0, 0x00000001}, 1501 + {0x000163a4, 0x00000001}, 1502 + {0x000163a8, 0x00000000}, 1503 + {0x000163ac, 0x00000000}, 1504 + {0x000163b0, 0x00000000}, 1505 + {0x000163b4, 0x00000000}, 1506 + {0x000163b8, 0x00000000}, 1507 + {0x000163bc, 0x00000000}, 1508 + {0x000163c0, 0x000000a0}, 1509 + {0x000163c4, 0x000c0000}, 1510 + {0x000163c8, 0x14021402}, 1511 + {0x000163cc, 0x00001402}, 1512 + {0x000163d0, 0x00000000}, 1513 + {0x000163d4, 0x00000000}, 1514 + {0x00016400, 0x36db6db6}, 1515 + {0x00016404, 0x6db6db40}, 1516 + {0x00016408, 0x73f00000}, 1517 + {0x0001640c, 0x00000000}, 1518 + {0x00016440, 0x7f80fff8}, 1519 + {0x0001644c, 0x76d005b5}, 1520 + {0x00016450, 0x556cf031}, 1521 + {0x00016454, 0x13449440}, 1522 + {0x00016458, 0x0c51c92c}, 1523 + {0x0001645c, 0x3db7fffc}, 1524 + {0x00016460, 0xfffffffc}, 1525 + {0x00016464, 0x000f0278}, 1526 + {0x0001646c, 0x6db60000}, 1527 + {0x00016500, 0x3fffbe01}, 1528 + {0x00016504, 0xfff80000}, 1529 + {0x00016508, 0x00080010}, 1530 + {0x00016544, 0x02084080}, 1531 + {0x00016548, 0x00000000}, 1532 + {0x00016780, 0x00000000}, 1533 + {0x00016784, 0x00000000}, 1534 + {0x00016788, 0x00800700}, 1535 + {0x0001678c, 0x00800700}, 1536 + {0x00016790, 0x00800700}, 1537 + {0x00016794, 0x00000000}, 1538 + {0x00016798, 0x00000000}, 1539 + {0x0001679c, 0x00000000}, 1540 + {0x000167a0, 0x00000001}, 1541 + {0x000167a4, 0x00000001}, 1542 + {0x000167a8, 0x00000000}, 1543 + {0x000167ac, 0x00000000}, 1544 + {0x000167b0, 0x00000000}, 1545 + {0x000167b4, 0x00000000}, 1546 + {0x000167b8, 0x00000000}, 1547 + {0x000167bc, 0x00000000}, 1548 + {0x000167c0, 0x000000a0}, 1549 + {0x000167c4, 0x000c0000}, 1550 + {0x000167c8, 0x14021402}, 1551 + {0x000167cc, 0x00001402}, 1552 + {0x000167d0, 0x00000000}, 1553 + {0x000167d4, 0x00000000}, 1554 + {0x00016800, 0x36db6db6}, 1555 + {0x00016804, 0x6db6db40}, 1556 + {0x00016808, 0x73f00000}, 1557 + {0x0001680c, 0x00000000}, 1558 + {0x00016840, 0x7f80fff8}, 1559 + {0x0001684c, 0x76d005b5}, 1560 + {0x00016850, 0x556cf031}, 1561 + {0x00016854, 0x13449440}, 1562 + {0x00016858, 0x0c51c92c}, 1563 + {0x0001685c, 0x3db7fffc}, 1564 + {0x00016860, 0xfffffffc}, 1565 + {0x00016864, 0x000f0278}, 1566 + {0x0001686c, 0x6db60000}, 1567 + {0x00016900, 0x3fffbe01}, 1568 + {0x00016904, 0xfff80000}, 1569 + {0x00016908, 0x00080010}, 1570 + {0x00016944, 0x02084080}, 1571 + {0x00016948, 0x00000000}, 1572 + {0x00016b80, 0x00000000}, 1573 + {0x00016b84, 0x00000000}, 1574 + {0x00016b88, 0x00800700}, 1575 + {0x00016b8c, 0x00800700}, 1576 + {0x00016b90, 0x00800700}, 1577 + {0x00016b94, 0x00000000}, 1578 + {0x00016b98, 0x00000000}, 1579 + {0x00016b9c, 0x00000000}, 1580 + {0x00016ba0, 0x00000001}, 1581 + {0x00016ba4, 0x00000001}, 1582 + {0x00016ba8, 0x00000000}, 1583 + {0x00016bac, 0x00000000}, 1584 + {0x00016bb0, 0x00000000}, 1585 + {0x00016bb4, 0x00000000}, 1586 + {0x00016bb8, 0x00000000}, 1587 + {0x00016bbc, 0x00000000}, 1588 + {0x00016bc0, 0x000000a0}, 1589 + {0x00016bc4, 0x000c0000}, 1590 + {0x00016bc8, 0x14021402}, 1591 + {0x00016bcc, 0x00001402}, 1592 + {0x00016bd0, 0x00000000}, 1593 + {0x00016bd4, 0x00000000}, 1594 + }; 1595 + 1596 + static const u32 ar9580_1p0_baseband_postamble[][5] = { 1597 + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ 1598 + {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011}, 1599 + {0x00009820, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e}, 1600 + {0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0}, 1601 + {0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881}, 1602 + {0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4}, 1603 + {0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c}, 1604 + {0x00009c00, 0x000000c4, 0x000000c4, 0x000000c4, 0x000000c4}, 1605 + {0x00009e00, 0x0372111a, 0x0372111a, 0x037216a0, 0x037216a0}, 1606 + {0x00009e04, 0x001c2020, 0x001c2020, 0x001c2020, 0x001c2020}, 1607 + {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2}, 1608 + {0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e}, 1609 + {0x00009e14, 0x37b95d5e, 0x37b9605e, 0x3379605e, 0x33795d5e}, 1610 + {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 1611 + {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c}, 1612 + {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce}, 1613 + {0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021}, 1614 + {0x00009e3c, 0xcf946220, 0xcf946220, 0xcf946222, 0xcf946222}, 1615 + {0x00009e44, 0x02321e27, 0x02321e27, 0x02291e27, 0x02291e27}, 1616 + {0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012}, 1617 + {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000}, 1618 + {0x0000a204, 0x000036c0, 0x000036c4, 0x000036c4, 0x000036c0}, 1619 + {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004}, 1620 + {0x0000a22c, 0x07e26a2f, 0x07e26a2f, 0x01026a2f, 0x01026a2f}, 1621 + {0x0000a230, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b}, 1622 + {0x0000a234, 0x00000fff, 0x10000fff, 0x10000fff, 0x00000fff}, 1623 + {0x0000a238, 0xffb01018, 0xffb01018, 0xffb01018, 0xffb01018}, 1624 + {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108}, 1625 + {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898}, 1626 + {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002}, 1627 + {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e}, 1628 + {0x0000a260, 0x0a021501, 0x0a021501, 0x3a021501, 0x3a021501}, 1629 + {0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e}, 1630 + {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b}, 1631 + {0x0000a284, 0x00000000, 0x00000000, 0x00000150, 0x00000150}, 1632 + {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110}, 1633 + {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222}, 1634 + {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18}, 1635 + {0x0000a2d0, 0x00041981, 0x00041981, 0x00041981, 0x00041982}, 1636 + {0x0000a2d8, 0x7999a83b, 0x7999a83b, 0x7999a83b, 0x7999a83b}, 1637 + {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 1638 + {0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, 1639 + {0x0000ae04, 0x001c0000, 0x001c0000, 0x001c0000, 0x001c0000}, 1640 + {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 1641 + {0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, 1642 + {0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce}, 1643 + {0x0000b284, 0x00000000, 0x00000000, 0x00000150, 0x00000150}, 1644 + {0x0000b830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, 1645 + {0x0000be04, 0x001c0000, 0x001c0000, 0x001c0000, 0x001c0000}, 1646 + {0x0000be18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 1647 + {0x0000be1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, 1648 + {0x0000be20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce}, 1649 + {0x0000c284, 0x00000000, 0x00000000, 0x00000150, 0x00000150}, 1650 + }; 1651 + 1652 + static const u32 ar9580_1p0_pcie_phy_clkreq_enable_L1[][2] = { 1653 + /* Addr allmodes */ 1654 + {0x00004040, 0x0835365e}, 1655 + {0x00004040, 0x0008003b}, 1656 + {0x00004044, 0x00000000}, 1657 + }; 1658 + 1659 + static const u32 ar9580_1p0_pcie_phy_clkreq_disable_L1[][2] = { 1660 + /* Addr allmodes */ 1661 + {0x00004040, 0x0831365e}, 1662 + {0x00004040, 0x0008003b}, 1663 + {0x00004044, 0x00000000}, 1664 + }; 1665 + 1666 + static const u32 ar9580_1p0_pcie_phy_pll_on_clkreq[][2] = { 1667 + /* Addr allmodes */ 1668 + {0x00004040, 0x0831265e}, 1669 + {0x00004040, 0x0008003b}, 1670 + {0x00004044, 0x00000000}, 1671 + }; 1672 + 1673 + #endif /* INITVALS_9580_1P0_H */
+1 -3
drivers/net/wireless/ath/ath9k/ath9k.h
··· 558 558 #define SC_OP_BT_PRIORITY_DETECTED BIT(12) 559 559 #define SC_OP_BT_SCAN BIT(13) 560 560 #define SC_OP_ANI_RUN BIT(14) 561 - #define SC_OP_ENABLE_APM BIT(15) 562 - #define SC_OP_PRIM_STA_VIF BIT(16) 561 + #define SC_OP_PRIM_STA_VIF BIT(15) 563 562 564 563 /* Powersave flags */ 565 564 #define PS_WAIT_FOR_BEACON BIT(0) ··· 663 664 extern bool is_ath9k_unloaded; 664 665 665 666 irqreturn_t ath_isr(int irq, void *dev); 666 - void ath9k_init_crypto(struct ath_softc *sc); 667 667 int ath9k_init_device(u16 devid, struct ath_softc *sc, 668 668 const struct ath_bus_ops *bus_ops); 669 669 void ath9k_deinit_device(struct ath_softc *sc);
+1 -2
drivers/net/wireless/ath/ath9k/calib.c
··· 82 82 int16_t *nfarray) 83 83 { 84 84 struct ath_common *common = ath9k_hw_common(ah); 85 - struct ieee80211_conf *conf = &common->hw->conf; 86 85 struct ath_nf_limits *limit; 87 86 struct ath9k_nfcal_hist *h; 88 87 bool high_nf_mid = false; ··· 93 94 94 95 for (i = 0; i < NUM_NF_READINGS; i++) { 95 96 if (!(chainmask & (1 << i)) || 96 - ((i >= AR5416_MAX_CHAINS) && !conf_is_ht40(conf))) 97 + ((i >= AR5416_MAX_CHAINS) && !IS_CHAN_HT40(ah->curchan))) 97 98 continue; 98 99 99 100 h[i].nfCalBuffer[h[i].currIndex] = nfarray[i];
+26
drivers/net/wireless/ath/ath9k/common.c
··· 169 169 } 170 170 EXPORT_SYMBOL(ath9k_cmn_update_txpow); 171 171 172 + void ath9k_cmn_init_crypto(struct ath_hw *ah) 173 + { 174 + struct ath_common *common = ath9k_hw_common(ah); 175 + int i = 0; 176 + 177 + /* Get the hardware key cache size. */ 178 + common->keymax = AR_KEYTABLE_SIZE; 179 + 180 + /* 181 + * Check whether the separate key cache entries 182 + * are required to handle both tx+rx MIC keys. 183 + * With split mic keys the number of stations is limited 184 + * to 27 otherwise 59. 185 + */ 186 + if (ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA) 187 + common->crypt_caps |= ATH_CRYPT_CAP_MIC_COMBINED; 188 + 189 + /* 190 + * Reset the key cache since some parts do not 191 + * reset the contents on initial power up. 192 + */ 193 + for (i = 0; i < common->keymax; i++) 194 + ath_hw_keyreset(common, (u16) i); 195 + } 196 + EXPORT_SYMBOL(ath9k_cmn_init_crypto); 197 + 172 198 static int __init ath9k_cmn_init(void) 173 199 { 174 200 return 0;
+1
drivers/net/wireless/ath/ath9k/common.h
··· 62 62 enum ath_stomp_type stomp_type); 63 63 void ath9k_cmn_update_txpow(struct ath_hw *ah, u16 cur_txpow, 64 64 u16 new_txpow, u16 *txpower); 65 + void ath9k_cmn_init_crypto(struct ath_hw *ah);
+55
drivers/net/wireless/ath/ath9k/debug.c
··· 1163 1163 .llseek = default_llseek,/* read accesses f_pos */ 1164 1164 }; 1165 1165 1166 + static ssize_t read_file_dump_nfcal(struct file *file, char __user *user_buf, 1167 + size_t count, loff_t *ppos) 1168 + { 1169 + struct ath_softc *sc = file->private_data; 1170 + struct ath_hw *ah = sc->sc_ah; 1171 + struct ath9k_nfcal_hist *h = sc->caldata.nfCalHist; 1172 + struct ath_common *common = ath9k_hw_common(ah); 1173 + struct ieee80211_conf *conf = &common->hw->conf; 1174 + u32 len = 0, size = 1500; 1175 + u32 i, j; 1176 + ssize_t retval = 0; 1177 + char *buf; 1178 + u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask; 1179 + u8 nread; 1180 + 1181 + buf = kzalloc(size, GFP_KERNEL); 1182 + if (!buf) 1183 + return -ENOMEM; 1184 + 1185 + len += snprintf(buf + len, size - len, 1186 + "Channel Noise Floor : %d\n", ah->noise); 1187 + len += snprintf(buf + len, size - len, 1188 + "Chain | privNF | # Readings | NF Readings\n"); 1189 + for (i = 0; i < NUM_NF_READINGS; i++) { 1190 + if (!(chainmask & (1 << i)) || 1191 + ((i >= AR5416_MAX_CHAINS) && !conf_is_ht40(conf))) 1192 + continue; 1193 + 1194 + nread = AR_PHY_CCA_FILTERWINDOW_LENGTH - h[i].invalidNFcount; 1195 + len += snprintf(buf + len, size - len, " %d\t %d\t %d\t\t", 1196 + i, h[i].privNF, nread); 1197 + for (j = 0; j < nread; j++) 1198 + len += snprintf(buf + len, size - len, 1199 + " %d", h[i].nfCalBuffer[j]); 1200 + len += snprintf(buf + len, size - len, "\n"); 1201 + } 1202 + 1203 + if (len > size) 1204 + len = size; 1205 + 1206 + retval = simple_read_from_buffer(user_buf, count, ppos, buf, len); 1207 + kfree(buf); 1208 + 1209 + return retval; 1210 + } 1211 + 1212 + static const struct file_operations fops_dump_nfcal = { 1213 + .read = read_file_dump_nfcal, 1214 + .open = ath9k_debugfs_open, 1215 + .owner = THIS_MODULE, 1216 + .llseek = default_llseek, 1217 + }; 1218 + 1166 1219 static ssize_t read_file_base_eeprom(struct file *file, char __user *user_buf, 1167 1220 size_t count, loff_t *ppos) 1168 1221 { ··· 1315 1262 &ah->config.cwm_ignore_extcca); 1316 1263 debugfs_create_file("regdump", S_IRUSR, sc->debug.debugfs_phy, sc, 1317 1264 &fops_regdump); 1265 + debugfs_create_file("dump_nfcal", S_IRUSR, sc->debug.debugfs_phy, sc, 1266 + &fops_dump_nfcal); 1318 1267 debugfs_create_file("base_eeprom", S_IRUSR, sc->debug.debugfs_phy, sc, 1319 1268 &fops_base_eeprom); 1320 1269 debugfs_create_file("modal_eeprom", S_IRUSR, sc->debug.debugfs_phy, sc,
+1 -20
drivers/net/wireless/ath/ath9k/htc_drv_init.c
··· 572 572 return -EINVAL; 573 573 } 574 574 575 - static void ath9k_init_crypto(struct ath9k_htc_priv *priv) 576 - { 577 - struct ath_common *common = ath9k_hw_common(priv->ah); 578 - int i = 0; 579 - 580 - /* Get the hardware key cache size. */ 581 - common->keymax = AR_KEYTABLE_SIZE; 582 - 583 - if (priv->ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA) 584 - common->crypt_caps |= ATH_CRYPT_CAP_MIC_COMBINED; 585 - 586 - /* 587 - * Reset the key cache since some parts do not 588 - * reset the contents on initial power up. 589 - */ 590 - for (i = 0; i < common->keymax; i++) 591 - ath_hw_keyreset(common, (u16) i); 592 - } 593 - 594 575 static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv) 595 576 { 596 577 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) { ··· 701 720 for (i = 0; i < ATH9K_HTC_MAX_BCN_VIF; i++) 702 721 priv->cur_beacon_conf.bslot[i] = NULL; 703 722 704 - ath9k_init_crypto(priv); 723 + ath9k_cmn_init_crypto(ah); 705 724 ath9k_init_channels_rates(priv); 706 725 ath9k_init_misc(priv); 707 726
+17
drivers/net/wireless/ath/ath9k/htc_drv_main.c
··· 1736 1736 return ret; 1737 1737 } 1738 1738 1739 + 1740 + static int ath9k_htc_get_stats(struct ieee80211_hw *hw, 1741 + struct ieee80211_low_level_stats *stats) 1742 + { 1743 + struct ath9k_htc_priv *priv = hw->priv; 1744 + struct ath_hw *ah = priv->ah; 1745 + struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats; 1746 + 1747 + stats->dot11ACKFailureCount = mib_stats->ackrcv_bad; 1748 + stats->dot11RTSFailureCount = mib_stats->rts_bad; 1749 + stats->dot11FCSErrorCount = mib_stats->fcs_bad; 1750 + stats->dot11RTSSuccessCount = mib_stats->rts_good; 1751 + 1752 + return 0; 1753 + } 1754 + 1739 1755 struct ieee80211_ops ath9k_htc_ops = { 1740 1756 .tx = ath9k_htc_tx, 1741 1757 .start = ath9k_htc_start, ··· 1775 1759 .rfkill_poll = ath9k_htc_rfkill_poll_state, 1776 1760 .set_coverage_class = ath9k_htc_set_coverage_class, 1777 1761 .set_bitrate_mask = ath9k_htc_set_bitrate_mask, 1762 + .get_stats = ath9k_htc_get_stats, 1778 1763 };
+5 -3
drivers/net/wireless/ath/ath9k/hw-ops.h
··· 22 22 /* Hardware core and driver accessible callbacks */ 23 23 24 24 static inline void ath9k_hw_configpcipowersave(struct ath_hw *ah, 25 - int restore, 26 - int power_off) 25 + bool power_off) 27 26 { 28 - ath9k_hw_ops(ah)->config_pci_powersave(ah, restore, power_off); 27 + if (ah->aspm_enabled != true) 28 + return; 29 + 30 + ath9k_hw_ops(ah)->config_pci_powersave(ah, power_off); 29 31 } 30 32 31 33 static inline void ath9k_hw_rxena(struct ath_hw *ah)
+6 -5
drivers/net/wireless/ath/ath9k/hw.c
··· 603 603 604 604 ath9k_hw_init_mode_regs(ah); 605 605 606 - 607 - if (ah->is_pciexpress) 608 - ath9k_hw_aspm_init(ah); 609 - else 606 + if (!ah->is_pciexpress) 610 607 ath9k_hw_disablepcie(ah); 611 608 612 609 if (!AR_SREV_9300_20_OR_LATER(ah)) ··· 617 620 r = ath9k_hw_fill_cap_info(ah); 618 621 if (r) 619 622 return r; 623 + 624 + if (ah->is_pciexpress) 625 + ath9k_hw_aspm_init(ah); 620 626 621 627 r = ath9k_hw_init_macaddr(ah); 622 628 if (r) { ··· 663 663 case AR9300_DEVID_AR9485_PCIE: 664 664 case AR9300_DEVID_AR9330: 665 665 case AR9300_DEVID_AR9340: 666 + case AR9300_DEVID_AR9580: 666 667 break; 667 668 default: 668 669 if (common->bus_ops->ath_bus_type == ATH_USB) ··· 997 996 slottime = 21; 998 997 sifstime = 64; 999 998 } else { 1000 - eifs = REG_READ(ah, AR_D_GBL_IFS_EIFS); 999 + eifs = REG_READ(ah, AR_D_GBL_IFS_EIFS)/common->clockrate; 1001 1000 reg = REG_READ(ah, AR_USEC); 1002 1001 rx_lat = MS(reg, AR_USEC_RX_LAT); 1003 1002 tx_lat = MS(reg, AR_USEC_TX_LAT);
+2 -6
drivers/net/wireless/ath/ath9k/hw.h
··· 45 45 #define AR9300_DEVID_PCIE 0x0030 46 46 #define AR9300_DEVID_AR9340 0x0031 47 47 #define AR9300_DEVID_AR9485_PCIE 0x0032 48 + #define AR9300_DEVID_AR9580 0x0033 48 49 #define AR9300_DEVID_AR9330 0x0035 49 50 50 51 #define AR5416_AR9100_DEVID 0x000b ··· 607 606 */ 608 607 struct ath_hw_ops { 609 608 void (*config_pci_powersave)(struct ath_hw *ah, 610 - int restore, 611 - int power_off); 609 + bool power_off); 612 610 void (*rx_enable)(struct ath_hw *ah); 613 611 void (*set_desc_link)(void *ds, u32 link); 614 612 bool (*calibrate)(struct ath_hw *ah, ··· 1036 1036 void ath9k_ani_reset(struct ath_hw *ah, bool is_scanning); 1037 1037 void ath9k_hw_proc_mib_event(struct ath_hw *ah); 1038 1038 void ath9k_hw_ani_monitor(struct ath_hw *ah, struct ath9k_channel *chan); 1039 - 1040 - #define ATH_PCIE_CAP_LINK_CTRL 0x70 1041 - #define ATH_PCIE_CAP_LINK_L0S 1 1042 - #define ATH_PCIE_CAP_LINK_L1 2 1043 1039 1044 1040 #define ATH9K_CLOCK_RATE_CCK 22 1045 1041 #define ATH9K_CLOCK_RATE_5GHZ_OFDM 40
+1 -26
drivers/net/wireless/ath/ath9k/init.c
··· 404 404 return error; 405 405 } 406 406 407 - void ath9k_init_crypto(struct ath_softc *sc) 408 - { 409 - struct ath_common *common = ath9k_hw_common(sc->sc_ah); 410 - int i = 0; 411 - 412 - /* Get the hardware key cache size. */ 413 - common->keymax = AR_KEYTABLE_SIZE; 414 - 415 - /* 416 - * Reset the key cache since some parts do not 417 - * reset the contents on initial power up. 418 - */ 419 - for (i = 0; i < common->keymax; i++) 420 - ath_hw_keyreset(common, (u16) i); 421 - 422 - /* 423 - * Check whether the separate key cache entries 424 - * are required to handle both tx+rx MIC keys. 425 - * With split mic keys the number of stations is limited 426 - * to 27 otherwise 59. 427 - */ 428 - if (sc->sc_ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA) 429 - common->crypt_caps |= ATH_CRYPT_CAP_MIC_COMBINED; 430 - } 431 - 432 407 static int ath9k_init_btcoex(struct ath_softc *sc) 433 408 { 434 409 struct ath_txq *txq; ··· 605 630 if (ret) 606 631 goto err_btcoex; 607 632 608 - ath9k_init_crypto(sc); 633 + ath9k_cmn_init_crypto(sc->sc_ah); 609 634 ath9k_init_misc(sc); 610 635 611 636 return 0;
+3 -16
drivers/net/wireless/ath/ath9k/mac.c
··· 345 345 } 346 346 memset(qi, 0, sizeof(struct ath9k_tx_queue_info)); 347 347 qi->tqi_type = type; 348 - if (qinfo == NULL) { 349 - qi->tqi_qflags = 350 - TXQ_FLAG_TXOKINT_ENABLE 351 - | TXQ_FLAG_TXERRINT_ENABLE 352 - | TXQ_FLAG_TXDESCINT_ENABLE | TXQ_FLAG_TXURNINT_ENABLE; 353 - qi->tqi_aifs = INIT_AIFS; 354 - qi->tqi_cwmin = ATH9K_TXQ_USEDEFAULT; 355 - qi->tqi_cwmax = INIT_CWMAX; 356 - qi->tqi_shretry = INIT_SH_RETRY; 357 - qi->tqi_lgretry = INIT_LG_RETRY; 358 - qi->tqi_physCompBuf = 0; 359 - } else { 360 - qi->tqi_physCompBuf = qinfo->tqi_physCompBuf; 361 - (void) ath9k_hw_set_txq_props(ah, q, qinfo); 362 - } 348 + qi->tqi_physCompBuf = qinfo->tqi_physCompBuf; 349 + (void) ath9k_hw_set_txq_props(ah, q, qinfo); 363 350 364 351 return q; 365 352 } ··· 551 564 EXPORT_SYMBOL(ath9k_hw_resettxqueue); 552 565 553 566 int ath9k_hw_rxprocdesc(struct ath_hw *ah, struct ath_desc *ds, 554 - struct ath_rx_status *rs, u64 tsf) 567 + struct ath_rx_status *rs) 555 568 { 556 569 struct ar5416_desc ads; 557 570 struct ar5416_desc *adsp = AR5416DESC(ds);
+1 -1
drivers/net/wireless/ath/ath9k/mac.h
··· 687 687 bool ath9k_hw_releasetxqueue(struct ath_hw *ah, u32 q); 688 688 bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q); 689 689 int ath9k_hw_rxprocdesc(struct ath_hw *ah, struct ath_desc *ds, 690 - struct ath_rx_status *rs, u64 tsf); 690 + struct ath_rx_status *rs); 691 691 void ath9k_hw_setuprxdesc(struct ath_hw *ah, struct ath_desc *ds, 692 692 u32 size, u32 flags); 693 693 bool ath9k_hw_setrxabort(struct ath_hw *ah, bool set);
+36 -18
drivers/net/wireless/ath/ath9k/main.c
··· 565 565 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta) 566 566 { 567 567 struct ath_node *an; 568 - struct ath_hw *ah = sc->sc_ah; 569 568 an = (struct ath_node *)sta->drv_priv; 570 569 571 570 #ifdef CONFIG_ATH9K_DEBUGFS ··· 573 574 spin_unlock(&sc->nodes_lock); 574 575 an->sta = sta; 575 576 #endif 576 - if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM) 577 - sc->sc_flags |= SC_OP_ENABLE_APM; 578 - 579 577 if (sc->sc_flags & SC_OP_TXAGGR) { 580 578 ath_tx_node_init(sc, an); 581 579 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR + ··· 822 826 if (status & ATH9K_INT_TXURN) 823 827 ath9k_hw_updatetxtriglevel(ah, true); 824 828 825 - if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { 826 - if (status & ATH9K_INT_RXEOL) { 827 - ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN); 828 - ath9k_hw_set_interrupts(ah, ah->imask); 829 - } 829 + if (status & ATH9K_INT_RXEOL) { 830 + ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN); 831 + ath9k_hw_set_interrupts(ah, ah->imask); 830 832 } 831 833 832 834 if (status & ATH9K_INT_MIB) { ··· 882 888 spin_lock_bh(&sc->sc_pcu_lock); 883 889 atomic_set(&ah->intr_ref_cnt, -1); 884 890 885 - ath9k_hw_configpcipowersave(ah, 0, 0); 891 + ath9k_hw_configpcipowersave(ah, false); 886 892 887 893 if (!ah->curchan) 888 894 ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah); ··· 963 969 964 970 ath9k_hw_phy_disable(ah); 965 971 966 - ath9k_hw_configpcipowersave(ah, 1, 1); 972 + ath9k_hw_configpcipowersave(ah, true); 967 973 968 974 spin_unlock_bh(&sc->sc_pcu_lock); 969 975 ath9k_ps_restore(sc); ··· 1063 1069 init_channel = ath9k_cmn_get_curchannel(hw, ah); 1064 1070 1065 1071 /* Reset SERDES registers */ 1066 - ath9k_hw_configpcipowersave(ah, 0, 0); 1072 + ath9k_hw_configpcipowersave(ah, false); 1067 1073 1068 1074 /* 1069 1075 * The basic interface to setting the hardware in a good ··· 1139 1145 AR_STOMP_LOW_WLAN_WGHT); 1140 1146 ath9k_hw_btcoex_enable(ah); 1141 1147 1142 - if (common->bus_ops->bt_coex_prep) 1143 - common->bus_ops->bt_coex_prep(common); 1144 1148 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE) 1145 1149 ath9k_btcoex_timer_resume(sc); 1146 1150 } ··· 1672 1680 1673 1681 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { 1674 1682 struct ieee80211_channel *curchan = hw->conf.channel; 1683 + struct ath9k_channel old_chan; 1675 1684 int pos = curchan->hw_value; 1676 1685 int old_pos = -1; 1677 1686 unsigned long flags; ··· 1689 1696 "Set channel: %d MHz type: %d\n", 1690 1697 curchan->center_freq, conf->channel_type); 1691 1698 1692 - ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos], 1693 - curchan, conf->channel_type); 1694 - 1695 1699 /* update survey stats for the old channel before switching */ 1696 1700 spin_lock_irqsave(&common->cc_lock, flags); 1697 1701 ath_update_survey_stats(sc); 1698 1702 spin_unlock_irqrestore(&common->cc_lock, flags); 1703 + 1704 + /* 1705 + * Preserve the current channel values, before updating 1706 + * the same channel 1707 + */ 1708 + if (old_pos == pos) { 1709 + memcpy(&old_chan, &sc->sc_ah->channels[pos], 1710 + sizeof(struct ath9k_channel)); 1711 + ah->curchan = &old_chan; 1712 + } 1713 + 1714 + ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos], 1715 + curchan, conf->channel_type); 1699 1716 1700 1717 /* 1701 1718 * If the operating channel changes, change the survey in-use flags ··· 2403 2400 return sc->beacon.tx_last; 2404 2401 } 2405 2402 2403 + static int ath9k_get_stats(struct ieee80211_hw *hw, 2404 + struct ieee80211_low_level_stats *stats) 2405 + { 2406 + struct ath_softc *sc = hw->priv; 2407 + struct ath_hw *ah = sc->sc_ah; 2408 + struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats; 2409 + 2410 + stats->dot11ACKFailureCount = mib_stats->ackrcv_bad; 2411 + stats->dot11RTSFailureCount = mib_stats->rts_bad; 2412 + stats->dot11FCSErrorCount = mib_stats->fcs_bad; 2413 + stats->dot11RTSSuccessCount = mib_stats->rts_good; 2414 + return 0; 2415 + } 2416 + 2406 2417 struct ieee80211_ops ath9k_ops = { 2407 2418 .tx = ath9k_tx, 2408 2419 .start = ath9k_start, ··· 2441 2424 .set_coverage_class = ath9k_set_coverage_class, 2442 2425 .flush = ath9k_flush, 2443 2426 .tx_frames_pending = ath9k_tx_frames_pending, 2444 - .tx_last_beacon = ath9k_tx_last_beacon, 2427 + .tx_last_beacon = ath9k_tx_last_beacon, 2428 + .get_stats = ath9k_get_stats, 2445 2429 };
+26 -22
drivers/net/wireless/ath/ath9k/pci.c
··· 32 32 { PCI_VDEVICE(ATHEROS, 0x002E) }, /* PCI-E */ 33 33 { PCI_VDEVICE(ATHEROS, 0x0030) }, /* PCI-E AR9300 */ 34 34 { PCI_VDEVICE(ATHEROS, 0x0032) }, /* PCI-E AR9485 */ 35 + { PCI_VDEVICE(ATHEROS, 0x0033) }, /* PCI-E AR9580 */ 35 36 { 0 } 36 37 }; 38 + 37 39 38 40 /* return bus cachesize in 4B word units */ 39 41 static void ath_pci_read_cachesize(struct ath_common *common, int *csz) ··· 90 88 return true; 91 89 } 92 90 93 - /* 94 - * Bluetooth coexistance requires disabling ASPM. 95 - */ 96 - static void ath_pci_bt_coex_prep(struct ath_common *common) 97 - { 98 - struct ath_softc *sc = (struct ath_softc *) common->priv; 99 - struct pci_dev *pdev = to_pci_dev(sc->dev); 100 - u8 aspm; 101 - 102 - if (!pci_is_pcie(pdev)) 103 - return; 104 - 105 - pci_read_config_byte(pdev, ATH_PCIE_CAP_LINK_CTRL, &aspm); 106 - aspm &= ~(ATH_PCIE_CAP_LINK_L0S | ATH_PCIE_CAP_LINK_L1); 107 - pci_write_config_byte(pdev, ATH_PCIE_CAP_LINK_CTRL, aspm); 108 - } 109 - 110 91 static void ath_pci_extn_synch_enable(struct ath_common *common) 111 92 { 112 93 struct ath_softc *sc = (struct ath_softc *) common->priv; ··· 101 116 pci_write_config_byte(pdev, sc->sc_ah->caps.pcie_lcr_offset, lnkctl); 102 117 } 103 118 119 + /* Need to be called after we discover btcoex capabilities */ 104 120 static void ath_pci_aspm_init(struct ath_common *common) 105 121 { 106 122 struct ath_softc *sc = (struct ath_softc *) common->priv; ··· 111 125 int pos; 112 126 u8 aspm; 113 127 114 - if (!pci_is_pcie(pdev)) 128 + pos = pci_pcie_cap(pdev); 129 + if (!pos) 115 130 return; 116 131 117 132 parent = pdev->bus->self; 118 - if (WARN_ON(!parent)) 133 + if (!parent) 119 134 return; 135 + 136 + if (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) { 137 + /* Bluetooth coexistance requires disabling ASPM. */ 138 + pci_read_config_byte(pdev, pos + PCI_EXP_LNKCTL, &aspm); 139 + aspm &= ~(PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1); 140 + pci_write_config_byte(pdev, pos + PCI_EXP_LNKCTL, aspm); 141 + 142 + /* 143 + * Both upstream and downstream PCIe components should 144 + * have the same ASPM settings. 145 + */ 146 + pos = pci_pcie_cap(parent); 147 + pci_read_config_byte(parent, pos + PCI_EXP_LNKCTL, &aspm); 148 + aspm &= ~(PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1); 149 + pci_write_config_byte(parent, pos + PCI_EXP_LNKCTL, aspm); 150 + 151 + return; 152 + } 120 153 121 154 pos = pci_pcie_cap(parent); 122 155 pci_read_config_byte(parent, pos + PCI_EXP_LNKCTL, &aspm); 123 156 if (aspm & (PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1)) { 124 157 ah->aspm_enabled = true; 125 158 /* Initialize PCIe PM and SERDES registers. */ 126 - ath9k_hw_configpcipowersave(ah, 0, 0); 159 + ath9k_hw_configpcipowersave(ah, false); 127 160 } 128 161 } 129 162 ··· 150 145 .ath_bus_type = ATH_PCI, 151 146 .read_cachesize = ath_pci_read_cachesize, 152 147 .eeprom_read = ath_pci_eeprom_read, 153 - .bt_coex_prep = ath_pci_bt_coex_prep, 154 148 .extn_synch_en = ath_pci_extn_synch_enable, 155 149 .aspm_init = ath_pci_aspm_init, 156 150 }; ··· 342 338 * semi-random values after suspend/resume. 343 339 */ 344 340 ath9k_ps_wakeup(sc); 345 - ath9k_init_crypto(sc); 341 + ath9k_cmn_init_crypto(sc->sc_ah); 346 342 ath9k_ps_restore(sc); 347 343 348 344 sc->ps_idle = true;
+27 -7
drivers/net/wireless/ath/ath9k/rc.c
··· 603 603 static u8 ath_rc_get_highest_rix(struct ath_softc *sc, 604 604 struct ath_rate_priv *ath_rc_priv, 605 605 const struct ath_rate_table *rate_table, 606 - int *is_probing) 606 + int *is_probing, 607 + bool legacy) 607 608 { 608 609 u32 best_thruput, this_thruput, now_msec; 609 610 u8 rate, next_rate, best_rate, maxindex, minindex; ··· 625 624 u8 per_thres; 626 625 627 626 rate = ath_rc_priv->valid_rate_index[index]; 627 + if (legacy && !(rate_table->info[rate].rate_flags & RC_LEGACY)) 628 + continue; 628 629 if (rate > ath_rc_priv->rate_max_phy) 629 630 continue; 630 631 ··· 770 767 struct ieee80211_tx_rate *rates = tx_info->control.rates; 771 768 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 772 769 __le16 fc = hdr->frame_control; 773 - u8 try_per_rate, i = 0, rix; 770 + u8 try_per_rate, i = 0, rix, high_rix; 774 771 int is_probe = 0; 775 772 776 773 if (rate_control_send_low(sta, priv_sta, txrc)) ··· 789 786 try_per_rate = 4; 790 787 791 788 rate_table = ath_rc_priv->rate_table; 792 - rix = ath_rc_get_highest_rix(sc, ath_rc_priv, rate_table, &is_probe); 789 + rix = ath_rc_get_highest_rix(sc, ath_rc_priv, rate_table, 790 + &is_probe, false); 791 + high_rix = rix; 793 792 794 793 /* 795 794 * If we're in HT mode and both us and our peer supports LDPC. ··· 827 822 } 828 823 829 824 /* Fill in the other rates for multirate retry */ 830 - for ( ; i < 4; i++) { 831 - /* Use twice the number of tries for the last MRR segment. */ 832 - if (i + 1 == 4) 833 - try_per_rate = 8; 825 + for ( ; i < 3; i++) { 834 826 835 827 ath_rc_get_lower_rix(rate_table, ath_rc_priv, rix, &rix); 836 828 /* All other rates in the series have RTS enabled */ ··· 835 833 try_per_rate, rix, 1); 836 834 } 837 835 836 + /* Use twice the number of tries for the last MRR segment. */ 837 + try_per_rate = 8; 838 + 839 + /* 840 + * Use a legacy rate as last retry to ensure that the frame 841 + * is tried in both MCS and legacy rates. 842 + */ 843 + if ((rates[2].flags & IEEE80211_TX_RC_MCS) && 844 + (!(tx_info->flags & IEEE80211_TX_CTL_AMPDU) || 845 + (ath_rc_priv->per[high_rix] > 45))) 846 + rix = ath_rc_get_highest_rix(sc, ath_rc_priv, rate_table, 847 + &is_probe, true); 848 + else 849 + ath_rc_get_lower_rix(rate_table, ath_rc_priv, rix, &rix); 850 + 851 + /* All other rates in the series have RTS enabled */ 852 + ath_rc_rate_set_series(rate_table, &rates[i], txrc, 853 + try_per_rate, rix, 1); 838 854 /* 839 855 * NB:Change rate series to enable aggregation when operating 840 856 * at lower MCS rates. When first rate in series is MCS2
+9 -3
drivers/net/wireless/ath/ath9k/recv.c
··· 761 761 * on. All this is necessary because of our use of 762 762 * a self-linked list to avoid rx overruns. 763 763 */ 764 - ret = ath9k_hw_rxprocdesc(ah, ds, rs, 0); 764 + ret = ath9k_hw_rxprocdesc(ah, ds, rs); 765 765 if (ret == -EINPROGRESS) { 766 766 struct ath_rx_status trs; 767 767 struct ath_buf *tbf; ··· 787 787 */ 788 788 789 789 tds = tbf->bf_desc; 790 - ret = ath9k_hw_rxprocdesc(ah, tds, &trs, 0); 790 + ret = ath9k_hw_rxprocdesc(ah, tds, &trs); 791 791 if (ret == -EINPROGRESS) 792 792 return NULL; 793 793 } ··· 824 824 is_mc = !!is_multicast_ether_addr(hdr->addr1); 825 825 is_valid_tkip = rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID && 826 826 test_bit(rx_stats->rs_keyix, common->tkip_keymap); 827 - strip_mic = is_valid_tkip && !(rx_stats->rs_status & 827 + strip_mic = is_valid_tkip && ieee80211_is_data(fc) && 828 + !(rx_stats->rs_status & 828 829 (ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC)); 829 830 830 831 if (!rx_stats->rs_datalen) ··· 1978 1977 } while (1); 1979 1978 1980 1979 spin_unlock_bh(&sc->rx.rxbuflock); 1980 + 1981 + if (!(ah->imask & ATH9K_INT_RXEOL)) { 1982 + ah->imask |= (ATH9K_INT_RXEOL | ATH9K_INT_RXORN); 1983 + ath9k_hw_set_interrupts(ah, ah->imask); 1984 + } 1981 1985 1982 1986 return 0; 1983 1987 }
+14
drivers/net/wireless/ath/ath9k/reg.h
··· 793 793 #define AR_SREV_REVISION_9485_10 0 794 794 #define AR_SREV_REVISION_9485_11 1 795 795 #define AR_SREV_VERSION_9340 0x300 796 + #define AR_SREV_VERSION_9580 0x1C0 797 + #define AR_SREV_REVISION_9580_10 4 /* AR9580 1.0 */ 796 798 797 799 #define AR_SREV_5416(_ah) \ 798 800 (((_ah)->hw_version.macVersion == AR_SREV_VERSION_5416_PCI) || \ ··· 894 892 #define AR_SREV_9285E_20(_ah) \ 895 893 (AR_SREV_9285_12_OR_LATER(_ah) && \ 896 894 ((REG_READ(_ah, AR_AN_SYNTH9) & 0x7) == 0x1)) 895 + 896 + #define AR_SREV_9580(_ah) \ 897 + (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9580) && \ 898 + ((_ah)->hw_version.macRev >= AR_SREV_REVISION_9580_10)) 899 + 900 + #define AR_SREV_9580_10(_ah) \ 901 + (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9580) && \ 902 + ((_ah)->hw_version.macRev == AR_SREV_REVISION_9580_10)) 903 + 904 + /* NOTE: When adding chips newer than Peacock, add chip check here */ 905 + #define AR_SREV_9580_10_OR_LATER(_ah) \ 906 + (AR_SREV_9580(_ah)) 897 907 898 908 enum ath_usb_dev { 899 909 AR9280_USB = 1, /* AR7010 + AR9280, UB94 */
+37 -7
drivers/net/wireless/ath/ath9k/xmit.c
··· 571 571 ath_reset(sc, false); 572 572 } 573 573 574 + static bool ath_lookup_legacy(struct ath_buf *bf) 575 + { 576 + struct sk_buff *skb; 577 + struct ieee80211_tx_info *tx_info; 578 + struct ieee80211_tx_rate *rates; 579 + int i; 580 + 581 + skb = bf->bf_mpdu; 582 + tx_info = IEEE80211_SKB_CB(skb); 583 + rates = tx_info->control.rates; 584 + 585 + for (i = 3; i >= 0; i--) { 586 + if (!(rates[i].flags & IEEE80211_TX_RC_MCS)) 587 + return true; 588 + } 589 + 590 + return false; 591 + } 592 + 574 593 static u32 ath_lookup_rate(struct ath_softc *sc, struct ath_buf *bf, 575 594 struct ath_atx_tid *tid) 576 595 { ··· 663 644 * meet the minimum required mpdudensity. 664 645 */ 665 646 static int ath_compute_num_delims(struct ath_softc *sc, struct ath_atx_tid *tid, 666 - struct ath_buf *bf, u16 frmlen) 647 + struct ath_buf *bf, u16 frmlen, 648 + bool first_subfrm) 667 649 { 650 + #define FIRST_DESC_NDELIMS 60 668 651 struct sk_buff *skb = bf->bf_mpdu; 669 652 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 670 653 u32 nsymbits, nsymbols; ··· 687 666 if ((fi->keyix != ATH9K_TXKEYIX_INVALID) && 688 667 !(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)) 689 668 ndelim += ATH_AGGR_ENCRYPTDELIM; 669 + 670 + /* 671 + * Add delimiter when using RTS/CTS with aggregation 672 + * and non enterprise AR9003 card 673 + */ 674 + if (first_subfrm) 675 + ndelim = max(ndelim, FIRST_DESC_NDELIMS); 690 676 691 677 /* 692 678 * Convert desired mpdu density from microeconds to bytes based ··· 769 741 al_delta = ATH_AGGR_DELIM_SZ + fi->framelen; 770 742 771 743 if (nframes && 772 - (aggr_limit < (al + bpad + al_delta + prev_al))) { 744 + ((aggr_limit < (al + bpad + al_delta + prev_al)) || 745 + ath_lookup_legacy(bf))) { 773 746 status = ATH_AGGR_LIMITED; 774 747 break; 775 748 } ··· 785 756 status = ATH_AGGR_LIMITED; 786 757 break; 787 758 } 788 - nframes++; 789 759 790 760 /* add padding for previous frame to aggregation length */ 791 761 al += bpad + al_delta; ··· 793 765 * Get the delimiters needed to meet the MPDU 794 766 * density for this node. 795 767 */ 796 - ndelim = ath_compute_num_delims(sc, tid, bf_first, fi->framelen); 768 + ndelim = ath_compute_num_delims(sc, tid, bf_first, fi->framelen, 769 + !nframes); 797 770 bpad = PADBYTES(al_delta) + (ndelim << 2); 798 771 772 + nframes++; 799 773 bf->bf_next = NULL; 800 774 ath9k_hw_set_desc_link(sc->sc_ah, bf->bf_desc, 0); 801 775 ··· 1604 1574 { 1605 1575 struct ath_hw *ah = sc->sc_ah; 1606 1576 struct ath9k_channel *curchan = ah->curchan; 1607 - if ((sc->sc_flags & SC_OP_ENABLE_APM) && 1608 - (curchan->channelFlags & CHANNEL_5GHZ) && 1609 - (chainmask == 0x7) && (rate < 0x90)) 1577 + if ((ah->caps.hw_caps & ATH9K_HW_CAP_APM) && 1578 + (curchan->channelFlags & CHANNEL_5GHZ) && 1579 + (chainmask == 0x7) && (rate < 0x90)) 1610 1580 return 0x3; 1611 1581 else 1612 1582 return chainmask;
+14
drivers/net/wireless/ath/carl9170/Kconfig
··· 39 39 bool 40 40 depends on CARL9170 && (INPUT = y || INPUT = CARL9170) 41 41 default y 42 + 43 + config CARL9170_HWRNG 44 + bool "Random number generator" 45 + depends on CARL9170 && (HW_RANDOM = y || HW_RANDOM = CARL9170) 46 + default n 47 + help 48 + Provides a hardware random number generator to the kernel. 49 + 50 + SECURITY WARNING: It's relatively easy to eavesdrop all 51 + generated random numbers from the transport stream with 52 + usbmon [software] or special usb sniffer hardware. 53 + 54 + Say N, unless your setup[i.e.: embedded system] has no 55 + other rng source and you can afford to take the risk.
+24
drivers/net/wireless/ath/carl9170/carl9170.h
··· 43 43 #include <linux/firmware.h> 44 44 #include <linux/completion.h> 45 45 #include <linux/spinlock.h> 46 + #include <linux/hw_random.h> 46 47 #include <net/cfg80211.h> 47 48 #include <net/mac80211.h> 48 49 #include <linux/usb.h> ··· 152 151 #define CARL9170_TX_TIMEOUT 2500 153 152 #define CARL9170_JANITOR_DELAY 128 154 153 #define CARL9170_QUEUE_STUCK_TIMEOUT 5500 154 + #define CARL9170_STAT_WORK 30000 155 155 156 156 #define CARL9170_NUM_TX_AGG_MAX 30 157 157 ··· 284 282 bool rx_stream; 285 283 bool tx_stream; 286 284 bool rx_filter; 285 + bool hw_counters; 287 286 unsigned int mem_blocks; 288 287 unsigned int mem_block_size; 289 288 unsigned int rx_size; ··· 334 331 335 332 /* PHY */ 336 333 struct ieee80211_channel *channel; 334 + unsigned int num_channels; 337 335 int noise[4]; 338 336 unsigned int chan_fail; 339 337 unsigned int total_chan_fail; 340 338 u8 heavy_clip; 341 339 u8 ht_settings; 340 + struct { 341 + u64 active; /* usec */ 342 + u64 cca; /* usec */ 343 + u64 tx_time; /* usec */ 344 + u64 rx_total; 345 + u64 rx_overrun; 346 + } tally; 347 + struct delayed_work stat_work; 348 + struct survey_info *survey; 342 349 343 350 /* power calibration data */ 344 351 u8 power_5G_leg[4]; ··· 450 437 unsigned int off_override; 451 438 bool state; 452 439 } ps; 440 + 441 + #ifdef CONFIG_CARL9170_HWRNG 442 + # define CARL9170_HWRNG_CACHE_SIZE CARL9170_MAX_CMD_PAYLOAD_LEN 443 + struct { 444 + struct hwrng rng; 445 + bool initialized; 446 + char name[30 + 1]; 447 + u16 cache[CARL9170_HWRNG_CACHE_SIZE / sizeof(u16)]; 448 + unsigned int cache_idx; 449 + } rng; 450 + #endif /* CONFIG_CARL9170_HWRNG */ 453 451 }; 454 452 455 453 enum carl9170_ps_off_override_reasons {
+34
drivers/net/wireless/ath/carl9170/cmd.c
··· 36 36 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 37 37 */ 38 38 39 + #include <asm/div64.h> 39 40 #include "carl9170.h" 40 41 #include "cmd.h" 41 42 ··· 164 163 cmd->bcn_ctrl.bcn_len = cpu_to_le32(len); 165 164 166 165 return __carl9170_exec_cmd(ar, cmd, true); 166 + } 167 + 168 + int carl9170_collect_tally(struct ar9170 *ar) 169 + { 170 + struct carl9170_tally_rsp tally; 171 + struct survey_info *info; 172 + unsigned int tick; 173 + int err; 174 + 175 + err = carl9170_exec_cmd(ar, CARL9170_CMD_TALLY, 0, NULL, 176 + sizeof(tally), (u8 *)&tally); 177 + if (err) 178 + return err; 179 + 180 + tick = le32_to_cpu(tally.tick); 181 + if (tick) { 182 + ar->tally.active += le32_to_cpu(tally.active) / tick; 183 + ar->tally.cca += le32_to_cpu(tally.cca) / tick; 184 + ar->tally.tx_time += le32_to_cpu(tally.tx_time) / tick; 185 + ar->tally.rx_total += le32_to_cpu(tally.rx_total); 186 + ar->tally.rx_overrun += le32_to_cpu(tally.rx_overrun); 187 + 188 + if (ar->channel) { 189 + info = &ar->survey[ar->channel->hw_value]; 190 + info->channel_time = ar->tally.active; 191 + info->channel_time_busy = ar->tally.cca; 192 + info->channel_time_tx = ar->tally.tx_time; 193 + do_div(info->channel_time, 1000); 194 + do_div(info->channel_time_busy, 1000); 195 + do_div(info->channel_time_tx, 1000); 196 + } 197 + } 198 + return 0; 167 199 } 168 200 169 201 int carl9170_powersave(struct ar9170 *ar, const bool ps)
+1
drivers/net/wireless/ath/carl9170/cmd.h
··· 50 50 int carl9170_reboot(struct ar9170 *ar); 51 51 int carl9170_mac_reset(struct ar9170 *ar); 52 52 int carl9170_powersave(struct ar9170 *ar, const bool power_on); 53 + int carl9170_collect_tally(struct ar9170 *ar); 53 54 int carl9170_bcn_ctrl(struct ar9170 *ar, const unsigned int vif_id, 54 55 const u32 mode, const u32 addr, const u32 len); 55 56
+3
drivers/net/wireless/ath/carl9170/fw.c
··· 266 266 FIF_PROMISC_IN_BSS; 267 267 } 268 268 269 + if (SUPP(CARL9170FW_HW_COUNTERS)) 270 + ar->fw.hw_counters = true; 271 + 269 272 if (SUPP(CARL9170FW_WOL)) 270 273 device_set_wakeup_enable(&ar->udev->dev, true); 271 274
+11
drivers/net/wireless/ath/carl9170/fwcmd.h
··· 55 55 CARL9170_CMD_READ_TSF = 0x06, 56 56 CARL9170_CMD_RX_FILTER = 0x07, 57 57 CARL9170_CMD_WOL = 0x08, 58 + CARL9170_CMD_TALLY = 0x09, 58 59 59 60 /* CAM */ 60 61 CARL9170_CMD_EKEY = 0x10, ··· 287 286 } __packed; 288 287 #define CARL9170_TSF_RSP_SIZE 8 289 288 289 + struct carl9170_tally_rsp { 290 + __le32 active; 291 + __le32 cca; 292 + __le32 tx_time; 293 + __le32 rx_total; 294 + __le32 rx_overrun; 295 + __le32 tick; 296 + } __packed; 297 + 290 298 struct carl9170_rsp { 291 299 struct carl9170_cmd_head hdr; 292 300 ··· 310 300 struct carl9170_gpio gpio; 311 301 struct carl9170_tsf_rsp tsf; 312 302 struct carl9170_psm psm; 303 + struct carl9170_tally_rsp tally; 313 304 u8 data[CARL9170_MAX_CMD_PAYLOAD_LEN]; 314 305 } __packed; 315 306 } __packed __aligned(4);
+220 -11
drivers/net/wireless/ath/carl9170/main.c
··· 413 413 414 414 carl9170_set_state_when(ar, CARL9170_IDLE, CARL9170_STARTED); 415 415 416 + ieee80211_queue_delayed_work(ar->hw, &ar->stat_work, 417 + round_jiffies(msecs_to_jiffies(CARL9170_STAT_WORK))); 418 + 416 419 ieee80211_wake_queues(ar->hw); 417 420 err = 0; 418 421 ··· 426 423 427 424 static void carl9170_cancel_worker(struct ar9170 *ar) 428 425 { 426 + cancel_delayed_work_sync(&ar->stat_work); 429 427 cancel_delayed_work_sync(&ar->tx_janitor); 430 428 #ifdef CONFIG_CARL9170_LEDS 431 429 cancel_delayed_work_sync(&ar->led_work); ··· 798 794 mutex_unlock(&ar->mutex); 799 795 } 800 796 797 + static int carl9170_update_survey(struct ar9170 *ar, bool flush, bool noise) 798 + { 799 + int err; 800 + 801 + if (noise) { 802 + err = carl9170_get_noisefloor(ar); 803 + if (err) 804 + return err; 805 + } 806 + 807 + if (ar->fw.hw_counters) { 808 + err = carl9170_collect_tally(ar); 809 + if (err) 810 + return err; 811 + } 812 + 813 + if (flush) 814 + memset(&ar->tally, 0, sizeof(ar->tally)); 815 + 816 + return 0; 817 + } 818 + 819 + static void carl9170_stat_work(struct work_struct *work) 820 + { 821 + struct ar9170 *ar = container_of(work, struct ar9170, stat_work.work); 822 + int err; 823 + 824 + mutex_lock(&ar->mutex); 825 + err = carl9170_update_survey(ar, false, true); 826 + mutex_unlock(&ar->mutex); 827 + 828 + if (err) 829 + return; 830 + 831 + ieee80211_queue_delayed_work(ar->hw, &ar->stat_work, 832 + round_jiffies(msecs_to_jiffies(CARL9170_STAT_WORK))); 833 + } 801 834 802 835 static int carl9170_op_config(struct ieee80211_hw *hw, u32 changed) 803 836 { ··· 869 828 if (err) 870 829 goto out; 871 830 831 + err = carl9170_update_survey(ar, true, false); 832 + if (err) 833 + goto out; 834 + 872 835 err = carl9170_set_channel(ar, hw->conf.channel, 873 836 hw->conf.channel_type, CARL9170_RFI_NONE); 837 + if (err) 838 + goto out; 839 + 840 + err = carl9170_update_survey(ar, false, true); 874 841 if (err) 875 842 goto out; 876 843 ··· 1468 1419 } 1469 1420 #endif /* CONFIG_CARL9170_WPC */ 1470 1421 1422 + #ifdef CONFIG_CARL9170_HWRNG 1423 + static int carl9170_rng_get(struct ar9170 *ar) 1424 + { 1425 + 1426 + #define RW (CARL9170_MAX_CMD_PAYLOAD_LEN / sizeof(u32)) 1427 + #define RB (CARL9170_MAX_CMD_PAYLOAD_LEN) 1428 + 1429 + static const __le32 rng_load[RW] = { 1430 + [0 ... (RW - 1)] = cpu_to_le32(AR9170_RAND_REG_NUM)}; 1431 + 1432 + u32 buf[RW]; 1433 + 1434 + unsigned int i, off = 0, transfer, count; 1435 + int err; 1436 + 1437 + BUILD_BUG_ON(RB > CARL9170_MAX_CMD_PAYLOAD_LEN); 1438 + 1439 + if (!IS_ACCEPTING_CMD(ar) || !ar->rng.initialized) 1440 + return -EAGAIN; 1441 + 1442 + count = ARRAY_SIZE(ar->rng.cache); 1443 + while (count) { 1444 + err = carl9170_exec_cmd(ar, CARL9170_CMD_RREG, 1445 + RB, (u8 *) rng_load, 1446 + RB, (u8 *) buf); 1447 + if (err) 1448 + return err; 1449 + 1450 + transfer = min_t(unsigned int, count, RW); 1451 + for (i = 0; i < transfer; i++) 1452 + ar->rng.cache[off + i] = buf[i]; 1453 + 1454 + off += transfer; 1455 + count -= transfer; 1456 + } 1457 + 1458 + ar->rng.cache_idx = 0; 1459 + 1460 + #undef RW 1461 + #undef RB 1462 + return 0; 1463 + } 1464 + 1465 + static int carl9170_rng_read(struct hwrng *rng, u32 *data) 1466 + { 1467 + struct ar9170 *ar = (struct ar9170 *)rng->priv; 1468 + int ret = -EIO; 1469 + 1470 + mutex_lock(&ar->mutex); 1471 + if (ar->rng.cache_idx >= ARRAY_SIZE(ar->rng.cache)) { 1472 + ret = carl9170_rng_get(ar); 1473 + if (ret) { 1474 + mutex_unlock(&ar->mutex); 1475 + return ret; 1476 + } 1477 + } 1478 + 1479 + *data = ar->rng.cache[ar->rng.cache_idx++]; 1480 + mutex_unlock(&ar->mutex); 1481 + 1482 + return sizeof(u16); 1483 + } 1484 + 1485 + static void carl9170_unregister_hwrng(struct ar9170 *ar) 1486 + { 1487 + if (ar->rng.initialized) { 1488 + hwrng_unregister(&ar->rng.rng); 1489 + ar->rng.initialized = false; 1490 + } 1491 + } 1492 + 1493 + static int carl9170_register_hwrng(struct ar9170 *ar) 1494 + { 1495 + int err; 1496 + 1497 + snprintf(ar->rng.name, ARRAY_SIZE(ar->rng.name), 1498 + "%s_%s", KBUILD_MODNAME, wiphy_name(ar->hw->wiphy)); 1499 + ar->rng.rng.name = ar->rng.name; 1500 + ar->rng.rng.data_read = carl9170_rng_read; 1501 + ar->rng.rng.priv = (unsigned long)ar; 1502 + 1503 + if (WARN_ON(ar->rng.initialized)) 1504 + return -EALREADY; 1505 + 1506 + err = hwrng_register(&ar->rng.rng); 1507 + if (err) { 1508 + dev_err(&ar->udev->dev, "Failed to register the random " 1509 + "number generator (%d)\n", err); 1510 + return err; 1511 + } 1512 + 1513 + ar->rng.initialized = true; 1514 + 1515 + err = carl9170_rng_get(ar); 1516 + if (err) { 1517 + carl9170_unregister_hwrng(ar); 1518 + return err; 1519 + } 1520 + 1521 + return 0; 1522 + } 1523 + #endif /* CONFIG_CARL9170_HWRNG */ 1524 + 1471 1525 static int carl9170_op_get_survey(struct ieee80211_hw *hw, int idx, 1472 1526 struct survey_info *survey) 1473 1527 { 1474 1528 struct ar9170 *ar = hw->priv; 1475 - int err; 1529 + struct ieee80211_channel *chan; 1530 + struct ieee80211_supported_band *band; 1531 + int err, b, i; 1476 1532 1477 - if (idx != 0) 1478 - return -ENOENT; 1533 + chan = ar->channel; 1534 + if (!chan) 1535 + return -ENODEV; 1479 1536 1480 - mutex_lock(&ar->mutex); 1481 - err = carl9170_get_noisefloor(ar); 1482 - mutex_unlock(&ar->mutex); 1483 - if (err) 1484 - return err; 1537 + if (idx == chan->hw_value) { 1538 + mutex_lock(&ar->mutex); 1539 + err = carl9170_update_survey(ar, false, true); 1540 + mutex_unlock(&ar->mutex); 1541 + if (err) 1542 + return err; 1543 + } 1485 1544 1486 - survey->channel = ar->channel; 1545 + for (b = 0; b < IEEE80211_NUM_BANDS; b++) { 1546 + band = ar->hw->wiphy->bands[b]; 1547 + 1548 + if (!band) 1549 + continue; 1550 + 1551 + for (i = 0; i < band->n_channels; i++) { 1552 + if (band->channels[i].hw_value == idx) { 1553 + chan = &band->channels[i]; 1554 + goto found; 1555 + } 1556 + } 1557 + } 1558 + return -ENOENT; 1559 + 1560 + found: 1561 + memcpy(survey, &ar->survey[idx], sizeof(*survey)); 1562 + 1563 + survey->channel = chan; 1487 1564 survey->filled = SURVEY_INFO_NOISE_DBM; 1488 - survey->noise = ar->noise[0]; 1565 + 1566 + if (ar->channel == chan) 1567 + survey->filled |= SURVEY_INFO_IN_USE; 1568 + 1569 + if (ar->fw.hw_counters) { 1570 + survey->filled |= SURVEY_INFO_CHANNEL_TIME | 1571 + SURVEY_INFO_CHANNEL_TIME_BUSY | 1572 + SURVEY_INFO_CHANNEL_TIME_TX; 1573 + } 1574 + 1489 1575 return 0; 1490 1576 } 1491 1577 ··· 1753 1569 INIT_WORK(&ar->ping_work, carl9170_ping_work); 1754 1570 INIT_WORK(&ar->restart_work, carl9170_restart_work); 1755 1571 INIT_WORK(&ar->ampdu_work, carl9170_ampdu_work); 1572 + INIT_DELAYED_WORK(&ar->stat_work, carl9170_stat_work); 1756 1573 INIT_DELAYED_WORK(&ar->tx_janitor, carl9170_tx_janitor); 1757 1574 INIT_LIST_HEAD(&ar->tx_ampdu_list); 1758 1575 rcu_assign_pointer(ar->tx_ampdu_iter, ··· 1837 1652 struct ath_regulatory *regulatory = &ar->common.regulatory; 1838 1653 unsigned int rx_streams, tx_streams, tx_params = 0; 1839 1654 int bands = 0; 1655 + int chans = 0; 1840 1656 1841 1657 if (ar->eeprom.length == cpu_to_le16(0xffff)) 1842 1658 return -ENODATA; ··· 1861 1675 if (ar->eeprom.operating_flags & AR9170_OPFLAG_2GHZ) { 1862 1676 ar->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = 1863 1677 &carl9170_band_2GHz; 1678 + chans += carl9170_band_2GHz.n_channels; 1864 1679 bands++; 1865 1680 } 1866 1681 if (ar->eeprom.operating_flags & AR9170_OPFLAG_5GHZ) { 1867 1682 ar->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = 1868 1683 &carl9170_band_5GHz; 1684 + chans += carl9170_band_5GHz.n_channels; 1869 1685 bands++; 1870 1686 } 1687 + 1688 + if (!bands) 1689 + return -EINVAL; 1690 + 1691 + ar->survey = kzalloc(sizeof(struct survey_info) * chans, GFP_KERNEL); 1692 + if (!ar->survey) 1693 + return -ENOMEM; 1694 + ar->num_channels = chans; 1871 1695 1872 1696 /* 1873 1697 * I measured this, a bandswitch takes roughly ··· 1897 1701 /* second part of wiphy init */ 1898 1702 SET_IEEE80211_PERM_ADDR(ar->hw, ar->eeprom.mac_address); 1899 1703 1900 - return bands ? 0 : -EINVAL; 1704 + return 0; 1901 1705 } 1902 1706 1903 1707 static int carl9170_reg_notifier(struct wiphy *wiphy, ··· 1981 1785 goto err_unreg; 1982 1786 #endif /* CONFIG_CARL9170_WPC */ 1983 1787 1788 + #ifdef CONFIG_CARL9170_HWRNG 1789 + err = carl9170_register_hwrng(ar); 1790 + if (err) 1791 + goto err_unreg; 1792 + #endif /* CONFIG_CARL9170_HWRNG */ 1793 + 1984 1794 dev_info(&ar->udev->dev, "Atheros AR9170 is registered as '%s'\n", 1985 1795 wiphy_name(ar->hw->wiphy)); 1986 1796 ··· 2019 1817 } 2020 1818 #endif /* CONFIG_CARL9170_WPC */ 2021 1819 1820 + #ifdef CONFIG_CARL9170_HWRNG 1821 + carl9170_unregister_hwrng(ar); 1822 + #endif /* CONFIG_CARL9170_HWRNG */ 1823 + 2022 1824 carl9170_cancel_worker(ar); 2023 1825 cancel_work_sync(&ar->restart_work); 2024 1826 ··· 2039 1833 2040 1834 kfree(ar->mem_bitmap); 2041 1835 ar->mem_bitmap = NULL; 1836 + 1837 + kfree(ar->survey); 1838 + ar->survey = NULL; 2042 1839 2043 1840 mutex_destroy(&ar->mutex); 2044 1841
+7 -9
drivers/net/wireless/ath/carl9170/phy.c
··· 578 578 if (err) 579 579 return err; 580 580 581 - /* XXX: remove magic! */ 582 - if (is_2ghz) 583 - err = carl9170_write_reg(ar, AR9170_PWR_REG_PLL_ADDAC, 0x5163); 584 - else 585 - err = carl9170_write_reg(ar, AR9170_PWR_REG_PLL_ADDAC, 0x5143); 581 + if (!ar->fw.hw_counters) { 582 + err = carl9170_write_reg(ar, AR9170_PWR_REG_PLL_ADDAC, 583 + is_2ghz ? 0x5163 : 0x5143); 584 + } 586 585 587 586 return err; 588 587 } ··· 1573 1574 AR9170_PHY_EXT_CCA_MIN_PWR, phy_res[i + 2]), 8); 1574 1575 } 1575 1576 1577 + if (ar->channel) 1578 + ar->survey[ar->channel->hw_value].noise = ar->noise[0]; 1579 + 1576 1580 return 0; 1577 1581 } 1578 1582 ··· 1767 1765 } else { 1768 1766 ar->chan_fail = 0; 1769 1767 } 1770 - 1771 - err = carl9170_get_noisefloor(ar); 1772 - if (err) 1773 - return err; 1774 1768 1775 1769 if (ar->heavy_clip) { 1776 1770 err = carl9170_write_reg(ar, AR9170_PHY_REG_HEAVY_CLIP_ENABLE,
+2 -2
drivers/net/wireless/ath/carl9170/version.h
··· 1 1 #ifndef __CARL9170_SHARED_VERSION_H 2 2 #define __CARL9170_SHARED_VERSION_H 3 3 #define CARL9170FW_VERSION_YEAR 11 4 - #define CARL9170FW_VERSION_MONTH 6 5 - #define CARL9170FW_VERSION_DAY 30 4 + #define CARL9170FW_VERSION_MONTH 8 5 + #define CARL9170FW_VERSION_DAY 15 6 6 #define CARL9170FW_VERSION_GIT "1.9.4" 7 7 #endif /* __CARL9170_SHARED_VERSION_H */
-10
drivers/net/wireless/b43/Kconfig
··· 169 169 Say N, if you are a distributor or user building a release kernel 170 170 for production use. 171 171 Only say Y, if you are debugging a problem in the b43 driver sourcecode. 172 - 173 - config B43_FORCE_PIO 174 - bool "Force usage of PIO instead of DMA" 175 - depends on B43 && B43_DEBUG 176 - ---help--- 177 - This will disable DMA and always enable PIO instead. 178 - 179 - Say N! 180 - This is only for debugging the PIO engine code. You do 181 - _NOT_ want to enable this.
+11 -12
drivers/net/wireless/b43/b43.h
··· 17 17 #include "phy_common.h" 18 18 19 19 20 - /* The unique identifier of the firmware that's officially supported by 21 - * this driver version. */ 22 - #define B43_SUPPORTED_FIRMWARE_ID "FW13" 23 - 24 - 25 20 #ifdef CONFIG_B43_DEBUG 26 21 # define B43_DEBUG 1 27 22 #else ··· 589 594 struct b43_dmaring *rx_ring; 590 595 591 596 u32 translation; /* Routing bits */ 597 + bool translation_in_low; /* Should translation bit go into low addr? */ 592 598 bool parity; /* Check for parity */ 593 599 }; 594 600 ··· 690 694 enum b43_firmware_file_type type; 691 695 }; 692 696 697 + enum b43_firmware_hdr_format { 698 + B43_FW_HDR_598, 699 + B43_FW_HDR_410, 700 + B43_FW_HDR_351, 701 + }; 702 + 693 703 /* Pointers to the firmware data and meta information about it. */ 694 704 struct b43_firmware { 695 705 /* Microcode */ ··· 711 709 u16 rev; 712 710 /* Firmware patchlevel */ 713 711 u16 patch; 712 + 713 + /* Format of header used by firmware */ 714 + enum b43_firmware_hdr_format hdr_format; 714 715 715 716 /* Set to true, if we are using an opensource firmware. 716 717 * Use this to check for proprietary vs opensource. */ ··· 880 875 struct b43_leds leds; 881 876 882 877 /* Kmalloc'ed scratch space for PIO TX/RX. Protected by wl->mutex. */ 883 - u8 pio_scratchspace[110] __attribute__((__aligned__(8))); 878 + u8 pio_scratchspace[118] __attribute__((__aligned__(8))); 884 879 u8 pio_tailspace[4] __attribute__((__aligned__(8))); 885 880 }; 886 881 ··· 969 964 { 970 965 return dev->__using_pio_transfers; 971 966 } 972 - 973 - #ifdef CONFIG_B43_FORCE_PIO 974 - # define B43_PIO_DEFAULT 1 975 - #else 976 - # define B43_PIO_DEFAULT 0 977 - #endif 978 967 979 968 /* Message printing */ 980 969 void b43info(struct b43_wl *wl, const char *fmt, ...)
+88 -38
drivers/net/wireless/b43/dma.c
··· 47 47 * into separate slots. */ 48 48 #define TX_SLOTS_PER_FRAME 2 49 49 50 + static u32 b43_dma_address(struct b43_dma *dma, dma_addr_t dmaaddr, 51 + enum b43_addrtype addrtype) 52 + { 53 + u32 uninitialized_var(addr); 54 + 55 + switch (addrtype) { 56 + case B43_DMA_ADDR_LOW: 57 + addr = lower_32_bits(dmaaddr); 58 + if (dma->translation_in_low) { 59 + addr &= ~SSB_DMA_TRANSLATION_MASK; 60 + addr |= dma->translation; 61 + } 62 + break; 63 + case B43_DMA_ADDR_HIGH: 64 + addr = upper_32_bits(dmaaddr); 65 + if (!dma->translation_in_low) { 66 + addr &= ~SSB_DMA_TRANSLATION_MASK; 67 + addr |= dma->translation; 68 + } 69 + break; 70 + case B43_DMA_ADDR_EXT: 71 + if (dma->translation_in_low) 72 + addr = lower_32_bits(dmaaddr); 73 + else 74 + addr = upper_32_bits(dmaaddr); 75 + addr &= SSB_DMA_TRANSLATION_MASK; 76 + addr >>= SSB_DMA_TRANSLATION_SHIFT; 77 + break; 78 + } 79 + 80 + return addr; 81 + } 50 82 51 83 /* 32bit DMA ops. */ 52 84 static ··· 109 77 slot = (int)(&(desc->dma32) - descbase); 110 78 B43_WARN_ON(!(slot >= 0 && slot < ring->nr_slots)); 111 79 112 - addr = (u32) (dmaaddr & ~SSB_DMA_TRANSLATION_MASK); 113 - addrext = (u32) (dmaaddr & SSB_DMA_TRANSLATION_MASK) 114 - >> SSB_DMA_TRANSLATION_SHIFT; 115 - addr |= ring->dev->dma.translation; 80 + addr = b43_dma_address(&ring->dev->dma, dmaaddr, B43_DMA_ADDR_LOW); 81 + addrext = b43_dma_address(&ring->dev->dma, dmaaddr, B43_DMA_ADDR_EXT); 82 + 116 83 ctl = bufsize & B43_DMA32_DCTL_BYTECNT; 117 84 if (slot == ring->nr_slots - 1) 118 85 ctl |= B43_DMA32_DCTL_DTABLEEND; ··· 201 170 slot = (int)(&(desc->dma64) - descbase); 202 171 B43_WARN_ON(!(slot >= 0 && slot < ring->nr_slots)); 203 172 204 - addrlo = (u32) (dmaaddr & 0xFFFFFFFF); 205 - addrhi = (((u64) dmaaddr >> 32) & ~SSB_DMA_TRANSLATION_MASK); 206 - addrext = (((u64) dmaaddr >> 32) & SSB_DMA_TRANSLATION_MASK) 207 - >> SSB_DMA_TRANSLATION_SHIFT; 208 - addrhi |= ring->dev->dma.translation; 173 + addrlo = b43_dma_address(&ring->dev->dma, dmaaddr, B43_DMA_ADDR_LOW); 174 + addrhi = b43_dma_address(&ring->dev->dma, dmaaddr, B43_DMA_ADDR_HIGH); 175 + addrext = b43_dma_address(&ring->dev->dma, dmaaddr, B43_DMA_ADDR_EXT); 176 + 209 177 if (slot == ring->nr_slots - 1) 210 178 ctl0 |= B43_DMA64_DCTL0_DTABLEEND; 211 179 if (start) ··· 688 658 int err = 0; 689 659 u32 value; 690 660 u32 addrext; 691 - u32 trans = ring->dev->dma.translation; 692 661 bool parity = ring->dev->dma.parity; 662 + u32 addrlo; 663 + u32 addrhi; 693 664 694 665 if (ring->tx) { 695 666 if (ring->type == B43_DMA_64BIT) { 696 667 u64 ringbase = (u64) (ring->dmabase); 668 + addrext = b43_dma_address(&ring->dev->dma, ringbase, B43_DMA_ADDR_EXT); 669 + addrlo = b43_dma_address(&ring->dev->dma, ringbase, B43_DMA_ADDR_LOW); 670 + addrhi = b43_dma_address(&ring->dev->dma, ringbase, B43_DMA_ADDR_HIGH); 697 671 698 - addrext = ((ringbase >> 32) & SSB_DMA_TRANSLATION_MASK) 699 - >> SSB_DMA_TRANSLATION_SHIFT; 700 672 value = B43_DMA64_TXENABLE; 701 673 value |= (addrext << B43_DMA64_TXADDREXT_SHIFT) 702 674 & B43_DMA64_TXADDREXT_MASK; 703 675 if (!parity) 704 676 value |= B43_DMA64_TXPARITYDISABLE; 705 677 b43_dma_write(ring, B43_DMA64_TXCTL, value); 706 - b43_dma_write(ring, B43_DMA64_TXRINGLO, 707 - (ringbase & 0xFFFFFFFF)); 708 - b43_dma_write(ring, B43_DMA64_TXRINGHI, 709 - ((ringbase >> 32) & 710 - ~SSB_DMA_TRANSLATION_MASK) 711 - | trans); 678 + b43_dma_write(ring, B43_DMA64_TXRINGLO, addrlo); 679 + b43_dma_write(ring, B43_DMA64_TXRINGHI, addrhi); 712 680 } else { 713 681 u32 ringbase = (u32) (ring->dmabase); 682 + addrext = b43_dma_address(&ring->dev->dma, ringbase, B43_DMA_ADDR_EXT); 683 + addrlo = b43_dma_address(&ring->dev->dma, ringbase, B43_DMA_ADDR_LOW); 714 684 715 - addrext = (ringbase & SSB_DMA_TRANSLATION_MASK) 716 - >> SSB_DMA_TRANSLATION_SHIFT; 717 685 value = B43_DMA32_TXENABLE; 718 686 value |= (addrext << B43_DMA32_TXADDREXT_SHIFT) 719 687 & B43_DMA32_TXADDREXT_MASK; 720 688 if (!parity) 721 689 value |= B43_DMA32_TXPARITYDISABLE; 722 690 b43_dma_write(ring, B43_DMA32_TXCTL, value); 723 - b43_dma_write(ring, B43_DMA32_TXRING, 724 - (ringbase & ~SSB_DMA_TRANSLATION_MASK) 725 - | trans); 691 + b43_dma_write(ring, B43_DMA32_TXRING, addrlo); 726 692 } 727 693 } else { 728 694 err = alloc_initial_descbuffers(ring); ··· 726 700 goto out; 727 701 if (ring->type == B43_DMA_64BIT) { 728 702 u64 ringbase = (u64) (ring->dmabase); 703 + addrext = b43_dma_address(&ring->dev->dma, ringbase, B43_DMA_ADDR_EXT); 704 + addrlo = b43_dma_address(&ring->dev->dma, ringbase, B43_DMA_ADDR_LOW); 705 + addrhi = b43_dma_address(&ring->dev->dma, ringbase, B43_DMA_ADDR_HIGH); 729 706 730 - addrext = ((ringbase >> 32) & SSB_DMA_TRANSLATION_MASK) 731 - >> SSB_DMA_TRANSLATION_SHIFT; 732 707 value = (ring->frameoffset << B43_DMA64_RXFROFF_SHIFT); 733 708 value |= B43_DMA64_RXENABLE; 734 709 value |= (addrext << B43_DMA64_RXADDREXT_SHIFT) ··· 737 710 if (!parity) 738 711 value |= B43_DMA64_RXPARITYDISABLE; 739 712 b43_dma_write(ring, B43_DMA64_RXCTL, value); 740 - b43_dma_write(ring, B43_DMA64_RXRINGLO, 741 - (ringbase & 0xFFFFFFFF)); 742 - b43_dma_write(ring, B43_DMA64_RXRINGHI, 743 - ((ringbase >> 32) & 744 - ~SSB_DMA_TRANSLATION_MASK) 745 - | trans); 713 + b43_dma_write(ring, B43_DMA64_RXRINGLO, addrlo); 714 + b43_dma_write(ring, B43_DMA64_RXRINGHI, addrhi); 746 715 b43_dma_write(ring, B43_DMA64_RXINDEX, ring->nr_slots * 747 716 sizeof(struct b43_dmadesc64)); 748 717 } else { 749 718 u32 ringbase = (u32) (ring->dmabase); 719 + addrext = b43_dma_address(&ring->dev->dma, ringbase, B43_DMA_ADDR_EXT); 720 + addrlo = b43_dma_address(&ring->dev->dma, ringbase, B43_DMA_ADDR_LOW); 750 721 751 - addrext = (ringbase & SSB_DMA_TRANSLATION_MASK) 752 - >> SSB_DMA_TRANSLATION_SHIFT; 753 722 value = (ring->frameoffset << B43_DMA32_RXFROFF_SHIFT); 754 723 value |= B43_DMA32_RXENABLE; 755 724 value |= (addrext << B43_DMA32_RXADDREXT_SHIFT) ··· 753 730 if (!parity) 754 731 value |= B43_DMA32_RXPARITYDISABLE; 755 732 b43_dma_write(ring, B43_DMA32_RXCTL, value); 756 - b43_dma_write(ring, B43_DMA32_RXRING, 757 - (ringbase & ~SSB_DMA_TRANSLATION_MASK) 758 - | trans); 733 + b43_dma_write(ring, B43_DMA32_RXRING, addrlo); 759 734 b43_dma_write(ring, B43_DMA32_RXINDEX, ring->nr_slots * 760 735 sizeof(struct b43_dmadesc32)); 761 736 } ··· 893 872 ring->current_slot = -1; 894 873 } else { 895 874 if (ring->index == 0) { 896 - ring->rx_buffersize = B43_DMA0_RX_BUFFERSIZE; 897 - ring->frameoffset = B43_DMA0_RX_FRAMEOFFSET; 875 + switch (dev->fw.hdr_format) { 876 + case B43_FW_HDR_598: 877 + ring->rx_buffersize = B43_DMA0_RX_FW598_BUFSIZE; 878 + ring->frameoffset = B43_DMA0_RX_FW598_FO; 879 + break; 880 + case B43_FW_HDR_410: 881 + case B43_FW_HDR_351: 882 + ring->rx_buffersize = B43_DMA0_RX_FW351_BUFSIZE; 883 + ring->frameoffset = B43_DMA0_RX_FW351_FO; 884 + break; 885 + } 898 886 } else 899 887 B43_WARN_ON(1); 900 888 } ··· 1096 1066 return 0; 1097 1067 } 1098 1068 1069 + /* Some hardware with 64-bit DMA seems to be bugged and looks for translation 1070 + * bit in low address word instead of high one. 1071 + */ 1072 + static bool b43_dma_translation_in_low_word(struct b43_wldev *dev, 1073 + enum b43_dmatype type) 1074 + { 1075 + if (type != B43_DMA_64BIT) 1076 + return 1; 1077 + 1078 + #ifdef CONFIG_B43_SSB 1079 + if (dev->dev->bus_type == B43_BUS_SSB && 1080 + dev->dev->sdev->bus->bustype == SSB_BUSTYPE_PCI && 1081 + !(dev->dev->sdev->bus->host_pci->is_pcie && 1082 + ssb_read32(dev->dev->sdev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64)) 1083 + return 1; 1084 + #endif 1085 + return 0; 1086 + } 1087 + 1099 1088 int b43_dma_init(struct b43_wldev *dev) 1100 1089 { 1101 1090 struct b43_dma *dma = &dev->dma; ··· 1140 1091 break; 1141 1092 #endif 1142 1093 } 1094 + dma->translation_in_low = b43_dma_translation_in_low_word(dev, type); 1143 1095 1144 1096 dma->parity = true; 1145 1097 #ifdef CONFIG_B43_BCMA
+11 -2
drivers/net/wireless/b43/dma.h
··· 162 162 163 163 /* Misc DMA constants */ 164 164 #define B43_DMA_RINGMEMSIZE PAGE_SIZE 165 - #define B43_DMA0_RX_FRAMEOFFSET 30 165 + /* Offset of frame with actual data */ 166 + #define B43_DMA0_RX_FW598_FO 38 167 + #define B43_DMA0_RX_FW351_FO 30 166 168 167 169 /* DMA engine tuning knobs */ 168 170 #define B43_TXRING_SLOTS 256 169 171 #define B43_RXRING_SLOTS 64 170 - #define B43_DMA0_RX_BUFFERSIZE (B43_DMA0_RX_FRAMEOFFSET + IEEE80211_MAX_FRAME_LEN) 172 + #define B43_DMA0_RX_FW598_BUFSIZE (B43_DMA0_RX_FW598_FO + IEEE80211_MAX_FRAME_LEN) 173 + #define B43_DMA0_RX_FW351_BUFSIZE (B43_DMA0_RX_FW351_FO + IEEE80211_MAX_FRAME_LEN) 171 174 172 175 /* Pointer poison */ 173 176 #define B43_DMA_PTR_POISON ((void *)ERR_PTR(-ENOMEM)) ··· 213 210 B43_DMA_30BIT = 30, 214 211 B43_DMA_32BIT = 32, 215 212 B43_DMA_64BIT = 64, 213 + }; 214 + 215 + enum b43_addrtype { 216 + B43_DMA_ADDR_LOW, 217 + B43_DMA_ADDR_HIGH, 218 + B43_DMA_ADDR_EXT, 216 219 }; 217 220 218 221 struct b43_dmaring {
+54 -12
drivers/net/wireless/b43/main.c
··· 66 66 MODULE_AUTHOR("Gábor Stefanik"); 67 67 MODULE_LICENSE("GPL"); 68 68 69 - MODULE_FIRMWARE(B43_SUPPORTED_FIRMWARE_ID); 70 69 MODULE_FIRMWARE("b43/ucode11.fw"); 71 70 MODULE_FIRMWARE("b43/ucode13.fw"); 72 71 MODULE_FIRMWARE("b43/ucode14.fw"); ··· 107 108 module_param_named(verbose, b43_modparam_verbose, int, 0644); 108 109 MODULE_PARM_DESC(verbose, "Log message verbosity: 0=error, 1=warn, 2=info(default), 3=debug"); 109 110 110 - static int b43_modparam_pio = B43_PIO_DEFAULT; 111 + static int b43_modparam_pio = 0; 111 112 module_param_named(pio, b43_modparam_pio, int, 0644); 112 113 MODULE_PARM_DESC(pio, "Use PIO accesses by default: 0=DMA, 1=PIO"); 113 114 ··· 319 320 static int b43_wireless_core_init(struct b43_wldev *dev); 320 321 static struct b43_wldev * b43_wireless_core_stop(struct b43_wldev *dev); 321 322 static int b43_wireless_core_start(struct b43_wldev *dev); 323 + static void b43_op_bss_info_changed(struct ieee80211_hw *hw, 324 + struct ieee80211_vif *vif, 325 + struct ieee80211_bss_conf *conf, 326 + u32 changed); 322 327 323 328 static int b43_ratelimit(struct b43_wl *wl) 324 329 { ··· 2513 2510 } 2514 2511 dev->fw.rev = fwrev; 2515 2512 dev->fw.patch = fwpatch; 2513 + if (dev->fw.rev >= 598) 2514 + dev->fw.hdr_format = B43_FW_HDR_598; 2515 + else if (dev->fw.rev >= 410) 2516 + dev->fw.hdr_format = B43_FW_HDR_410; 2517 + else 2518 + dev->fw.hdr_format = B43_FW_HDR_351; 2516 2519 dev->fw.opensource = (fwdate == 0xFFFF); 2517 2520 2518 2521 /* Default to use-all-queues. */ ··· 2566 2557 dev->fw.rev, dev->fw.patch); 2567 2558 wiphy->hw_version = dev->dev->core_id; 2568 2559 2569 - if (b43_is_old_txhdr_format(dev)) { 2560 + if (dev->fw.hdr_format == B43_FW_HDR_351) { 2570 2561 /* We're over the deadline, but we keep support for old fw 2571 2562 * until it turns out to be in major conflict with something new. */ 2572 2563 b43warn(dev->wl, "You are using an old firmware image. " ··· 2952 2943 case B43_PHYTYPE_G: 2953 2944 case B43_PHYTYPE_N: 2954 2945 case B43_PHYTYPE_LP: 2946 + case B43_PHYTYPE_HT: 2955 2947 b43_rate_memory_write(dev, B43_OFDM_RATE_6MB, 1); 2956 2948 b43_rate_memory_write(dev, B43_OFDM_RATE_12MB, 1); 2957 2949 b43_rate_memory_write(dev, B43_OFDM_RATE_18MB, 1); ··· 3788 3778 struct ieee80211_conf *conf = &hw->conf; 3789 3779 int antenna; 3790 3780 int err = 0; 3781 + bool reload_bss = false; 3791 3782 3792 3783 mutex_lock(&wl->mutex); 3784 + 3785 + dev = wl->current_dev; 3793 3786 3794 3787 /* Switch the band (if necessary). This might change the active core. */ 3795 3788 err = b43_switch_band(wl, conf->channel); 3796 3789 if (err) 3797 3790 goto out_unlock_mutex; 3798 - dev = wl->current_dev; 3791 + 3792 + /* Need to reload all settings if the core changed */ 3793 + if (dev != wl->current_dev) { 3794 + dev = wl->current_dev; 3795 + changed = ~0; 3796 + reload_bss = true; 3797 + } 3798 + 3799 3799 phy = &dev->phy; 3800 3800 3801 3801 if (conf_is_ht(conf)) ··· 3865 3845 b43_mac_enable(dev); 3866 3846 out_unlock_mutex: 3867 3847 mutex_unlock(&wl->mutex); 3848 + 3849 + if (wl->vif && reload_bss) 3850 + b43_op_bss_info_changed(hw, wl->vif, &wl->vif->bss_conf, ~0); 3868 3851 3869 3852 return err; 3870 3853 } ··· 3957 3934 if (changed & BSS_CHANGED_BEACON_INT && 3958 3935 (b43_is_mode(wl, NL80211_IFTYPE_AP) || 3959 3936 b43_is_mode(wl, NL80211_IFTYPE_MESH_POINT) || 3960 - b43_is_mode(wl, NL80211_IFTYPE_ADHOC))) 3937 + b43_is_mode(wl, NL80211_IFTYPE_ADHOC)) && 3938 + conf->beacon_int) 3961 3939 b43_set_beacon_int(dev, conf->beacon_int); 3962 3940 3963 3941 if (changed & BSS_CHANGED_BASIC_RATES) ··· 4653 4629 b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_MAXCONT, 0x3FF); 4654 4630 4655 4631 if (b43_bus_host_is_pcmcia(dev->dev) || 4656 - b43_bus_host_is_sdio(dev->dev) || 4657 - dev->use_pio) { 4632 + b43_bus_host_is_sdio(dev->dev)) { 4633 + dev->__using_pio_transfers = 1; 4634 + err = b43_pio_init(dev); 4635 + } else if (dev->use_pio) { 4636 + b43warn(dev->wl, "Forced PIO by use_pio module parameter. " 4637 + "This should not be needed and will result in lower " 4638 + "performance.\n"); 4658 4639 dev->__using_pio_transfers = 1; 4659 4640 err = b43_pio_init(dev); 4660 4641 } else { ··· 4731 4702 out_mutex_unlock: 4732 4703 mutex_unlock(&wl->mutex); 4733 4704 4705 + if (err == 0) 4706 + b43_op_bss_info_changed(hw, vif, &vif->bss_conf, ~0); 4707 + 4734 4708 return err; 4735 4709 } 4736 4710 ··· 4803 4771 4804 4772 out_mutex_unlock: 4805 4773 mutex_unlock(&wl->mutex); 4774 + 4775 + /* reload configuration */ 4776 + b43_op_config(hw, ~0); 4806 4777 4807 4778 return err; 4808 4779 } ··· 4963 4928 if (err) 4964 4929 wl->current_dev = NULL; /* Failed to init the dev. */ 4965 4930 mutex_unlock(&wl->mutex); 4966 - if (err) 4931 + 4932 + if (err) { 4967 4933 b43err(wl, "Controller restart FAILED\n"); 4968 - else 4969 - b43info(wl, "Controller restarted\n"); 4934 + return; 4935 + } 4936 + 4937 + /* reload configuration */ 4938 + b43_op_config(wl->hw, ~0); 4939 + if (wl->vif) 4940 + b43_op_bss_info_changed(wl->hw, wl->vif, &wl->vif->bss_conf, ~0); 4941 + 4942 + b43info(wl, "Controller restarted\n"); 4970 4943 } 4971 4944 4972 4945 static int b43_setup_bands(struct b43_wldev *dev, ··· 5459 5416 feat_sdio = "S"; 5460 5417 #endif 5461 5418 printk(KERN_INFO "Broadcom 43xx driver loaded " 5462 - "[ Features: %s%s%s%s%s, Firmware-ID: " 5463 - B43_SUPPORTED_FIRMWARE_ID " ]\n", 5419 + "[ Features: %s%s%s%s%s ]\n", 5464 5420 feat_pci, feat_pcmcia, feat_nphy, 5465 5421 feat_leds, feat_sdio); 5466 5422 }
+32
drivers/net/wireless/b43/phy_common.c
··· 448 448 channel_type == NL80211_CHAN_HT40PLUS); 449 449 } 450 450 451 + /* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BmacPhyClkFgc */ 452 + void b43_phy_force_clock(struct b43_wldev *dev, bool force) 453 + { 454 + u32 tmp; 455 + 456 + WARN_ON(dev->phy.type != B43_PHYTYPE_N && 457 + dev->phy.type != B43_PHYTYPE_HT); 458 + 459 + switch (dev->dev->bus_type) { 460 + #ifdef CONFIG_B43_BCMA 461 + case B43_BUS_BCMA: 462 + tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); 463 + if (force) 464 + tmp |= BCMA_IOCTL_FGC; 465 + else 466 + tmp &= ~BCMA_IOCTL_FGC; 467 + bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); 468 + break; 469 + #endif 470 + #ifdef CONFIG_B43_SSB 471 + case B43_BUS_SSB: 472 + tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); 473 + if (force) 474 + tmp |= SSB_TMSLOW_FGC; 475 + else 476 + tmp &= ~SSB_TMSLOW_FGC; 477 + ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp); 478 + break; 479 + #endif 480 + } 481 + } 482 + 451 483 /* http://bcm-v4.sipsolutions.net/802.11/PHY/Cordic */ 452 484 struct b43_c32 b43_cordic(int theta) 453 485 {
+2
drivers/net/wireless/b43/phy_common.h
··· 444 444 445 445 bool b43_channel_type_is_40mhz(enum nl80211_channel_type channel_type); 446 446 447 + void b43_phy_force_clock(struct b43_wldev *dev, bool force); 448 + 447 449 struct b43_c32 b43_cordic(int theta); 448 450 449 451 #endif /* LINUX_B43_PHY_COMMON_H_ */
+203
drivers/net/wireless/b43/phy_ht.c
··· 152 152 } 153 153 154 154 /************************************************** 155 + * Various PHY ops 156 + **************************************************/ 157 + 158 + static void b43_phy_ht_zero_extg(struct b43_wldev *dev) 159 + { 160 + u8 i, j; 161 + u16 base[] = { 0x40, 0x60, 0x80 }; 162 + 163 + for (i = 0; i < ARRAY_SIZE(base); i++) { 164 + for (j = 0; j < 4; j++) 165 + b43_phy_write(dev, B43_PHY_EXTG(base[i] + j), 0); 166 + } 167 + 168 + for (i = 0; i < ARRAY_SIZE(base); i++) 169 + b43_phy_write(dev, B43_PHY_EXTG(base[i] + 0xc), 0); 170 + } 171 + 172 + /* Some unknown AFE (Analog Frondned) op */ 173 + static void b43_phy_ht_afe_unk1(struct b43_wldev *dev) 174 + { 175 + u8 i; 176 + 177 + const u16 ctl_regs[3][2] = { 178 + { B43_PHY_HT_AFE_CTL1, B43_PHY_HT_AFE_CTL2 }, 179 + { B43_PHY_HT_AFE_CTL3, B43_PHY_HT_AFE_CTL4 }, 180 + { B43_PHY_HT_AFE_CTL5, B43_PHY_HT_AFE_CTL6}, 181 + }; 182 + 183 + for (i = 0; i < 3; i++) { 184 + /* TODO: verify masks&sets */ 185 + b43_phy_set(dev, ctl_regs[i][1], 0x4); 186 + b43_phy_set(dev, ctl_regs[i][0], 0x4); 187 + b43_phy_mask(dev, ctl_regs[i][1], ~0x1); 188 + b43_phy_set(dev, ctl_regs[i][0], 0x1); 189 + b43_httab_write(dev, B43_HTTAB16(8, 5 + (i * 0x10)), 0); 190 + b43_phy_mask(dev, ctl_regs[i][0], ~0x4); 191 + } 192 + } 193 + 194 + static void b43_phy_ht_force_rf_sequence(struct b43_wldev *dev, u16 rf_seq) 195 + { 196 + u8 i; 197 + 198 + u16 save_seq_mode = b43_phy_read(dev, B43_PHY_HT_RF_SEQ_MODE); 199 + b43_phy_set(dev, B43_PHY_HT_RF_SEQ_MODE, 0x3); 200 + 201 + b43_phy_set(dev, B43_PHY_HT_RF_SEQ_TRIG, rf_seq); 202 + for (i = 0; i < 200; i++) { 203 + if (!(b43_phy_read(dev, B43_PHY_HT_RF_SEQ_STATUS) & rf_seq)) { 204 + i = 0; 205 + break; 206 + } 207 + msleep(1); 208 + } 209 + if (i) 210 + b43err(dev->wl, "Forcing RF sequence timeout\n"); 211 + 212 + b43_phy_write(dev, B43_PHY_HT_RF_SEQ_MODE, save_seq_mode); 213 + } 214 + 215 + static void b43_phy_ht_read_clip_detection(struct b43_wldev *dev, u16 *clip_st) 216 + { 217 + clip_st[0] = b43_phy_read(dev, B43_PHY_HT_C1_CLIP1THRES); 218 + clip_st[1] = b43_phy_read(dev, B43_PHY_HT_C2_CLIP1THRES); 219 + clip_st[2] = b43_phy_read(dev, B43_PHY_HT_C3_CLIP1THRES); 220 + } 221 + 222 + static void b43_phy_ht_bphy_init(struct b43_wldev *dev) 223 + { 224 + unsigned int i; 225 + u16 val; 226 + 227 + val = 0x1E1F; 228 + for (i = 0; i < 16; i++) { 229 + b43_phy_write(dev, B43_PHY_N_BMODE(0x88 + i), val); 230 + val -= 0x202; 231 + } 232 + val = 0x3E3F; 233 + for (i = 0; i < 16; i++) { 234 + b43_phy_write(dev, B43_PHY_N_BMODE(0x98 + i), val); 235 + val -= 0x202; 236 + } 237 + b43_phy_write(dev, B43_PHY_N_BMODE(0x38), 0x668); 238 + } 239 + 240 + /************************************************** 155 241 * Channel switching ops. 156 242 **************************************************/ 157 243 ··· 341 255 342 256 static int b43_phy_ht_op_init(struct b43_wldev *dev) 343 257 { 258 + u16 tmp; 259 + u16 clip_state[3]; 260 + 344 261 b43_phy_ht_tables_init(dev); 262 + 263 + b43_phy_mask(dev, 0x0be, ~0x2); 264 + b43_phy_set(dev, 0x23f, 0x7ff); 265 + b43_phy_set(dev, 0x240, 0x7ff); 266 + b43_phy_set(dev, 0x241, 0x7ff); 267 + 268 + b43_phy_ht_zero_extg(dev); 269 + 270 + b43_phy_mask(dev, B43_PHY_EXTG(0), ~0x3); 271 + 272 + b43_phy_write(dev, B43_PHY_HT_AFE_CTL1, 0); 273 + b43_phy_write(dev, B43_PHY_HT_AFE_CTL3, 0); 274 + b43_phy_write(dev, B43_PHY_HT_AFE_CTL5, 0); 275 + 276 + b43_phy_write(dev, B43_PHY_EXTG(0x103), 0x20); 277 + b43_phy_write(dev, B43_PHY_EXTG(0x101), 0x20); 278 + b43_phy_write(dev, 0x20d, 0xb8); 279 + b43_phy_write(dev, B43_PHY_EXTG(0x14f), 0xc8); 280 + b43_phy_write(dev, 0x70, 0x50); 281 + b43_phy_write(dev, 0x1ff, 0x30); 282 + 283 + if (0) /* TODO: condition */ 284 + ; /* TODO: PHY op on reg 0x217 */ 285 + 286 + b43_phy_read(dev, 0xb0); /* TODO: what for? */ 287 + b43_phy_set(dev, 0xb0, 0x1); 288 + 289 + b43_phy_set(dev, 0xb1, 0x91); 290 + b43_phy_write(dev, 0x32f, 0x0003); 291 + b43_phy_write(dev, 0x077, 0x0010); 292 + b43_phy_write(dev, 0x0b4, 0x0258); 293 + b43_phy_mask(dev, 0x17e, ~0x4000); 294 + 295 + b43_phy_write(dev, 0x0b9, 0x0072); 296 + 297 + b43_httab_write_few(dev, B43_HTTAB16(7, 0x14e), 2, 0x010f, 0x010f); 298 + b43_httab_write_few(dev, B43_HTTAB16(7, 0x15e), 2, 0x010f, 0x010f); 299 + b43_httab_write_few(dev, B43_HTTAB16(7, 0x16e), 2, 0x010f, 0x010f); 300 + 301 + b43_phy_ht_afe_unk1(dev); 302 + 303 + b43_httab_write_few(dev, B43_HTTAB16(7, 0x130), 9, 0x777, 0x111, 0x111, 304 + 0x777, 0x111, 0x111, 0x777, 0x111, 0x111); 305 + 306 + b43_httab_write(dev, B43_HTTAB16(7, 0x120), 0x0777); 307 + b43_httab_write(dev, B43_HTTAB16(7, 0x124), 0x0777); 308 + 309 + b43_httab_write(dev, B43_HTTAB16(8, 0x00), 0x02); 310 + b43_httab_write(dev, B43_HTTAB16(8, 0x10), 0x02); 311 + b43_httab_write(dev, B43_HTTAB16(8, 0x20), 0x02); 312 + 313 + b43_httab_write_few(dev, B43_HTTAB16(8, 0x08), 4, 314 + 0x8e, 0x96, 0x96, 0x96); 315 + b43_httab_write_few(dev, B43_HTTAB16(8, 0x18), 4, 316 + 0x8f, 0x9f, 0x9f, 0x9f); 317 + b43_httab_write_few(dev, B43_HTTAB16(8, 0x28), 4, 318 + 0x8f, 0x9f, 0x9f, 0x9f); 319 + 320 + b43_httab_write_few(dev, B43_HTTAB16(8, 0x0c), 4, 0x2, 0x2, 0x2, 0x2); 321 + b43_httab_write_few(dev, B43_HTTAB16(8, 0x1c), 4, 0x2, 0x2, 0x2, 0x2); 322 + b43_httab_write_few(dev, B43_HTTAB16(8, 0x2c), 4, 0x2, 0x2, 0x2, 0x2); 323 + 324 + b43_phy_maskset(dev, 0x0280, 0xff00, 0x3e); 325 + b43_phy_maskset(dev, 0x0283, 0xff00, 0x3e); 326 + b43_phy_maskset(dev, B43_PHY_OFDM(0x0141), 0xff00, 0x46); 327 + b43_phy_maskset(dev, 0x0283, 0xff00, 0x40); 328 + 329 + b43_httab_write_few(dev, B43_HTTAB16(00, 0x8), 4, 330 + 0x09, 0x0e, 0x13, 0x18); 331 + b43_httab_write_few(dev, B43_HTTAB16(01, 0x8), 4, 332 + 0x09, 0x0e, 0x13, 0x18); 333 + /* TODO: Did wl mean 2 instead of 40? */ 334 + b43_httab_write_few(dev, B43_HTTAB16(40, 0x8), 4, 335 + 0x09, 0x0e, 0x13, 0x18); 336 + 337 + b43_phy_maskset(dev, B43_PHY_OFDM(0x24), 0x3f, 0xd); 338 + b43_phy_maskset(dev, B43_PHY_OFDM(0x64), 0x3f, 0xd); 339 + b43_phy_maskset(dev, B43_PHY_OFDM(0xa4), 0x3f, 0xd); 340 + 341 + b43_phy_set(dev, B43_PHY_EXTG(0x060), 0x1); 342 + b43_phy_set(dev, B43_PHY_EXTG(0x064), 0x1); 343 + b43_phy_set(dev, B43_PHY_EXTG(0x080), 0x1); 344 + b43_phy_set(dev, B43_PHY_EXTG(0x084), 0x1); 345 + 346 + /* Copy some tables entries */ 347 + tmp = b43_httab_read(dev, B43_HTTAB16(7, 0x144)); 348 + b43_httab_write(dev, B43_HTTAB16(7, 0x14a), tmp); 349 + tmp = b43_httab_read(dev, B43_HTTAB16(7, 0x154)); 350 + b43_httab_write(dev, B43_HTTAB16(7, 0x15a), tmp); 351 + tmp = b43_httab_read(dev, B43_HTTAB16(7, 0x164)); 352 + b43_httab_write(dev, B43_HTTAB16(7, 0x16a), tmp); 353 + 354 + /* Reset CCA */ 355 + b43_phy_force_clock(dev, true); 356 + tmp = b43_phy_read(dev, B43_PHY_HT_BBCFG); 357 + b43_phy_write(dev, B43_PHY_HT_BBCFG, tmp | B43_PHY_HT_BBCFG_RSTCCA); 358 + b43_phy_write(dev, B43_PHY_HT_BBCFG, tmp & ~B43_PHY_HT_BBCFG_RSTCCA); 359 + b43_phy_force_clock(dev, false); 360 + 361 + b43_mac_phy_clock_set(dev, true); 362 + 363 + b43_phy_ht_force_rf_sequence(dev, B43_PHY_HT_RF_SEQ_TRIG_RX2TX); 364 + b43_phy_ht_force_rf_sequence(dev, B43_PHY_HT_RF_SEQ_TRIG_RST2RX); 365 + 366 + /* TODO: PHY op on reg 0xb0 */ 367 + 368 + /* TODO: Should we restore it? Or store it in global PHY info? */ 369 + b43_phy_ht_read_clip_detection(dev, clip_state); 370 + 371 + if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) 372 + b43_phy_ht_bphy_init(dev); 373 + 374 + b43_httab_write_bulk(dev, B43_HTTAB32(0x1a, 0xc0), 375 + B43_HTTAB_1A_C0_LATE_SIZE, b43_httab_0x1a_0xc0_late); 345 376 346 377 return 0; 347 378 }
+19
drivers/net/wireless/b43/phy_ht.h
··· 4 4 #include "phy_common.h" 5 5 6 6 7 + #define B43_PHY_HT_BBCFG 0x001 /* BB config */ 8 + #define B43_PHY_HT_BBCFG_RSTCCA 0x4000 /* Reset CCA */ 9 + #define B43_PHY_HT_BBCFG_RSTRX 0x8000 /* Reset RX */ 7 10 #define B43_PHY_HT_BANDCTL 0x009 /* Band control */ 11 + #define B43_PHY_HT_BANDCTL_5GHZ 0x0001 /* Use the 5GHz band */ 8 12 #define B43_PHY_HT_TABLE_ADDR 0x072 /* Table address */ 9 13 #define B43_PHY_HT_TABLE_DATALO 0x073 /* Table data low */ 10 14 #define B43_PHY_HT_TABLE_DATAHI 0x074 /* Table data high */ ··· 18 14 #define B43_PHY_HT_BW4 0x1D1 19 15 #define B43_PHY_HT_BW5 0x1D2 20 16 #define B43_PHY_HT_BW6 0x1D3 17 + 18 + #define B43_PHY_HT_C1_CLIP1THRES B43_PHY_OFDM(0x00E) 19 + #define B43_PHY_HT_C2_CLIP1THRES B43_PHY_OFDM(0x04E) 20 + #define B43_PHY_HT_C3_CLIP1THRES B43_PHY_OFDM(0x08E) 21 + 22 + #define B43_PHY_HT_RF_SEQ_MODE B43_PHY_EXTG(0x000) 23 + #define B43_PHY_HT_RF_SEQ_TRIG B43_PHY_EXTG(0x003) 24 + #define B43_PHY_HT_RF_SEQ_TRIG_RX2TX 0x0001 /* RX2TX */ 25 + #define B43_PHY_HT_RF_SEQ_TRIG_TX2RX 0x0002 /* TX2RX */ 26 + #define B43_PHY_HT_RF_SEQ_TRIG_UPGH 0x0004 /* Update gain H */ 27 + #define B43_PHY_HT_RF_SEQ_TRIG_UPGL 0x0008 /* Update gain L */ 28 + #define B43_PHY_HT_RF_SEQ_TRIG_UPGU 0x0010 /* Update gain U */ 29 + #define B43_PHY_HT_RF_SEQ_TRIG_RST2RX 0x0020 /* Reset to RX */ 30 + #define B43_PHY_HT_RF_SEQ_STATUS B43_PHY_EXTG(0x004) 31 + /* Values for the status are the same as for the trigger */ 21 32 22 33 #define B43_PHY_HT_RF_CTL1 B43_PHY_EXTG(0x010) 23 34
+209 -2
drivers/net/wireless/b43/phy_lcn.c
··· 28 28 #include "main.h" 29 29 30 30 /************************************************** 31 + * Radio 2064. 32 + **************************************************/ 33 + 34 + static void b43_radio_2064_init(struct b43_wldev *dev) 35 + { 36 + b43_radio_write(dev, 0x09c, 0x0020); 37 + b43_radio_write(dev, 0x105, 0x0008); 38 + b43_radio_write(dev, 0x032, 0x0062); 39 + b43_radio_write(dev, 0x033, 0x0019); 40 + b43_radio_write(dev, 0x090, 0x0010); 41 + b43_radio_write(dev, 0x010, 0x0000); 42 + b43_radio_write(dev, 0x060, 0x007f); 43 + b43_radio_write(dev, 0x061, 0x0072); 44 + b43_radio_write(dev, 0x062, 0x007f); 45 + b43_radio_write(dev, 0x01d, 0x0002); 46 + b43_radio_write(dev, 0x01e, 0x0006); 47 + 48 + b43_phy_write(dev, 0x4ea, 0x4688); 49 + b43_phy_maskset(dev, 0x4eb, ~0x7, 0x2); 50 + b43_phy_mask(dev, 0x4eb, ~0x01c0); 51 + b43_phy_maskset(dev, 0x4eb, 0xff00, 0x19); 52 + 53 + b43_lcntab_write(dev, B43_LCNTAB16(0x00, 0x55), 0); 54 + 55 + b43_radio_mask(dev, 0x05b, (u16) ~0xff02); 56 + b43_radio_set(dev, 0x004, 0x40); 57 + b43_radio_set(dev, 0x120, 0x10); 58 + b43_radio_set(dev, 0x078, 0x80); 59 + b43_radio_set(dev, 0x129, 0x2); 60 + b43_radio_set(dev, 0x057, 0x1); 61 + b43_radio_set(dev, 0x05b, 0x2); 62 + 63 + /* TODO: wait for some bit to be set */ 64 + b43_radio_read(dev, 0x05c); 65 + 66 + b43_radio_mask(dev, 0x05b, (u16) ~0xff02); 67 + b43_radio_mask(dev, 0x057, (u16) ~0xff01); 68 + 69 + b43_phy_write(dev, 0x933, 0x2d6b); 70 + b43_phy_write(dev, 0x934, 0x2d6b); 71 + b43_phy_write(dev, 0x935, 0x2d6b); 72 + b43_phy_write(dev, 0x936, 0x2d6b); 73 + b43_phy_write(dev, 0x937, 0x016b); 74 + 75 + b43_radio_mask(dev, 0x057, (u16) ~0xff02); 76 + b43_radio_write(dev, 0x0c2, 0x006f); 77 + } 78 + 79 + /************************************************** 80 + * Various PHY ops 81 + **************************************************/ 82 + 83 + static void b43_phy_lcn_afe_set_unset(struct b43_wldev *dev) 84 + { 85 + u16 afe_ctl2 = b43_phy_read(dev, B43_PHY_LCN_AFE_CTL2); 86 + u16 afe_ctl1 = b43_phy_read(dev, B43_PHY_LCN_AFE_CTL1); 87 + 88 + b43_phy_write(dev, B43_PHY_LCN_AFE_CTL2, afe_ctl2 | 0x1); 89 + b43_phy_write(dev, B43_PHY_LCN_AFE_CTL1, afe_ctl1 | 0x1); 90 + 91 + b43_phy_write(dev, B43_PHY_LCN_AFE_CTL2, afe_ctl2 & ~0x1); 92 + b43_phy_write(dev, B43_PHY_LCN_AFE_CTL1, afe_ctl1 & ~0x1); 93 + 94 + b43_phy_write(dev, B43_PHY_LCN_AFE_CTL2, afe_ctl2); 95 + b43_phy_write(dev, B43_PHY_LCN_AFE_CTL1, afe_ctl1); 96 + } 97 + 98 + static void b43_phy_lcn_clean_0x18_table(struct b43_wldev *dev) 99 + { 100 + u8 i; 101 + 102 + for (i = 0; i < 0x80; i++) 103 + b43_lcntab_write(dev, B43_LCNTAB32(0x18, i), 0x80000); 104 + } 105 + 106 + static void b43_phy_lcn_clear_0x07_table(struct b43_wldev *dev) 107 + { 108 + u8 i; 109 + 110 + b43_phy_write(dev, B43_PHY_LCN_TABLE_ADDR, (0x7 << 10) | 0x340); 111 + for (i = 0; i < 30; i++) { 112 + b43_phy_write(dev, B43_PHY_LCN_TABLE_DATAHI, 0); 113 + b43_phy_write(dev, B43_PHY_LCN_TABLE_DATALO, 0); 114 + } 115 + 116 + b43_phy_write(dev, B43_PHY_LCN_TABLE_ADDR, (0x7 << 10) | 0x80); 117 + for (i = 0; i < 64; i++) { 118 + b43_phy_write(dev, B43_PHY_LCN_TABLE_DATAHI, 0); 119 + b43_phy_write(dev, B43_PHY_LCN_TABLE_DATALO, 0); 120 + } 121 + } 122 + 123 + /************************************************** 124 + * Basic PHY ops. 125 + **************************************************/ 126 + 127 + static int b43_phy_lcn_op_allocate(struct b43_wldev *dev) 128 + { 129 + struct b43_phy_lcn *phy_lcn; 130 + 131 + phy_lcn = kzalloc(sizeof(*phy_lcn), GFP_KERNEL); 132 + if (!phy_lcn) 133 + return -ENOMEM; 134 + dev->phy.lcn = phy_lcn; 135 + 136 + return 0; 137 + } 138 + 139 + static void b43_phy_lcn_op_free(struct b43_wldev *dev) 140 + { 141 + struct b43_phy *phy = &dev->phy; 142 + struct b43_phy_lcn *phy_lcn = phy->lcn; 143 + 144 + kfree(phy_lcn); 145 + phy->lcn = NULL; 146 + } 147 + 148 + static void b43_phy_lcn_op_prepare_structs(struct b43_wldev *dev) 149 + { 150 + struct b43_phy *phy = &dev->phy; 151 + struct b43_phy_lcn *phy_lcn = phy->lcn; 152 + 153 + memset(phy_lcn, 0, sizeof(*phy_lcn)); 154 + } 155 + 156 + static int b43_phy_lcn_op_init(struct b43_wldev *dev) 157 + { 158 + b43_phy_set(dev, 0x44a, 0x80); 159 + b43_phy_mask(dev, 0x44a, 0x7f); 160 + b43_phy_set(dev, 0x6d1, 0x80); 161 + b43_phy_write(dev, 0x6d0, 0x7); 162 + 163 + b43_phy_lcn_afe_set_unset(dev); 164 + 165 + b43_phy_write(dev, 0x60a, 0xa0); 166 + b43_phy_write(dev, 0x46a, 0x19); 167 + b43_phy_maskset(dev, 0x663, 0xFF00, 0x64); 168 + 169 + b43_phy_lcn_tables_init(dev); 170 + /* TODO: various tables ops here */ 171 + b43_phy_lcn_clean_0x18_table(dev); 172 + 173 + /* TODO: some ops here */ 174 + 175 + b43_phy_lcn_clear_0x07_table(dev); 176 + 177 + if (dev->phy.radio_ver == 0x2064) 178 + b43_radio_2064_init(dev); 179 + else 180 + B43_WARN_ON(1); 181 + 182 + return 0; 183 + } 184 + 185 + static void b43_phy_lcn_op_software_rfkill(struct b43_wldev *dev, 186 + bool blocked) 187 + { 188 + if (b43_read32(dev, B43_MMIO_MACCTL) & B43_MACCTL_ENABLED) 189 + b43err(dev->wl, "MAC not suspended\n"); 190 + 191 + if (blocked) { 192 + b43_phy_mask(dev, B43_PHY_LCN_RF_CTL2, ~0x7c00); 193 + b43_phy_set(dev, B43_PHY_LCN_RF_CTL1, 0x1f00); 194 + 195 + b43_phy_mask(dev, B43_PHY_LCN_RF_CTL5, ~0x7f00); 196 + b43_phy_mask(dev, B43_PHY_LCN_RF_CTL4, ~0x2); 197 + b43_phy_set(dev, B43_PHY_LCN_RF_CTL3, 0x808); 198 + 199 + b43_phy_mask(dev, B43_PHY_LCN_RF_CTL7, ~0x8); 200 + b43_phy_set(dev, B43_PHY_LCN_RF_CTL6, 0x8); 201 + } else { 202 + b43_phy_mask(dev, B43_PHY_LCN_RF_CTL1, ~0x1f00); 203 + b43_phy_mask(dev, B43_PHY_LCN_RF_CTL3, ~0x808); 204 + b43_phy_mask(dev, B43_PHY_LCN_RF_CTL6, ~0x8); 205 + } 206 + } 207 + 208 + static void b43_phy_lcn_op_switch_analog(struct b43_wldev *dev, bool on) 209 + { 210 + if (on) { 211 + b43_phy_mask(dev, B43_PHY_LCN_AFE_CTL1, ~0x7); 212 + } else { 213 + b43_phy_set(dev, B43_PHY_LCN_AFE_CTL2, 0x7); 214 + b43_phy_set(dev, B43_PHY_LCN_AFE_CTL1, 0x7); 215 + } 216 + } 217 + 218 + static unsigned int b43_phy_lcn_op_get_default_chan(struct b43_wldev *dev) 219 + { 220 + if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) 221 + return 1; 222 + return 36; 223 + } 224 + 225 + static enum b43_txpwr_result 226 + b43_phy_lcn_op_recalc_txpower(struct b43_wldev *dev, bool ignore_tssi) 227 + { 228 + return B43_TXPWR_RES_DONE; 229 + } 230 + 231 + static void b43_phy_lcn_op_adjust_txpower(struct b43_wldev *dev) 232 + { 233 + } 234 + 235 + /************************************************** 31 236 * PHY ops struct. 32 237 **************************************************/ 33 238 34 239 const struct b43_phy_operations b43_phyops_lcn = { 35 - /* 36 240 .allocate = b43_phy_lcn_op_allocate, 37 241 .free = b43_phy_lcn_op_free, 38 242 .prepare_structs = b43_phy_lcn_op_prepare_structs, 39 243 .init = b43_phy_lcn_op_init, 244 + /* 40 245 .phy_read = b43_phy_lcn_op_read, 41 246 .phy_write = b43_phy_lcn_op_write, 42 247 .phy_maskset = b43_phy_lcn_op_maskset, 43 248 .radio_read = b43_phy_lcn_op_radio_read, 44 249 .radio_write = b43_phy_lcn_op_radio_write, 250 + */ 45 251 .software_rfkill = b43_phy_lcn_op_software_rfkill, 46 252 .switch_analog = b43_phy_lcn_op_switch_analog, 253 + /* 47 254 .switch_channel = b43_phy_lcn_op_switch_channel, 255 + */ 48 256 .get_default_chan = b43_phy_lcn_op_get_default_chan, 49 257 .recalc_txpower = b43_phy_lcn_op_recalc_txpower, 50 258 .adjust_txpower = b43_phy_lcn_op_adjust_txpower, 51 - */ 52 259 };
+14
drivers/net/wireless/b43/phy_lcn.h
··· 4 4 #include "phy_common.h" 5 5 6 6 7 + #define B43_PHY_LCN_AFE_CTL1 B43_PHY_OFDM(0x03B) 8 + #define B43_PHY_LCN_AFE_CTL2 B43_PHY_OFDM(0x03C) 9 + #define B43_PHY_LCN_RF_CTL1 B43_PHY_OFDM(0x04C) 10 + #define B43_PHY_LCN_RF_CTL2 B43_PHY_OFDM(0x04D) 11 + #define B43_PHY_LCN_TABLE_ADDR B43_PHY_OFDM(0x055) /* Table address */ 12 + #define B43_PHY_LCN_TABLE_DATALO B43_PHY_OFDM(0x056) /* Table data low */ 13 + #define B43_PHY_LCN_TABLE_DATAHI B43_PHY_OFDM(0x057) /* Table data high */ 14 + #define B43_PHY_LCN_RF_CTL3 B43_PHY_OFDM(0x0B0) 15 + #define B43_PHY_LCN_RF_CTL4 B43_PHY_OFDM(0x0B1) 16 + #define B43_PHY_LCN_RF_CTL5 B43_PHY_OFDM(0x0B7) 17 + #define B43_PHY_LCN_RF_CTL6 B43_PHY_OFDM(0x0F9) 18 + #define B43_PHY_LCN_RF_CTL7 B43_PHY_OFDM(0x0FA) 19 + 20 + 7 21 struct b43_phy_lcn { 8 22 }; 9 23
+4 -36
drivers/net/wireless/b43/phy_n.c
··· 600 600 } 601 601 } 602 602 603 - /* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BmacPhyClkFgc */ 604 - static void b43_nphy_bmac_clock_fgc(struct b43_wldev *dev, bool force) 605 - { 606 - u32 tmp; 607 - 608 - if (dev->phy.type != B43_PHYTYPE_N) 609 - return; 610 - 611 - switch (dev->dev->bus_type) { 612 - #ifdef CONFIG_B43_BCMA 613 - case B43_BUS_BCMA: 614 - tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); 615 - if (force) 616 - tmp |= BCMA_IOCTL_FGC; 617 - else 618 - tmp &= ~BCMA_IOCTL_FGC; 619 - bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); 620 - break; 621 - #endif 622 - #ifdef CONFIG_B43_SSB 623 - case B43_BUS_SSB: 624 - tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); 625 - if (force) 626 - tmp |= SSB_TMSLOW_FGC; 627 - else 628 - tmp &= ~SSB_TMSLOW_FGC; 629 - ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp); 630 - break; 631 - #endif 632 - } 633 - } 634 - 635 603 /* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CCA */ 636 604 static void b43_nphy_reset_cca(struct b43_wldev *dev) 637 605 { 638 606 u16 bbcfg; 639 607 640 - b43_nphy_bmac_clock_fgc(dev, 1); 608 + b43_phy_force_clock(dev, 1); 641 609 bbcfg = b43_phy_read(dev, B43_NPHY_BBCFG); 642 610 b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg | B43_NPHY_BBCFG_RSTCCA); 643 611 udelay(1); 644 612 b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg & ~B43_NPHY_BBCFG_RSTCCA); 645 - b43_nphy_bmac_clock_fgc(dev, 0); 613 + b43_phy_force_clock(dev, 0); 646 614 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX); 647 615 } 648 616 ··· 3683 3715 b43_nphy_workarounds(dev); 3684 3716 3685 3717 /* Reset CCA, in init code it differs a little from standard way */ 3686 - b43_nphy_bmac_clock_fgc(dev, 1); 3718 + b43_phy_force_clock(dev, 1); 3687 3719 tmp = b43_phy_read(dev, B43_NPHY_BBCFG); 3688 3720 b43_phy_write(dev, B43_NPHY_BBCFG, tmp | B43_NPHY_BBCFG_RSTCCA); 3689 3721 b43_phy_write(dev, B43_NPHY_BBCFG, tmp & ~B43_NPHY_BBCFG_RSTCCA); 3690 - b43_nphy_bmac_clock_fgc(dev, 0); 3722 + b43_phy_force_clock(dev, 0); 3691 3723 3692 3724 b43_mac_phy_clock_set(dev, true); 3693 3725
+10 -2
drivers/net/wireless/b43/pio.c
··· 611 611 struct b43_wldev *dev = q->dev; 612 612 struct b43_wl *wl = dev->wl; 613 613 u16 len; 614 - u32 macstat; 614 + u32 macstat = 0; 615 615 unsigned int i, padding; 616 616 struct sk_buff *skb; 617 617 const char *err_msg = NULL; ··· 676 676 goto rx_error; 677 677 } 678 678 679 - macstat = le32_to_cpu(rxhdr->mac_status); 679 + switch (dev->fw.hdr_format) { 680 + case B43_FW_HDR_598: 681 + macstat = le32_to_cpu(rxhdr->format_598.mac_status); 682 + break; 683 + case B43_FW_HDR_410: 684 + case B43_FW_HDR_351: 685 + macstat = le32_to_cpu(rxhdr->format_351.mac_status); 686 + break; 687 + } 680 688 if (macstat & B43_RX_MAC_FCSERR) { 681 689 if (!(q->dev->wl->filter_flags & FIF_FCSFAIL)) { 682 690 /* Drop frames with failed FCS. */
+84
drivers/net/wireless/b43/tables_phy_ht.c
··· 574 574 0x005d0582, 0x005805d6, 0x0053062e, 0x004e068c, 575 575 }; 576 576 577 + /* Some late-init table */ 578 + const u32 b43_httab_0x1a_0xc0_late[] = { 579 + 0x10f90040, 0x10e10040, 0x10e1003c, 0x10c9003d, 580 + 0x10b9003c, 0x10a9003d, 0x10a1003c, 0x1099003b, 581 + 0x1091003b, 0x1089003a, 0x1081003a, 0x10790039, 582 + 0x10710039, 0x1069003a, 0x1061003b, 0x1059003d, 583 + 0x1051003f, 0x10490042, 0x1049003e, 0x1049003b, 584 + 0x1041003e, 0x1041003b, 0x1039003e, 0x1039003b, 585 + 0x10390038, 0x10390035, 0x1031003a, 0x10310036, 586 + 0x10310033, 0x1029003a, 0x10290037, 0x10290034, 587 + 0x10290031, 0x10210039, 0x10210036, 0x10210033, 588 + 0x10210030, 0x1019003c, 0x10190039, 0x10190036, 589 + 0x10190033, 0x10190030, 0x1019002d, 0x1019002b, 590 + 0x10190028, 0x1011003a, 0x10110036, 0x10110033, 591 + 0x10110030, 0x1011002e, 0x1011002b, 0x10110029, 592 + 0x10110027, 0x10110024, 0x10110022, 0x10110020, 593 + 0x1011001f, 0x1011001d, 0x1009003a, 0x10090037, 594 + 0x10090034, 0x10090031, 0x1009002e, 0x1009002c, 595 + 0x10090029, 0x10090027, 0x10090025, 0x10090023, 596 + 0x10090021, 0x1009001f, 0x1009001d, 0x1009001b, 597 + 0x1009001a, 0x10090018, 0x10090017, 0x10090016, 598 + 0x10090015, 0x10090013, 0x10090012, 0x10090011, 599 + 0x10090010, 0x1009000f, 0x1009000f, 0x1009000e, 600 + 0x1009000d, 0x1009000c, 0x1009000c, 0x1009000b, 601 + 0x1009000a, 0x1009000a, 0x10090009, 0x10090009, 602 + 0x10090008, 0x10090008, 0x10090007, 0x10090007, 603 + 0x10090007, 0x10090006, 0x10090006, 0x10090005, 604 + 0x10090005, 0x10090005, 0x10090005, 0x10090004, 605 + 0x10090004, 0x10090004, 0x10090004, 0x10090003, 606 + 0x10090003, 0x10090003, 0x10090003, 0x10090003, 607 + 0x10090003, 0x10090002, 0x10090002, 0x10090002, 608 + 0x10090002, 0x10090002, 0x10090002, 0x10090002, 609 + 0x10090002, 0x10090002, 0x10090001, 0x10090001, 610 + 0x10090001, 0x10090001, 0x10090001, 0x10090001, 611 + }; 612 + 577 613 /************************************************** 578 614 * R/W ops. 579 615 **************************************************/ ··· 710 674 return; 711 675 } 712 676 677 + void b43_httab_write_few(struct b43_wldev *dev, u32 offset, size_t num, ...) 678 + { 679 + va_list args; 680 + u32 type, value; 681 + unsigned int i; 682 + 683 + type = offset & B43_HTTAB_TYPEMASK; 684 + offset &= 0xFFFF; 685 + 686 + va_start(args, num); 687 + switch (type) { 688 + case B43_HTTAB_8BIT: 689 + b43_phy_write(dev, B43_PHY_HT_TABLE_ADDR, offset); 690 + for (i = 0; i < num; i++) { 691 + value = va_arg(args, int); 692 + B43_WARN_ON(value & ~0xFF); 693 + b43_phy_write(dev, B43_PHY_HT_TABLE_DATALO, value); 694 + } 695 + break; 696 + case B43_HTTAB_16BIT: 697 + b43_phy_write(dev, B43_PHY_HT_TABLE_ADDR, offset); 698 + for (i = 0; i < num; i++) { 699 + value = va_arg(args, int); 700 + B43_WARN_ON(value & ~0xFFFF); 701 + b43_phy_write(dev, B43_PHY_HT_TABLE_DATALO, value); 702 + } 703 + break; 704 + case B43_HTTAB_32BIT: 705 + b43_phy_write(dev, B43_PHY_HT_TABLE_ADDR, offset); 706 + for (i = 0; i < num; i++) { 707 + value = va_arg(args, int); 708 + b43_phy_write(dev, B43_PHY_HT_TABLE_DATAHI, 709 + value >> 16); 710 + b43_phy_write(dev, B43_PHY_HT_TABLE_DATALO, 711 + value & 0xFFFF); 712 + } 713 + break; 714 + default: 715 + B43_WARN_ON(1); 716 + } 717 + va_end(args); 718 + 719 + return; 720 + } 721 + 713 722 void b43_httab_write_bulk(struct b43_wldev *dev, u32 offset, 714 723 unsigned int nr_elements, const void *_data) 715 724 { ··· 804 723 } while (0) 805 724 void b43_phy_ht_tables_init(struct b43_wldev *dev) 806 725 { 726 + BUILD_BUG_ON(ARRAY_SIZE(b43_httab_0x1a_0xc0_late) != 727 + B43_HTTAB_1A_C0_LATE_SIZE); 728 + 807 729 httab_upload(dev, B43_HTTAB16(0x12, 0), b43_httab_0x12); 808 730 httab_upload(dev, B43_HTTAB16(0x27, 0), b43_httab_0x27); 809 731 httab_upload(dev, B43_HTTAB16(0x26, 0), b43_httab_0x26);
+4
drivers/net/wireless/b43/tables_phy_ht.h
··· 14 14 void b43_httab_read_bulk(struct b43_wldev *dev, u32 offset, 15 15 unsigned int nr_elements, void *_data); 16 16 void b43_httab_write(struct b43_wldev *dev, u32 offset, u32 value); 17 + void b43_httab_write_few(struct b43_wldev *dev, u32 offset, size_t num, ...); 17 18 void b43_httab_write_bulk(struct b43_wldev *dev, u32 offset, 18 19 unsigned int nr_elements, const void *_data); 19 20 20 21 void b43_phy_ht_tables_init(struct b43_wldev *dev); 22 + 23 + #define B43_HTTAB_1A_C0_LATE_SIZE 128 24 + extern const u32 b43_httab_0x1a_0xc0_late[]; 21 25 22 26 #endif /* B43_TABLES_PHY_HT_H_ */
+432
drivers/net/wireless/b43/tables_phy_lcn.c
··· 25 25 #include "phy_common.h" 26 26 #include "phy_lcn.h" 27 27 28 + static const u16 b43_lcntab_0x02[] = { 29 + 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 30 + 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 31 + 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 32 + 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 33 + 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 34 + 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 35 + 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 36 + 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 37 + 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 38 + 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 39 + 0x014d, 0x014d, 0x014d, 0x014d, 40 + }; 41 + 42 + static const u16 b43_lcntab_0x01[] = { 43 + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 44 + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 45 + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 46 + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 47 + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 48 + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 49 + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 50 + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 51 + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 52 + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 53 + 0x0000, 0x0000, 0x0000, 0x0000, 54 + }; 55 + 56 + static const u32 b43_lcntab_0x0b[] = { 57 + 0x000141f8, 0x000021f8, 0x000021fb, 0x000041fb, 58 + 0x0001fedb, 0x0000217b, 0x00002133, 0x000040eb, 59 + 0x0001fea3, 0x0000024b, 60 + }; 61 + 62 + static const u32 b43_lcntab_0x0c[] = { 63 + 0x00100001, 0x00200010, 0x00300001, 0x00400010, 64 + 0x00500022, 0x00600122, 0x00700222, 0x00800322, 65 + 0x00900422, 0x00a00522, 0x00b00622, 0x00c00722, 66 + 0x00d00822, 0x00f00922, 0x00100a22, 0x00200b22, 67 + 0x00300c22, 0x00400d22, 0x00500e22, 0x00600f22, 68 + }; 69 + 70 + static const u32 b43_lcntab_0x0d[] = { 71 + 0x00000000, 0x00000000, 0x10000000, 0x00000000, 72 + 0x20000000, 0x00000000, 0x30000000, 0x00000000, 73 + 0x40000000, 0x00000000, 0x50000000, 0x00000000, 74 + 0x60000000, 0x00000000, 0x70000000, 0x00000000, 75 + 0x80000000, 0x00000000, 0x90000000, 0x00000008, 76 + 0xa0000000, 0x00000008, 0xb0000000, 0x00000008, 77 + 0xc0000000, 0x00000008, 0xd0000000, 0x00000008, 78 + 0xe0000000, 0x00000008, 0xf0000000, 0x00000008, 79 + 0x00000000, 0x00000009, 0x10000000, 0x00000009, 80 + 0x20000000, 0x00000019, 0x30000000, 0x00000019, 81 + 0x40000000, 0x00000019, 0x50000000, 0x00000019, 82 + 0x60000000, 0x00000019, 0x70000000, 0x00000019, 83 + 0x80000000, 0x00000019, 0x90000000, 0x00000019, 84 + 0xa0000000, 0x00000019, 0xb0000000, 0x00000019, 85 + 0xc0000000, 0x00000019, 0xd0000000, 0x00000019, 86 + 0xe0000000, 0x00000019, 0xf0000000, 0x00000019, 87 + 0x00000000, 0x0000001a, 0x10000000, 0x0000001a, 88 + 0x20000000, 0x0000001a, 0x30000000, 0x0000001a, 89 + 0x40000000, 0x0000001a, 0x50000000, 0x00000002, 90 + 0x60000000, 0x00000002, 0x70000000, 0x00000002, 91 + 0x80000000, 0x00000002, 0x90000000, 0x00000002, 92 + 0xa0000000, 0x00000002, 0xb0000000, 0x00000002, 93 + 0xc0000000, 0x0000000a, 0xd0000000, 0x0000000a, 94 + 0xe0000000, 0x0000000a, 0xf0000000, 0x0000000a, 95 + 0x00000000, 0x0000000b, 0x10000000, 0x0000000b, 96 + 0x20000000, 0x0000000b, 0x30000000, 0x0000000b, 97 + 0x40000000, 0x0000000b, 0x50000000, 0x0000001b, 98 + 0x60000000, 0x0000001b, 0x70000000, 0x0000001b, 99 + 0x80000000, 0x0000001b, 0x90000000, 0x0000001b, 100 + 0xa0000000, 0x0000001b, 0xb0000000, 0x0000001b, 101 + 0xc0000000, 0x0000001b, 0xd0000000, 0x0000001b, 102 + 0xe0000000, 0x0000001b, 0xf0000000, 0x0000001b, 103 + 0x00000000, 0x0000001c, 0x10000000, 0x0000001c, 104 + 0x20000000, 0x0000001c, 0x30000000, 0x0000001c, 105 + 0x40000000, 0x0000001c, 0x50000000, 0x0000001c, 106 + 0x60000000, 0x0000001c, 0x70000000, 0x0000001c, 107 + 0x80000000, 0x0000001c, 0x90000000, 0x0000001c, 108 + }; 109 + 110 + static const u16 b43_lcntab_0x0e[] = { 111 + 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0406, 112 + 0x0407, 0x0408, 0x0409, 0x040a, 0x058b, 0x058c, 113 + 0x058d, 0x058e, 0x058f, 0x0090, 0x0091, 0x0092, 114 + 0x0193, 0x0194, 0x0195, 0x0196, 0x0197, 0x0198, 115 + 0x0199, 0x019a, 0x019b, 0x019c, 0x019d, 0x019e, 116 + 0x019f, 0x01a0, 0x01a1, 0x01a2, 0x01a3, 0x01a4, 117 + 0x01a5, 0x0000, 118 + }; 119 + 120 + static const u16 b43_lcntab_0x0f[] = { 121 + 0x000a, 0x0009, 0x0006, 0x0005, 0x000a, 0x0009, 122 + 0x0006, 0x0005, 0x000a, 0x0009, 0x0006, 0x0005, 123 + 0x000a, 0x0009, 0x0006, 0x0005, 0x000a, 0x0009, 124 + 0x0006, 0x0005, 0x000a, 0x0009, 0x0006, 0x0005, 125 + 0x000a, 0x0009, 0x0006, 0x0005, 0x000a, 0x0009, 126 + 0x0006, 0x0005, 0x000a, 0x0009, 0x0006, 0x0005, 127 + 0x000a, 0x0009, 0x0006, 0x0005, 0x000a, 0x0009, 128 + 0x0006, 0x0005, 0x000a, 0x0009, 0x0006, 0x0005, 129 + 0x000a, 0x0009, 0x0006, 0x0005, 0x000a, 0x0009, 130 + 0x0006, 0x0005, 0x000a, 0x0009, 0x0006, 0x0005, 131 + 0x000a, 0x0009, 0x0006, 0x0005, 132 + }; 133 + 134 + static const u16 b43_lcntab_0x10[] = { 135 + 0x005f, 0x0036, 0x0029, 0x001f, 0x005f, 0x0036, 136 + 0x0029, 0x001f, 0x005f, 0x0036, 0x0029, 0x001f, 137 + 0x005f, 0x0036, 0x0029, 0x001f, 138 + }; 139 + 140 + static const u16 b43_lcntab_0x11[] = { 141 + 0x0009, 0x000f, 0x0014, 0x0018, 0x00fe, 0x0007, 142 + 0x000b, 0x000f, 0x00fb, 0x00fe, 0x0001, 0x0005, 143 + 0x0008, 0x000b, 0x000e, 0x0011, 0x0014, 0x0017, 144 + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 145 + 0x0000, 0x0003, 0x0006, 0x0009, 0x000c, 0x000f, 146 + 0x0012, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 147 + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0003, 148 + 0x0006, 0x0009, 0x000c, 0x000f, 0x0012, 0x0015, 149 + 0x0018, 0x001b, 0x0000, 0x0000, 0x0000, 0x0000, 150 + 0x0000, 0x0000, 0x0003, 0x00eb, 0x0000, 0x0000, 151 + }; 152 + 153 + static const u32 b43_lcntab_0x12[] = { 154 + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 155 + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 156 + 0x00000004, 0x00000000, 0x00000004, 0x00000008, 157 + 0x00000001, 0x00000005, 0x00000009, 0x0000000d, 158 + 0x0000004d, 0x0000008d, 0x0000000d, 0x0000004d, 159 + 0x0000008d, 0x000000cd, 0x0000004f, 0x0000008f, 160 + 0x000000cf, 0x000000d3, 0x00000113, 0x00000513, 161 + 0x00000913, 0x00000953, 0x00000d53, 0x00001153, 162 + 0x00001193, 0x00005193, 0x00009193, 0x0000d193, 163 + 0x00011193, 0x00000000, 0x00000000, 0x00000000, 164 + 0x00000000, 0x00000000, 0x00000000, 0x00000004, 165 + 0x00000000, 0x00000004, 0x00000008, 0x00000001, 166 + 0x00000005, 0x00000009, 0x0000000d, 0x0000004d, 167 + 0x0000008d, 0x0000000d, 0x0000004d, 0x0000008d, 168 + 0x000000cd, 0x0000004f, 0x0000008f, 0x000000cf, 169 + 0x000000d3, 0x00000113, 0x00000513, 0x00000913, 170 + 0x00000953, 0x00000d53, 0x00001153, 0x00005153, 171 + 0x00009153, 0x0000d153, 0x00011153, 0x00015153, 172 + 0x00019153, 0x0001d153, 0x00000000, 0x00000000, 173 + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 174 + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 175 + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 176 + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 177 + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 178 + }; 179 + 180 + static const u16 b43_lcntab_0x14[] = { 181 + 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 182 + 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 183 + 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 184 + 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 185 + 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 186 + 0x0002, 0x0003, 0x0001, 0x0003, 0x0002, 0x0001, 187 + 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 188 + 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 189 + 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 190 + 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 191 + 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 192 + 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 193 + 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 194 + 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 195 + 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 196 + 0x0001, 0x0001, 0x0001, 0x0001, 0x0002, 0x0003, 197 + 0x0001, 0x0003, 0x0002, 0x0001, 0x0001, 0x0001, 198 + 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 199 + 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 200 + 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 201 + 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 202 + 0x0001, 0x0001, 203 + }; 204 + 205 + static const u16 b43_lcntab_0x17[] = { 206 + 0x001a, 0x0034, 0x004e, 0x0068, 0x009c, 0x00d0, 207 + 0x00ea, 0x0104, 0x0034, 0x0068, 0x009c, 0x00d0, 208 + 0x0138, 0x01a0, 0x01d4, 0x0208, 0x004e, 0x009c, 209 + 0x00ea, 0x0138, 0x01d4, 0x0270, 0x02be, 0x030c, 210 + 0x0068, 0x00d0, 0x0138, 0x01a0, 0x0270, 0x0340, 211 + 0x03a8, 0x0410, 0x0018, 0x009c, 0x00d0, 0x0104, 212 + 0x00ea, 0x0138, 0x0186, 0x00d0, 0x0104, 0x0104, 213 + 0x0138, 0x016c, 0x016c, 0x01a0, 0x0138, 0x0186, 214 + 0x0186, 0x01d4, 0x0222, 0x0222, 0x0270, 0x0104, 215 + 0x0138, 0x016c, 0x0138, 0x016c, 0x01a0, 0x01d4, 216 + 0x01a0, 0x01d4, 0x0208, 0x0208, 0x023c, 0x0186, 217 + 0x01d4, 0x0222, 0x01d4, 0x0222, 0x0270, 0x02be, 218 + 0x0270, 0x02be, 0x030c, 0x030c, 0x035a, 0x0036, 219 + 0x006c, 0x00a2, 0x00d8, 0x0144, 0x01b0, 0x01e6, 220 + 0x021c, 0x006c, 0x00d8, 0x0144, 0x01b0, 0x0288, 221 + 0x0360, 0x03cc, 0x0438, 0x00a2, 0x0144, 0x01e6, 222 + 0x0288, 0x03cc, 0x0510, 0x05b2, 0x0654, 0x00d8, 223 + 0x01b0, 0x0288, 0x0360, 0x0510, 0x06c0, 0x0798, 224 + 0x0870, 0x0018, 0x0144, 0x01b0, 0x021c, 0x01e6, 225 + 0x0288, 0x032a, 0x01b0, 0x021c, 0x021c, 0x0288, 226 + 0x02f4, 0x02f4, 0x0360, 0x0288, 0x032a, 0x032a, 227 + 0x03cc, 0x046e, 0x046e, 0x0510, 0x021c, 0x0288, 228 + 0x02f4, 0x0288, 0x02f4, 0x0360, 0x03cc, 0x0360, 229 + 0x03cc, 0x0438, 0x0438, 0x04a4, 0x032a, 0x03cc, 230 + 0x046e, 0x03cc, 0x046e, 0x0510, 0x05b2, 0x0510, 231 + 0x05b2, 0x0654, 0x0654, 0x06f6, 232 + }; 233 + 234 + static const u16 b43_lcntab_0x00[] = { 235 + 0x0200, 0x0300, 0x0400, 0x0600, 0x0800, 0x0b00, 236 + 0x1000, 0x1001, 0x1002, 0x1003, 0x1004, 0x1005, 237 + 0x1006, 0x1007, 0x1707, 0x2007, 0x2d07, 0x4007, 238 + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 239 + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 240 + 0x0000, 0x0000, 0x0200, 0x0300, 0x0400, 0x0600, 241 + 0x0800, 0x0b00, 0x1000, 0x1001, 0x1002, 0x1003, 242 + 0x1004, 0x1005, 0x1006, 0x1007, 0x1707, 0x2007, 243 + 0x2d07, 0x4007, 0x0000, 0x0000, 0x0000, 0x0000, 244 + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 245 + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 246 + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 247 + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 248 + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 249 + 0x0000, 0x0000, 0x0000, 0x4000, 0x0000, 0x0000, 250 + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 251 + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 252 + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 253 + }; 254 + 255 + static const u32 b43_lcntab_0x18[] = { 256 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 257 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 258 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 259 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 260 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 261 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 262 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 263 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 264 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 265 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 266 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 267 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 268 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 269 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 270 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 271 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 272 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 273 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 274 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 275 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 276 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 277 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 278 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 279 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 280 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 281 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 282 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 283 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 284 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 285 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 286 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 287 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 288 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 289 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 290 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 291 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 292 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 293 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 294 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 295 + 0x00080000, 0x00080000, 0x00080000, 0x00080000, 296 + }; 297 + 298 + /************************************************** 299 + * R/W ops. 300 + **************************************************/ 301 + 302 + u32 b43_lcntab_read(struct b43_wldev *dev, u32 offset) 303 + { 304 + u32 type, value; 305 + 306 + type = offset & B43_LCNTAB_TYPEMASK; 307 + offset &= ~B43_LCNTAB_TYPEMASK; 308 + B43_WARN_ON(offset > 0xFFFF); 309 + 310 + switch (type) { 311 + case B43_LCNTAB_8BIT: 312 + b43_phy_write(dev, B43_PHY_LCN_TABLE_ADDR, offset); 313 + value = b43_phy_read(dev, B43_PHY_LCN_TABLE_DATALO) & 0xFF; 314 + break; 315 + case B43_LCNTAB_16BIT: 316 + b43_phy_write(dev, B43_PHY_LCN_TABLE_ADDR, offset); 317 + value = b43_phy_read(dev, B43_PHY_LCN_TABLE_DATALO); 318 + break; 319 + case B43_LCNTAB_32BIT: 320 + b43_phy_write(dev, B43_PHY_LCN_TABLE_ADDR, offset); 321 + value = b43_phy_read(dev, B43_PHY_LCN_TABLE_DATAHI); 322 + value <<= 16; 323 + value |= b43_phy_read(dev, B43_PHY_LCN_TABLE_DATALO); 324 + break; 325 + default: 326 + B43_WARN_ON(1); 327 + value = 0; 328 + } 329 + 330 + return value; 331 + } 332 + 333 + void b43_lcntab_read_bulk(struct b43_wldev *dev, u32 offset, 334 + unsigned int nr_elements, void *_data) 335 + { 336 + u32 type; 337 + u8 *data = _data; 338 + unsigned int i; 339 + 340 + type = offset & B43_LCNTAB_TYPEMASK; 341 + offset &= ~B43_LCNTAB_TYPEMASK; 342 + B43_WARN_ON(offset > 0xFFFF); 343 + 344 + b43_phy_write(dev, B43_PHY_LCN_TABLE_ADDR, offset); 345 + 346 + for (i = 0; i < nr_elements; i++) { 347 + switch (type) { 348 + case B43_LCNTAB_8BIT: 349 + *data = b43_phy_read(dev, 350 + B43_PHY_LCN_TABLE_DATALO) & 0xFF; 351 + data++; 352 + break; 353 + case B43_LCNTAB_16BIT: 354 + *((u16 *)data) = b43_phy_read(dev, 355 + B43_PHY_LCN_TABLE_DATALO); 356 + data += 2; 357 + break; 358 + case B43_LCNTAB_32BIT: 359 + *((u32 *)data) = b43_phy_read(dev, 360 + B43_PHY_LCN_TABLE_DATAHI); 361 + *((u32 *)data) <<= 16; 362 + *((u32 *)data) |= b43_phy_read(dev, 363 + B43_PHY_LCN_TABLE_DATALO); 364 + data += 4; 365 + break; 366 + default: 367 + B43_WARN_ON(1); 368 + } 369 + } 370 + } 371 + 372 + void b43_lcntab_write(struct b43_wldev *dev, u32 offset, u32 value) 373 + { 374 + u32 type; 375 + 376 + type = offset & B43_LCNTAB_TYPEMASK; 377 + offset &= 0xFFFF; 378 + 379 + switch (type) { 380 + case B43_LCNTAB_8BIT: 381 + B43_WARN_ON(value & ~0xFF); 382 + b43_phy_write(dev, B43_PHY_LCN_TABLE_ADDR, offset); 383 + b43_phy_write(dev, B43_PHY_LCN_TABLE_DATALO, value); 384 + break; 385 + case B43_LCNTAB_16BIT: 386 + B43_WARN_ON(value & ~0xFFFF); 387 + b43_phy_write(dev, B43_PHY_LCN_TABLE_ADDR, offset); 388 + b43_phy_write(dev, B43_PHY_LCN_TABLE_DATALO, value); 389 + break; 390 + case B43_LCNTAB_32BIT: 391 + b43_phy_write(dev, B43_PHY_LCN_TABLE_ADDR, offset); 392 + b43_phy_write(dev, B43_PHY_LCN_TABLE_DATAHI, value >> 16); 393 + b43_phy_write(dev, B43_PHY_LCN_TABLE_DATALO, value & 0xFFFF); 394 + break; 395 + default: 396 + B43_WARN_ON(1); 397 + } 398 + 399 + return; 400 + } 401 + 402 + void b43_lcntab_write_bulk(struct b43_wldev *dev, u32 offset, 403 + unsigned int nr_elements, const void *_data) 404 + { 405 + u32 type, value; 406 + const u8 *data = _data; 407 + unsigned int i; 408 + 409 + type = offset & B43_LCNTAB_TYPEMASK; 410 + offset &= ~B43_LCNTAB_TYPEMASK; 411 + B43_WARN_ON(offset > 0xFFFF); 412 + 413 + b43_phy_write(dev, B43_PHY_LCN_TABLE_ADDR, offset); 414 + 415 + for (i = 0; i < nr_elements; i++) { 416 + switch (type) { 417 + case B43_LCNTAB_8BIT: 418 + value = *data; 419 + data++; 420 + B43_WARN_ON(value & ~0xFF); 421 + b43_phy_write(dev, B43_PHY_LCN_TABLE_DATALO, value); 422 + break; 423 + case B43_LCNTAB_16BIT: 424 + value = *((u16 *)data); 425 + data += 2; 426 + B43_WARN_ON(value & ~0xFFFF); 427 + b43_phy_write(dev, B43_PHY_LCN_TABLE_DATALO, value); 428 + break; 429 + case B43_LCNTAB_32BIT: 430 + value = *((u32 *)data); 431 + data += 4; 432 + b43_phy_write(dev, B43_PHY_LCN_TABLE_DATAHI, 433 + value >> 16); 434 + b43_phy_write(dev, B43_PHY_LCN_TABLE_DATALO, 435 + value & 0xFFFF); 436 + break; 437 + default: 438 + B43_WARN_ON(1); 439 + } 440 + } 441 + } 442 + 28 443 /************************************************** 29 444 * Tables ops. 30 445 **************************************************/ 31 446 447 + #define lcntab_upload(dev, offset, data) do { \ 448 + b43_lcntab_write_bulk(dev, offset, ARRAY_SIZE(data), data); \ 449 + } while (0) 32 450 void b43_phy_lcn_tables_init(struct b43_wldev *dev) 33 451 { 452 + lcntab_upload(dev, B43_LCNTAB16(0x02, 0), b43_lcntab_0x02); 453 + lcntab_upload(dev, B43_LCNTAB16(0x01, 0), b43_lcntab_0x01); 454 + lcntab_upload(dev, B43_LCNTAB32(0x0b, 0), b43_lcntab_0x0b); 455 + lcntab_upload(dev, B43_LCNTAB32(0x0c, 0), b43_lcntab_0x0c); 456 + lcntab_upload(dev, B43_LCNTAB32(0x0d, 0), b43_lcntab_0x0d); 457 + lcntab_upload(dev, B43_LCNTAB16(0x0e, 0), b43_lcntab_0x0e); 458 + lcntab_upload(dev, B43_LCNTAB16(0x0f, 0), b43_lcntab_0x0f); 459 + lcntab_upload(dev, B43_LCNTAB16(0x10, 0), b43_lcntab_0x10); 460 + lcntab_upload(dev, B43_LCNTAB16(0x11, 0), b43_lcntab_0x11); 461 + lcntab_upload(dev, B43_LCNTAB32(0x12, 0), b43_lcntab_0x12); 462 + lcntab_upload(dev, B43_LCNTAB16(0x14, 0), b43_lcntab_0x14); 463 + lcntab_upload(dev, B43_LCNTAB16(0x17, 0), b43_lcntab_0x17); 464 + lcntab_upload(dev, B43_LCNTAB16(0x00, 0), b43_lcntab_0x00); 465 + lcntab_upload(dev, B43_LCNTAB32(0x18, 0), b43_lcntab_0x18); 34 466 }
+16
drivers/net/wireless/b43/tables_phy_lcn.h
··· 1 1 #ifndef B43_TABLES_PHY_LCN_H_ 2 2 #define B43_TABLES_PHY_LCN_H_ 3 3 4 + /* The LCN-PHY tables. */ 5 + #define B43_LCNTAB_TYPEMASK 0xF0000000 6 + #define B43_LCNTAB_8BIT 0x10000000 7 + #define B43_LCNTAB_16BIT 0x20000000 8 + #define B43_LCNTAB_32BIT 0x30000000 9 + #define B43_LCNTAB8(table, offset) (((table) << 10) | (offset) | B43_LCNTAB_8BIT) 10 + #define B43_LCNTAB16(table, offset) (((table) << 10) | (offset) | B43_LCNTAB_16BIT) 11 + #define B43_LCNTAB32(table, offset) (((table) << 10) | (offset) | B43_LCNTAB_32BIT) 12 + 13 + u32 b43_lcntab_read(struct b43_wldev *dev, u32 offset); 14 + void b43_lcntab_read_bulk(struct b43_wldev *dev, u32 offset, 15 + unsigned int nr_elements, void *_data); 16 + void b43_lcntab_write(struct b43_wldev *dev, u32 offset, u32 value); 17 + void b43_lcntab_write_bulk(struct b43_wldev *dev, u32 offset, 18 + unsigned int nr_elements, const void *_data); 19 + 4 20 void b43_phy_lcn_tables_init(struct b43_wldev *dev); 5 21 6 22 #endif /* B43_TABLES_PHY_LCN_H_ */
+87 -33
drivers/net/wireless/b43/xmit.c
··· 337 337 memcpy(txhdr->iv, ((u8 *) wlhdr) + wlhdr_len, iv_len); 338 338 } 339 339 } 340 - if (b43_is_old_txhdr_format(dev)) { 341 - b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->old_format.plcp), 340 + switch (dev->fw.hdr_format) { 341 + case B43_FW_HDR_598: 342 + b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->format_598.plcp), 342 343 plcp_fragment_len, rate); 343 - } else { 344 - b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->new_format.plcp), 344 + break; 345 + case B43_FW_HDR_351: 346 + b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->format_351.plcp), 345 347 plcp_fragment_len, rate); 348 + break; 349 + case B43_FW_HDR_410: 350 + b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->format_410.plcp), 351 + plcp_fragment_len, rate); 352 + break; 346 353 } 347 354 b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->plcp_fb), 348 355 plcp_fragment_len, rate_fb); ··· 422 415 if ((rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) || 423 416 (rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT)) { 424 417 unsigned int len; 425 - struct ieee80211_hdr *hdr; 418 + struct ieee80211_hdr *uninitialized_var(hdr); 426 419 int rts_rate, rts_rate_fb; 427 420 int rts_rate_ofdm, rts_rate_fb_ofdm; 428 - struct b43_plcp_hdr6 *plcp; 421 + struct b43_plcp_hdr6 *uninitialized_var(plcp); 429 422 struct ieee80211_rate *rts_cts_rate; 430 423 431 424 rts_cts_rate = ieee80211_get_rts_cts_rate(dev->wl->hw, info); ··· 436 429 rts_rate_fb_ofdm = b43_is_ofdm_rate(rts_rate_fb); 437 430 438 431 if (rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { 439 - struct ieee80211_cts *cts; 432 + struct ieee80211_cts *uninitialized_var(cts); 440 433 441 - if (b43_is_old_txhdr_format(dev)) { 434 + switch (dev->fw.hdr_format) { 435 + case B43_FW_HDR_598: 442 436 cts = (struct ieee80211_cts *) 443 - (txhdr->old_format.rts_frame); 444 - } else { 437 + (txhdr->format_598.rts_frame); 438 + break; 439 + case B43_FW_HDR_351: 445 440 cts = (struct ieee80211_cts *) 446 - (txhdr->new_format.rts_frame); 441 + (txhdr->format_351.rts_frame); 442 + break; 443 + case B43_FW_HDR_410: 444 + cts = (struct ieee80211_cts *) 445 + (txhdr->format_410.rts_frame); 446 + break; 447 447 } 448 448 ieee80211_ctstoself_get(dev->wl->hw, info->control.vif, 449 449 fragment_data, fragment_len, ··· 458 444 mac_ctl |= B43_TXH_MAC_SENDCTS; 459 445 len = sizeof(struct ieee80211_cts); 460 446 } else { 461 - struct ieee80211_rts *rts; 447 + struct ieee80211_rts *uninitialized_var(rts); 462 448 463 - if (b43_is_old_txhdr_format(dev)) { 449 + switch (dev->fw.hdr_format) { 450 + case B43_FW_HDR_598: 464 451 rts = (struct ieee80211_rts *) 465 - (txhdr->old_format.rts_frame); 466 - } else { 452 + (txhdr->format_598.rts_frame); 453 + break; 454 + case B43_FW_HDR_351: 467 455 rts = (struct ieee80211_rts *) 468 - (txhdr->new_format.rts_frame); 456 + (txhdr->format_351.rts_frame); 457 + break; 458 + case B43_FW_HDR_410: 459 + rts = (struct ieee80211_rts *) 460 + (txhdr->format_410.rts_frame); 461 + break; 469 462 } 470 463 ieee80211_rts_get(dev->wl->hw, info->control.vif, 471 464 fragment_data, fragment_len, ··· 483 462 len += FCS_LEN; 484 463 485 464 /* Generate the PLCP headers for the RTS/CTS frame */ 486 - if (b43_is_old_txhdr_format(dev)) 487 - plcp = &txhdr->old_format.rts_plcp; 488 - else 489 - plcp = &txhdr->new_format.rts_plcp; 465 + switch (dev->fw.hdr_format) { 466 + case B43_FW_HDR_598: 467 + plcp = &txhdr->format_598.rts_plcp; 468 + break; 469 + case B43_FW_HDR_351: 470 + plcp = &txhdr->format_351.rts_plcp; 471 + break; 472 + case B43_FW_HDR_410: 473 + plcp = &txhdr->format_410.rts_plcp; 474 + break; 475 + } 490 476 b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)plcp, 491 477 len, rts_rate); 492 478 plcp = &txhdr->rts_plcp_fb; 493 479 b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)plcp, 494 480 len, rts_rate_fb); 495 481 496 - if (b43_is_old_txhdr_format(dev)) { 482 + switch (dev->fw.hdr_format) { 483 + case B43_FW_HDR_598: 497 484 hdr = (struct ieee80211_hdr *) 498 - (&txhdr->old_format.rts_frame); 499 - } else { 485 + (&txhdr->format_598.rts_frame); 486 + break; 487 + case B43_FW_HDR_351: 500 488 hdr = (struct ieee80211_hdr *) 501 - (&txhdr->new_format.rts_frame); 489 + (&txhdr->format_351.rts_frame); 490 + break; 491 + case B43_FW_HDR_410: 492 + hdr = (struct ieee80211_hdr *) 493 + (&txhdr->format_410.rts_frame); 494 + break; 502 495 } 503 496 txhdr->rts_dur_fb = hdr->duration_id; 504 497 ··· 540 505 } 541 506 542 507 /* Magic cookie */ 543 - if (b43_is_old_txhdr_format(dev)) 544 - txhdr->old_format.cookie = cpu_to_le16(cookie); 545 - else 546 - txhdr->new_format.cookie = cpu_to_le16(cookie); 508 + switch (dev->fw.hdr_format) { 509 + case B43_FW_HDR_598: 510 + txhdr->format_598.cookie = cpu_to_le16(cookie); 511 + break; 512 + case B43_FW_HDR_351: 513 + txhdr->format_351.cookie = cpu_to_le16(cookie); 514 + break; 515 + case B43_FW_HDR_410: 516 + txhdr->format_410.cookie = cpu_to_le16(cookie); 517 + break; 518 + } 547 519 548 520 if (phy->type == B43_PHYTYPE_N) { 549 521 txhdr->phy_ctl1 = ··· 653 611 struct ieee80211_hdr *wlhdr; 654 612 const struct b43_rxhdr_fw4 *rxhdr = _rxhdr; 655 613 __le16 fctl; 656 - u16 phystat0, phystat3, chanstat, mactime; 657 - u32 macstat; 614 + u16 phystat0, phystat3; 615 + u16 uninitialized_var(chanstat), uninitialized_var(mactime); 616 + u32 uninitialized_var(macstat); 658 617 u16 chanid; 659 618 u16 phytype; 660 619 int padding; ··· 665 622 /* Get metadata about the frame from the header. */ 666 623 phystat0 = le16_to_cpu(rxhdr->phy_status0); 667 624 phystat3 = le16_to_cpu(rxhdr->phy_status3); 668 - macstat = le32_to_cpu(rxhdr->mac_status); 669 - mactime = le16_to_cpu(rxhdr->mac_time); 670 - chanstat = le16_to_cpu(rxhdr->channel); 625 + switch (dev->fw.hdr_format) { 626 + case B43_FW_HDR_598: 627 + macstat = le32_to_cpu(rxhdr->format_598.mac_status); 628 + mactime = le16_to_cpu(rxhdr->format_598.mac_time); 629 + chanstat = le16_to_cpu(rxhdr->format_598.channel); 630 + break; 631 + case B43_FW_HDR_410: 632 + case B43_FW_HDR_351: 633 + macstat = le32_to_cpu(rxhdr->format_351.mac_status); 634 + mactime = le16_to_cpu(rxhdr->format_351.mac_time); 635 + chanstat = le16_to_cpu(rxhdr->format_351.channel); 636 + break; 637 + } 671 638 phytype = chanstat & B43_RX_CHAN_PHYTYPE; 672 639 673 640 if (unlikely(macstat & B43_RX_MAC_FCSERR)) { ··· 797 744 break; 798 745 case B43_PHYTYPE_N: 799 746 case B43_PHYTYPE_LP: 747 + case B43_PHYTYPE_HT: 800 748 /* chanid is the SHM channel cookie. Which is the plain 801 749 * channel number in b43. */ 802 750 if (chanstat & B43_RX_CHAN_5GHZ) {
+46 -16
drivers/net/wireless/b43/xmit.h
··· 46 46 __le32 timeout; /* Timeout */ 47 47 48 48 union { 49 - /* The new r410 format. */ 49 + /* Tested with 598.314, 644.1001 and 666.2 */ 50 + struct { 51 + __le16 mimo_antenna; /* MIMO antenna select */ 52 + __le16 preload_size; /* Preload size */ 53 + PAD_BYTES(2); 54 + __le16 cookie; /* TX frame cookie */ 55 + __le16 tx_status; /* TX status */ 56 + __le16 max_n_mpdus; 57 + __le16 max_a_bytes_mrt; 58 + __le16 max_a_bytes_fbr; 59 + __le16 min_m_bytes; 60 + struct b43_plcp_hdr6 rts_plcp; /* RTS PLCP header */ 61 + __u8 rts_frame[16]; /* The RTS frame (if used) */ 62 + PAD_BYTES(2); 63 + struct b43_plcp_hdr6 plcp; /* Main PLCP header */ 64 + } format_598 __packed; 65 + 66 + /* Tested with 410.2160, 478.104 and 508.* */ 50 67 struct { 51 68 __le16 mimo_antenna; /* MIMO antenna select */ 52 69 __le16 preload_size; /* Preload size */ ··· 74 57 __u8 rts_frame[16]; /* The RTS frame (if used) */ 75 58 PAD_BYTES(2); 76 59 struct b43_plcp_hdr6 plcp; /* Main PLCP header */ 77 - } new_format __packed; 60 + } format_410 __packed; 78 61 79 - /* The old r351 format. */ 62 + /* Tested with 351.126 */ 80 63 struct { 81 64 PAD_BYTES(2); 82 65 __le16 cookie; /* TX frame cookie */ ··· 85 68 __u8 rts_frame[16]; /* The RTS frame (if used) */ 86 69 PAD_BYTES(2); 87 70 struct b43_plcp_hdr6 plcp; /* Main PLCP header */ 88 - } old_format __packed; 71 + } format_351 __packed; 89 72 90 73 } __packed; 91 74 } __packed; ··· 183 166 #define B43_TXH_PHY1_MODUL_QAM256 0x2000 /* QAM256 */ 184 167 185 168 186 - /* r351 firmware compatibility stuff. */ 187 - static inline 188 - bool b43_is_old_txhdr_format(struct b43_wldev *dev) 189 - { 190 - return (dev->fw.rev <= 351); 191 - } 192 - 193 169 static inline 194 170 size_t b43_txhdr_size(struct b43_wldev *dev) 195 171 { 196 - if (b43_is_old_txhdr_format(dev)) 172 + switch (dev->fw.hdr_format) { 173 + case B43_FW_HDR_598: 174 + return 112 + sizeof(struct b43_plcp_hdr6); 175 + case B43_FW_HDR_410: 176 + return 104 + sizeof(struct b43_plcp_hdr6); 177 + case B43_FW_HDR_351: 197 178 return 100 + sizeof(struct b43_plcp_hdr6); 198 - return 104 + sizeof(struct b43_plcp_hdr6); 179 + } 180 + return 0; 199 181 } 200 182 201 183 ··· 250 234 } __packed; 251 235 __le16 phy_status2; /* PHY RX Status 2 */ 252 236 __le16 phy_status3; /* PHY RX Status 3 */ 253 - __le32 mac_status; /* MAC RX status */ 254 - __le16 mac_time; 255 - __le16 channel; 237 + union { 238 + /* Tested with 598.314, 644.1001 and 666.2 */ 239 + struct { 240 + __le16 phy_status4; /* PHY RX Status 4 */ 241 + __le16 phy_status5; /* PHY RX Status 5 */ 242 + __le32 mac_status; /* MAC RX status */ 243 + __le16 mac_time; 244 + __le16 channel; 245 + } format_598 __packed; 246 + 247 + /* Tested with 351.126, 410.2160, 478.104 and 508.* */ 248 + struct { 249 + __le32 mac_status; /* MAC RX status */ 250 + __le16 mac_time; 251 + __le16 channel; 252 + } format_351 __packed; 253 + } __packed; 256 254 } __packed; 257 255 258 256 /* PHY RX Status 0 */
-4
drivers/net/wireless/b43legacy/b43legacy.h
··· 22 22 #include "phy.h" 23 23 24 24 25 - /* The unique identifier of the firmware that's officially supported by this 26 - * driver version. */ 27 - #define B43legacy_SUPPORTED_FIRMWARE_ID "FW10" 28 - 29 25 #define B43legacy_IRQWAIT_MAX_RETRIES 20 30 26 31 27 /* MMIO offsets */
+1 -3
drivers/net/wireless/b43legacy/main.c
··· 60 60 MODULE_AUTHOR("Michael Buesch"); 61 61 MODULE_LICENSE("GPL"); 62 62 63 - MODULE_FIRMWARE(B43legacy_SUPPORTED_FIRMWARE_ID); 64 63 MODULE_FIRMWARE("b43legacy/ucode2.fw"); 65 64 MODULE_FIRMWARE("b43legacy/ucode4.fw"); 66 65 ··· 3946 3947 feat_dma = "D"; 3947 3948 #endif 3948 3949 printk(KERN_INFO "Broadcom 43xx-legacy driver loaded " 3949 - "[ Features: %s%s%s%s, Firmware-ID: " 3950 - B43legacy_SUPPORTED_FIRMWARE_ID " ]\n", 3950 + "[ Features: %s%s%s%s ]\n", 3951 3951 feat_pci, feat_leds, feat_pio, feat_dma); 3952 3952 } 3953 3953
-25
drivers/net/wireless/libertas/README
··· 238 238 echo "1" > hostsleep : enable host sleep. 239 239 echo "0" > hostsleep : disable host sleep 240 240 241 - ======================== 242 - IWCONFIG COMMANDS 243 - ======================== 244 - power period 245 - 246 - This command is used to configure the station in deep sleep mode / 247 - auto deep sleep mode. 248 - 249 - The timer is implemented to monitor the activities (command, event, 250 - etc.). When an activity is detected station will exit from deep 251 - sleep mode automatically and restart the timer. At timer expiry 252 - (no activity for defined time period) the deep sleep mode is entered 253 - automatically. 254 - 255 - Note: this command is for SDIO interface only. 256 - 257 - Usage: 258 - To enable deep sleep mode do: 259 - iwconfig wlan0 power period 0 260 - To enable auto deep sleep mode with idle time period 5 seconds do: 261 - iwconfig wlan0 power period 5 262 - To disable deep sleep/auto deep sleep mode do: 263 - iwconfig wlan0 power period -1 264 - 265 - ==============================================================================
+2 -2
drivers/net/wireless/libertas/dev.h
··· 190 190 int r; 191 191 192 192 r = netif_running(priv->dev); 193 - if (priv->mesh_dev); 194 - r |= netif_running(priv->dev); 193 + if (priv->mesh_dev) 194 + r |= netif_running(priv->mesh_dev); 195 195 196 196 return r; 197 197 }
+2 -2
drivers/net/wireless/mwifiex/scan.c
··· 1480 1480 return -ENOMEM; 1481 1481 } 1482 1482 beacon_ie = kzalloc(ie_len, GFP_KERNEL); 1483 - if (!bss_desc) { 1484 - dev_err(priv->adapter->dev, " failed to alloc bss_desc\n"); 1483 + if (!beacon_ie) { 1484 + dev_err(priv->adapter->dev, " failed to alloc beacon_ie\n"); 1485 1485 return -ENOMEM; 1486 1486 } 1487 1487 memcpy(beacon_ie, ie_buf, ie_len);
-3
drivers/net/wireless/mwl8k.c
··· 4097 4097 4098 4098 if (rc) 4099 4099 goto out; 4100 - 4101 - mwl8k_vif->is_hw_crypto_enabled = false; 4102 - 4103 4100 } 4104 4101 out: 4105 4102 return rc;
+24 -2
drivers/net/wireless/p54/eeprom.c
··· 145 145 146 146 static int p54_generate_band(struct ieee80211_hw *dev, 147 147 struct p54_channel_list *list, 148 + unsigned int *chan_num, 148 149 enum ieee80211_band band) 149 150 { 150 151 struct p54_common *priv = dev->priv; ··· 191 190 192 191 tmp->channels[j].band = chan->band; 193 192 tmp->channels[j].center_freq = chan->freq; 193 + priv->survey[*chan_num].channel = &tmp->channels[j]; 194 + priv->survey[*chan_num].filled = SURVEY_INFO_NOISE_DBM | 195 + SURVEY_INFO_CHANNEL_TIME | 196 + SURVEY_INFO_CHANNEL_TIME_BUSY | 197 + SURVEY_INFO_CHANNEL_TIME_TX; 198 + tmp->channels[j].hw_value = (*chan_num); 194 199 j++; 200 + (*chan_num)++; 195 201 } 196 202 197 203 if (j == 0) { ··· 271 263 { 272 264 struct p54_common *priv = dev->priv; 273 265 struct p54_channel_list *list; 274 - unsigned int i, j, max_channel_num; 266 + unsigned int i, j, k, max_channel_num; 275 267 int ret = 0; 276 268 u16 freq; 277 269 ··· 288 280 289 281 list = kzalloc(sizeof(*list), GFP_KERNEL); 290 282 if (!list) { 283 + ret = -ENOMEM; 284 + goto free; 285 + } 286 + priv->chan_num = max_channel_num; 287 + priv->survey = kzalloc(sizeof(struct survey_info) * max_channel_num, 288 + GFP_KERNEL); 289 + if (!priv->survey) { 291 290 ret = -ENOMEM; 292 291 goto free; 293 292 } ··· 336 321 sort(list->channels, list->entries, sizeof(struct p54_channel_entry), 337 322 p54_compare_channels, NULL); 338 323 324 + k = 0; 339 325 for (i = 0, j = 0; i < IEEE80211_NUM_BANDS; i++) { 340 - if (p54_generate_band(dev, list, i) == 0) 326 + if (p54_generate_band(dev, list, &k, i) == 0) 341 327 j++; 342 328 } 343 329 if (j == 0) { ··· 350 334 if (list) { 351 335 kfree(list->channels); 352 336 kfree(list); 337 + } 338 + if (ret) { 339 + kfree(priv->survey); 340 + priv->survey = NULL; 353 341 } 354 342 355 343 return ret; ··· 873 853 kfree(priv->output_limit); 874 854 kfree(priv->curve_data); 875 855 kfree(priv->rssi_db); 856 + kfree(priv->survey); 876 857 priv->iq_autocal = NULL; 877 858 priv->output_limit = NULL; 878 859 priv->curve_data = NULL; 879 860 priv->rssi_db = NULL; 861 + priv->survey = NULL; 880 862 881 863 wiphy_err(dev->wiphy, "eeprom parse failed!\n"); 882 864 return err;
+2
drivers/net/wireless/p54/fwio.c
··· 385 385 setup->v2.osc_start_delay = cpu_to_le16(65535); 386 386 } 387 387 p54_tx(priv, skb); 388 + priv->phy_idle = mode == P54_FILTER_TYPE_HIBERNATE; 388 389 return 0; 389 390 } 390 391 ··· 627 626 psm->exclude[0] = WLAN_EID_TIM; 628 627 629 628 p54_tx(priv, skb); 629 + priv->phy_ps = mode != P54_PSM_CAM; 630 630 return 0; 631 631 } 632 632
+101 -12
drivers/net/wireless/p54/main.c
··· 204 204 struct p54_common *priv = dev->priv; 205 205 int i; 206 206 207 - mutex_lock(&priv->conf_mutex); 208 207 priv->mode = NL80211_IFTYPE_UNSPECIFIED; 209 208 priv->softled_state = 0; 210 - p54_set_leds(priv); 211 - 212 209 cancel_delayed_work_sync(&priv->work); 213 - 210 + mutex_lock(&priv->conf_mutex); 211 + p54_set_leds(priv); 214 212 priv->stop(dev); 215 213 skb_queue_purge(&priv->tx_pending); 216 214 skb_queue_purge(&priv->tx_queue); ··· 276 278 mutex_unlock(&priv->conf_mutex); 277 279 } 278 280 281 + static int p54_wait_for_stats(struct ieee80211_hw *dev) 282 + { 283 + struct p54_common *priv = dev->priv; 284 + int ret; 285 + 286 + priv->update_stats = true; 287 + ret = p54_fetch_statistics(priv); 288 + if (ret) 289 + return ret; 290 + 291 + ret = wait_for_completion_interruptible_timeout(&priv->stat_comp, HZ); 292 + if (ret == 0) 293 + return -ETIMEDOUT; 294 + 295 + return 0; 296 + } 297 + 298 + static void p54_reset_stats(struct p54_common *priv) 299 + { 300 + struct ieee80211_channel *chan = priv->curchan; 301 + 302 + if (chan) { 303 + struct survey_info *info = &priv->survey[chan->hw_value]; 304 + 305 + /* only reset channel statistics, don't touch .filled, etc. */ 306 + info->channel_time = 0; 307 + info->channel_time_busy = 0; 308 + info->channel_time_tx = 0; 309 + } 310 + 311 + priv->update_stats = true; 312 + priv->survey_raw.active = 0; 313 + priv->survey_raw.cca = 0; 314 + priv->survey_raw.tx = 0; 315 + } 316 + 279 317 static int p54_config(struct ieee80211_hw *dev, u32 changed) 280 318 { 281 319 int ret = 0; ··· 322 288 if (changed & IEEE80211_CONF_CHANGE_POWER) 323 289 priv->output_power = conf->power_level << 2; 324 290 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { 291 + struct ieee80211_channel *oldchan; 292 + WARN_ON(p54_wait_for_stats(dev)); 293 + oldchan = priv->curchan; 294 + priv->curchan = NULL; 325 295 ret = p54_scan(priv, P54_SCAN_EXIT, 0); 326 - if (ret) 296 + if (ret) { 297 + priv->curchan = oldchan; 327 298 goto out; 299 + } 300 + /* 301 + * TODO: Use the LM_SCAN_TRAP to determine the current 302 + * operating channel. 303 + */ 304 + priv->curchan = priv->hw->conf.channel; 305 + p54_reset_stats(priv); 306 + WARN_ON(p54_fetch_statistics(priv)); 328 307 } 329 308 if (changed & IEEE80211_CONF_CHANGE_PS) { 309 + WARN_ON(p54_wait_for_stats(dev)); 330 310 ret = p54_set_ps(priv); 331 311 if (ret) 332 312 goto out; 313 + WARN_ON(p54_wait_for_stats(dev)); 333 314 } 334 315 if (changed & IEEE80211_CONF_CHANGE_IDLE) { 316 + WARN_ON(p54_wait_for_stats(dev)); 335 317 ret = p54_setup_mac(priv); 336 318 if (ret) 337 319 goto out; 320 + WARN_ON(p54_wait_for_stats(dev)); 338 321 } 339 322 340 323 out: ··· 435 384 * 2. cancel stuck frames / reset the device if necessary. 436 385 */ 437 386 438 - p54_fetch_statistics(priv); 387 + mutex_lock(&priv->conf_mutex); 388 + WARN_ON_ONCE(p54_fetch_statistics(priv)); 389 + mutex_unlock(&priv->conf_mutex); 439 390 } 440 391 441 392 static int p54_get_stats(struct ieee80211_hw *dev, ··· 594 541 struct survey_info *survey) 595 542 { 596 543 struct p54_common *priv = dev->priv; 597 - struct ieee80211_conf *conf = &dev->conf; 544 + struct ieee80211_channel *chan; 545 + int err, tries; 546 + bool in_use = false; 598 547 599 - if (idx != 0) 548 + if (idx >= priv->chan_num) 600 549 return -ENOENT; 601 550 602 - survey->channel = conf->channel; 603 - survey->filled = SURVEY_INFO_NOISE_DBM; 604 - survey->noise = clamp_t(s8, priv->noise, -128, 127); 551 + #define MAX_TRIES 1 552 + for (tries = 0; tries < MAX_TRIES; tries++) { 553 + chan = priv->curchan; 554 + if (chan && chan->hw_value == idx) { 555 + mutex_lock(&priv->conf_mutex); 556 + err = p54_wait_for_stats(dev); 557 + mutex_unlock(&priv->conf_mutex); 558 + if (err) 559 + return err; 605 560 606 - return 0; 561 + in_use = true; 562 + } 563 + 564 + memcpy(survey, &priv->survey[idx], sizeof(*survey)); 565 + 566 + if (in_use) { 567 + /* test if the reported statistics are valid. */ 568 + if (survey->channel_time != 0) { 569 + survey->filled |= SURVEY_INFO_IN_USE; 570 + } else { 571 + /* 572 + * hw/fw has not accumulated enough sample sets. 573 + * Wait for 100ms, this ought to be enough to 574 + * to get at least one non-null set of channel 575 + * usage statistics. 576 + */ 577 + msleep(100); 578 + continue; 579 + } 580 + } 581 + return 0; 582 + } 583 + return -ETIMEDOUT; 584 + #undef MAX_TRIES 607 585 } 608 586 609 587 static unsigned int p54_flush_count(struct p54_common *priv) ··· 770 686 771 687 mutex_init(&priv->conf_mutex); 772 688 mutex_init(&priv->eeprom_mutex); 689 + init_completion(&priv->stat_comp); 773 690 init_completion(&priv->eeprom_comp); 774 691 init_completion(&priv->beacon_comp); 775 692 INIT_DELAYED_WORK(&priv->work, p54_work); 776 693 777 694 memset(&priv->mc_maclist[0], ~0, ETH_ALEN); 695 + priv->curchan = NULL; 696 + p54_reset_stats(priv); 778 697 return dev; 779 698 } 780 699 EXPORT_SYMBOL_GPL(p54_init_common); ··· 817 730 kfree(priv->curve_data); 818 731 kfree(priv->rssi_db); 819 732 kfree(priv->used_rxkeys); 733 + kfree(priv->survey); 820 734 priv->iq_autocal = NULL; 821 735 priv->output_limit = NULL; 822 736 priv->curve_data = NULL; 823 737 priv->rssi_db = NULL; 824 738 priv->used_rxkeys = NULL; 739 + priv->survey = NULL; 825 740 ieee80211_free_hw(dev); 826 741 } 827 742 EXPORT_SYMBOL_GPL(p54_free_common);
+18
drivers/net/wireless/p54/p54.h
··· 199 199 u8 tx_diversity_mask; 200 200 unsigned int output_power; 201 201 struct p54_rssi_db_entry *cur_rssi; 202 + struct ieee80211_channel *curchan; 203 + struct survey_info *survey; 204 + unsigned int chan_num; 205 + struct completion stat_comp; 206 + bool update_stats; 207 + struct { 208 + unsigned int timestamp; 209 + unsigned int cached_cca; 210 + unsigned int cached_tx; 211 + unsigned int cached_rssi; 212 + u64 active; 213 + u64 cca; 214 + u64 tx; 215 + u64 rssi; 216 + } survey_raw; 217 + 202 218 int noise; 203 219 /* calibration, output power limit and rssi<->dBm conversation data */ 204 220 struct pda_iq_autocal_entry *iq_autocal; ··· 236 220 u32 basic_rate_mask; 237 221 u16 aid; 238 222 u8 coverage_class; 223 + bool phy_idle; 224 + bool phy_ps; 239 225 bool powersave_override; 240 226 __le32 beacon_req_id; 241 227 struct completion beacon_comp;
+66
drivers/net/wireless/p54/txrx.c
··· 507 507 struct p54_hdr *hdr = (struct p54_hdr *) skb->data; 508 508 struct p54_statistics *stats = (struct p54_statistics *) hdr->data; 509 509 struct sk_buff *tmp; 510 + struct ieee80211_channel *chan; 511 + unsigned int i, rssi, tx, cca, dtime, dtotal, dcca, dtx, drssi, unit; 510 512 u32 tsf32; 511 513 512 514 if (unlikely(priv->mode == NL80211_IFTYPE_UNSPECIFIED)) ··· 525 523 526 524 priv->noise = p54_rssi_to_dbm(priv, le32_to_cpu(stats->noise)); 527 525 526 + /* 527 + * STSW450X LMAC API page 26 - 3.8 Statistics 528 + * "The exact measurement period can be derived from the 529 + * timestamp member". 530 + */ 531 + dtime = tsf32 - priv->survey_raw.timestamp; 532 + 533 + /* 534 + * STSW450X LMAC API page 26 - 3.8.1 Noise histogram 535 + * The LMAC samples RSSI, CCA and transmit state at regular 536 + * periods (typically 8 times per 1k [as in 1024] usec). 537 + */ 538 + cca = le32_to_cpu(stats->sample_cca); 539 + tx = le32_to_cpu(stats->sample_tx); 540 + rssi = 0; 541 + for (i = 0; i < ARRAY_SIZE(stats->sample_noise); i++) 542 + rssi += le32_to_cpu(stats->sample_noise[i]); 543 + 544 + dcca = cca - priv->survey_raw.cached_cca; 545 + drssi = rssi - priv->survey_raw.cached_rssi; 546 + dtx = tx - priv->survey_raw.cached_tx; 547 + dtotal = dcca + drssi + dtx; 548 + 549 + /* 550 + * update statistics when more than a second is over since the 551 + * last call, or when a update is badly needed. 552 + */ 553 + if (dtotal && (priv->update_stats || dtime >= USEC_PER_SEC) && 554 + dtime >= dtotal) { 555 + priv->survey_raw.timestamp = tsf32; 556 + priv->update_stats = false; 557 + unit = dtime / dtotal; 558 + 559 + if (dcca) { 560 + priv->survey_raw.cca += dcca * unit; 561 + priv->survey_raw.cached_cca = cca; 562 + } 563 + if (dtx) { 564 + priv->survey_raw.tx += dtx * unit; 565 + priv->survey_raw.cached_tx = tx; 566 + } 567 + if (drssi) { 568 + priv->survey_raw.rssi += drssi * unit; 569 + priv->survey_raw.cached_rssi = rssi; 570 + } 571 + 572 + /* 1024 usec / 8 times = 128 usec / time */ 573 + if (!(priv->phy_ps || priv->phy_idle)) 574 + priv->survey_raw.active += dtotal * unit; 575 + else 576 + priv->survey_raw.active += (dcca + dtx) * unit; 577 + } 578 + 579 + chan = priv->curchan; 580 + if (chan) { 581 + struct survey_info *survey = &priv->survey[chan->hw_value]; 582 + survey->noise = clamp_t(s8, priv->noise, -128, 127); 583 + survey->channel_time = priv->survey_raw.active / 1024; 584 + survey->channel_time_tx = priv->survey_raw.tx / 1024; 585 + survey->channel_time_busy = priv->survey_raw.cca / 1024 + 586 + survey->channel_time_tx; 587 + } 588 + 528 589 tmp = p54_find_and_unlink_skb(priv, hdr->req_id); 529 590 dev_kfree_skb_any(tmp); 591 + complete(&priv->stat_comp); 530 592 } 531 593 532 594 static void p54_rx_trap(struct p54_common *priv, struct sk_buff *skb)
+161
drivers/net/wireless/rtlwifi/base.c
··· 664 664 return hw_rate; 665 665 } 666 666 667 + /* mac80211's rate_idx is like this: 668 + * 669 + * 2.4G band:rx_status->band == IEEE80211_BAND_2GHZ 670 + * 671 + * B/G rate: 672 + * (rx_status->flag & RX_FLAG_HT) = 0, 673 + * DESC92_RATE1M-->DESC92_RATE54M ==> idx is 0-->11, 674 + * 675 + * N rate: 676 + * (rx_status->flag & RX_FLAG_HT) = 1, 677 + * DESC92_RATEMCS0-->DESC92_RATEMCS15 ==> idx is 0-->15 678 + * 679 + * 5G band:rx_status->band == IEEE80211_BAND_5GHZ 680 + * A rate: 681 + * (rx_status->flag & RX_FLAG_HT) = 0, 682 + * DESC92_RATE6M-->DESC92_RATE54M ==> idx is 0-->7, 683 + * 684 + * N rate: 685 + * (rx_status->flag & RX_FLAG_HT) = 1, 686 + * DESC92_RATEMCS0-->DESC92_RATEMCS15 ==> idx is 0-->15 687 + */ 688 + int rtlwifi_rate_mapping(struct ieee80211_hw *hw, 689 + bool isht, u8 desc_rate, bool first_ampdu) 690 + { 691 + int rate_idx; 692 + 693 + if (false == isht) { 694 + if (IEEE80211_BAND_2GHZ == hw->conf.channel->band) { 695 + switch (desc_rate) { 696 + case DESC92_RATE1M: 697 + rate_idx = 0; 698 + break; 699 + case DESC92_RATE2M: 700 + rate_idx = 1; 701 + break; 702 + case DESC92_RATE5_5M: 703 + rate_idx = 2; 704 + break; 705 + case DESC92_RATE11M: 706 + rate_idx = 3; 707 + break; 708 + case DESC92_RATE6M: 709 + rate_idx = 4; 710 + break; 711 + case DESC92_RATE9M: 712 + rate_idx = 5; 713 + break; 714 + case DESC92_RATE12M: 715 + rate_idx = 6; 716 + break; 717 + case DESC92_RATE18M: 718 + rate_idx = 7; 719 + break; 720 + case DESC92_RATE24M: 721 + rate_idx = 8; 722 + break; 723 + case DESC92_RATE36M: 724 + rate_idx = 9; 725 + break; 726 + case DESC92_RATE48M: 727 + rate_idx = 10; 728 + break; 729 + case DESC92_RATE54M: 730 + rate_idx = 11; 731 + break; 732 + default: 733 + rate_idx = 0; 734 + break; 735 + } 736 + } else { 737 + switch (desc_rate) { 738 + case DESC92_RATE6M: 739 + rate_idx = 0; 740 + break; 741 + case DESC92_RATE9M: 742 + rate_idx = 1; 743 + break; 744 + case DESC92_RATE12M: 745 + rate_idx = 2; 746 + break; 747 + case DESC92_RATE18M: 748 + rate_idx = 3; 749 + break; 750 + case DESC92_RATE24M: 751 + rate_idx = 4; 752 + break; 753 + case DESC92_RATE36M: 754 + rate_idx = 5; 755 + break; 756 + case DESC92_RATE48M: 757 + rate_idx = 6; 758 + break; 759 + case DESC92_RATE54M: 760 + rate_idx = 7; 761 + break; 762 + default: 763 + rate_idx = 0; 764 + break; 765 + } 766 + } 767 + 768 + } else { 769 + 770 + switch (desc_rate) { 771 + case DESC92_RATEMCS0: 772 + rate_idx = 0; 773 + break; 774 + case DESC92_RATEMCS1: 775 + rate_idx = 1; 776 + break; 777 + case DESC92_RATEMCS2: 778 + rate_idx = 2; 779 + break; 780 + case DESC92_RATEMCS3: 781 + rate_idx = 3; 782 + break; 783 + case DESC92_RATEMCS4: 784 + rate_idx = 4; 785 + break; 786 + case DESC92_RATEMCS5: 787 + rate_idx = 5; 788 + break; 789 + case DESC92_RATEMCS6: 790 + rate_idx = 6; 791 + break; 792 + case DESC92_RATEMCS7: 793 + rate_idx = 7; 794 + break; 795 + case DESC92_RATEMCS8: 796 + rate_idx = 8; 797 + break; 798 + case DESC92_RATEMCS9: 799 + rate_idx = 9; 800 + break; 801 + case DESC92_RATEMCS10: 802 + rate_idx = 10; 803 + break; 804 + case DESC92_RATEMCS11: 805 + rate_idx = 11; 806 + break; 807 + case DESC92_RATEMCS12: 808 + rate_idx = 12; 809 + break; 810 + case DESC92_RATEMCS13: 811 + rate_idx = 13; 812 + break; 813 + case DESC92_RATEMCS14: 814 + rate_idx = 14; 815 + break; 816 + case DESC92_RATEMCS15: 817 + rate_idx = 15; 818 + break; 819 + default: 820 + rate_idx = 0; 821 + break; 822 + } 823 + } 824 + return rate_idx; 825 + } 826 + EXPORT_SYMBOL(rtlwifi_rate_mapping); 827 + 667 828 void rtl_get_tcb_desc(struct ieee80211_hw *hw, 668 829 struct ieee80211_tx_info *info, 669 830 struct ieee80211_sta *sta,
+2
drivers/net/wireless/rtlwifi/base.h
··· 140 140 void rtl_recognize_peer(struct ieee80211_hw *hw, u8 *data, unsigned int len); 141 141 u8 rtl_tid_to_ac(struct ieee80211_hw *hw, u8 tid); 142 142 extern struct attribute_group rtl_attribute_group; 143 + int rtlwifi_rate_mapping(struct ieee80211_hw *hw, 144 + bool isht, u8 desc_rate, bool first_ampdu); 143 145 #endif
+5 -1
drivers/net/wireless/rtlwifi/debug.c
··· 28 28 29 29 #include "wifi.h" 30 30 31 + static unsigned int debug = DBG_EMERG; 32 + module_param(debug, uint, 0); 33 + MODULE_PARM_DESC(debug, "Set global debug level for rtlwifi (0,2-5)"); 34 + 31 35 void rtl_dbgp_flag_init(struct ieee80211_hw *hw) 32 36 { 33 37 struct rtl_priv *rtlpriv = rtl_priv(hw); 34 38 u8 i; 35 39 36 - rtlpriv->dbg.global_debuglevel = DBG_EMERG; 40 + rtlpriv->dbg.global_debuglevel = debug; 37 41 38 42 rtlpriv->dbg.global_debugcomponents = 39 43 COMP_ERR | COMP_FW | COMP_INIT | COMP_RECV | COMP_SEND |
-139
drivers/net/wireless/rtlwifi/rtl8192ce/def.h
··· 220 220 QSLT_CMD = 0x13, 221 221 }; 222 222 223 - enum rtl_desc92c_rate { 224 - DESC92C_RATE1M = 0x00, 225 - DESC92C_RATE2M = 0x01, 226 - DESC92C_RATE5_5M = 0x02, 227 - DESC92C_RATE11M = 0x03, 228 - 229 - DESC92C_RATE6M = 0x04, 230 - DESC92C_RATE9M = 0x05, 231 - DESC92C_RATE12M = 0x06, 232 - DESC92C_RATE18M = 0x07, 233 - DESC92C_RATE24M = 0x08, 234 - DESC92C_RATE36M = 0x09, 235 - DESC92C_RATE48M = 0x0a, 236 - DESC92C_RATE54M = 0x0b, 237 - 238 - DESC92C_RATEMCS0 = 0x0c, 239 - DESC92C_RATEMCS1 = 0x0d, 240 - DESC92C_RATEMCS2 = 0x0e, 241 - DESC92C_RATEMCS3 = 0x0f, 242 - DESC92C_RATEMCS4 = 0x10, 243 - DESC92C_RATEMCS5 = 0x11, 244 - DESC92C_RATEMCS6 = 0x12, 245 - DESC92C_RATEMCS7 = 0x13, 246 - DESC92C_RATEMCS8 = 0x14, 247 - DESC92C_RATEMCS9 = 0x15, 248 - DESC92C_RATEMCS10 = 0x16, 249 - DESC92C_RATEMCS11 = 0x17, 250 - DESC92C_RATEMCS12 = 0x18, 251 - DESC92C_RATEMCS13 = 0x19, 252 - DESC92C_RATEMCS14 = 0x1a, 253 - DESC92C_RATEMCS15 = 0x1b, 254 - DESC92C_RATEMCS15_SG = 0x1c, 255 - DESC92C_RATEMCS32 = 0x20, 256 - }; 257 - 258 223 struct phy_sts_cck_8192s_t { 259 224 u8 adc_pwdb_X[4]; 260 225 u8 sq_rpt; ··· 231 266 u32 cmd_len; 232 267 u8 *p_cmdbuffer; 233 268 }; 234 - 235 - /* NOTE: reference to rtl8192c_rates struct */ 236 - static inline int _rtl92c_rate_mapping(struct ieee80211_hw *hw, bool isHT, 237 - u8 desc_rate, bool first_ampdu) 238 - { 239 - struct rtl_priv *rtlpriv = rtl_priv(hw); 240 - int rate_idx = 0; 241 - 242 - if (first_ampdu) { 243 - if (false == isHT) { 244 - switch (desc_rate) { 245 - case DESC92C_RATE1M: 246 - rate_idx = 0; 247 - break; 248 - case DESC92C_RATE2M: 249 - rate_idx = 1; 250 - break; 251 - case DESC92C_RATE5_5M: 252 - rate_idx = 2; 253 - break; 254 - case DESC92C_RATE11M: 255 - rate_idx = 3; 256 - break; 257 - case DESC92C_RATE6M: 258 - rate_idx = 4; 259 - break; 260 - case DESC92C_RATE9M: 261 - rate_idx = 5; 262 - break; 263 - case DESC92C_RATE12M: 264 - rate_idx = 6; 265 - break; 266 - case DESC92C_RATE18M: 267 - rate_idx = 7; 268 - break; 269 - case DESC92C_RATE24M: 270 - rate_idx = 8; 271 - break; 272 - case DESC92C_RATE36M: 273 - rate_idx = 9; 274 - break; 275 - case DESC92C_RATE48M: 276 - rate_idx = 10; 277 - break; 278 - case DESC92C_RATE54M: 279 - rate_idx = 11; 280 - break; 281 - default: 282 - RT_TRACE(rtlpriv, COMP_ERR, DBG_DMESG, 283 - ("Rate %d is not support, set to " 284 - "1M rate.\n", desc_rate)); 285 - rate_idx = 0; 286 - break; 287 - } 288 - } else { 289 - rate_idx = 11; 290 - } 291 - return rate_idx; 292 - } 293 - switch (desc_rate) { 294 - case DESC92C_RATE1M: 295 - rate_idx = 0; 296 - break; 297 - case DESC92C_RATE2M: 298 - rate_idx = 1; 299 - break; 300 - case DESC92C_RATE5_5M: 301 - rate_idx = 2; 302 - break; 303 - case DESC92C_RATE11M: 304 - rate_idx = 3; 305 - break; 306 - case DESC92C_RATE6M: 307 - rate_idx = 4; 308 - break; 309 - case DESC92C_RATE9M: 310 - rate_idx = 5; 311 - break; 312 - case DESC92C_RATE12M: 313 - rate_idx = 6; 314 - break; 315 - case DESC92C_RATE18M: 316 - rate_idx = 7; 317 - break; 318 - case DESC92C_RATE24M: 319 - rate_idx = 8; 320 - break; 321 - case DESC92C_RATE36M: 322 - rate_idx = 9; 323 - break; 324 - case DESC92C_RATE48M: 325 - rate_idx = 10; 326 - break; 327 - case DESC92C_RATE54M: 328 - rate_idx = 11; 329 - break; 330 - /* TODO: How to mapping MCS rate? */ 331 - /* NOTE: referenc to __ieee80211_rx */ 332 - default: 333 - rate_idx = 11; 334 - break; 335 - } 336 - return rate_idx; 337 - } 338 269 339 270 #endif
+14 -14
drivers/net/wireless/rtlwifi/rtl8192ce/sw.c
··· 318 318 .maps[RTL_IMR_ROK] = IMR_ROK, 319 319 .maps[RTL_IBSS_INT_MASKS] = (IMR_BCNINT | IMR_TBDOK | IMR_TBDER), 320 320 321 - .maps[RTL_RC_CCK_RATE1M] = DESC92C_RATE1M, 322 - .maps[RTL_RC_CCK_RATE2M] = DESC92C_RATE2M, 323 - .maps[RTL_RC_CCK_RATE5_5M] = DESC92C_RATE5_5M, 324 - .maps[RTL_RC_CCK_RATE11M] = DESC92C_RATE11M, 325 - .maps[RTL_RC_OFDM_RATE6M] = DESC92C_RATE6M, 326 - .maps[RTL_RC_OFDM_RATE9M] = DESC92C_RATE9M, 327 - .maps[RTL_RC_OFDM_RATE12M] = DESC92C_RATE12M, 328 - .maps[RTL_RC_OFDM_RATE18M] = DESC92C_RATE18M, 329 - .maps[RTL_RC_OFDM_RATE24M] = DESC92C_RATE24M, 330 - .maps[RTL_RC_OFDM_RATE36M] = DESC92C_RATE36M, 331 - .maps[RTL_RC_OFDM_RATE48M] = DESC92C_RATE48M, 332 - .maps[RTL_RC_OFDM_RATE54M] = DESC92C_RATE54M, 321 + .maps[RTL_RC_CCK_RATE1M] = DESC92_RATE1M, 322 + .maps[RTL_RC_CCK_RATE2M] = DESC92_RATE2M, 323 + .maps[RTL_RC_CCK_RATE5_5M] = DESC92_RATE5_5M, 324 + .maps[RTL_RC_CCK_RATE11M] = DESC92_RATE11M, 325 + .maps[RTL_RC_OFDM_RATE6M] = DESC92_RATE6M, 326 + .maps[RTL_RC_OFDM_RATE9M] = DESC92_RATE9M, 327 + .maps[RTL_RC_OFDM_RATE12M] = DESC92_RATE12M, 328 + .maps[RTL_RC_OFDM_RATE18M] = DESC92_RATE18M, 329 + .maps[RTL_RC_OFDM_RATE24M] = DESC92_RATE24M, 330 + .maps[RTL_RC_OFDM_RATE36M] = DESC92_RATE36M, 331 + .maps[RTL_RC_OFDM_RATE48M] = DESC92_RATE48M, 332 + .maps[RTL_RC_OFDM_RATE54M] = DESC92_RATE54M, 333 333 334 - .maps[RTL_RC_HT_RATEMCS7] = DESC92C_RATEMCS7, 335 - .maps[RTL_RC_HT_RATEMCS15] = DESC92C_RATEMCS15, 334 + .maps[RTL_RC_HT_RATEMCS7] = DESC92_RATEMCS7, 335 + .maps[RTL_RC_HT_RATEMCS15] = DESC92_RATEMCS15, 336 336 }; 337 337 338 338 DEFINE_PCI_DEVICE_TABLE(rtl92ce_pci_ids) = {
+8 -108
drivers/net/wireless/rtlwifi/rtl8192ce/trx.c
··· 48 48 return skb->priority; 49 49 } 50 50 51 - static int _rtl92ce_rate_mapping(bool isht, u8 desc_rate, bool first_ampdu) 52 - { 53 - int rate_idx; 54 - 55 - if (first_ampdu) { 56 - if (false == isht) { 57 - switch (desc_rate) { 58 - case DESC92C_RATE1M: 59 - rate_idx = 0; 60 - break; 61 - case DESC92C_RATE2M: 62 - rate_idx = 1; 63 - break; 64 - case DESC92C_RATE5_5M: 65 - rate_idx = 2; 66 - break; 67 - case DESC92C_RATE11M: 68 - rate_idx = 3; 69 - break; 70 - case DESC92C_RATE6M: 71 - rate_idx = 4; 72 - break; 73 - case DESC92C_RATE9M: 74 - rate_idx = 5; 75 - break; 76 - case DESC92C_RATE12M: 77 - rate_idx = 6; 78 - break; 79 - case DESC92C_RATE18M: 80 - rate_idx = 7; 81 - break; 82 - case DESC92C_RATE24M: 83 - rate_idx = 8; 84 - break; 85 - case DESC92C_RATE36M: 86 - rate_idx = 9; 87 - break; 88 - case DESC92C_RATE48M: 89 - rate_idx = 10; 90 - break; 91 - case DESC92C_RATE54M: 92 - rate_idx = 11; 93 - break; 94 - default: 95 - rate_idx = 0; 96 - break; 97 - } 98 - } else { 99 - rate_idx = 11; 100 - } 101 - 102 - return rate_idx; 103 - } 104 - 105 - switch (desc_rate) { 106 - case DESC92C_RATE1M: 107 - rate_idx = 0; 108 - break; 109 - case DESC92C_RATE2M: 110 - rate_idx = 1; 111 - break; 112 - case DESC92C_RATE5_5M: 113 - rate_idx = 2; 114 - break; 115 - case DESC92C_RATE11M: 116 - rate_idx = 3; 117 - break; 118 - case DESC92C_RATE6M: 119 - rate_idx = 4; 120 - break; 121 - case DESC92C_RATE9M: 122 - rate_idx = 5; 123 - break; 124 - case DESC92C_RATE12M: 125 - rate_idx = 6; 126 - break; 127 - case DESC92C_RATE18M: 128 - rate_idx = 7; 129 - break; 130 - case DESC92C_RATE24M: 131 - rate_idx = 8; 132 - break; 133 - case DESC92C_RATE36M: 134 - rate_idx = 9; 135 - break; 136 - case DESC92C_RATE48M: 137 - rate_idx = 10; 138 - break; 139 - case DESC92C_RATE54M: 140 - rate_idx = 11; 141 - break; 142 - default: 143 - rate_idx = 11; 144 - break; 145 - } 146 - return rate_idx; 147 - } 148 - 149 51 static u8 _rtl92c_query_rxpwrpercentage(char antpower) 150 52 { 151 53 if ((antpower <= -100) || (antpower >= 20)) ··· 238 336 pstats->rxpower = rx_pwr_all; 239 337 pstats->recvsignalpower = rx_pwr_all; 240 338 241 - if (pdesc->rxht && pdesc->rxmcs >= DESC92C_RATEMCS8 && 242 - pdesc->rxmcs <= DESC92C_RATEMCS15) 339 + if (pdesc->rxht && pdesc->rxmcs >= DESC92_RATEMCS8 && 340 + pdesc->rxmcs <= DESC92_RATEMCS15) 243 341 max_spatial_stream = 2; 244 342 else 245 343 max_spatial_stream = 1; ··· 572 670 if (stats->decrypted) 573 671 rx_status->flag |= RX_FLAG_DECRYPTED; 574 672 575 - rx_status->rate_idx = _rtl92ce_rate_mapping((bool) 576 - GET_RX_DESC_RXHT(pdesc), 577 - (u8) 578 - GET_RX_DESC_RXMCS(pdesc), 579 - (bool) 580 - GET_RX_DESC_PAGGR(pdesc)); 673 + rx_status->rate_idx = rtlwifi_rate_mapping(hw, 674 + (bool)GET_RX_DESC_RXHT(pdesc), 675 + (u8)GET_RX_DESC_RXMCS(pdesc), 676 + (bool)GET_RX_DESC_PAGGR(pdesc)); 581 677 582 678 rx_status->mactime = GET_RX_DESC_TSFL(pdesc); 583 679 if (phystatus) { ··· 668 768 SET_TX_DESC_RTS_BW(pdesc, 0); 669 769 SET_TX_DESC_RTS_SC(pdesc, tcb_desc->rts_sc); 670 770 SET_TX_DESC_RTS_SHORT(pdesc, 671 - ((tcb_desc->rts_rate <= DESC92C_RATE54M) ? 771 + ((tcb_desc->rts_rate <= DESC92_RATE54M) ? 672 772 (tcb_desc->rts_use_shortpreamble ? 1 : 0) 673 773 : (tcb_desc->rts_use_shortgi ? 1 : 0))); 674 774 ··· 786 886 if (firstseg) 787 887 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN); 788 888 789 - SET_TX_DESC_TX_RATE(pdesc, DESC92C_RATE1M); 889 + SET_TX_DESC_TX_RATE(pdesc, DESC92_RATE1M); 790 890 791 891 SET_TX_DESC_SEQ(pdesc, 0); 792 892
+4 -4
drivers/net/wireless/rtlwifi/rtl8192ce/trx.h
··· 538 538 } while (0); 539 539 540 540 #define RX_HAL_IS_CCK_RATE(_pdesc)\ 541 - (_pdesc->rxmcs == DESC92C_RATE1M || \ 542 - _pdesc->rxmcs == DESC92C_RATE2M || \ 543 - _pdesc->rxmcs == DESC92C_RATE5_5M || \ 544 - _pdesc->rxmcs == DESC92C_RATE11M) 541 + (_pdesc->rxmcs == DESC92_RATE1M || \ 542 + _pdesc->rxmcs == DESC92_RATE2M || \ 543 + _pdesc->rxmcs == DESC92_RATE5_5M || \ 544 + _pdesc->rxmcs == DESC92_RATE11M) 545 545 546 546 struct rx_fwinfo_92c { 547 547 u8 gain_trsw[4];
+2 -2
drivers/net/wireless/rtlwifi/rtl8192cu/mac.c
··· 892 892 pstats->rxpower = rx_pwr_all; 893 893 pstats->recvsignalpower = rx_pwr_all; 894 894 if (GET_RX_DESC_RX_MCS(pdesc) && 895 - GET_RX_DESC_RX_MCS(pdesc) >= DESC92C_RATEMCS8 && 896 - GET_RX_DESC_RX_MCS(pdesc) <= DESC92C_RATEMCS15) 895 + GET_RX_DESC_RX_MCS(pdesc) >= DESC92_RATEMCS8 && 896 + GET_RX_DESC_RX_MCS(pdesc) <= DESC92_RATEMCS15) 897 897 max_spatial_stream = 2; 898 898 else 899 899 max_spatial_stream = 1;
+4 -4
drivers/net/wireless/rtlwifi/rtl8192cu/mac.h
··· 88 88 u32 rtl92c_get_txdma_status(struct ieee80211_hw *hw); 89 89 90 90 #define RX_HAL_IS_CCK_RATE(_pdesc)\ 91 - (GET_RX_DESC_RX_MCS(_pdesc) == DESC92C_RATE1M ||\ 92 - GET_RX_DESC_RX_MCS(_pdesc) == DESC92C_RATE2M ||\ 93 - GET_RX_DESC_RX_MCS(_pdesc) == DESC92C_RATE5_5M ||\ 94 - GET_RX_DESC_RX_MCS(_pdesc) == DESC92C_RATE11M) 91 + (GET_RX_DESC_RX_MCS(_pdesc) == DESC92_RATE1M ||\ 92 + GET_RX_DESC_RX_MCS(_pdesc) == DESC92_RATE2M ||\ 93 + GET_RX_DESC_RX_MCS(_pdesc) == DESC92_RATE5_5M ||\ 94 + GET_RX_DESC_RX_MCS(_pdesc) == DESC92_RATE11M) 95 95 96 96 struct rx_fwinfo_92c { 97 97 u8 gain_trsw[4];
+1 -1
drivers/net/wireless/rtlwifi/rtl8192cu/rf.c
··· 104 104 tx_agc[RF90_PATH_A] = 0x10101010; 105 105 tx_agc[RF90_PATH_B] = 0x10101010; 106 106 } else if (rtlpriv->dm.dynamic_txhighpower_lvl == 107 - TXHIGHPWRLEVEL_LEVEL2) { 107 + TXHIGHPWRLEVEL_LEVEL1) { 108 108 tx_agc[RF90_PATH_A] = 0x00000000; 109 109 tx_agc[RF90_PATH_B] = 0x00000000; 110 110 } else{
+14 -14
drivers/net/wireless/rtlwifi/rtl8192cu/sw.c
··· 241 241 .maps[RTL_IMR_ROK] = IMR_ROK, 242 242 .maps[RTL_IBSS_INT_MASKS] = (IMR_BCNINT | IMR_TBDOK | IMR_TBDER), 243 243 244 - .maps[RTL_RC_CCK_RATE1M] = DESC92C_RATE1M, 245 - .maps[RTL_RC_CCK_RATE2M] = DESC92C_RATE2M, 246 - .maps[RTL_RC_CCK_RATE5_5M] = DESC92C_RATE5_5M, 247 - .maps[RTL_RC_CCK_RATE11M] = DESC92C_RATE11M, 248 - .maps[RTL_RC_OFDM_RATE6M] = DESC92C_RATE6M, 249 - .maps[RTL_RC_OFDM_RATE9M] = DESC92C_RATE9M, 250 - .maps[RTL_RC_OFDM_RATE12M] = DESC92C_RATE12M, 251 - .maps[RTL_RC_OFDM_RATE18M] = DESC92C_RATE18M, 252 - .maps[RTL_RC_OFDM_RATE24M] = DESC92C_RATE24M, 253 - .maps[RTL_RC_OFDM_RATE36M] = DESC92C_RATE36M, 254 - .maps[RTL_RC_OFDM_RATE48M] = DESC92C_RATE48M, 255 - .maps[RTL_RC_OFDM_RATE54M] = DESC92C_RATE54M, 256 - .maps[RTL_RC_HT_RATEMCS7] = DESC92C_RATEMCS7, 257 - .maps[RTL_RC_HT_RATEMCS15] = DESC92C_RATEMCS15, 244 + .maps[RTL_RC_CCK_RATE1M] = DESC92_RATE1M, 245 + .maps[RTL_RC_CCK_RATE2M] = DESC92_RATE2M, 246 + .maps[RTL_RC_CCK_RATE5_5M] = DESC92_RATE5_5M, 247 + .maps[RTL_RC_CCK_RATE11M] = DESC92_RATE11M, 248 + .maps[RTL_RC_OFDM_RATE6M] = DESC92_RATE6M, 249 + .maps[RTL_RC_OFDM_RATE9M] = DESC92_RATE9M, 250 + .maps[RTL_RC_OFDM_RATE12M] = DESC92_RATE12M, 251 + .maps[RTL_RC_OFDM_RATE18M] = DESC92_RATE18M, 252 + .maps[RTL_RC_OFDM_RATE24M] = DESC92_RATE24M, 253 + .maps[RTL_RC_OFDM_RATE36M] = DESC92_RATE36M, 254 + .maps[RTL_RC_OFDM_RATE48M] = DESC92_RATE48M, 255 + .maps[RTL_RC_OFDM_RATE54M] = DESC92_RATE54M, 256 + .maps[RTL_RC_HT_RATEMCS7] = DESC92_RATEMCS7, 257 + .maps[RTL_RC_HT_RATEMCS15] = DESC92_RATEMCS15, 258 258 }; 259 259 260 260 #define USB_VENDER_ID_REALTEK 0x0bda
+11 -12
drivers/net/wireless/rtlwifi/rtl8192cu/trx.c
··· 337 337 rx_status->flag |= RX_FLAG_MACTIME_MPDU; 338 338 if (stats->decrypted) 339 339 rx_status->flag |= RX_FLAG_DECRYPTED; 340 - rx_status->rate_idx = _rtl92c_rate_mapping(hw, 341 - (bool)GET_RX_DESC_RX_HT(pdesc), 342 - (u8)GET_RX_DESC_RX_MCS(pdesc), 343 - (bool)GET_RX_DESC_PAGGR(pdesc)); 340 + rx_status->rate_idx = rtlwifi_rate_mapping(hw, 341 + (bool)GET_RX_DESC_RX_HT(pdesc), 342 + (u8)GET_RX_DESC_RX_MCS(pdesc), 343 + (bool)GET_RX_DESC_PAGGR(pdesc)); 344 344 rx_status->mactime = GET_RX_DESC_TSFL(pdesc); 345 345 if (phystatus) { 346 346 p_drvinfo = (struct rx_fwinfo_92c *)(pdesc + RTL_RX_DESC_SIZE); ··· 406 406 if (GET_RX_DESC_RX_HT(rxdesc)) 407 407 rx_status->flag |= RX_FLAG_HT; 408 408 /* Data rate */ 409 - rx_status->rate_idx = _rtl92c_rate_mapping(hw, 410 - (bool)GET_RX_DESC_RX_HT(rxdesc), 411 - (u8)GET_RX_DESC_RX_MCS(rxdesc), 412 - (bool)GET_RX_DESC_PAGGR(rxdesc) 413 - ); 409 + rx_status->rate_idx = rtlwifi_rate_mapping(hw, 410 + (bool)GET_RX_DESC_RX_HT(rxdesc), 411 + (u8)GET_RX_DESC_RX_MCS(rxdesc), 412 + (bool)GET_RX_DESC_PAGGR(rxdesc)); 414 413 /* There is a phy status after this rx descriptor. */ 415 414 if (GET_RX_DESC_PHY_STATUS(rxdesc)) { 416 415 p_drvinfo = (struct rx_fwinfo_92c *)(rxdesc + RTL_RX_DESC_SIZE); ··· 544 545 SET_TX_DESC_RTS_BW(txdesc, 0); 545 546 SET_TX_DESC_RTS_SC(txdesc, tcb_desc->rts_sc); 546 547 SET_TX_DESC_RTS_SHORT(txdesc, 547 - ((tcb_desc->rts_rate <= DESC92C_RATE54M) ? 548 + ((tcb_desc->rts_rate <= DESC92_RATE54M) ? 548 549 (tcb_desc->rts_use_shortpreamble ? 1 : 0) 549 550 : (tcb_desc->rts_use_shortgi ? 1 : 0))); 550 551 if (mac->bw_40) { ··· 642 643 } 643 644 SET_TX_DESC_USE_RATE(pDesc, 1); /* use data rate which is set by Sw */ 644 645 SET_TX_DESC_OWN(pDesc, 1); 645 - SET_TX_DESC_TX_RATE(pDesc, DESC92C_RATE1M); 646 + SET_TX_DESC_TX_RATE(pDesc, DESC92_RATE1M); 646 647 _rtl_tx_desc_checksum(pDesc); 647 648 } 648 649 ··· 658 659 memset((void *)pdesc, 0, RTL_TX_HEADER_SIZE); 659 660 if (firstseg) 660 661 SET_TX_DESC_OFFSET(pdesc, RTL_TX_HEADER_SIZE); 661 - SET_TX_DESC_TX_RATE(pdesc, DESC92C_RATE1M); 662 + SET_TX_DESC_TX_RATE(pdesc, DESC92_RATE1M); 662 663 SET_TX_DESC_SEQ(pdesc, 0); 663 664 SET_TX_DESC_LINIP(pdesc, 0); 664 665 SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue);
-35
drivers/net/wireless/rtlwifi/rtl8192de/def.h
··· 193 193 QSLT_CMD = 0x13, 194 194 }; 195 195 196 - enum rtl_desc92d_rate { 197 - DESC92D_RATE1M = 0x00, 198 - DESC92D_RATE2M = 0x01, 199 - DESC92D_RATE5_5M = 0x02, 200 - DESC92D_RATE11M = 0x03, 201 - 202 - DESC92D_RATE6M = 0x04, 203 - DESC92D_RATE9M = 0x05, 204 - DESC92D_RATE12M = 0x06, 205 - DESC92D_RATE18M = 0x07, 206 - DESC92D_RATE24M = 0x08, 207 - DESC92D_RATE36M = 0x09, 208 - DESC92D_RATE48M = 0x0a, 209 - DESC92D_RATE54M = 0x0b, 210 - 211 - DESC92D_RATEMCS0 = 0x0c, 212 - DESC92D_RATEMCS1 = 0x0d, 213 - DESC92D_RATEMCS2 = 0x0e, 214 - DESC92D_RATEMCS3 = 0x0f, 215 - DESC92D_RATEMCS4 = 0x10, 216 - DESC92D_RATEMCS5 = 0x11, 217 - DESC92D_RATEMCS6 = 0x12, 218 - DESC92D_RATEMCS7 = 0x13, 219 - DESC92D_RATEMCS8 = 0x14, 220 - DESC92D_RATEMCS9 = 0x15, 221 - DESC92D_RATEMCS10 = 0x16, 222 - DESC92D_RATEMCS11 = 0x17, 223 - DESC92D_RATEMCS12 = 0x18, 224 - DESC92D_RATEMCS13 = 0x19, 225 - DESC92D_RATEMCS14 = 0x1a, 226 - DESC92D_RATEMCS15 = 0x1b, 227 - DESC92D_RATEMCS15_SG = 0x1c, 228 - DESC92D_RATEMCS32 = 0x20, 229 - }; 230 - 231 196 enum channel_plan { 232 197 CHPL_FCC = 0, 233 198 CHPL_IC = 1,
+14 -14
drivers/net/wireless/rtlwifi/rtl8192de/sw.c
··· 340 340 .maps[RTL_IMR_ROK] = IMR_ROK, 341 341 .maps[RTL_IBSS_INT_MASKS] = (IMR_BcnInt | IMR_TBDOK | IMR_TBDER), 342 342 343 - .maps[RTL_RC_CCK_RATE1M] = DESC92D_RATE1M, 344 - .maps[RTL_RC_CCK_RATE2M] = DESC92D_RATE2M, 345 - .maps[RTL_RC_CCK_RATE5_5M] = DESC92D_RATE5_5M, 346 - .maps[RTL_RC_CCK_RATE11M] = DESC92D_RATE11M, 347 - .maps[RTL_RC_OFDM_RATE6M] = DESC92D_RATE6M, 348 - .maps[RTL_RC_OFDM_RATE9M] = DESC92D_RATE9M, 349 - .maps[RTL_RC_OFDM_RATE12M] = DESC92D_RATE12M, 350 - .maps[RTL_RC_OFDM_RATE18M] = DESC92D_RATE18M, 351 - .maps[RTL_RC_OFDM_RATE24M] = DESC92D_RATE24M, 352 - .maps[RTL_RC_OFDM_RATE36M] = DESC92D_RATE36M, 353 - .maps[RTL_RC_OFDM_RATE48M] = DESC92D_RATE48M, 354 - .maps[RTL_RC_OFDM_RATE54M] = DESC92D_RATE54M, 343 + .maps[RTL_RC_CCK_RATE1M] = DESC92_RATE1M, 344 + .maps[RTL_RC_CCK_RATE2M] = DESC92_RATE2M, 345 + .maps[RTL_RC_CCK_RATE5_5M] = DESC92_RATE5_5M, 346 + .maps[RTL_RC_CCK_RATE11M] = DESC92_RATE11M, 347 + .maps[RTL_RC_OFDM_RATE6M] = DESC92_RATE6M, 348 + .maps[RTL_RC_OFDM_RATE9M] = DESC92_RATE9M, 349 + .maps[RTL_RC_OFDM_RATE12M] = DESC92_RATE12M, 350 + .maps[RTL_RC_OFDM_RATE18M] = DESC92_RATE18M, 351 + .maps[RTL_RC_OFDM_RATE24M] = DESC92_RATE24M, 352 + .maps[RTL_RC_OFDM_RATE36M] = DESC92_RATE36M, 353 + .maps[RTL_RC_OFDM_RATE48M] = DESC92_RATE48M, 354 + .maps[RTL_RC_OFDM_RATE54M] = DESC92_RATE54M, 355 355 356 - .maps[RTL_RC_HT_RATEMCS7] = DESC92D_RATEMCS7, 357 - .maps[RTL_RC_HT_RATEMCS15] = DESC92D_RATEMCS15, 356 + .maps[RTL_RC_HT_RATEMCS7] = DESC92_RATEMCS7, 357 + .maps[RTL_RC_HT_RATEMCS15] = DESC92_RATEMCS15, 358 358 }; 359 359 360 360 static struct pci_device_id rtl92de_pci_ids[] __devinitdata = {
+14 -107
drivers/net/wireless/rtlwifi/rtl8192de/trx.c
··· 48 48 return skb->priority; 49 49 } 50 50 51 - static int _rtl92de_rate_mapping(bool isht, u8 desc_rate) 52 - { 53 - int rate_idx; 54 - 55 - if (false == isht) { 56 - switch (desc_rate) { 57 - case DESC92D_RATE1M: 58 - rate_idx = 0; 59 - break; 60 - case DESC92D_RATE2M: 61 - rate_idx = 1; 62 - break; 63 - case DESC92D_RATE5_5M: 64 - rate_idx = 2; 65 - break; 66 - case DESC92D_RATE11M: 67 - rate_idx = 3; 68 - break; 69 - case DESC92D_RATE6M: 70 - rate_idx = 4; 71 - break; 72 - case DESC92D_RATE9M: 73 - rate_idx = 5; 74 - break; 75 - case DESC92D_RATE12M: 76 - rate_idx = 6; 77 - break; 78 - case DESC92D_RATE18M: 79 - rate_idx = 7; 80 - break; 81 - case DESC92D_RATE24M: 82 - rate_idx = 8; 83 - break; 84 - case DESC92D_RATE36M: 85 - rate_idx = 9; 86 - break; 87 - case DESC92D_RATE48M: 88 - rate_idx = 10; 89 - break; 90 - case DESC92D_RATE54M: 91 - rate_idx = 11; 92 - break; 93 - default: 94 - rate_idx = 0; 95 - break; 96 - } 97 - return rate_idx; 98 - } else { 99 - switch (desc_rate) { 100 - case DESC92D_RATE1M: 101 - rate_idx = 0; 102 - break; 103 - case DESC92D_RATE2M: 104 - rate_idx = 1; 105 - break; 106 - case DESC92D_RATE5_5M: 107 - rate_idx = 2; 108 - break; 109 - case DESC92D_RATE11M: 110 - rate_idx = 3; 111 - break; 112 - case DESC92D_RATE6M: 113 - rate_idx = 4; 114 - break; 115 - case DESC92D_RATE9M: 116 - rate_idx = 5; 117 - break; 118 - case DESC92D_RATE12M: 119 - rate_idx = 6; 120 - break; 121 - case DESC92D_RATE18M: 122 - rate_idx = 7; 123 - break; 124 - case DESC92D_RATE24M: 125 - rate_idx = 8; 126 - break; 127 - case DESC92D_RATE36M: 128 - rate_idx = 9; 129 - break; 130 - case DESC92D_RATE48M: 131 - rate_idx = 10; 132 - break; 133 - case DESC92D_RATE54M: 134 - rate_idx = 11; 135 - break; 136 - default: 137 - rate_idx = 11; 138 - break; 139 - } 140 - return rate_idx; 141 - } 142 - } 143 - 144 51 static u8 _rtl92d_query_rxpwrpercentage(char antpower) 145 52 { 146 53 if ((antpower <= -100) || (antpower >= 20)) ··· 235 328 pstats->rx_pwdb_all = pwdb_all; 236 329 pstats->rxpower = rx_pwr_all; 237 330 pstats->recvsignalpower = rx_pwr_all; 238 - if (pdesc->rxht && pdesc->rxmcs >= DESC92D_RATEMCS8 && 239 - pdesc->rxmcs <= DESC92D_RATEMCS15) 331 + if (pdesc->rxht && pdesc->rxmcs >= DESC92_RATEMCS8 && 332 + pdesc->rxmcs <= DESC92_RATEMCS15) 240 333 max_spatial_stream = 2; 241 334 else 242 335 max_spatial_stream = 1; ··· 516 609 rx_status->flag |= RX_FLAG_MACTIME_MPDU; 517 610 if (stats->decrypted) 518 611 rx_status->flag |= RX_FLAG_DECRYPTED; 519 - rx_status->rate_idx = _rtl92de_rate_mapping((bool) 520 - GET_RX_DESC_RXHT(pdesc), 521 - (u8) 522 - GET_RX_DESC_RXMCS(pdesc)); 612 + rx_status->rate_idx = rtlwifi_rate_mapping(hw, 613 + (bool)GET_RX_DESC_RXHT(pdesc), 614 + (u8)GET_RX_DESC_RXMCS(pdesc), 615 + (bool)GET_RX_DESC_PAGGR(pdesc)); 523 616 rx_status->mactime = GET_RX_DESC_TSFL(pdesc); 524 617 if (phystatus) { 525 618 p_drvinfo = (struct rx_fwinfo_92d *)(skb->data + ··· 612 705 } 613 706 /* 5G have no CCK rate */ 614 707 if (rtlhal->current_bandtype == BAND_ON_5G) 615 - if (ptcb_desc->hw_rate < DESC92D_RATE6M) 616 - ptcb_desc->hw_rate = DESC92D_RATE6M; 708 + if (ptcb_desc->hw_rate < DESC92_RATE6M) 709 + ptcb_desc->hw_rate = DESC92_RATE6M; 617 710 SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate); 618 711 if (ptcb_desc->use_shortgi || ptcb_desc->use_shortpreamble) 619 712 SET_TX_DESC_DATA_SHORTGI(pdesc, 1); 620 713 621 714 if (rtlhal->macphymode == DUALMAC_DUALPHY && 622 - ptcb_desc->hw_rate == DESC92D_RATEMCS7) 715 + ptcb_desc->hw_rate == DESC92_RATEMCS7) 623 716 SET_TX_DESC_DATA_SHORTGI(pdesc, 1); 624 717 625 718 if (info->flags & IEEE80211_TX_CTL_AMPDU) { ··· 635 728 SET_TX_DESC_RTS_STBC(pdesc, ((ptcb_desc->rts_stbc) ? 1 : 0)); 636 729 /* 5G have no CCK rate */ 637 730 if (rtlhal->current_bandtype == BAND_ON_5G) 638 - if (ptcb_desc->rts_rate < DESC92D_RATE6M) 639 - ptcb_desc->rts_rate = DESC92D_RATE6M; 731 + if (ptcb_desc->rts_rate < DESC92_RATE6M) 732 + ptcb_desc->rts_rate = DESC92_RATE6M; 640 733 SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate); 641 734 SET_TX_DESC_RTS_BW(pdesc, 0); 642 735 SET_TX_DESC_RTS_SC(pdesc, ptcb_desc->rts_sc); 643 736 SET_TX_DESC_RTS_SHORT(pdesc, ((ptcb_desc->rts_rate <= 644 - DESC92D_RATE54M) ? 737 + DESC92_RATE54M) ? 645 738 (ptcb_desc->rts_use_shortpreamble ? 1 : 0) : 646 739 (ptcb_desc->rts_use_shortgi ? 1 : 0))); 647 740 if (bw_40) { ··· 751 844 * The braces are needed no matter what checkpatch says 752 845 */ 753 846 if (rtlhal->current_bandtype == BAND_ON_5G) { 754 - SET_TX_DESC_TX_RATE(pdesc, DESC92D_RATE6M); 847 + SET_TX_DESC_TX_RATE(pdesc, DESC92_RATE6M); 755 848 } else { 756 - SET_TX_DESC_TX_RATE(pdesc, DESC92D_RATE1M); 849 + SET_TX_DESC_TX_RATE(pdesc, DESC92_RATE1M); 757 850 } 758 851 SET_TX_DESC_SEQ(pdesc, 0); 759 852 SET_TX_DESC_LINIP(pdesc, 0);
+4 -4
drivers/net/wireless/rtlwifi/rtl8192de/trx.h
··· 538 538 } while (0); 539 539 540 540 #define RX_HAL_IS_CCK_RATE(_pdesc)\ 541 - (_pdesc->rxmcs == DESC92D_RATE1M || \ 542 - _pdesc->rxmcs == DESC92D_RATE2M || \ 543 - _pdesc->rxmcs == DESC92D_RATE5_5M || \ 544 - _pdesc->rxmcs == DESC92D_RATE11M) 541 + (_pdesc->rxmcs == DESC92_RATE1M || \ 542 + _pdesc->rxmcs == DESC92_RATE2M || \ 543 + _pdesc->rxmcs == DESC92_RATE5_5M || \ 544 + _pdesc->rxmcs == DESC92_RATE11M) 545 545 546 546 /* For 92D early mode */ 547 547 #define SET_EARLYMODE_PKTNUM(__paddr, __value) \
+4 -35
drivers/net/wireless/rtlwifi/rtl8192se/def.h
··· 33 33 #define RX_CMD_QUEUE 1 34 34 #define RX_MAX_QUEUE 2 35 35 36 - #define DESC92S_RATE1M 0x00 37 - #define DESC92S_RATE2M 0x01 38 - #define DESC92S_RATE5_5M 0x02 39 - #define DESC92S_RATE11M 0x03 40 - #define DESC92S_RATE6M 0x04 41 - #define DESC92S_RATE9M 0x05 42 - #define DESC92S_RATE12M 0x06 43 - #define DESC92S_RATE18M 0x07 44 - #define DESC92S_RATE24M 0x08 45 - #define DESC92S_RATE36M 0x09 46 - #define DESC92S_RATE48M 0x0a 47 - #define DESC92S_RATE54M 0x0b 48 - #define DESC92S_RATEMCS0 0x0c 49 - #define DESC92S_RATEMCS1 0x0d 50 - #define DESC92S_RATEMCS2 0x0e 51 - #define DESC92S_RATEMCS3 0x0f 52 - #define DESC92S_RATEMCS4 0x10 53 - #define DESC92S_RATEMCS5 0x11 54 - #define DESC92S_RATEMCS6 0x12 55 - #define DESC92S_RATEMCS7 0x13 56 - #define DESC92S_RATEMCS8 0x14 57 - #define DESC92S_RATEMCS9 0x15 58 - #define DESC92S_RATEMCS10 0x16 59 - #define DESC92S_RATEMCS11 0x17 60 - #define DESC92S_RATEMCS12 0x18 61 - #define DESC92S_RATEMCS13 0x19 62 - #define DESC92S_RATEMCS14 0x1a 63 - #define DESC92S_RATEMCS15 0x1b 64 - #define DESC92S_RATEMCS15_SG 0x1c 65 - #define DESC92S_RATEMCS32 0x20 66 - 67 36 #define SHORT_SLOT_TIME 9 68 37 #define NON_SHORT_SLOT_TIME 20 69 38 ··· 460 491 SET_BITS_OFFSET_LE(__pdesc + 24, 0, 32, __val) 461 492 462 493 #define RX_HAL_IS_CCK_RATE(_pdesc)\ 463 - (GET_RX_STATUS_DESC_RX_MCS(_pdesc) == DESC92S_RATE1M || \ 464 - GET_RX_STATUS_DESC_RX_MCS(_pdesc) == DESC92S_RATE2M || \ 465 - GET_RX_STATUS_DESC_RX_MCS(_pdesc) == DESC92S_RATE5_5M ||\ 466 - GET_RX_STATUS_DESC_RX_MCS(_pdesc) == DESC92S_RATE11M) 494 + (GET_RX_STATUS_DESC_RX_MCS(_pdesc) == DESC92_RATE1M || \ 495 + GET_RX_STATUS_DESC_RX_MCS(_pdesc) == DESC92_RATE2M || \ 496 + GET_RX_STATUS_DESC_RX_MCS(_pdesc) == DESC92_RATE5_5M ||\ 497 + GET_RX_STATUS_DESC_RX_MCS(_pdesc) == DESC92_RATE11M) 467 498 468 499 enum rf_optype { 469 500 RF_OP_BY_SW_3WIRE = 0,
+14 -14
drivers/net/wireless/rtlwifi/rtl8192se/sw.c
··· 348 348 .maps[RTL_IMR_ROK] = IMR_ROK, 349 349 .maps[RTL_IBSS_INT_MASKS] = (IMR_BCNINT | IMR_TBDOK | IMR_TBDER), 350 350 351 - .maps[RTL_RC_CCK_RATE1M] = DESC92S_RATE1M, 352 - .maps[RTL_RC_CCK_RATE2M] = DESC92S_RATE2M, 353 - .maps[RTL_RC_CCK_RATE5_5M] = DESC92S_RATE5_5M, 354 - .maps[RTL_RC_CCK_RATE11M] = DESC92S_RATE11M, 355 - .maps[RTL_RC_OFDM_RATE6M] = DESC92S_RATE6M, 356 - .maps[RTL_RC_OFDM_RATE9M] = DESC92S_RATE9M, 357 - .maps[RTL_RC_OFDM_RATE12M] = DESC92S_RATE12M, 358 - .maps[RTL_RC_OFDM_RATE18M] = DESC92S_RATE18M, 359 - .maps[RTL_RC_OFDM_RATE24M] = DESC92S_RATE24M, 360 - .maps[RTL_RC_OFDM_RATE36M] = DESC92S_RATE36M, 361 - .maps[RTL_RC_OFDM_RATE48M] = DESC92S_RATE48M, 362 - .maps[RTL_RC_OFDM_RATE54M] = DESC92S_RATE54M, 351 + .maps[RTL_RC_CCK_RATE1M] = DESC92_RATE1M, 352 + .maps[RTL_RC_CCK_RATE2M] = DESC92_RATE2M, 353 + .maps[RTL_RC_CCK_RATE5_5M] = DESC92_RATE5_5M, 354 + .maps[RTL_RC_CCK_RATE11M] = DESC92_RATE11M, 355 + .maps[RTL_RC_OFDM_RATE6M] = DESC92_RATE6M, 356 + .maps[RTL_RC_OFDM_RATE9M] = DESC92_RATE9M, 357 + .maps[RTL_RC_OFDM_RATE12M] = DESC92_RATE12M, 358 + .maps[RTL_RC_OFDM_RATE18M] = DESC92_RATE18M, 359 + .maps[RTL_RC_OFDM_RATE24M] = DESC92_RATE24M, 360 + .maps[RTL_RC_OFDM_RATE36M] = DESC92_RATE36M, 361 + .maps[RTL_RC_OFDM_RATE48M] = DESC92_RATE48M, 362 + .maps[RTL_RC_OFDM_RATE54M] = DESC92_RATE54M, 363 363 364 - .maps[RTL_RC_HT_RATEMCS7] = DESC92S_RATEMCS7, 365 - .maps[RTL_RC_HT_RATEMCS15] = DESC92S_RATEMCS15, 364 + .maps[RTL_RC_HT_RATEMCS7] = DESC92_RATEMCS7, 365 + .maps[RTL_RC_HT_RATEMCS15] = DESC92_RATEMCS15, 366 366 }; 367 367 368 368 static struct pci_device_id rtl92se_pci_ids[] __devinitdata = {
+13 -111
drivers/net/wireless/rtlwifi/rtl8192se/trx.c
··· 51 51 return skb->priority; 52 52 } 53 53 54 - static int _rtl92se_rate_mapping(bool isht, u8 desc_rate, bool first_ampdu) 55 - { 56 - int rate_idx = 0; 57 - 58 - if (first_ampdu) { 59 - if (false == isht) { 60 - switch (desc_rate) { 61 - case DESC92S_RATE1M: 62 - rate_idx = 0; 63 - break; 64 - case DESC92S_RATE2M: 65 - rate_idx = 1; 66 - break; 67 - case DESC92S_RATE5_5M: 68 - rate_idx = 2; 69 - break; 70 - case DESC92S_RATE11M: 71 - rate_idx = 3; 72 - break; 73 - case DESC92S_RATE6M: 74 - rate_idx = 4; 75 - break; 76 - case DESC92S_RATE9M: 77 - rate_idx = 5; 78 - break; 79 - case DESC92S_RATE12M: 80 - rate_idx = 6; 81 - break; 82 - case DESC92S_RATE18M: 83 - rate_idx = 7; 84 - break; 85 - case DESC92S_RATE24M: 86 - rate_idx = 8; 87 - break; 88 - case DESC92S_RATE36M: 89 - rate_idx = 9; 90 - break; 91 - case DESC92S_RATE48M: 92 - rate_idx = 10; 93 - break; 94 - case DESC92S_RATE54M: 95 - rate_idx = 11; 96 - break; 97 - default: 98 - rate_idx = 0; 99 - break; 100 - } 101 - } else { 102 - rate_idx = 11; 103 - } 104 - 105 - return rate_idx; 106 - } 107 - 108 - switch (desc_rate) { 109 - case DESC92S_RATE1M: 110 - rate_idx = 0; 111 - break; 112 - case DESC92S_RATE2M: 113 - rate_idx = 1; 114 - break; 115 - case DESC92S_RATE5_5M: 116 - rate_idx = 2; 117 - break; 118 - case DESC92S_RATE11M: 119 - rate_idx = 3; 120 - break; 121 - case DESC92S_RATE6M: 122 - rate_idx = 4; 123 - break; 124 - case DESC92S_RATE9M: 125 - rate_idx = 5; 126 - break; 127 - case DESC92S_RATE12M: 128 - rate_idx = 6; 129 - break; 130 - case DESC92S_RATE18M: 131 - rate_idx = 7; 132 - break; 133 - case DESC92S_RATE24M: 134 - rate_idx = 8; 135 - break; 136 - case DESC92S_RATE36M: 137 - rate_idx = 9; 138 - break; 139 - case DESC92S_RATE48M: 140 - rate_idx = 10; 141 - break; 142 - case DESC92S_RATE54M: 143 - rate_idx = 11; 144 - break; 145 - default: 146 - rate_idx = 11; 147 - break; 148 - } 149 - return rate_idx; 150 - } 151 - 152 54 static u8 _rtl92s_query_rxpwrpercentage(char antpower) 153 55 { 154 56 if ((antpower <= -100) || (antpower >= 20)) ··· 247 345 pstats->recvsignalpower = rx_pwr_all; 248 346 249 347 if (GET_RX_STATUS_DESC_RX_HT(pdesc) && 250 - GET_RX_STATUS_DESC_RX_MCS(pdesc) >= DESC92S_RATEMCS8 && 251 - GET_RX_STATUS_DESC_RX_MCS(pdesc) <= DESC92S_RATEMCS15) 348 + GET_RX_STATUS_DESC_RX_MCS(pdesc) >= DESC92_RATEMCS8 && 349 + GET_RX_STATUS_DESC_RX_MCS(pdesc) <= DESC92_RATEMCS15) 252 350 max_spatial_stream = 2; 253 351 else 254 352 max_spatial_stream = 1; ··· 556 654 if (stats->decrypted) 557 655 rx_status->flag |= RX_FLAG_DECRYPTED; 558 656 559 - rx_status->rate_idx = _rtl92se_rate_mapping((bool) 560 - GET_RX_STATUS_DESC_RX_HT(pdesc), 561 - (u8)GET_RX_STATUS_DESC_RX_MCS(pdesc), 562 - (bool)GET_RX_STATUS_DESC_PAGGR(pdesc)); 657 + rx_status->rate_idx = rtlwifi_rate_mapping(hw, 658 + (bool)GET_RX_STATUS_DESC_RX_HT(pdesc), 659 + (u8)GET_RX_STATUS_DESC_RX_MCS(pdesc), 660 + (bool)GET_RX_STATUS_DESC_PAGGR(pdesc)); 563 661 564 662 565 663 rx_status->mactime = GET_RX_STATUS_DESC_TSFL(pdesc); ··· 625 723 SET_TX_DESC_RSVD_MACID(pdesc, reserved_macid); 626 724 627 725 SET_TX_DESC_TXHT(pdesc, ((ptcb_desc->hw_rate >= 628 - DESC92S_RATEMCS0) ? 1 : 0)); 726 + DESC92_RATEMCS0) ? 1 : 0)); 629 727 630 728 if (rtlhal->version == VERSION_8192S_ACUT) { 631 - if (ptcb_desc->hw_rate == DESC92S_RATE1M || 632 - ptcb_desc->hw_rate == DESC92S_RATE2M || 633 - ptcb_desc->hw_rate == DESC92S_RATE5_5M || 634 - ptcb_desc->hw_rate == DESC92S_RATE11M) { 635 - ptcb_desc->hw_rate = DESC92S_RATE12M; 729 + if (ptcb_desc->hw_rate == DESC92_RATE1M || 730 + ptcb_desc->hw_rate == DESC92_RATE2M || 731 + ptcb_desc->hw_rate == DESC92_RATE5_5M || 732 + ptcb_desc->hw_rate == DESC92_RATE11M) { 733 + ptcb_desc->hw_rate = DESC92_RATE12M; 636 734 } 637 735 } 638 736 ··· 661 759 SET_TX_DESC_RTS_BANDWIDTH(pdesc, 0); 662 760 SET_TX_DESC_RTS_SUB_CARRIER(pdesc, ptcb_desc->rts_sc); 663 761 SET_TX_DESC_RTS_SHORT(pdesc, ((ptcb_desc->rts_rate <= 664 - DESC92S_RATE54M) ? 762 + DESC92_RATE54M) ? 665 763 (ptcb_desc->rts_use_shortpreamble ? 1 : 0) 666 764 : (ptcb_desc->rts_use_shortgi ? 1 : 0))); 667 765
+35
drivers/net/wireless/rtlwifi/wifi.h
··· 386 386 _HAL_STATE_START = 1, 387 387 }; 388 388 389 + enum rtl_desc92_rate { 390 + DESC92_RATE1M = 0x00, 391 + DESC92_RATE2M = 0x01, 392 + DESC92_RATE5_5M = 0x02, 393 + DESC92_RATE11M = 0x03, 394 + 395 + DESC92_RATE6M = 0x04, 396 + DESC92_RATE9M = 0x05, 397 + DESC92_RATE12M = 0x06, 398 + DESC92_RATE18M = 0x07, 399 + DESC92_RATE24M = 0x08, 400 + DESC92_RATE36M = 0x09, 401 + DESC92_RATE48M = 0x0a, 402 + DESC92_RATE54M = 0x0b, 403 + 404 + DESC92_RATEMCS0 = 0x0c, 405 + DESC92_RATEMCS1 = 0x0d, 406 + DESC92_RATEMCS2 = 0x0e, 407 + DESC92_RATEMCS3 = 0x0f, 408 + DESC92_RATEMCS4 = 0x10, 409 + DESC92_RATEMCS5 = 0x11, 410 + DESC92_RATEMCS6 = 0x12, 411 + DESC92_RATEMCS7 = 0x13, 412 + DESC92_RATEMCS8 = 0x14, 413 + DESC92_RATEMCS9 = 0x15, 414 + DESC92_RATEMCS10 = 0x16, 415 + DESC92_RATEMCS11 = 0x17, 416 + DESC92_RATEMCS12 = 0x18, 417 + DESC92_RATEMCS13 = 0x19, 418 + DESC92_RATEMCS14 = 0x1a, 419 + DESC92_RATEMCS15 = 0x1b, 420 + DESC92_RATEMCS15_SG = 0x1c, 421 + DESC92_RATEMCS32 = 0x20, 422 + }; 423 + 389 424 enum rtl_var_map { 390 425 /*reg map */ 391 426 SYS_ISO_CTRL = 0,
+3 -14
drivers/nfc/pn533.c
··· 1246 1246 { 1247 1247 int payload_len = skb->len; 1248 1248 struct pn533_frame *out_frame; 1249 - struct sk_buff *discarded; 1250 1249 u8 tg; 1251 1250 1252 1251 nfc_dev_dbg(&dev->interface->dev, "%s - Sending %d bytes", __func__, ··· 1257 1258 " max allowed: %d", 1258 1259 PN533_CMD_DATAEXCH_DATA_MAXLEN); 1259 1260 return -ENOSYS; 1260 - } 1261 - 1262 - /* Reserving header space */ 1263 - if (skb_cow_head(skb, PN533_CMD_DATAEXCH_HEAD_LEN)) { 1264 - nfc_dev_err(&dev->interface->dev, "Error to add header data"); 1265 - return -ENOMEM; 1266 - } 1267 - 1268 - /* Reserving tail space, see pn533_tx_frame_finish */ 1269 - if (skb_cow_data(skb, PN533_FRAME_TAIL_SIZE, &discarded) < 0) { 1270 - nfc_dev_err(&dev->interface->dev, "Error to add tail data"); 1271 - return -ENOMEM; 1272 1261 } 1273 1262 1274 1263 skb_push(skb, PN533_CMD_DATAEXCH_HEAD_LEN); ··· 1523 1536 | NFC_PROTO_ISO14443_MASK 1524 1537 | NFC_PROTO_NFC_DEP_MASK; 1525 1538 1526 - dev->nfc_dev = nfc_allocate_device(&pn533_nfc_ops, protocols); 1539 + dev->nfc_dev = nfc_allocate_device(&pn533_nfc_ops, protocols, 1540 + PN533_CMD_DATAEXCH_HEAD_LEN, 1541 + PN533_FRAME_TAIL_SIZE); 1527 1542 if (!dev->nfc_dev) 1528 1543 goto kill_tasklet; 1529 1544
+21 -3
drivers/ssb/main.c
··· 1260 1260 } 1261 1261 EXPORT_SYMBOL(ssb_device_disable); 1262 1262 1263 + /* Some chipsets need routing known for PCIe and 64-bit DMA */ 1264 + static bool ssb_dma_translation_special_bit(struct ssb_device *dev) 1265 + { 1266 + u16 chip_id = dev->bus->chip_id; 1267 + 1268 + if (dev->id.coreid == SSB_DEV_80211) { 1269 + return (chip_id == 0x4322 || chip_id == 43221 || 1270 + chip_id == 43231 || chip_id == 43222); 1271 + } 1272 + 1273 + return 0; 1274 + } 1275 + 1263 1276 u32 ssb_dma_translation(struct ssb_device *dev) 1264 1277 { 1265 1278 switch (dev->bus->bustype) { 1266 1279 case SSB_BUSTYPE_SSB: 1267 1280 return 0; 1268 1281 case SSB_BUSTYPE_PCI: 1269 - if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64) 1282 + if (pci_is_pcie(dev->bus->host_pci) && 1283 + ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64) { 1270 1284 return SSB_PCIE_DMA_H32; 1271 - else 1272 - return SSB_PCI_DMA; 1285 + } else { 1286 + if (ssb_dma_translation_special_bit(dev)) 1287 + return SSB_PCIE_DMA_H32; 1288 + else 1289 + return SSB_PCI_DMA; 1290 + } 1273 1291 default: 1274 1292 __ssb_dma_not_implemented(dev); 1275 1293 }
+18
include/linux/bcma/bcma_driver_chipcommon.h
··· 283 283 #define BCMA_CC_PPL_PCHI_OFF 5 284 284 #define BCMA_CC_PPL_PCHI_MASK 0x0000003f 285 285 286 + /* BCM4331 ChipControl numbers. */ 287 + #define BCMA_CHIPCTL_4331_BT_COEXIST BIT(0) /* 0 disable */ 288 + #define BCMA_CHIPCTL_4331_SECI BIT(1) /* 0 SECI is disabled (JATG functional) */ 289 + #define BCMA_CHIPCTL_4331_EXT_LNA BIT(2) /* 0 disable */ 290 + #define BCMA_CHIPCTL_4331_SPROM_GPIO13_15 BIT(3) /* sprom/gpio13-15 mux */ 291 + #define BCMA_CHIPCTL_4331_EXTPA_EN BIT(4) /* 0 ext pa disable, 1 ext pa enabled */ 292 + #define BCMA_CHIPCTL_4331_GPIOCLK_ON_SPROMCS BIT(5) /* set drive out GPIO_CLK on sprom_cs pin */ 293 + #define BCMA_CHIPCTL_4331_PCIE_MDIO_ON_SPROMCS BIT(6) /* use sprom_cs pin as PCIE mdio interface */ 294 + #define BCMA_CHIPCTL_4331_EXTPA_ON_GPIO2_5 BIT(7) /* aband extpa will be at gpio2/5 and sprom_dout */ 295 + #define BCMA_CHIPCTL_4331_OVR_PIPEAUXCLKEN BIT(8) /* override core control on pipe_AuxClkEnable */ 296 + #define BCMA_CHIPCTL_4331_OVR_PIPEAUXPWRDOWN BIT(9) /* override core control on pipe_AuxPowerDown */ 297 + #define BCMA_CHIPCTL_4331_PCIE_AUXCLKEN BIT(10) /* pcie_auxclkenable */ 298 + #define BCMA_CHIPCTL_4331_PCIE_PIPE_PLLDOWN BIT(11) /* pcie_pipe_pllpowerdown */ 299 + #define BCMA_CHIPCTL_4331_BT_SHD0_ON_GPIO4 BIT(16) /* enable bt_shd0 at gpio4 */ 300 + #define BCMA_CHIPCTL_4331_BT_SHD1_ON_GPIO5 BIT(17) /* enable bt_shd1 at gpio5 */ 301 + 286 302 /* Data for the PMU, if available. 287 303 * Check availability with ((struct bcma_chipcommon)->capabilities & BCMA_CC_CAP_PMU) 288 304 */ ··· 357 341 358 342 extern void bcma_chipco_suspend(struct bcma_drv_cc *cc); 359 343 extern void bcma_chipco_resume(struct bcma_drv_cc *cc); 344 + 345 + void bcma_chipco_bcm4331_ext_pa_lines_ctl(struct bcma_drv_cc *cc, bool enable); 360 346 361 347 extern void bcma_chipco_watchdog_timer_set(struct bcma_drv_cc *cc, 362 348 u32 ticks);
+37 -22
include/linux/ieee80211.h
··· 629 629 u8 rann_ttl; 630 630 u8 rann_addr[6]; 631 631 u32 rann_seq; 632 + u32 rann_interval; 632 633 u32 rann_metric; 633 634 } __attribute__ ((packed)); 635 + 636 + enum ieee80211_rann_flags { 637 + RANN_FLAG_IS_GATE = 1 << 0, 638 + }; 634 639 635 640 #define WLAN_SA_QUERY_TR_ID_LEN 2 636 641 ··· 741 736 __le16 params; 742 737 __le16 reason_code; 743 738 } __attribute__((packed)) delba; 744 - struct{ 739 + struct { 745 740 u8 action_code; 746 - /* capab_info for open and confirm, 747 - * reason for close 748 - */ 749 - __le16 aux; 750 - /* Followed in plink_confirm by status 751 - * code, AID and supported rates, 752 - * and directly by supported rates in 753 - * plink_open and plink_close 754 - */ 755 741 u8 variable[0]; 756 - } __attribute__((packed)) plink_action; 742 + } __attribute__((packed)) self_prot; 757 743 struct{ 758 744 u8 action_code; 759 745 u8 variable[0]; ··· 812 816 } __attribute__((packed)); 813 817 814 818 /* 802.11 BAR control masks */ 815 - #define IEEE80211_BAR_CTRL_ACK_POLICY_NORMAL 0x0000 816 - #define IEEE80211_BAR_CTRL_CBMTID_COMPRESSED_BA 0x0004 817 - 819 + #define IEEE80211_BAR_CTRL_ACK_POLICY_NORMAL 0x0000 820 + #define IEEE80211_BAR_CTRL_MULTI_TID 0x0002 821 + #define IEEE80211_BAR_CTRL_CBMTID_COMPRESSED_BA 0x0004 822 + #define IEEE80211_BAR_CTRL_TID_INFO_MASK 0xf000 823 + #define IEEE80211_BAR_CTRL_TID_INFO_SHIFT 12 818 824 819 825 #define IEEE80211_HT_MCS_MASK_LEN 10 820 826 ··· 1192 1194 WLAN_EID_MESH_ID = 114, 1193 1195 WLAN_EID_LINK_METRIC_REPORT = 115, 1194 1196 WLAN_EID_CONGESTION_NOTIFICATION = 116, 1195 - /* Note that the Peer Link IE has been replaced with the similar 1196 - * Peer Management IE. We will keep the former definition until mesh 1197 - * code is changed to comply with latest 802.11s drafts. 1198 - */ 1199 - WLAN_EID_PEER_LINK = 55, /* no longer in 802.11s drafts */ 1200 1197 WLAN_EID_PEER_MGMT = 117, 1201 1198 WLAN_EID_CHAN_SWITCH_PARAM = 118, 1202 1199 WLAN_EID_MESH_AWAKE_WINDOW = 119, ··· 1274 1281 WLAN_CATEGORY_MULTIHOP_ACTION = 14, 1275 1282 WLAN_CATEGORY_SELF_PROTECTED = 15, 1276 1283 WLAN_CATEGORY_WMM = 17, 1277 - /* TODO: remove MESH_PATH_SEL after mesh is updated 1278 - * to current 802.11s draft */ 1279 - WLAN_CATEGORY_MESH_PATH_SEL = 32, 1280 1284 WLAN_CATEGORY_VENDOR_SPECIFIC_PROTECTED = 126, 1281 1285 WLAN_CATEGORY_VENDOR_SPECIFIC = 127, 1282 1286 }; ··· 1297 1307 WLAN_HT_ACTION_NONCOMPRESSED_BF = 5, 1298 1308 WLAN_HT_ACTION_COMPRESSED_BF = 6, 1299 1309 WLAN_HT_ACTION_ASEL_IDX_FEEDBACK = 7, 1310 + }; 1311 + 1312 + /* Self Protected Action codes */ 1313 + enum ieee80211_self_protected_actioncode { 1314 + WLAN_SP_RESERVED = 0, 1315 + WLAN_SP_MESH_PEERING_OPEN = 1, 1316 + WLAN_SP_MESH_PEERING_CONFIRM = 2, 1317 + WLAN_SP_MESH_PEERING_CLOSE = 3, 1318 + WLAN_SP_MGK_INFORM = 4, 1319 + WLAN_SP_MGK_ACK = 5, 1320 + }; 1321 + 1322 + /* Mesh action codes */ 1323 + enum ieee80211_mesh_actioncode { 1324 + WLAN_MESH_ACTION_LINK_METRIC_REPORT, 1325 + WLAN_MESH_ACTION_HWMP_PATH_SELECTION, 1326 + WLAN_MESH_ACTION_GATE_ANNOUNCEMENT, 1327 + WLAN_MESH_ACTION_CONGESTION_CONTROL_NOTIFICATION, 1328 + WLAN_MESH_ACTION_MCCA_SETUP_REQUEST, 1329 + WLAN_MESH_ACTION_MCCA_SETUP_REPLY, 1330 + WLAN_MESH_ACTION_MCCA_ADVERTISEMENT_REQUEST, 1331 + WLAN_MESH_ACTION_MCCA_ADVERTISEMENT, 1332 + WLAN_MESH_ACTION_MCCA_TEARDOWN, 1333 + WLAN_MESH_ACTION_TBTT_ADJUSTMENT_REQUEST, 1334 + WLAN_MESH_ACTION_TBTT_ADJUSTMENT_RESPONSE, 1300 1335 }; 1301 1336 1302 1337 /* Security key length */
+2
include/linux/nfc.h
··· 123 123 #define NFC_SOCKPROTO_RAW 0 124 124 #define NFC_SOCKPROTO_MAX 1 125 125 126 + #define NFC_HEADER_SIZE 1 127 + 126 128 #endif /*__LINUX_NFC_H */
+32
include/linux/nl80211.h
··· 1042 1042 * (Re)Association Response frames when the driver (or firmware) replies to 1043 1043 * (Re)Association Request frames. 1044 1044 * 1045 + * @NL80211_ATTR_STA_WME: Nested attribute containing the wme configuration 1046 + * of the station, see &enum nl80211_sta_wme_attr. 1047 + * 1045 1048 * @NL80211_ATTR_MAX: highest attribute number currently defined 1046 1049 * @__NL80211_ATTR_AFTER_LAST: internal use 1047 1050 */ ··· 1254 1251 1255 1252 NL80211_ATTR_IE_PROBE_RESP, 1256 1253 NL80211_ATTR_IE_ASSOC_RESP, 1254 + 1255 + NL80211_ATTR_STA_WME, 1257 1256 1258 1257 /* add attributes here, update the policy in nl80211.c */ 1259 1258 ··· 1866 1861 * @NL80211_MESHCONF_ELEMENT_TTL: specifies the value of TTL field set at a 1867 1862 * source mesh point for path selection elements. 1868 1863 * 1864 + * @NL80211_MESHCONF_HWMP_RANN_INTERVAL: The interval of time (in TUs) between 1865 + * root announcements are transmitted. 1866 + * 1867 + * @NL80211_MESHCONF_GATE_ANNOUNCEMENTS: Advertise that this mesh station has 1868 + * access to a broader network beyond the MBSS. This is done via Root 1869 + * Announcement frames. 1870 + * 1869 1871 * @NL80211_MESHCONF_ATTR_MAX: highest possible mesh configuration attribute 1870 1872 * 1871 1873 * @__NL80211_MESHCONF_ATTR_AFTER_LAST: internal use ··· 1894 1882 NL80211_MESHCONF_HWMP_NET_DIAM_TRVS_TIME, 1895 1883 NL80211_MESHCONF_HWMP_ROOTMODE, 1896 1884 NL80211_MESHCONF_ELEMENT_TTL, 1885 + NL80211_MESHCONF_HWMP_RANN_INTERVAL, 1886 + NL80211_MESHCONF_GATE_ANNOUNCEMENTS, 1897 1887 1898 1888 /* keep last */ 1899 1889 __NL80211_MESHCONF_ATTR_AFTER_LAST, ··· 2485 2471 NL80211_HIDDEN_SSID_NOT_IN_USE, 2486 2472 NL80211_HIDDEN_SSID_ZERO_LEN, 2487 2473 NL80211_HIDDEN_SSID_ZERO_CONTENTS 2474 + }; 2475 + 2476 + /** 2477 + * enum nl80211_sta_wme_attr - station WME attributes 2478 + * @__NL80211_STA_WME_INVALID: invalid number for nested attribute 2479 + * @NL80211_STA_WME_QUEUES: bitmap of uapsd queues. 2480 + * @NL80211_STA_WME_MAX_SP: max service period. 2481 + * @__NL80211_STA_WME_AFTER_LAST: internal 2482 + * @NL80211_STA_WME_MAX: highest station WME attribute 2483 + */ 2484 + enum nl80211_sta_wme_attr { 2485 + __NL80211_STA_WME_INVALID, 2486 + NL80211_STA_WME_UAPSD_QUEUES, 2487 + NL80211_STA_WME_MAX_SP, 2488 + 2489 + /* keep last */ 2490 + __NL80211_STA_WME_AFTER_LAST, 2491 + NL80211_STA_WME_MAX = __NL80211_STA_WME_AFTER_LAST - 1 2488 2492 }; 2489 2493 2490 2494 #endif /* __LINUX_NL80211_H */
+10 -2
include/net/cfg80211.h
··· 452 452 u8 plink_action; 453 453 u8 plink_state; 454 454 struct ieee80211_ht_cap *ht_capa; 455 + u8 uapsd_queues; 456 + u8 max_sp; 455 457 }; 456 458 457 459 /** ··· 757 755 u16 dot11MeshHWMPpreqMinInterval; 758 756 u16 dot11MeshHWMPnetDiameterTraversalTime; 759 757 u8 dot11MeshHWMPRootMode; 758 + u16 dot11MeshHWMPRannInterval; 759 + /* This is missnamed in draft 12.0: dot11MeshGateAnnouncementProtocol 760 + * set to true only means that the station will announce others it's a 761 + * mesh gate, but not necessarily using the gate announcement protocol. 762 + * Still keeping the same nomenclature to be in sync with the spec. */ 763 + bool dot11MeshGateAnnouncementProtocol; 760 764 }; 761 765 762 766 /** ··· 2299 2291 struct ieee80211_ht_info *ht_info_elem; 2300 2292 struct ieee80211_meshconf_ie *mesh_config; 2301 2293 u8 *mesh_id; 2302 - u8 *peer_link; 2294 + u8 *peering; 2303 2295 u8 *preq; 2304 2296 u8 *prep; 2305 2297 u8 *perr; ··· 2326 2318 u8 wmm_info_len; 2327 2319 u8 wmm_param_len; 2328 2320 u8 mesh_id_len; 2329 - u8 peer_link_len; 2321 + u8 peering_len; 2330 2322 u8 preq_len; 2331 2323 u8 prep_len; 2332 2324 u8 perr_len;
+2
include/net/mac80211.h
··· 954 954 u16 aid; 955 955 struct ieee80211_sta_ht_cap ht_cap; 956 956 bool wme; 957 + u8 uapsd_queues; 958 + u8 max_sp; 957 959 958 960 /* must be last */ 959 961 u8 drv_priv[0] __attribute__((__aligned__(sizeof(void *))));
+6 -1
include/net/nfc.h
··· 82 82 struct nfc_genl_data genl_data; 83 83 u32 supported_protocols; 84 84 85 + int tx_headroom; 86 + int tx_tailroom; 87 + 85 88 struct nfc_ops *ops; 86 89 }; 87 90 #define to_nfc_dev(_dev) container_of(_dev, struct nfc_dev, dev) ··· 92 89 extern struct class nfc_class; 93 90 94 91 struct nfc_dev *nfc_allocate_device(struct nfc_ops *ops, 95 - u32 supported_protocols); 92 + u32 supported_protocols, 93 + int tx_headroom, 94 + int tx_tailroom); 96 95 97 96 /** 98 97 * nfc_free_device - free nfc device
+12 -4
include/net/regulatory.h
··· 3 3 /* 4 4 * regulatory support structures 5 5 * 6 - * Copyright 2008-2009 Luis R. Rodriguez <lrodriguez@atheros.com> 6 + * Copyright 2008-2009 Luis R. Rodriguez <mcgrof@qca.qualcomm.com> 7 7 * 8 - * This program is free software; you can redistribute it and/or modify 9 - * it under the terms of the GNU General Public License version 2 as 10 - * published by the Free Software Foundation. 8 + * Permission to use, copy, modify, and/or distribute this software for any 9 + * purpose with or without fee is hereby granted, provided that the above 10 + * copyright notice and this permission notice appear in all copies. 11 + * 12 + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 11 19 */ 12 20 13 21
+13
net/mac80211/Kconfig
··· 199 199 200 200 Do not select this option. 201 201 202 + config MAC80211_VERBOSE_MPATH_DEBUG 203 + bool "Verbose mesh path debugging" 204 + depends on MAC80211_DEBUG_MENU 205 + depends on MAC80211_MESH 206 + ---help--- 207 + Selecting this option causes mac80211 to print out very 208 + verbose mesh path selection debugging messages (when mac80211 209 + is taking part in a mesh network). 210 + It should not be selected on production systems as those 211 + messages are remotely triggerable. 212 + 213 + Do not select this option. 214 + 202 215 config MAC80211_VERBOSE_MHWMP_DEBUG 203 216 bool "Verbose mesh HWMP routing debugging" 204 217 depends on MAC80211_DEBUG_MENU
+1 -1
net/mac80211/agg-tx.c
··· 128 128 memcpy(bar->ta, sdata->vif.addr, ETH_ALEN); 129 129 bar_control |= (u16)IEEE80211_BAR_CTRL_ACK_POLICY_NORMAL; 130 130 bar_control |= (u16)IEEE80211_BAR_CTRL_CBMTID_COMPRESSED_BA; 131 - bar_control |= (u16)(tid << 12); 131 + bar_control |= (u16)(tid << IEEE80211_BAR_CTRL_TID_INFO_SHIFT); 132 132 bar->control = cpu_to_le16(bar_control); 133 133 bar->start_seq_num = cpu_to_le16(ssn); 134 134
+19
net/mac80211/cfg.c
··· 697 697 } 698 698 spin_unlock_irqrestore(&sta->flaglock, flags); 699 699 700 + sta->sta.uapsd_queues = params->uapsd_queues; 701 + sta->sta.max_sp = params->max_sp; 702 + 700 703 /* 701 704 * cfg80211 validates this (1-2007) and allows setting the AID 702 705 * only when creating a new station entry ··· 1139 1136 if (_chg_mesh_attr(NL80211_MESHCONF_HWMP_ROOTMODE, mask)) { 1140 1137 conf->dot11MeshHWMPRootMode = nconf->dot11MeshHWMPRootMode; 1141 1138 ieee80211_mesh_root_setup(ifmsh); 1139 + } 1140 + if (_chg_mesh_attr(NL80211_MESHCONF_GATE_ANNOUNCEMENTS, mask)) { 1141 + /* our current gate announcement implementation rides on root 1142 + * announcements, so require this ifmsh to also be a root node 1143 + * */ 1144 + if (nconf->dot11MeshGateAnnouncementProtocol && 1145 + !conf->dot11MeshHWMPRootMode) { 1146 + conf->dot11MeshHWMPRootMode = 1; 1147 + ieee80211_mesh_root_setup(ifmsh); 1148 + } 1149 + conf->dot11MeshGateAnnouncementProtocol = 1150 + nconf->dot11MeshGateAnnouncementProtocol; 1151 + } 1152 + if (_chg_mesh_attr(NL80211_MESHCONF_HWMP_RANN_INTERVAL, mask)) { 1153 + conf->dot11MeshHWMPRannInterval = 1154 + nconf->dot11MeshHWMPRannInterval; 1142 1155 } 1143 1156 return 0; 1144 1157 }
+7 -1
net/mac80211/debugfs_netdev.c
··· 372 372 u.mesh.mshcfg.min_discovery_timeout, DEC); 373 373 IEEE80211_IF_FILE(dot11MeshHWMPRootMode, 374 374 u.mesh.mshcfg.dot11MeshHWMPRootMode, DEC); 375 + IEEE80211_IF_FILE(dot11MeshGateAnnouncementProtocol, 376 + u.mesh.mshcfg.dot11MeshGateAnnouncementProtocol, DEC); 377 + IEEE80211_IF_FILE(dot11MeshHWMPRannInterval, 378 + u.mesh.mshcfg.dot11MeshHWMPRannInterval, DEC); 375 379 #endif 376 380 377 381 ··· 489 485 MESHPARAMS_ADD(dot11MeshHWMPmaxPREQretries); 490 486 MESHPARAMS_ADD(path_refresh_time); 491 487 MESHPARAMS_ADD(min_discovery_timeout); 492 - 488 + MESHPARAMS_ADD(dot11MeshHWMPRootMode); 489 + MESHPARAMS_ADD(dot11MeshHWMPRannInterval); 490 + MESHPARAMS_ADD(dot11MeshGateAnnouncementProtocol); 493 491 #undef MESHPARAMS_ADD 494 492 } 495 493 #endif
+1
net/mac80211/ieee80211_i.h
··· 514 514 struct mesh_config mshcfg; 515 515 u32 mesh_seqnum; 516 516 bool accepting_plinks; 517 + int num_gates; 517 518 const u8 *ie; 518 519 u8 ie_len; 519 520 enum {
+190 -69
net/mac80211/mesh.c
··· 13 13 #include "ieee80211_i.h" 14 14 #include "mesh.h" 15 15 16 - #define IEEE80211_MESH_PEER_INACTIVITY_LIMIT (1800 * HZ) 17 - #define IEEE80211_MESH_HOUSEKEEPING_INTERVAL (60 * HZ) 18 - #define IEEE80211_MESH_RANN_INTERVAL (1 * HZ) 19 - 20 16 #define MESHCONF_CAPAB_ACCEPT_PLINKS 0x01 21 17 #define MESHCONF_CAPAB_FORWARDING 0x08 22 18 ··· 22 26 23 27 int mesh_allocated; 24 28 static struct kmem_cache *rm_cache; 29 + 30 + #ifdef CONFIG_MAC80211_MESH 31 + bool mesh_action_is_path_sel(struct ieee80211_mgmt *mgmt) 32 + { 33 + return (mgmt->u.action.u.mesh_action.action_code == 34 + WLAN_MESH_ACTION_HWMP_PATH_SELECTION); 35 + } 36 + #else 37 + bool mesh_action_is_path_sel(struct ieee80211_mgmt *mgmt) 38 + { return false; } 39 + #endif 25 40 26 41 void ieee80211s_init(void) 27 42 { ··· 211 204 return 0; 212 205 } 213 206 214 - void mesh_mgmt_ies_add(struct sk_buff *skb, struct ieee80211_sub_if_data *sdata) 207 + int 208 + mesh_add_meshconf_ie(struct sk_buff *skb, struct ieee80211_sub_if_data *sdata) 209 + { 210 + struct ieee80211_if_mesh *ifmsh = &sdata->u.mesh; 211 + u8 *pos, neighbors; 212 + u8 meshconf_len = sizeof(struct ieee80211_meshconf_ie); 213 + 214 + if (skb_tailroom(skb) < 2 + meshconf_len) 215 + return -ENOMEM; 216 + 217 + pos = skb_put(skb, 2 + meshconf_len); 218 + *pos++ = WLAN_EID_MESH_CONFIG; 219 + *pos++ = meshconf_len; 220 + 221 + /* Active path selection protocol ID */ 222 + *pos++ = ifmsh->mesh_pp_id; 223 + /* Active path selection metric ID */ 224 + *pos++ = ifmsh->mesh_pm_id; 225 + /* Congestion control mode identifier */ 226 + *pos++ = ifmsh->mesh_cc_id; 227 + /* Synchronization protocol identifier */ 228 + *pos++ = ifmsh->mesh_sp_id; 229 + /* Authentication Protocol identifier */ 230 + *pos++ = ifmsh->mesh_auth_id; 231 + /* Mesh Formation Info - number of neighbors */ 232 + neighbors = atomic_read(&ifmsh->mshstats.estab_plinks); 233 + /* Number of neighbor mesh STAs or 15 whichever is smaller */ 234 + neighbors = (neighbors > 15) ? 15 : neighbors; 235 + *pos++ = neighbors << 1; 236 + /* Mesh capability */ 237 + ifmsh->accepting_plinks = mesh_plink_availables(sdata); 238 + *pos = MESHCONF_CAPAB_FORWARDING; 239 + *pos++ |= ifmsh->accepting_plinks ? 240 + MESHCONF_CAPAB_ACCEPT_PLINKS : 0x00; 241 + *pos++ = 0x00; 242 + 243 + return 0; 244 + } 245 + 246 + int 247 + mesh_add_meshid_ie(struct sk_buff *skb, struct ieee80211_sub_if_data *sdata) 248 + { 249 + struct ieee80211_if_mesh *ifmsh = &sdata->u.mesh; 250 + u8 *pos; 251 + 252 + if (skb_tailroom(skb) < 2 + ifmsh->mesh_id_len) 253 + return -ENOMEM; 254 + 255 + pos = skb_put(skb, 2 + ifmsh->mesh_id_len); 256 + *pos++ = WLAN_EID_MESH_ID; 257 + *pos++ = ifmsh->mesh_id_len; 258 + if (ifmsh->mesh_id_len) 259 + memcpy(pos, ifmsh->mesh_id, ifmsh->mesh_id_len); 260 + 261 + return 0; 262 + } 263 + 264 + int 265 + mesh_add_vendor_ies(struct sk_buff *skb, struct ieee80211_sub_if_data *sdata) 266 + { 267 + struct ieee80211_if_mesh *ifmsh = &sdata->u.mesh; 268 + u8 offset, len; 269 + const u8 *data; 270 + 271 + if (!ifmsh->ie || !ifmsh->ie_len) 272 + return 0; 273 + 274 + /* fast-forward to vendor IEs */ 275 + offset = ieee80211_ie_split_vendor(ifmsh->ie, ifmsh->ie_len, 0); 276 + 277 + if (offset) { 278 + len = ifmsh->ie_len - offset; 279 + data = ifmsh->ie + offset; 280 + if (skb_tailroom(skb) < len) 281 + return -ENOMEM; 282 + memcpy(skb_put(skb, len), data, len); 283 + } 284 + 285 + return 0; 286 + } 287 + 288 + int 289 + mesh_add_rsn_ie(struct sk_buff *skb, struct ieee80211_sub_if_data *sdata) 290 + { 291 + struct ieee80211_if_mesh *ifmsh = &sdata->u.mesh; 292 + u8 len = 0; 293 + const u8 *data; 294 + 295 + if (!ifmsh->ie || !ifmsh->ie_len) 296 + return 0; 297 + 298 + /* find RSN IE */ 299 + data = ifmsh->ie; 300 + while (data < ifmsh->ie + ifmsh->ie_len) { 301 + if (*data == WLAN_EID_RSN) { 302 + len = data[1] + 2; 303 + break; 304 + } 305 + data++; 306 + } 307 + 308 + if (len) { 309 + if (skb_tailroom(skb) < len) 310 + return -ENOMEM; 311 + memcpy(skb_put(skb, len), data, len); 312 + } 313 + 314 + return 0; 315 + } 316 + 317 + int 318 + mesh_add_srates_ie(struct sk_buff *skb, struct ieee80211_sub_if_data *sdata) 215 319 { 216 320 struct ieee80211_local *local = sdata->local; 217 321 struct ieee80211_supported_band *sband; 218 - u8 *pos; 219 - int len, i, rate; 220 - u8 neighbors; 322 + int rate; 323 + u8 i, rates, *pos; 221 324 222 325 sband = local->hw.wiphy->bands[local->hw.conf.channel->band]; 223 - len = sband->n_bitrates; 224 - if (len > 8) 225 - len = 8; 226 - pos = skb_put(skb, len + 2); 326 + rates = sband->n_bitrates; 327 + if (rates > 8) 328 + rates = 8; 329 + 330 + if (skb_tailroom(skb) < rates + 2) 331 + return -ENOMEM; 332 + 333 + pos = skb_put(skb, rates + 2); 227 334 *pos++ = WLAN_EID_SUPP_RATES; 228 - *pos++ = len; 229 - for (i = 0; i < len; i++) { 335 + *pos++ = rates; 336 + for (i = 0; i < rates; i++) { 230 337 rate = sband->bitrates[i].bitrate; 231 338 *pos++ = (u8) (rate / 5); 232 339 } 233 340 234 - if (sband->n_bitrates > len) { 235 - pos = skb_put(skb, sband->n_bitrates - len + 2); 341 + return 0; 342 + } 343 + 344 + int 345 + mesh_add_ext_srates_ie(struct sk_buff *skb, 346 + struct ieee80211_sub_if_data *sdata) 347 + { 348 + struct ieee80211_local *local = sdata->local; 349 + struct ieee80211_supported_band *sband; 350 + int rate; 351 + u8 i, exrates, *pos; 352 + 353 + sband = local->hw.wiphy->bands[local->hw.conf.channel->band]; 354 + exrates = sband->n_bitrates; 355 + if (exrates > 8) 356 + exrates -= 8; 357 + else 358 + exrates = 0; 359 + 360 + if (skb_tailroom(skb) < exrates + 2) 361 + return -ENOMEM; 362 + 363 + if (exrates) { 364 + pos = skb_put(skb, exrates + 2); 236 365 *pos++ = WLAN_EID_EXT_SUPP_RATES; 237 - *pos++ = sband->n_bitrates - len; 238 - for (i = len; i < sband->n_bitrates; i++) { 366 + *pos++ = exrates; 367 + for (i = 8; i < sband->n_bitrates; i++) { 239 368 rate = sband->bitrates[i].bitrate; 240 369 *pos++ = (u8) (rate / 5); 241 370 } 242 371 } 372 + return 0; 373 + } 243 374 375 + int mesh_add_ds_params_ie(struct sk_buff *skb, 376 + struct ieee80211_sub_if_data *sdata) 377 + { 378 + struct ieee80211_local *local = sdata->local; 379 + struct ieee80211_supported_band *sband; 380 + u8 *pos; 381 + 382 + if (skb_tailroom(skb) < 3) 383 + return -ENOMEM; 384 + 385 + sband = local->hw.wiphy->bands[local->hw.conf.channel->band]; 244 386 if (sband->band == IEEE80211_BAND_2GHZ) { 245 387 pos = skb_put(skb, 2 + 1); 246 388 *pos++ = WLAN_EID_DS_PARAMS; ··· 397 241 *pos++ = ieee80211_frequency_to_channel(local->hw.conf.channel->center_freq); 398 242 } 399 243 400 - pos = skb_put(skb, 2 + sdata->u.mesh.mesh_id_len); 401 - *pos++ = WLAN_EID_MESH_ID; 402 - *pos++ = sdata->u.mesh.mesh_id_len; 403 - if (sdata->u.mesh.mesh_id_len) 404 - memcpy(pos, sdata->u.mesh.mesh_id, sdata->u.mesh.mesh_id_len); 405 - 406 - pos = skb_put(skb, 2 + sizeof(struct ieee80211_meshconf_ie)); 407 - *pos++ = WLAN_EID_MESH_CONFIG; 408 - *pos++ = sizeof(struct ieee80211_meshconf_ie); 409 - 410 - /* Active path selection protocol ID */ 411 - *pos++ = sdata->u.mesh.mesh_pp_id; 412 - 413 - /* Active path selection metric ID */ 414 - *pos++ = sdata->u.mesh.mesh_pm_id; 415 - 416 - /* Congestion control mode identifier */ 417 - *pos++ = sdata->u.mesh.mesh_cc_id; 418 - 419 - /* Synchronization protocol identifier */ 420 - *pos++ = sdata->u.mesh.mesh_sp_id; 421 - 422 - /* Authentication Protocol identifier */ 423 - *pos++ = sdata->u.mesh.mesh_auth_id; 424 - 425 - /* Mesh Formation Info - number of neighbors */ 426 - neighbors = atomic_read(&sdata->u.mesh.mshstats.estab_plinks); 427 - /* Number of neighbor mesh STAs or 15 whichever is smaller */ 428 - neighbors = (neighbors > 15) ? 15 : neighbors; 429 - *pos++ = neighbors << 1; 430 - 431 - /* Mesh capability */ 432 - sdata->u.mesh.accepting_plinks = mesh_plink_availables(sdata); 433 - *pos = MESHCONF_CAPAB_FORWARDING; 434 - *pos++ |= sdata->u.mesh.accepting_plinks ? 435 - MESHCONF_CAPAB_ACCEPT_PLINKS : 0x00; 436 - *pos++ = 0x00; 437 - 438 - if (sdata->u.mesh.ie) { 439 - int len = sdata->u.mesh.ie_len; 440 - const u8 *data = sdata->u.mesh.ie; 441 - if (skb_tailroom(skb) > len) 442 - memcpy(skb_put(skb, len), data, len); 443 - } 244 + return 0; 444 245 } 445 - 446 246 447 247 static void ieee80211_mesh_path_timer(unsigned long data) 448 248 { ··· 537 425 538 426 mesh_path_tx_root_frame(sdata); 539 427 mod_timer(&ifmsh->mesh_path_root_timer, 540 - round_jiffies(jiffies + IEEE80211_MESH_RANN_INTERVAL)); 428 + round_jiffies(TU_TO_EXP_TIME( 429 + ifmsh->mshcfg.dot11MeshHWMPRannInterval))); 541 430 } 542 431 543 432 #ifdef CONFIG_PM ··· 546 433 { 547 434 struct ieee80211_if_mesh *ifmsh = &sdata->u.mesh; 548 435 549 - /* use atomic bitops in case both timers fire at the same time */ 436 + /* use atomic bitops in case all timers fire at the same time */ 550 437 551 438 if (del_timer_sync(&ifmsh->housekeeping_timer)) 552 439 set_bit(TMR_RUNNING_HK, &ifmsh->timers_running); ··· 670 557 struct ieee80211_rx_status *rx_status) 671 558 { 672 559 switch (mgmt->u.action.category) { 673 - case WLAN_CATEGORY_MESH_ACTION: 674 - mesh_rx_plink_frame(sdata, mgmt, len, rx_status); 560 + case WLAN_CATEGORY_SELF_PROTECTED: 561 + switch (mgmt->u.action.u.self_prot.action_code) { 562 + case WLAN_SP_MESH_PEERING_OPEN: 563 + case WLAN_SP_MESH_PEERING_CLOSE: 564 + case WLAN_SP_MESH_PEERING_CONFIRM: 565 + mesh_rx_plink_frame(sdata, mgmt, len, rx_status); 566 + break; 567 + } 675 568 break; 676 - case WLAN_CATEGORY_MESH_PATH_SEL: 677 - mesh_rx_path_sel_frame(sdata, mgmt, len); 569 + case WLAN_CATEGORY_MESH_ACTION: 570 + if (mesh_action_is_path_sel(mgmt)) 571 + mesh_rx_path_sel_frame(sdata, mgmt, len); 678 572 break; 679 573 } 680 574 } ··· 753 633 ifmsh->accepting_plinks = true; 754 634 ifmsh->preq_id = 0; 755 635 ifmsh->sn = 0; 636 + ifmsh->num_gates = 0; 756 637 atomic_set(&ifmsh->mpaths, 0); 757 638 mesh_rmc_init(sdata); 758 639 ifmsh->last_preq = jiffies;
+28 -8
net/mac80211/mesh.h
··· 81 81 * @discovery_retries: number of discovery retries 82 82 * @flags: mesh path flags, as specified on &enum mesh_path_flags 83 83 * @state_lock: mesh path state lock 84 + * @is_gate: the destination station of this path is a mesh gate 84 85 * 85 86 * 86 87 * The combination of dst and sdata is unique in the mesh path table. Since the ··· 105 104 u8 discovery_retries; 106 105 enum mesh_path_flags flags; 107 106 spinlock_t state_lock; 107 + bool is_gate; 108 108 }; 109 109 110 110 /** ··· 122 120 * buckets 123 121 * @mean_chain_len: maximum average length for the hash buckets' list, if it is 124 122 * reached, the table will grow 123 + * @known_gates: list of known mesh gates and their mpaths by the station. The 124 + * gate's mpath may or may not be resolved and active. 125 + * 125 126 * rcu_head: RCU head to free the table 126 127 */ 127 128 struct mesh_table { ··· 138 133 int (*copy_node) (struct hlist_node *p, struct mesh_table *newtbl); 139 134 int size_order; 140 135 int mean_chain_len; 136 + struct hlist_head *known_gates; 137 + spinlock_t gates_lock; 141 138 142 139 struct rcu_head rcu_head; 143 140 }; ··· 173 166 u32 idx_mask; 174 167 }; 175 168 169 + #define IEEE80211_MESH_PEER_INACTIVITY_LIMIT (1800 * HZ) 170 + #define IEEE80211_MESH_HOUSEKEEPING_INTERVAL (60 * HZ) 176 171 177 172 #define MESH_DEFAULT_BEACON_INTERVAL 1000 /* in 1024 us units */ 178 173 ··· 185 176 186 177 /* Maximum number of paths per interface */ 187 178 #define MESH_MAX_MPATHS 1024 188 - 189 - /* Pending ANA approval */ 190 - #define MESH_PATH_SEL_ACTION 0 191 - 192 - /* PERR reason codes */ 193 - #define PEER_RCODE_UNSPECIFIED 11 194 - #define PERR_RCODE_NO_ROUTE 12 195 - #define PERR_RCODE_DEST_UNREACH 13 196 179 197 180 /* Public interfaces */ 198 181 /* Various */ ··· 200 199 void mesh_ids_set_default(struct ieee80211_if_mesh *mesh); 201 200 void mesh_mgmt_ies_add(struct sk_buff *skb, 202 201 struct ieee80211_sub_if_data *sdata); 202 + int mesh_add_meshconf_ie(struct sk_buff *skb, 203 + struct ieee80211_sub_if_data *sdata); 204 + int mesh_add_meshid_ie(struct sk_buff *skb, 205 + struct ieee80211_sub_if_data *sdata); 206 + int mesh_add_rsn_ie(struct sk_buff *skb, 207 + struct ieee80211_sub_if_data *sdata); 208 + int mesh_add_vendor_ies(struct sk_buff *skb, 209 + struct ieee80211_sub_if_data *sdata); 210 + int mesh_add_srates_ie(struct sk_buff *skb, 211 + struct ieee80211_sub_if_data *sdata); 212 + int mesh_add_ext_srates_ie(struct sk_buff *skb, 213 + struct ieee80211_sub_if_data *sdata); 214 + int mesh_add_ds_params_ie(struct sk_buff *skb, 215 + struct ieee80211_sub_if_data *sdata); 203 216 void mesh_rmc_free(struct ieee80211_sub_if_data *sdata); 204 217 int mesh_rmc_init(struct ieee80211_sub_if_data *sdata); 205 218 void ieee80211s_init(void); ··· 242 227 void mesh_rx_path_sel_frame(struct ieee80211_sub_if_data *sdata, 243 228 struct ieee80211_mgmt *mgmt, size_t len); 244 229 int mesh_path_add(u8 *dst, struct ieee80211_sub_if_data *sdata); 230 + 231 + int mesh_path_add_gate(struct mesh_path *mpath); 232 + int mesh_path_send_to_gates(struct mesh_path *mpath); 233 + int mesh_gate_num(struct ieee80211_sub_if_data *sdata); 245 234 /* Mesh plinks */ 246 235 void mesh_neighbour_update(u8 *hw_addr, u32 rates, 247 236 struct ieee80211_sub_if_data *sdata, ··· 281 262 void mesh_path_restart(struct ieee80211_sub_if_data *sdata); 282 263 void mesh_path_tx_root_frame(struct ieee80211_sub_if_data *sdata); 283 264 265 + bool mesh_action_is_path_sel(struct ieee80211_mgmt *mgmt); 284 266 extern int mesh_paths_generation; 285 267 286 268 #ifdef CONFIG_MAC80211_MESH
+93 -51
net/mac80211/mesh_hwmp.c
··· 11 11 #include "mesh.h" 12 12 13 13 #ifdef CONFIG_MAC80211_VERBOSE_MHWMP_DEBUG 14 - #define mhwmp_dbg(fmt, args...) printk(KERN_DEBUG "Mesh HWMP: " fmt, ##args) 14 + #define mhwmp_dbg(fmt, args...) \ 15 + printk(KERN_DEBUG "Mesh HWMP (%s): " fmt "\n", sdata->name, ##args) 15 16 #else 16 17 #define mhwmp_dbg(fmt, args...) do { (void)(0); } while (0) 17 18 #endif ··· 69 68 #define PREP_IE_FLAGS(x) PREQ_IE_FLAGS(x) 70 69 #define PREP_IE_HOPCOUNT(x) PREQ_IE_HOPCOUNT(x) 71 70 #define PREP_IE_TTL(x) PREQ_IE_TTL(x) 72 - #define PREP_IE_ORIG_ADDR(x) (x + 3) 73 - #define PREP_IE_ORIG_SN(x) u32_field_get(x, 9, 0) 71 + #define PREP_IE_ORIG_ADDR(x) (AE_F_SET(x) ? x + 27 : x + 21) 72 + #define PREP_IE_ORIG_SN(x) u32_field_get(x, 27, AE_F_SET(x)) 74 73 #define PREP_IE_LIFETIME(x) u32_field_get(x, 13, AE_F_SET(x)) 75 74 #define PREP_IE_METRIC(x) u32_field_get(x, 17, AE_F_SET(x)) 76 - #define PREP_IE_TARGET_ADDR(x) (AE_F_SET(x) ? x + 27 : x + 21) 77 - #define PREP_IE_TARGET_SN(x) u32_field_get(x, 27, AE_F_SET(x)) 75 + #define PREP_IE_TARGET_ADDR(x) (x + 3) 76 + #define PREP_IE_TARGET_SN(x) u32_field_get(x, 9, 0) 78 77 79 78 #define PERR_IE_TTL(x) (*(x)) 80 79 #define PERR_IE_TARGET_FLAGS(x) (*(x + 2)) ··· 133 132 memcpy(mgmt->sa, sdata->vif.addr, ETH_ALEN); 134 133 /* BSSID == SA */ 135 134 memcpy(mgmt->bssid, sdata->vif.addr, ETH_ALEN); 136 - mgmt->u.action.category = WLAN_CATEGORY_MESH_PATH_SEL; 137 - mgmt->u.action.u.mesh_action.action_code = MESH_PATH_SEL_ACTION; 135 + mgmt->u.action.category = WLAN_CATEGORY_MESH_ACTION; 136 + mgmt->u.action.u.mesh_action.action_code = 137 + WLAN_MESH_ACTION_HWMP_PATH_SELECTION; 138 138 139 139 switch (action) { 140 140 case MPATH_PREQ: 141 - mhwmp_dbg("sending PREQ to %pM\n", target); 141 + mhwmp_dbg("sending PREQ to %pM", target); 142 142 ie_len = 37; 143 143 pos = skb_put(skb, 2 + ie_len); 144 144 *pos++ = WLAN_EID_PREQ; 145 145 break; 146 146 case MPATH_PREP: 147 - mhwmp_dbg("sending PREP to %pM\n", target); 147 + mhwmp_dbg("sending PREP to %pM", target); 148 148 ie_len = 31; 149 149 pos = skb_put(skb, 2 + ie_len); 150 150 *pos++ = WLAN_EID_PREP; 151 151 break; 152 152 case MPATH_RANN: 153 - mhwmp_dbg("sending RANN from %pM\n", orig_addr); 153 + mhwmp_dbg("sending RANN from %pM", orig_addr); 154 154 ie_len = sizeof(struct ieee80211_rann_ie); 155 155 pos = skb_put(skb, 2 + ie_len); 156 156 *pos++ = WLAN_EID_RANN; ··· 165 163 *pos++ = flags; 166 164 *pos++ = hop_count; 167 165 *pos++ = ttl; 168 - if (action == MPATH_PREQ) { 169 - memcpy(pos, &preq_id, 4); 170 - pos += 4; 171 - } 172 - memcpy(pos, orig_addr, ETH_ALEN); 173 - pos += ETH_ALEN; 174 - memcpy(pos, &orig_sn, 4); 175 - pos += 4; 176 - if (action != MPATH_RANN) { 177 - memcpy(pos, &lifetime, 4); 178 - pos += 4; 179 - } 180 - memcpy(pos, &metric, 4); 181 - pos += 4; 182 - if (action == MPATH_PREQ) { 183 - /* destination count */ 184 - *pos++ = 1; 185 - *pos++ = target_flags; 186 - } 187 - if (action != MPATH_RANN) { 166 + if (action == MPATH_PREP) { 188 167 memcpy(pos, target, ETH_ALEN); 189 168 pos += ETH_ALEN; 190 169 memcpy(pos, &target_sn, 4); 170 + pos += 4; 171 + } else { 172 + if (action == MPATH_PREQ) { 173 + memcpy(pos, &preq_id, 4); 174 + pos += 4; 175 + } 176 + memcpy(pos, orig_addr, ETH_ALEN); 177 + pos += ETH_ALEN; 178 + memcpy(pos, &orig_sn, 4); 179 + pos += 4; 180 + } 181 + memcpy(pos, &lifetime, 4); /* interval for RANN */ 182 + pos += 4; 183 + memcpy(pos, &metric, 4); 184 + pos += 4; 185 + if (action == MPATH_PREQ) { 186 + *pos++ = 1; /* destination count */ 187 + *pos++ = target_flags; 188 + memcpy(pos, target, ETH_ALEN); 189 + pos += ETH_ALEN; 190 + memcpy(pos, &target_sn, 4); 191 + pos += 4; 192 + } else if (action == MPATH_PREP) { 193 + memcpy(pos, orig_addr, ETH_ALEN); 194 + pos += ETH_ALEN; 195 + memcpy(pos, &orig_sn, 4); 196 + pos += 4; 191 197 } 192 198 193 199 ieee80211_tx_skb(sdata, skb); ··· 234 224 235 225 memcpy(mgmt->da, ra, ETH_ALEN); 236 226 memcpy(mgmt->sa, sdata->vif.addr, ETH_ALEN); 237 - /* BSSID is left zeroed, wildcard value */ 238 - mgmt->u.action.category = WLAN_CATEGORY_MESH_PATH_SEL; 239 - mgmt->u.action.u.mesh_action.action_code = MESH_PATH_SEL_ACTION; 227 + /* BSSID == SA */ 228 + memcpy(mgmt->bssid, sdata->vif.addr, ETH_ALEN); 229 + mgmt->u.action.category = WLAN_CATEGORY_MESH_ACTION; 230 + mgmt->u.action.u.mesh_action.action_code = 231 + WLAN_MESH_ACTION_HWMP_PATH_SELECTION; 240 232 ie_len = 15; 241 233 pos = skb_put(skb, 2 + ie_len); 242 234 *pos++ = WLAN_EID_PERR; ··· 495 483 orig_sn = PREQ_IE_ORIG_SN(preq_elem); 496 484 target_flags = PREQ_IE_TARGET_F(preq_elem); 497 485 498 - mhwmp_dbg("received PREQ from %pM\n", orig_addr); 486 + mhwmp_dbg("received PREQ from %pM", orig_addr); 499 487 500 488 if (memcmp(target_addr, sdata->vif.addr, ETH_ALEN) == 0) { 501 - mhwmp_dbg("PREQ is for us\n"); 489 + mhwmp_dbg("PREQ is for us"); 502 490 forward = false; 503 491 reply = true; 504 492 metric = 0; ··· 534 522 lifetime = PREQ_IE_LIFETIME(preq_elem); 535 523 ttl = ifmsh->mshcfg.element_ttl; 536 524 if (ttl != 0) { 537 - mhwmp_dbg("replying to the PREQ\n"); 525 + mhwmp_dbg("replying to the PREQ"); 538 526 mesh_path_sel_frame_tx(MPATH_PREP, 0, target_addr, 539 527 cpu_to_le32(target_sn), 0, orig_addr, 540 528 cpu_to_le32(orig_sn), mgmt->sa, 0, ttl, ··· 554 542 ifmsh->mshstats.dropped_frames_ttl++; 555 543 return; 556 544 } 557 - mhwmp_dbg("forwarding the PREQ from %pM\n", orig_addr); 545 + mhwmp_dbg("forwarding the PREQ from %pM", orig_addr); 558 546 --ttl; 559 547 flags = PREQ_IE_FLAGS(preq_elem); 560 548 preq_id = PREQ_IE_PREQ_ID(preq_elem); ··· 589 577 u8 next_hop[ETH_ALEN]; 590 578 u32 target_sn, orig_sn, lifetime; 591 579 592 - mhwmp_dbg("received PREP from %pM\n", PREP_IE_ORIG_ADDR(prep_elem)); 580 + mhwmp_dbg("received PREP from %pM", PREP_IE_ORIG_ADDR(prep_elem)); 593 581 594 582 /* Note that we divert from the draft nomenclature and denominate 595 583 * destination to what the draft refers to as origininator. So in this ··· 695 683 u8 ttl, flags, hopcount; 696 684 u8 *orig_addr; 697 685 u32 orig_sn, metric; 686 + u32 interval = ifmsh->mshcfg.dot11MeshHWMPRannInterval; 687 + bool root_is_gate; 698 688 699 689 ttl = rann->rann_ttl; 700 690 if (ttl <= 1) { ··· 705 691 } 706 692 ttl--; 707 693 flags = rann->rann_flags; 694 + root_is_gate = !!(flags & RANN_FLAG_IS_GATE); 708 695 orig_addr = rann->rann_addr; 709 696 orig_sn = rann->rann_seq; 710 697 hopcount = rann->rann_hopcount; 711 698 hopcount++; 712 699 metric = rann->rann_metric; 713 - mhwmp_dbg("received RANN from %pM\n", orig_addr); 700 + 701 + /* Ignore our own RANNs */ 702 + if (memcmp(orig_addr, sdata->vif.addr, ETH_ALEN) == 0) 703 + return; 704 + 705 + mhwmp_dbg("received RANN from %pM (is_gate=%d)", orig_addr, 706 + root_is_gate); 714 707 715 708 rcu_read_lock(); 716 709 mpath = mesh_path_lookup(orig_addr, sdata); ··· 729 708 sdata->u.mesh.mshstats.dropped_frames_no_route++; 730 709 return; 731 710 } 732 - mesh_queue_preq(mpath, 733 - PREQ_Q_F_START | PREQ_Q_F_REFRESH); 734 711 } 712 + 713 + if ((!(mpath->flags & (MESH_PATH_ACTIVE | MESH_PATH_RESOLVING)) || 714 + time_after(jiffies, mpath->exp_time - 1*HZ)) && 715 + !(mpath->flags & MESH_PATH_FIXED)) { 716 + mhwmp_dbg("%s time to refresh root mpath %pM", sdata->name, 717 + orig_addr); 718 + mesh_queue_preq(mpath, PREQ_Q_F_START | PREQ_Q_F_REFRESH); 719 + } 720 + 735 721 if (mpath->sn < orig_sn) { 736 722 mesh_path_sel_frame_tx(MPATH_RANN, flags, orig_addr, 737 723 cpu_to_le32(orig_sn), 738 724 0, NULL, 0, broadcast_addr, 739 - hopcount, ttl, 0, 725 + hopcount, ttl, cpu_to_le32(interval), 740 726 cpu_to_le32(metric + mpath->metric), 741 727 0, sdata); 742 728 mpath->sn = orig_sn; 743 729 } 730 + if (root_is_gate) 731 + mesh_path_add_gate(mpath); 732 + 744 733 rcu_read_unlock(); 745 734 } 746 735 ··· 818 787 819 788 preq_node = kmalloc(sizeof(struct mesh_preq_queue), GFP_ATOMIC); 820 789 if (!preq_node) { 821 - mhwmp_dbg("could not allocate PREQ node\n"); 790 + mhwmp_dbg("could not allocate PREQ node"); 822 791 return; 823 792 } 824 793 ··· 827 796 spin_unlock_bh(&ifmsh->mesh_preq_queue_lock); 828 797 kfree(preq_node); 829 798 if (printk_ratelimit()) 830 - mhwmp_dbg("PREQ node queue full\n"); 799 + mhwmp_dbg("PREQ node queue full"); 831 800 return; 832 801 } 833 802 ··· 1012 981 { 1013 982 struct mesh_path *mpath = (void *) data; 1014 983 struct ieee80211_sub_if_data *sdata = mpath->sdata; 984 + int ret; 1015 985 1016 986 if (sdata->local->quiescing) 1017 987 return; 1018 988 1019 989 spin_lock_bh(&mpath->state_lock); 1020 990 if (mpath->flags & MESH_PATH_RESOLVED || 1021 - (!(mpath->flags & MESH_PATH_RESOLVING))) 991 + (!(mpath->flags & MESH_PATH_RESOLVING))) { 1022 992 mpath->flags &= ~(MESH_PATH_RESOLVING | MESH_PATH_RESOLVED); 1023 - else if (mpath->discovery_retries < max_preq_retries(sdata)) { 993 + spin_unlock_bh(&mpath->state_lock); 994 + } else if (mpath->discovery_retries < max_preq_retries(sdata)) { 1024 995 ++mpath->discovery_retries; 1025 996 mpath->discovery_timeout *= 2; 997 + spin_unlock_bh(&mpath->state_lock); 1026 998 mesh_queue_preq(mpath, 0); 1027 999 } else { 1028 1000 mpath->flags = 0; 1029 1001 mpath->exp_time = jiffies; 1030 - mesh_path_flush_pending(mpath); 1002 + spin_unlock_bh(&mpath->state_lock); 1003 + if (!mpath->is_gate && mesh_gate_num(sdata) > 0) { 1004 + ret = mesh_path_send_to_gates(mpath); 1005 + if (ret) 1006 + mhwmp_dbg("no gate was reachable"); 1007 + } else 1008 + mesh_path_flush_pending(mpath); 1031 1009 } 1032 - 1033 - spin_unlock_bh(&mpath->state_lock); 1034 1010 } 1035 1011 1036 1012 void 1037 1013 mesh_path_tx_root_frame(struct ieee80211_sub_if_data *sdata) 1038 1014 { 1039 1015 struct ieee80211_if_mesh *ifmsh = &sdata->u.mesh; 1016 + u32 interval = ifmsh->mshcfg.dot11MeshHWMPRannInterval; 1017 + u8 flags; 1040 1018 1041 - mesh_path_sel_frame_tx(MPATH_RANN, 0, sdata->vif.addr, 1019 + flags = (ifmsh->mshcfg.dot11MeshGateAnnouncementProtocol) 1020 + ? RANN_FLAG_IS_GATE : 0; 1021 + mesh_path_sel_frame_tx(MPATH_RANN, flags, sdata->vif.addr, 1042 1022 cpu_to_le32(++ifmsh->sn), 1043 1023 0, NULL, 0, broadcast_addr, 1044 1024 0, sdata->u.mesh.mshcfg.element_ttl, 1045 - 0, 0, 0, sdata); 1025 + cpu_to_le32(interval), 0, 0, sdata); 1046 1026 }
+297 -8
net/mac80211/mesh_pathtbl.c
··· 17 17 #include "ieee80211_i.h" 18 18 #include "mesh.h" 19 19 20 + #ifdef CONFIG_MAC80211_VERBOSE_MPATH_DEBUG 21 + #define mpath_dbg(fmt, args...) printk(KERN_DEBUG fmt, ##args) 22 + #else 23 + #define mpath_dbg(fmt, args...) do { (void)(0); } while (0) 24 + #endif 25 + 20 26 /* There will be initially 2^INIT_PATHS_SIZE_ORDER buckets */ 21 27 #define INIT_PATHS_SIZE_ORDER 2 22 28 ··· 65 59 return rcu_dereference_protected(mpp_paths, 66 60 lockdep_is_held(&pathtbl_resize_lock)); 67 61 } 62 + 63 + static int mesh_gate_add(struct mesh_table *tbl, struct mesh_path *mpath); 68 64 69 65 /* 70 66 * CAREFUL -- "tbl" must not be an expression, ··· 111 103 sizeof(newtbl->hash_rnd)); 112 104 for (i = 0; i <= newtbl->hash_mask; i++) 113 105 spin_lock_init(&newtbl->hashwlock[i]); 106 + spin_lock_init(&newtbl->gates_lock); 114 107 115 108 return newtbl; 116 109 } ··· 127 118 { 128 119 struct hlist_head *mesh_hash; 129 120 struct hlist_node *p, *q; 121 + struct mpath_node *gate; 130 122 int i; 131 123 132 124 mesh_hash = tbl->hash_buckets; ··· 139 129 } 140 130 spin_unlock_bh(&tbl->hashwlock[i]); 141 131 } 132 + if (free_leafs) { 133 + spin_lock_bh(&tbl->gates_lock); 134 + hlist_for_each_entry_safe(gate, p, q, 135 + tbl->known_gates, list) { 136 + hlist_del(&gate->list); 137 + kfree(gate); 138 + } 139 + kfree(tbl->known_gates); 140 + spin_unlock_bh(&tbl->gates_lock); 141 + } 142 + 142 143 __mesh_table_free(tbl); 143 144 } 144 145 ··· 167 146 newtbl->free_node = oldtbl->free_node; 168 147 newtbl->mean_chain_len = oldtbl->mean_chain_len; 169 148 newtbl->copy_node = oldtbl->copy_node; 149 + newtbl->known_gates = oldtbl->known_gates; 170 150 atomic_set(&newtbl->entries, atomic_read(&oldtbl->entries)); 171 151 172 152 oldhash = oldtbl->hash_buckets; ··· 225 203 226 204 skb_queue_splice(&tmpq, &mpath->frame_queue); 227 205 spin_unlock_irqrestore(&mpath->frame_queue.lock, flags); 206 + } 207 + 208 + static void prepare_for_gate(struct sk_buff *skb, char *dst_addr, 209 + struct mesh_path *gate_mpath) 210 + { 211 + struct ieee80211_hdr *hdr; 212 + struct ieee80211s_hdr *mshdr; 213 + int mesh_hdrlen, hdrlen; 214 + char *next_hop; 215 + 216 + hdr = (struct ieee80211_hdr *) skb->data; 217 + hdrlen = ieee80211_hdrlen(hdr->frame_control); 218 + mshdr = (struct ieee80211s_hdr *) (skb->data + hdrlen); 219 + 220 + if (!(mshdr->flags & MESH_FLAGS_AE)) { 221 + /* size of the fixed part of the mesh header */ 222 + mesh_hdrlen = 6; 223 + 224 + /* make room for the two extended addresses */ 225 + skb_push(skb, 2 * ETH_ALEN); 226 + memmove(skb->data, hdr, hdrlen + mesh_hdrlen); 227 + 228 + hdr = (struct ieee80211_hdr *) skb->data; 229 + 230 + /* we preserve the previous mesh header and only add 231 + * the new addreses */ 232 + mshdr = (struct ieee80211s_hdr *) (skb->data + hdrlen); 233 + mshdr->flags = MESH_FLAGS_AE_A5_A6; 234 + memcpy(mshdr->eaddr1, hdr->addr3, ETH_ALEN); 235 + memcpy(mshdr->eaddr2, hdr->addr4, ETH_ALEN); 236 + } 237 + 238 + /* update next hop */ 239 + hdr = (struct ieee80211_hdr *) skb->data; 240 + rcu_read_lock(); 241 + next_hop = rcu_dereference(gate_mpath->next_hop)->sta.addr; 242 + memcpy(hdr->addr1, next_hop, ETH_ALEN); 243 + rcu_read_unlock(); 244 + memcpy(hdr->addr3, dst_addr, ETH_ALEN); 245 + } 246 + 247 + /** 248 + * 249 + * mesh_path_move_to_queue - Move or copy frames from one mpath queue to another 250 + * 251 + * This function is used to transfer or copy frames from an unresolved mpath to 252 + * a gate mpath. The function also adds the Address Extension field and 253 + * updates the next hop. 254 + * 255 + * If a frame already has an Address Extension field, only the next hop and 256 + * destination addresses are updated. 257 + * 258 + * The gate mpath must be an active mpath with a valid mpath->next_hop. 259 + * 260 + * @mpath: An active mpath the frames will be sent to (i.e. the gate) 261 + * @from_mpath: The failed mpath 262 + * @copy: When true, copy all the frames to the new mpath queue. When false, 263 + * move them. 264 + */ 265 + static void mesh_path_move_to_queue(struct mesh_path *gate_mpath, 266 + struct mesh_path *from_mpath, 267 + bool copy) 268 + { 269 + struct sk_buff *skb, *cp_skb = NULL; 270 + struct sk_buff_head gateq, failq; 271 + unsigned long flags; 272 + int num_skbs; 273 + 274 + BUG_ON(gate_mpath == from_mpath); 275 + BUG_ON(!gate_mpath->next_hop); 276 + 277 + __skb_queue_head_init(&gateq); 278 + __skb_queue_head_init(&failq); 279 + 280 + spin_lock_irqsave(&from_mpath->frame_queue.lock, flags); 281 + skb_queue_splice_init(&from_mpath->frame_queue, &failq); 282 + spin_unlock_irqrestore(&from_mpath->frame_queue.lock, flags); 283 + 284 + num_skbs = skb_queue_len(&failq); 285 + 286 + while (num_skbs--) { 287 + skb = __skb_dequeue(&failq); 288 + if (copy) 289 + cp_skb = skb_copy(skb, GFP_ATOMIC); 290 + 291 + prepare_for_gate(skb, gate_mpath->dst, gate_mpath); 292 + __skb_queue_tail(&gateq, skb); 293 + 294 + if (copy && cp_skb) 295 + __skb_queue_tail(&failq, cp_skb); 296 + } 297 + 298 + spin_lock_irqsave(&gate_mpath->frame_queue.lock, flags); 299 + skb_queue_splice(&gateq, &gate_mpath->frame_queue); 300 + mpath_dbg("Mpath queue for gate %pM has %d frames\n", 301 + gate_mpath->dst, 302 + skb_queue_len(&gate_mpath->frame_queue)); 303 + spin_unlock_irqrestore(&gate_mpath->frame_queue.lock, flags); 304 + 305 + if (!copy) 306 + return; 307 + 308 + spin_lock_irqsave(&from_mpath->frame_queue.lock, flags); 309 + skb_queue_splice(&failq, &from_mpath->frame_queue); 310 + spin_unlock_irqrestore(&from_mpath->frame_queue.lock, flags); 228 311 } 229 312 230 313 ··· 429 302 } 430 303 431 304 return NULL; 305 + } 306 + 307 + static void mesh_gate_node_reclaim(struct rcu_head *rp) 308 + { 309 + struct mpath_node *node = container_of(rp, struct mpath_node, rcu); 310 + kfree(node); 311 + } 312 + 313 + /** 314 + * mesh_gate_add - mark mpath as path to a mesh gate and add to known_gates 315 + * @mesh_tbl: table which contains known_gates list 316 + * @mpath: mpath to known mesh gate 317 + * 318 + * Returns: 0 on success 319 + * 320 + */ 321 + static int mesh_gate_add(struct mesh_table *tbl, struct mesh_path *mpath) 322 + { 323 + struct mpath_node *gate, *new_gate; 324 + struct hlist_node *n; 325 + int err; 326 + 327 + rcu_read_lock(); 328 + tbl = rcu_dereference(tbl); 329 + 330 + hlist_for_each_entry_rcu(gate, n, tbl->known_gates, list) 331 + if (gate->mpath == mpath) { 332 + err = -EEXIST; 333 + goto err_rcu; 334 + } 335 + 336 + new_gate = kzalloc(sizeof(struct mpath_node), GFP_ATOMIC); 337 + if (!new_gate) { 338 + err = -ENOMEM; 339 + goto err_rcu; 340 + } 341 + 342 + mpath->is_gate = true; 343 + mpath->sdata->u.mesh.num_gates++; 344 + new_gate->mpath = mpath; 345 + spin_lock_bh(&tbl->gates_lock); 346 + hlist_add_head_rcu(&new_gate->list, tbl->known_gates); 347 + spin_unlock_bh(&tbl->gates_lock); 348 + rcu_read_unlock(); 349 + mpath_dbg("Mesh path (%s): Recorded new gate: %pM. %d known gates\n", 350 + mpath->sdata->name, mpath->dst, 351 + mpath->sdata->u.mesh.num_gates); 352 + return 0; 353 + err_rcu: 354 + rcu_read_unlock(); 355 + return err; 356 + } 357 + 358 + /** 359 + * mesh_gate_del - remove a mesh gate from the list of known gates 360 + * @tbl: table which holds our list of known gates 361 + * @mpath: gate mpath 362 + * 363 + * Returns: 0 on success 364 + * 365 + * Locking: must be called inside rcu_read_lock() section 366 + */ 367 + static int mesh_gate_del(struct mesh_table *tbl, struct mesh_path *mpath) 368 + { 369 + struct mpath_node *gate; 370 + struct hlist_node *p, *q; 371 + 372 + tbl = rcu_dereference(tbl); 373 + 374 + hlist_for_each_entry_safe(gate, p, q, tbl->known_gates, list) 375 + if (gate->mpath == mpath) { 376 + spin_lock_bh(&tbl->gates_lock); 377 + hlist_del_rcu(&gate->list); 378 + call_rcu(&gate->rcu, mesh_gate_node_reclaim); 379 + spin_unlock_bh(&tbl->gates_lock); 380 + mpath->sdata->u.mesh.num_gates--; 381 + mpath->is_gate = false; 382 + mpath_dbg("Mesh path (%s): Deleted gate: %pM. " 383 + "%d known gates\n", mpath->sdata->name, 384 + mpath->dst, mpath->sdata->u.mesh.num_gates); 385 + break; 386 + } 387 + 388 + return 0; 389 + } 390 + 391 + /** 392 + * 393 + * mesh_path_add_gate - add the given mpath to a mesh gate to our path table 394 + * @mpath: gate path to add to table 395 + */ 396 + int mesh_path_add_gate(struct mesh_path *mpath) 397 + { 398 + return mesh_gate_add(mesh_paths, mpath); 399 + } 400 + 401 + /** 402 + * mesh_gate_num - number of gates known to this interface 403 + * @sdata: subif data 404 + */ 405 + int mesh_gate_num(struct ieee80211_sub_if_data *sdata) 406 + { 407 + return sdata->u.mesh.num_gates; 432 408 } 433 409 434 410 /** ··· 711 481 new_mpath->flags = 0; 712 482 skb_queue_head_init(&new_mpath->frame_queue); 713 483 new_node->mpath = new_mpath; 484 + init_timer(&new_mpath->timer); 714 485 new_mpath->exp_time = jiffies; 715 486 spin_lock_init(&new_mpath->state_lock); 716 487 ··· 770 539 struct hlist_node *p; 771 540 struct ieee80211_sub_if_data *sdata = sta->sdata; 772 541 int i; 542 + __le16 reason = cpu_to_le16(WLAN_REASON_MESH_PATH_DEST_UNREACHABLE); 773 543 774 544 rcu_read_lock(); 775 545 tbl = rcu_dereference(mesh_paths); ··· 785 553 spin_unlock_bh(&mpath->state_lock); 786 554 mesh_path_error_tx(sdata->u.mesh.mshcfg.element_ttl, 787 555 mpath->dst, cpu_to_le32(mpath->sn), 788 - cpu_to_le16(PERR_RCODE_DEST_UNREACH), 789 - bcast, sdata); 556 + reason, bcast, sdata); 790 557 } else 791 558 spin_unlock_bh(&mpath->state_lock); 792 559 } ··· 878 647 mpath = node->mpath; 879 648 if (mpath->sdata == sdata && 880 649 memcmp(addr, mpath->dst, ETH_ALEN) == 0) { 881 - spin_lock(&mpath->state_lock); 650 + spin_lock_bh(&mpath->state_lock); 651 + if (mpath->is_gate) 652 + mesh_gate_del(tbl, mpath); 882 653 mpath->flags |= MESH_PATH_RESOLVING; 883 654 hlist_del_rcu(&node->list); 884 655 call_rcu(&node->rcu, mesh_path_node_reclaim); 885 656 atomic_dec(&tbl->entries); 886 - spin_unlock(&mpath->state_lock); 657 + spin_unlock_bh(&mpath->state_lock); 887 658 goto enddel; 888 659 } 889 660 } ··· 914 681 } 915 682 916 683 /** 684 + * mesh_path_send_to_gates - sends pending frames to all known mesh gates 685 + * 686 + * @mpath: mesh path whose queue will be emptied 687 + * 688 + * If there is only one gate, the frames are transferred from the failed mpath 689 + * queue to that gate's queue. If there are more than one gates, the frames 690 + * are copied from each gate to the next. After frames are copied, the 691 + * mpath queues are emptied onto the transmission queue. 692 + */ 693 + int mesh_path_send_to_gates(struct mesh_path *mpath) 694 + { 695 + struct ieee80211_sub_if_data *sdata = mpath->sdata; 696 + struct hlist_node *n; 697 + struct mesh_table *tbl; 698 + struct mesh_path *from_mpath = mpath; 699 + struct mpath_node *gate = NULL; 700 + bool copy = false; 701 + struct hlist_head *known_gates; 702 + 703 + rcu_read_lock(); 704 + tbl = rcu_dereference(mesh_paths); 705 + known_gates = tbl->known_gates; 706 + rcu_read_unlock(); 707 + 708 + if (!known_gates) 709 + return -EHOSTUNREACH; 710 + 711 + hlist_for_each_entry_rcu(gate, n, known_gates, list) { 712 + if (gate->mpath->sdata != sdata) 713 + continue; 714 + 715 + if (gate->mpath->flags & MESH_PATH_ACTIVE) { 716 + mpath_dbg("Forwarding to %pM\n", gate->mpath->dst); 717 + mesh_path_move_to_queue(gate->mpath, from_mpath, copy); 718 + from_mpath = gate->mpath; 719 + copy = true; 720 + } else { 721 + mpath_dbg("Not forwarding %p\n", gate->mpath); 722 + mpath_dbg("flags %x\n", gate->mpath->flags); 723 + } 724 + } 725 + 726 + hlist_for_each_entry_rcu(gate, n, known_gates, list) 727 + if (gate->mpath->sdata == sdata) { 728 + mpath_dbg("Sending to %pM\n", gate->mpath->dst); 729 + mesh_path_tx_pending(gate->mpath); 730 + } 731 + 732 + return (from_mpath == mpath) ? -EHOSTUNREACH : 0; 733 + } 734 + 735 + /** 917 736 * mesh_path_discard_frame - discard a frame whose path could not be resolved 918 737 * 919 738 * @skb: frame to discard ··· 984 699 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; 985 700 struct mesh_path *mpath; 986 701 u32 sn = 0; 702 + __le16 reason = cpu_to_le16(WLAN_REASON_MESH_PATH_NOFORWARD); 987 703 988 704 if (memcmp(hdr->addr4, sdata->vif.addr, ETH_ALEN) != 0) { 989 705 u8 *ra, *da; ··· 995 709 if (mpath) 996 710 sn = ++mpath->sn; 997 711 mesh_path_error_tx(sdata->u.mesh.mshcfg.element_ttl, skb->data, 998 - cpu_to_le32(sn), 999 - cpu_to_le16(PERR_RCODE_NO_ROUTE), ra, sdata); 712 + cpu_to_le32(sn), reason, ra, sdata); 1000 713 } 1001 714 1002 715 kfree_skb(skb); ··· 1013 728 { 1014 729 struct sk_buff *skb; 1015 730 1016 - while ((skb = skb_dequeue(&mpath->frame_queue)) && 1017 - (mpath->flags & MESH_PATH_ACTIVE)) 731 + while ((skb = skb_dequeue(&mpath->frame_queue)) != NULL) 1018 732 mesh_path_discard_frame(skb, mpath->sdata); 1019 733 } 1020 734 ··· 1081 797 tbl_path->free_node = &mesh_path_node_free; 1082 798 tbl_path->copy_node = &mesh_path_node_copy; 1083 799 tbl_path->mean_chain_len = MEAN_CHAIN_LEN; 800 + tbl_path->known_gates = kzalloc(sizeof(struct hlist_head), GFP_ATOMIC); 801 + INIT_HLIST_HEAD(tbl_path->known_gates); 802 + 1084 803 1085 804 tbl_mpp = mesh_table_alloc(INIT_PATHS_SIZE_ORDER); 1086 805 if (!tbl_mpp) { ··· 1093 806 tbl_mpp->free_node = &mesh_path_node_free; 1094 807 tbl_mpp->copy_node = &mesh_path_node_copy; 1095 808 tbl_mpp->mean_chain_len = MEAN_CHAIN_LEN; 809 + tbl_mpp->known_gates = kzalloc(sizeof(struct hlist_head), GFP_ATOMIC); 810 + INIT_HLIST_HEAD(tbl_mpp->known_gates); 1096 811 1097 812 /* Need no locking since this is during init */ 1098 813 RCU_INIT_POINTER(mesh_paths, tbl_path);
+124 -117
net/mac80211/mesh_plink.c
··· 19 19 #define mpl_dbg(fmt, args...) do { (void)(0); } while (0) 20 20 #endif 21 21 22 - #define PLINK_GET_LLID(p) (p + 4) 23 - #define PLINK_GET_PLID(p) (p + 6) 22 + #define PLINK_GET_LLID(p) (p + 2) 23 + #define PLINK_GET_PLID(p) (p + 4) 24 24 25 25 #define mod_plink_timer(s, t) (mod_timer(&s->plink_timer, \ 26 26 jiffies + HZ * t / 1000)) 27 - 28 - /* Peer link cancel reasons, all subject to ANA approval */ 29 - #define MESH_LINK_CANCELLED 2 30 - #define MESH_MAX_NEIGHBORS 3 31 - #define MESH_CAPABILITY_POLICY_VIOLATION 4 32 - #define MESH_CLOSE_RCVD 5 33 - #define MESH_MAX_RETRIES 6 34 - #define MESH_CONFIRM_TIMEOUT 7 35 - #define MESH_SECURITY_ROLE_NEGOTIATION_DIFFERS 8 36 - #define MESH_SECURITY_AUTHENTICATION_IMPOSSIBLE 9 37 - #define MESH_SECURITY_FAILED_VERIFICATION 10 38 27 39 28 #define dot11MeshMaxRetries(s) (s->u.mesh.mshcfg.dot11MeshMaxRetries) 40 29 #define dot11MeshRetryTimeout(s) (s->u.mesh.mshcfg.dot11MeshRetryTimeout) 41 30 #define dot11MeshConfirmTimeout(s) (s->u.mesh.mshcfg.dot11MeshConfirmTimeout) 42 31 #define dot11MeshHoldingTimeout(s) (s->u.mesh.mshcfg.dot11MeshHoldingTimeout) 43 32 #define dot11MeshMaxPeerLinks(s) (s->u.mesh.mshcfg.dot11MeshMaxPeerLinks) 44 - 45 - enum plink_frame_type { 46 - PLINK_OPEN = 1, 47 - PLINK_CONFIRM, 48 - PLINK_CLOSE 49 - }; 50 33 51 34 enum plink_event { 52 35 PLINK_UNDEFINED, ··· 140 157 } 141 158 142 159 static int mesh_plink_frame_tx(struct ieee80211_sub_if_data *sdata, 143 - enum plink_frame_type action, u8 *da, __le16 llid, __le16 plid, 144 - __le16 reason) { 160 + enum ieee80211_self_protected_actioncode action, 161 + u8 *da, __le16 llid, __le16 plid, __le16 reason) { 145 162 struct ieee80211_local *local = sdata->local; 146 163 struct sk_buff *skb = dev_alloc_skb(local->hw.extra_tx_headroom + 400 + 147 164 sdata->u.mesh.ie_len); 148 165 struct ieee80211_mgmt *mgmt; 149 166 bool include_plid = false; 150 - static const u8 meshpeeringproto[] = { 0x00, 0x0F, 0xAC, 0x2A }; 167 + int ie_len = 4; 168 + u16 peering_proto = 0; 151 169 u8 *pos; 152 - int ie_len; 153 170 154 171 if (!skb) 155 172 return -1; ··· 158 175 * common action part (1) 159 176 */ 160 177 mgmt = (struct ieee80211_mgmt *) 161 - skb_put(skb, 25 + sizeof(mgmt->u.action.u.plink_action)); 162 - memset(mgmt, 0, 25 + sizeof(mgmt->u.action.u.plink_action)); 178 + skb_put(skb, 25 + sizeof(mgmt->u.action.u.self_prot)); 179 + memset(mgmt, 0, 25 + sizeof(mgmt->u.action.u.self_prot)); 163 180 mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | 164 181 IEEE80211_STYPE_ACTION); 165 182 memcpy(mgmt->da, da, ETH_ALEN); 166 183 memcpy(mgmt->sa, sdata->vif.addr, ETH_ALEN); 167 184 memcpy(mgmt->bssid, sdata->vif.addr, ETH_ALEN); 168 - mgmt->u.action.category = WLAN_CATEGORY_MESH_ACTION; 169 - mgmt->u.action.u.plink_action.action_code = action; 185 + mgmt->u.action.category = WLAN_CATEGORY_SELF_PROTECTED; 186 + mgmt->u.action.u.self_prot.action_code = action; 170 187 171 - if (action == PLINK_CLOSE) 172 - mgmt->u.action.u.plink_action.aux = reason; 173 - else { 174 - mgmt->u.action.u.plink_action.aux = cpu_to_le16(0x0); 175 - if (action == PLINK_CONFIRM) { 176 - pos = skb_put(skb, 4); 177 - /* two-byte status code followed by two-byte AID */ 178 - memset(pos, 0, 2); 188 + if (action != WLAN_SP_MESH_PEERING_CLOSE) { 189 + /* capability info */ 190 + pos = skb_put(skb, 2); 191 + memset(pos, 0, 2); 192 + if (action == WLAN_SP_MESH_PEERING_CONFIRM) { 193 + /* AID */ 194 + pos = skb_put(skb, 2); 179 195 memcpy(pos + 2, &plid, 2); 180 196 } 181 - mesh_mgmt_ies_add(skb, sdata); 197 + if (mesh_add_srates_ie(skb, sdata) || 198 + mesh_add_ext_srates_ie(skb, sdata) || 199 + mesh_add_rsn_ie(skb, sdata) || 200 + mesh_add_meshid_ie(skb, sdata) || 201 + mesh_add_meshconf_ie(skb, sdata)) 202 + return -1; 203 + } else { /* WLAN_SP_MESH_PEERING_CLOSE */ 204 + if (mesh_add_meshid_ie(skb, sdata)) 205 + return -1; 182 206 } 183 207 184 - /* Add Peer Link Management element */ 208 + /* Add Mesh Peering Management element */ 185 209 switch (action) { 186 - case PLINK_OPEN: 187 - ie_len = 6; 210 + case WLAN_SP_MESH_PEERING_OPEN: 188 211 break; 189 - case PLINK_CONFIRM: 190 - ie_len = 8; 212 + case WLAN_SP_MESH_PEERING_CONFIRM: 213 + ie_len += 2; 191 214 include_plid = true; 192 215 break; 193 - case PLINK_CLOSE: 194 - default: 195 - if (!plid) 196 - ie_len = 8; 197 - else { 198 - ie_len = 10; 216 + case WLAN_SP_MESH_PEERING_CLOSE: 217 + if (plid) { 218 + ie_len += 2; 199 219 include_plid = true; 200 220 } 221 + ie_len += 2; /* reason code */ 201 222 break; 223 + default: 224 + return -EINVAL; 202 225 } 203 226 227 + if (WARN_ON(skb_tailroom(skb) < 2 + ie_len)) 228 + return -ENOMEM; 229 + 204 230 pos = skb_put(skb, 2 + ie_len); 205 - *pos++ = WLAN_EID_PEER_LINK; 231 + *pos++ = WLAN_EID_PEER_MGMT; 206 232 *pos++ = ie_len; 207 - memcpy(pos, meshpeeringproto, sizeof(meshpeeringproto)); 208 - pos += 4; 233 + memcpy(pos, &peering_proto, 2); 234 + pos += 2; 209 235 memcpy(pos, &llid, 2); 236 + pos += 2; 210 237 if (include_plid) { 211 - pos += 2; 212 238 memcpy(pos, &plid, 2); 213 - } 214 - if (action == PLINK_CLOSE) { 215 239 pos += 2; 216 - memcpy(pos, &reason, 2); 217 240 } 241 + if (action == WLAN_SP_MESH_PEERING_CLOSE) { 242 + memcpy(pos, &reason, 2); 243 + pos += 2; 244 + } 245 + if (mesh_add_vendor_ies(skb, sdata)) 246 + return -1; 218 247 219 248 ieee80211_tx_skb(sdata, skb); 220 249 return 0; ··· 317 322 ++sta->plink_retries; 318 323 mod_plink_timer(sta, sta->plink_timeout); 319 324 spin_unlock_bh(&sta->lock); 320 - mesh_plink_frame_tx(sdata, PLINK_OPEN, sta->sta.addr, llid, 321 - 0, 0); 325 + mesh_plink_frame_tx(sdata, WLAN_SP_MESH_PEERING_OPEN, 326 + sta->sta.addr, llid, 0, 0); 322 327 break; 323 328 } 324 - reason = cpu_to_le16(MESH_MAX_RETRIES); 329 + reason = cpu_to_le16(WLAN_REASON_MESH_MAX_RETRIES); 325 330 /* fall through on else */ 326 331 case NL80211_PLINK_CNF_RCVD: 327 332 /* confirm timer */ 328 333 if (!reason) 329 - reason = cpu_to_le16(MESH_CONFIRM_TIMEOUT); 334 + reason = cpu_to_le16(WLAN_REASON_MESH_CONFIRM_TIMEOUT); 330 335 sta->plink_state = NL80211_PLINK_HOLDING; 331 336 mod_plink_timer(sta, dot11MeshHoldingTimeout(sdata)); 332 337 spin_unlock_bh(&sta->lock); 333 - mesh_plink_frame_tx(sdata, PLINK_CLOSE, sta->sta.addr, llid, plid, 334 - reason); 338 + mesh_plink_frame_tx(sdata, WLAN_SP_MESH_PEERING_CLOSE, 339 + sta->sta.addr, llid, plid, reason); 335 340 break; 336 341 case NL80211_PLINK_HOLDING: 337 342 /* holding timer */ ··· 391 396 mpl_dbg("Mesh plink: starting establishment with %pM\n", 392 397 sta->sta.addr); 393 398 394 - return mesh_plink_frame_tx(sdata, PLINK_OPEN, 399 + return mesh_plink_frame_tx(sdata, WLAN_SP_MESH_PEERING_OPEN, 395 400 sta->sta.addr, llid, 0, 0); 396 401 } 397 402 ··· 417 422 struct ieee802_11_elems elems; 418 423 struct sta_info *sta; 419 424 enum plink_event event; 420 - enum plink_frame_type ftype; 425 + enum ieee80211_self_protected_actioncode ftype; 421 426 size_t baselen; 422 427 bool deactivated, matches_local = true; 423 428 u8 ie_len; ··· 444 449 return; 445 450 } 446 451 447 - baseaddr = mgmt->u.action.u.plink_action.variable; 448 - baselen = (u8 *) mgmt->u.action.u.plink_action.variable - (u8 *) mgmt; 449 - if (mgmt->u.action.u.plink_action.action_code == PLINK_CONFIRM) { 452 + baseaddr = mgmt->u.action.u.self_prot.variable; 453 + baselen = (u8 *) mgmt->u.action.u.self_prot.variable - (u8 *) mgmt; 454 + if (mgmt->u.action.u.self_prot.action_code == 455 + WLAN_SP_MESH_PEERING_CONFIRM) { 450 456 baseaddr += 4; 451 457 baselen += 4; 452 458 } 453 459 ieee802_11_parse_elems(baseaddr, len - baselen, &elems); 454 - if (!elems.peer_link) { 460 + if (!elems.peering) { 455 461 mpl_dbg("Mesh plink: missing necessary peer link ie\n"); 456 462 return; 457 463 } ··· 462 466 return; 463 467 } 464 468 465 - ftype = mgmt->u.action.u.plink_action.action_code; 466 - ie_len = elems.peer_link_len; 467 - if ((ftype == PLINK_OPEN && ie_len != 6) || 468 - (ftype == PLINK_CONFIRM && ie_len != 8) || 469 - (ftype == PLINK_CLOSE && ie_len != 8 && ie_len != 10)) { 469 + ftype = mgmt->u.action.u.self_prot.action_code; 470 + ie_len = elems.peering_len; 471 + if ((ftype == WLAN_SP_MESH_PEERING_OPEN && ie_len != 4) || 472 + (ftype == WLAN_SP_MESH_PEERING_CONFIRM && ie_len != 6) || 473 + (ftype == WLAN_SP_MESH_PEERING_CLOSE && ie_len != 6 474 + && ie_len != 8)) { 470 475 mpl_dbg("Mesh plink: incorrect plink ie length %d %d\n", 471 476 ftype, ie_len); 472 477 return; 473 478 } 474 479 475 - if (ftype != PLINK_CLOSE && (!elems.mesh_id || !elems.mesh_config)) { 480 + if (ftype != WLAN_SP_MESH_PEERING_CLOSE && 481 + (!elems.mesh_id || !elems.mesh_config)) { 476 482 mpl_dbg("Mesh plink: missing necessary ie\n"); 477 483 return; 478 484 } 479 485 /* Note the lines below are correct, the llid in the frame is the plid 480 486 * from the point of view of this host. 481 487 */ 482 - memcpy(&plid, PLINK_GET_LLID(elems.peer_link), 2); 483 - if (ftype == PLINK_CONFIRM || (ftype == PLINK_CLOSE && ie_len == 10)) 484 - memcpy(&llid, PLINK_GET_PLID(elems.peer_link), 2); 488 + memcpy(&plid, PLINK_GET_LLID(elems.peering), 2); 489 + if (ftype == WLAN_SP_MESH_PEERING_CONFIRM || 490 + (ftype == WLAN_SP_MESH_PEERING_CLOSE && ie_len == 8)) 491 + memcpy(&llid, PLINK_GET_PLID(elems.peering), 2); 485 492 486 493 rcu_read_lock(); 487 494 488 495 sta = sta_info_get(sdata, mgmt->sa); 489 - if (!sta && ftype != PLINK_OPEN) { 496 + if (!sta && ftype != WLAN_SP_MESH_PEERING_OPEN) { 490 497 mpl_dbg("Mesh plink: cls or cnf from unknown peer\n"); 491 498 rcu_read_unlock(); 492 499 return; ··· 508 509 509 510 /* Now we will figure out the appropriate event... */ 510 511 event = PLINK_UNDEFINED; 511 - if (ftype != PLINK_CLOSE && (!mesh_matches_local(&elems, sdata))) { 512 + if (ftype != WLAN_SP_MESH_PEERING_CLOSE && 513 + (!mesh_matches_local(&elems, sdata))) { 512 514 matches_local = false; 513 515 switch (ftype) { 514 - case PLINK_OPEN: 516 + case WLAN_SP_MESH_PEERING_OPEN: 515 517 event = OPN_RJCT; 516 518 break; 517 - case PLINK_CONFIRM: 519 + case WLAN_SP_MESH_PEERING_CONFIRM: 518 520 event = CNF_RJCT; 519 521 break; 520 - case PLINK_CLOSE: 521 - /* avoid warning */ 522 + default: 522 523 break; 523 524 } 524 525 } 525 526 526 527 if (!sta && !matches_local) { 527 528 rcu_read_unlock(); 528 - reason = cpu_to_le16(MESH_CAPABILITY_POLICY_VIOLATION); 529 + reason = cpu_to_le16(WLAN_REASON_MESH_CONFIG); 529 530 llid = 0; 530 - mesh_plink_frame_tx(sdata, PLINK_CLOSE, mgmt->sa, llid, 531 - plid, reason); 531 + mesh_plink_frame_tx(sdata, WLAN_SP_MESH_PEERING_CLOSE, 532 + mgmt->sa, llid, plid, reason); 532 533 return; 533 534 } else if (!sta) { 534 - /* ftype == PLINK_OPEN */ 535 + /* ftype == WLAN_SP_MESH_PEERING_OPEN */ 535 536 u32 rates; 536 537 537 538 rcu_read_unlock(); ··· 556 557 } else if (matches_local) { 557 558 spin_lock_bh(&sta->lock); 558 559 switch (ftype) { 559 - case PLINK_OPEN: 560 + case WLAN_SP_MESH_PEERING_OPEN: 560 561 if (!mesh_plink_free_count(sdata) || 561 562 (sta->plid && sta->plid != plid)) 562 563 event = OPN_IGNR; 563 564 else 564 565 event = OPN_ACPT; 565 566 break; 566 - case PLINK_CONFIRM: 567 + case WLAN_SP_MESH_PEERING_CONFIRM: 567 568 if (!mesh_plink_free_count(sdata) || 568 569 (sta->llid != llid || sta->plid != plid)) 569 570 event = CNF_IGNR; 570 571 else 571 572 event = CNF_ACPT; 572 573 break; 573 - case PLINK_CLOSE: 574 + case WLAN_SP_MESH_PEERING_CLOSE: 574 575 if (sta->plink_state == NL80211_PLINK_ESTAB) 575 576 /* Do not check for llid or plid. This does not 576 577 * follow the standard but since multiple plinks ··· 619 620 sta->llid = llid; 620 621 mesh_plink_timer_set(sta, dot11MeshRetryTimeout(sdata)); 621 622 spin_unlock_bh(&sta->lock); 622 - mesh_plink_frame_tx(sdata, PLINK_OPEN, sta->sta.addr, llid, 623 - 0, 0); 624 - mesh_plink_frame_tx(sdata, PLINK_CONFIRM, sta->sta.addr, 625 - llid, plid, 0); 623 + mesh_plink_frame_tx(sdata, 624 + WLAN_SP_MESH_PEERING_OPEN, 625 + sta->sta.addr, llid, 0, 0); 626 + mesh_plink_frame_tx(sdata, 627 + WLAN_SP_MESH_PEERING_CONFIRM, 628 + sta->sta.addr, llid, plid, 0); 626 629 break; 627 630 default: 628 631 spin_unlock_bh(&sta->lock); ··· 636 635 switch (event) { 637 636 case OPN_RJCT: 638 637 case CNF_RJCT: 639 - reason = cpu_to_le16(MESH_CAPABILITY_POLICY_VIOLATION); 638 + reason = cpu_to_le16(WLAN_REASON_MESH_CONFIG); 640 639 case CLS_ACPT: 641 640 if (!reason) 642 - reason = cpu_to_le16(MESH_CLOSE_RCVD); 641 + reason = cpu_to_le16(WLAN_REASON_MESH_CLOSE); 643 642 sta->reason = reason; 644 643 sta->plink_state = NL80211_PLINK_HOLDING; 645 644 if (!mod_plink_timer(sta, ··· 648 647 649 648 llid = sta->llid; 650 649 spin_unlock_bh(&sta->lock); 651 - mesh_plink_frame_tx(sdata, PLINK_CLOSE, sta->sta.addr, llid, 652 - plid, reason); 650 + mesh_plink_frame_tx(sdata, 651 + WLAN_SP_MESH_PEERING_CLOSE, 652 + sta->sta.addr, llid, plid, reason); 653 653 break; 654 654 case OPN_ACPT: 655 655 /* retry timer is left untouched */ ··· 658 656 sta->plid = plid; 659 657 llid = sta->llid; 660 658 spin_unlock_bh(&sta->lock); 661 - mesh_plink_frame_tx(sdata, PLINK_CONFIRM, sta->sta.addr, llid, 662 - plid, 0); 659 + mesh_plink_frame_tx(sdata, 660 + WLAN_SP_MESH_PEERING_CONFIRM, 661 + sta->sta.addr, llid, plid, 0); 663 662 break; 664 663 case CNF_ACPT: 665 664 sta->plink_state = NL80211_PLINK_CNF_RCVD; ··· 680 677 switch (event) { 681 678 case OPN_RJCT: 682 679 case CNF_RJCT: 683 - reason = cpu_to_le16(MESH_CAPABILITY_POLICY_VIOLATION); 680 + reason = cpu_to_le16(WLAN_REASON_MESH_CONFIG); 684 681 case CLS_ACPT: 685 682 if (!reason) 686 - reason = cpu_to_le16(MESH_CLOSE_RCVD); 683 + reason = cpu_to_le16(WLAN_REASON_MESH_CLOSE); 687 684 sta->reason = reason; 688 685 sta->plink_state = NL80211_PLINK_HOLDING; 689 686 if (!mod_plink_timer(sta, ··· 692 689 693 690 llid = sta->llid; 694 691 spin_unlock_bh(&sta->lock); 695 - mesh_plink_frame_tx(sdata, PLINK_CLOSE, sta->sta.addr, llid, 696 - plid, reason); 692 + mesh_plink_frame_tx(sdata, WLAN_SP_MESH_PEERING_CLOSE, 693 + sta->sta.addr, llid, plid, reason); 697 694 break; 698 695 case OPN_ACPT: 699 696 llid = sta->llid; 700 697 spin_unlock_bh(&sta->lock); 701 - mesh_plink_frame_tx(sdata, PLINK_CONFIRM, sta->sta.addr, llid, 702 - plid, 0); 698 + mesh_plink_frame_tx(sdata, 699 + WLAN_SP_MESH_PEERING_CONFIRM, 700 + sta->sta.addr, llid, plid, 0); 703 701 break; 704 702 case CNF_ACPT: 705 703 del_timer(&sta->plink_timer); ··· 721 717 switch (event) { 722 718 case OPN_RJCT: 723 719 case CNF_RJCT: 724 - reason = cpu_to_le16(MESH_CAPABILITY_POLICY_VIOLATION); 720 + reason = cpu_to_le16(WLAN_REASON_MESH_CONFIG); 725 721 case CLS_ACPT: 726 722 if (!reason) 727 - reason = cpu_to_le16(MESH_CLOSE_RCVD); 723 + reason = cpu_to_le16(WLAN_REASON_MESH_CLOSE); 728 724 sta->reason = reason; 729 725 sta->plink_state = NL80211_PLINK_HOLDING; 730 726 if (!mod_plink_timer(sta, ··· 733 729 734 730 llid = sta->llid; 735 731 spin_unlock_bh(&sta->lock); 736 - mesh_plink_frame_tx(sdata, PLINK_CLOSE, sta->sta.addr, llid, 737 - plid, reason); 732 + mesh_plink_frame_tx(sdata, 733 + WLAN_SP_MESH_PEERING_CLOSE, 734 + sta->sta.addr, llid, plid, reason); 738 735 break; 739 736 case OPN_ACPT: 740 737 del_timer(&sta->plink_timer); ··· 745 740 ieee80211_bss_info_change_notify(sdata, BSS_CHANGED_BEACON); 746 741 mpl_dbg("Mesh plink with %pM ESTABLISHED\n", 747 742 sta->sta.addr); 748 - mesh_plink_frame_tx(sdata, PLINK_CONFIRM, sta->sta.addr, llid, 749 - plid, 0); 743 + mesh_plink_frame_tx(sdata, 744 + WLAN_SP_MESH_PEERING_CONFIRM, 745 + sta->sta.addr, llid, plid, 0); 750 746 break; 751 747 default: 752 748 spin_unlock_bh(&sta->lock); ··· 758 752 case NL80211_PLINK_ESTAB: 759 753 switch (event) { 760 754 case CLS_ACPT: 761 - reason = cpu_to_le16(MESH_CLOSE_RCVD); 755 + reason = cpu_to_le16(WLAN_REASON_MESH_CLOSE); 762 756 sta->reason = reason; 763 757 deactivated = __mesh_plink_deactivate(sta); 764 758 sta->plink_state = NL80211_PLINK_HOLDING; ··· 767 761 spin_unlock_bh(&sta->lock); 768 762 if (deactivated) 769 763 ieee80211_bss_info_change_notify(sdata, BSS_CHANGED_BEACON); 770 - mesh_plink_frame_tx(sdata, PLINK_CLOSE, sta->sta.addr, llid, 771 - plid, reason); 764 + mesh_plink_frame_tx(sdata, WLAN_SP_MESH_PEERING_CLOSE, 765 + sta->sta.addr, llid, plid, reason); 772 766 break; 773 767 case OPN_ACPT: 774 768 llid = sta->llid; 775 769 spin_unlock_bh(&sta->lock); 776 - mesh_plink_frame_tx(sdata, PLINK_CONFIRM, sta->sta.addr, llid, 777 - plid, 0); 770 + mesh_plink_frame_tx(sdata, 771 + WLAN_SP_MESH_PEERING_CONFIRM, 772 + sta->sta.addr, llid, plid, 0); 778 773 break; 779 774 default: 780 775 spin_unlock_bh(&sta->lock); ··· 797 790 llid = sta->llid; 798 791 reason = sta->reason; 799 792 spin_unlock_bh(&sta->lock); 800 - mesh_plink_frame_tx(sdata, PLINK_CLOSE, sta->sta.addr, 801 - llid, plid, reason); 793 + mesh_plink_frame_tx(sdata, WLAN_SP_MESH_PEERING_CLOSE, 794 + sta->sta.addr, llid, plid, reason); 802 795 break; 803 796 default: 804 797 spin_unlock_bh(&sta->lock);
+53 -6
net/mac80211/mlme.c
··· 1482 1482 1483 1483 ifmgd->aid = aid; 1484 1484 1485 - sta = sta_info_alloc(sdata, cbss->bssid, GFP_KERNEL); 1486 - if (!sta) { 1487 - printk(KERN_DEBUG "%s: failed to alloc STA entry for" 1488 - " the AP\n", sdata->name); 1485 + mutex_lock(&sdata->local->sta_mtx); 1486 + /* 1487 + * station info was already allocated and inserted before 1488 + * the association and should be available to us 1489 + */ 1490 + sta = sta_info_get_rx(sdata, cbss->bssid); 1491 + if (WARN_ON(!sta)) { 1492 + mutex_unlock(&sdata->local->sta_mtx); 1489 1493 return false; 1490 1494 } 1491 1495 ··· 1560 1556 if (elems.wmm_param) 1561 1557 set_sta_flags(sta, WLAN_STA_WME); 1562 1558 1563 - err = sta_info_insert(sta); 1559 + /* sta_info_reinsert will also unlock the mutex lock */ 1560 + err = sta_info_reinsert(sta); 1564 1561 sta = NULL; 1565 1562 if (err) { 1566 1563 printk(KERN_DEBUG "%s: failed to insert STA entry for" ··· 2434 2429 return 0; 2435 2430 } 2436 2431 2432 + /* create and insert a dummy station entry */ 2433 + static int ieee80211_pre_assoc(struct ieee80211_sub_if_data *sdata, 2434 + u8 *bssid) { 2435 + struct sta_info *sta; 2436 + int err; 2437 + 2438 + sta = sta_info_alloc(sdata, bssid, GFP_KERNEL); 2439 + if (!sta) { 2440 + printk(KERN_DEBUG "%s: failed to alloc STA entry for" 2441 + " the AP\n", sdata->name); 2442 + return -ENOMEM; 2443 + } 2444 + 2445 + sta->dummy = true; 2446 + 2447 + err = sta_info_insert(sta); 2448 + sta = NULL; 2449 + if (err) { 2450 + printk(KERN_DEBUG "%s: failed to insert Dummy STA entry for" 2451 + " the AP (error %d)\n", sdata->name, err); 2452 + return err; 2453 + } 2454 + 2455 + return 0; 2456 + } 2457 + 2437 2458 static enum work_done_result ieee80211_assoc_done(struct ieee80211_work *wk, 2438 2459 struct sk_buff *skb) 2439 2460 { ··· 2467 2436 struct ieee80211_mgmt *mgmt; 2468 2437 struct ieee80211_rx_status *rx_status; 2469 2438 struct ieee802_11_elems elems; 2439 + struct cfg80211_bss *cbss = wk->assoc.bss; 2470 2440 u16 status; 2471 2441 2472 2442 if (!skb) { 2443 + sta_info_destroy_addr(wk->sdata, cbss->bssid); 2473 2444 cfg80211_send_assoc_timeout(wk->sdata->dev, wk->filter_ta); 2474 2445 goto destroy; 2475 2446 } ··· 2501 2468 if (!ieee80211_assoc_success(wk, mgmt, skb->len)) { 2502 2469 mutex_unlock(&wk->sdata->u.mgd.mtx); 2503 2470 /* oops -- internal error -- send timeout for now */ 2471 + sta_info_destroy_addr(wk->sdata, cbss->bssid); 2504 2472 cfg80211_send_assoc_timeout(wk->sdata->dev, 2505 2473 wk->filter_ta); 2506 2474 return WORK_DONE_DESTROY; 2507 2475 } 2508 2476 2509 2477 mutex_unlock(&wk->sdata->u.mgd.mtx); 2478 + } else { 2479 + /* assoc failed - destroy the dummy station entry */ 2480 + sta_info_destroy_addr(wk->sdata, cbss->bssid); 2510 2481 } 2511 2482 2512 2483 cfg80211_send_rx_assoc(wk->sdata->dev, skb->data, skb->len); ··· 2529 2492 struct ieee80211_bss *bss = (void *)req->bss->priv; 2530 2493 struct ieee80211_work *wk; 2531 2494 const u8 *ssid; 2532 - int i; 2495 + int i, err; 2533 2496 2534 2497 mutex_lock(&ifmgd->mtx); 2535 2498 if (ifmgd->associated) { ··· 2553 2516 wk = kzalloc(sizeof(*wk) + req->ie_len, GFP_KERNEL); 2554 2517 if (!wk) 2555 2518 return -ENOMEM; 2519 + 2520 + /* 2521 + * create a dummy station info entry in order 2522 + * to start accepting incoming EAPOL packets from the station 2523 + */ 2524 + err = ieee80211_pre_assoc(sdata, req->bss->bssid); 2525 + if (err) { 2526 + kfree(wk); 2527 + return err; 2528 + } 2556 2529 2557 2530 ifmgd->flags &= ~IEEE80211_STA_DISABLE_11N; 2558 2531 ifmgd->flags &= ~IEEE80211_STA_NULLFUNC_ACKED;
+40 -8
net/mac80211/rx.c
··· 850 850 ieee80211_is_pspoll(hdr->frame_control)) && 851 851 rx->sdata->vif.type != NL80211_IFTYPE_ADHOC && 852 852 rx->sdata->vif.type != NL80211_IFTYPE_WDS && 853 - (!rx->sta || !test_sta_flags(rx->sta, WLAN_STA_ASSOC)))) 853 + (!rx->sta || !test_sta_flags(rx->sta, WLAN_STA_ASSOC)))) { 854 + if (rx->sta && rx->sta->dummy && 855 + ieee80211_is_data_present(hdr->frame_control)) { 856 + u16 ethertype; 857 + u8 *payload; 858 + 859 + payload = rx->skb->data + 860 + ieee80211_hdrlen(hdr->frame_control); 861 + ethertype = (payload[6] << 8) | payload[7]; 862 + if (cpu_to_be16(ethertype) == 863 + rx->sdata->control_port_protocol) 864 + return RX_CONTINUE; 865 + } 854 866 return RX_DROP_MONITOR; 867 + } 855 868 856 869 return RX_CONTINUE; 857 870 } ··· 2233 2220 goto handled; 2234 2221 } 2235 2222 break; 2223 + case WLAN_CATEGORY_SELF_PROTECTED: 2224 + switch (mgmt->u.action.u.self_prot.action_code) { 2225 + case WLAN_SP_MESH_PEERING_OPEN: 2226 + case WLAN_SP_MESH_PEERING_CLOSE: 2227 + case WLAN_SP_MESH_PEERING_CONFIRM: 2228 + if (!ieee80211_vif_is_mesh(&sdata->vif)) 2229 + goto invalid; 2230 + if (sdata->u.mesh.security != IEEE80211_MESH_SEC_NONE) 2231 + /* userspace handles this frame */ 2232 + break; 2233 + goto queue; 2234 + case WLAN_SP_MGK_INFORM: 2235 + case WLAN_SP_MGK_ACK: 2236 + if (!ieee80211_vif_is_mesh(&sdata->vif)) 2237 + goto invalid; 2238 + break; 2239 + } 2240 + break; 2236 2241 case WLAN_CATEGORY_MESH_ACTION: 2237 2242 if (!ieee80211_vif_is_mesh(&sdata->vif)) 2238 2243 break; 2239 - goto queue; 2240 - case WLAN_CATEGORY_MESH_PATH_SEL: 2241 - if (!mesh_path_sel_is_hwmp(sdata)) 2244 + if (mesh_action_is_path_sel(mgmt) && 2245 + (!mesh_path_sel_is_hwmp(sdata))) 2242 2246 break; 2243 2247 goto queue; 2244 2248 } ··· 2716 2686 } else if (!ieee80211_bssid_match(bssid, 2717 2687 sdata->vif.addr)) { 2718 2688 if (!(status->rx_flags & IEEE80211_RX_IN_SCAN) && 2719 - !ieee80211_is_beacon(hdr->frame_control)) 2689 + !ieee80211_is_beacon(hdr->frame_control) && 2690 + !(ieee80211_is_action(hdr->frame_control) && 2691 + sdata->vif.p2p)) 2720 2692 return 0; 2721 2693 status->rx_flags &= ~IEEE80211_RX_RA_MATCH; 2722 2694 } ··· 2823 2791 if (ieee80211_is_data(fc)) { 2824 2792 prev_sta = NULL; 2825 2793 2826 - for_each_sta_info(local, hdr->addr2, sta, tmp) { 2794 + for_each_sta_info_rx(local, hdr->addr2, sta, tmp) { 2827 2795 if (!prev_sta) { 2828 2796 prev_sta = sta; 2829 2797 continue; ··· 2867 2835 continue; 2868 2836 } 2869 2837 2870 - rx.sta = sta_info_get_bss(prev, hdr->addr2); 2838 + rx.sta = sta_info_get_bss_rx(prev, hdr->addr2); 2871 2839 rx.sdata = prev; 2872 2840 ieee80211_prepare_and_rx_handle(&rx, skb, false); 2873 2841 ··· 2875 2843 } 2876 2844 2877 2845 if (prev) { 2878 - rx.sta = sta_info_get_bss(prev, hdr->addr2); 2846 + rx.sta = sta_info_get_bss_rx(prev, hdr->addr2); 2879 2847 rx.sdata = prev; 2880 2848 2881 2849 if (ieee80211_prepare_and_rx_handle(&rx, skb, true))
+241 -111
net/mac80211/sta_info.c
··· 100 100 lockdep_is_held(&local->sta_lock) || 101 101 lockdep_is_held(&local->sta_mtx)); 102 102 while (sta) { 103 + if (sta->sdata == sdata && !sta->dummy && 104 + memcmp(sta->sta.addr, addr, ETH_ALEN) == 0) 105 + break; 106 + sta = rcu_dereference_check(sta->hnext, 107 + lockdep_is_held(&local->sta_lock) || 108 + lockdep_is_held(&local->sta_mtx)); 109 + } 110 + return sta; 111 + } 112 + 113 + /* get a station info entry even if it is a dummy station*/ 114 + struct sta_info *sta_info_get_rx(struct ieee80211_sub_if_data *sdata, 115 + const u8 *addr) 116 + { 117 + struct ieee80211_local *local = sdata->local; 118 + struct sta_info *sta; 119 + 120 + sta = rcu_dereference_check(local->sta_hash[STA_HASH(addr)], 121 + lockdep_is_held(&local->sta_lock) || 122 + lockdep_is_held(&local->sta_mtx)); 123 + while (sta) { 103 124 if (sta->sdata == sdata && 104 125 memcmp(sta->sta.addr, addr, ETH_ALEN) == 0) 105 126 break; ··· 136 115 * or from one of its vlans 137 116 */ 138 117 struct sta_info *sta_info_get_bss(struct ieee80211_sub_if_data *sdata, 118 + const u8 *addr) 119 + { 120 + struct ieee80211_local *local = sdata->local; 121 + struct sta_info *sta; 122 + 123 + sta = rcu_dereference_check(local->sta_hash[STA_HASH(addr)], 124 + lockdep_is_held(&local->sta_lock) || 125 + lockdep_is_held(&local->sta_mtx)); 126 + while (sta) { 127 + if ((sta->sdata == sdata || 128 + (sta->sdata->bss && sta->sdata->bss == sdata->bss)) && 129 + !sta->dummy && 130 + memcmp(sta->sta.addr, addr, ETH_ALEN) == 0) 131 + break; 132 + sta = rcu_dereference_check(sta->hnext, 133 + lockdep_is_held(&local->sta_lock) || 134 + lockdep_is_held(&local->sta_mtx)); 135 + } 136 + return sta; 137 + } 138 + 139 + /* 140 + * Get sta info either from the specified interface 141 + * or from one of its vlans (including dummy stations) 142 + */ 143 + struct sta_info *sta_info_get_bss_rx(struct ieee80211_sub_if_data *sdata, 139 144 const u8 *addr) 140 145 { 141 146 struct ieee80211_local *local = sdata->local; ··· 327 280 return sta; 328 281 } 329 282 330 - static int sta_info_finish_insert(struct sta_info *sta, bool async) 283 + static int sta_info_finish_insert(struct sta_info *sta, 284 + bool async, bool dummy_reinsert) 331 285 { 332 286 struct ieee80211_local *local = sta->local; 333 287 struct ieee80211_sub_if_data *sdata = sta->sdata; ··· 338 290 339 291 lockdep_assert_held(&local->sta_mtx); 340 292 341 - /* notify driver */ 342 - if (sdata->vif.type == NL80211_IFTYPE_AP_VLAN) 343 - sdata = container_of(sdata->bss, 344 - struct ieee80211_sub_if_data, 345 - u.ap); 346 - err = drv_sta_add(local, sdata, &sta->sta); 347 - if (err) { 348 - if (!async) 349 - return err; 350 - printk(KERN_DEBUG "%s: failed to add IBSS STA %pM to driver (%d)" 351 - " - keeping it anyway.\n", 352 - sdata->name, sta->sta.addr, err); 353 - } else { 354 - sta->uploaded = true; 293 + if (!sta->dummy || dummy_reinsert) { 294 + /* notify driver */ 295 + if (sdata->vif.type == NL80211_IFTYPE_AP_VLAN) 296 + sdata = container_of(sdata->bss, 297 + struct ieee80211_sub_if_data, 298 + u.ap); 299 + err = drv_sta_add(local, sdata, &sta->sta); 300 + if (err) { 301 + if (!async) 302 + return err; 303 + printk(KERN_DEBUG "%s: failed to add IBSS STA %pM to " 304 + "driver (%d) - keeping it anyway.\n", 305 + sdata->name, sta->sta.addr, err); 306 + } else { 307 + sta->uploaded = true; 355 308 #ifdef CONFIG_MAC80211_VERBOSE_DEBUG 356 - if (async) 357 - wiphy_debug(local->hw.wiphy, 358 - "Finished adding IBSS STA %pM\n", 359 - sta->sta.addr); 309 + if (async) 310 + wiphy_debug(local->hw.wiphy, 311 + "Finished adding IBSS STA %pM\n", 312 + sta->sta.addr); 360 313 #endif 314 + } 315 + 316 + sdata = sta->sdata; 361 317 } 362 318 363 - sdata = sta->sdata; 319 + if (!dummy_reinsert) { 320 + if (!async) { 321 + local->num_sta++; 322 + local->sta_generation++; 323 + smp_mb(); 364 324 365 - if (!async) { 366 - local->num_sta++; 367 - local->sta_generation++; 368 - smp_mb(); 325 + /* make the station visible */ 326 + spin_lock_irqsave(&local->sta_lock, flags); 327 + sta_info_hash_add(local, sta); 328 + spin_unlock_irqrestore(&local->sta_lock, flags); 329 + } 369 330 370 - /* make the station visible */ 371 - spin_lock_irqsave(&local->sta_lock, flags); 372 - sta_info_hash_add(local, sta); 373 - spin_unlock_irqrestore(&local->sta_lock, flags); 331 + list_add(&sta->list, &local->sta_list); 332 + } else { 333 + sta->dummy = false; 374 334 } 375 335 376 - list_add(&sta->list, &local->sta_list); 336 + if (!sta->dummy) { 337 + ieee80211_sta_debugfs_add(sta); 338 + rate_control_add_sta_debugfs(sta); 377 339 378 - ieee80211_sta_debugfs_add(sta); 379 - rate_control_add_sta_debugfs(sta); 380 - 381 - memset(&sinfo, 0, sizeof(sinfo)); 382 - sinfo.filled = 0; 383 - sinfo.generation = local->sta_generation; 384 - cfg80211_new_sta(sdata->dev, sta->sta.addr, &sinfo, GFP_KERNEL); 385 - 340 + memset(&sinfo, 0, sizeof(sinfo)); 341 + sinfo.filled = 0; 342 + sinfo.generation = local->sta_generation; 343 + cfg80211_new_sta(sdata->dev, sta->sta.addr, &sinfo, GFP_KERNEL); 344 + } 386 345 387 346 return 0; 388 347 } ··· 406 351 list_del(&sta->list); 407 352 spin_unlock_irqrestore(&local->sta_lock, flags); 408 353 409 - sta_info_finish_insert(sta, true); 354 + sta_info_finish_insert(sta, true, false); 410 355 411 356 spin_lock_irqsave(&local->sta_lock, flags); 412 357 } ··· 423 368 mutex_unlock(&local->sta_mtx); 424 369 } 425 370 426 - int sta_info_insert_rcu(struct sta_info *sta) __acquires(RCU) 371 + static int sta_info_insert_check(struct sta_info *sta) 427 372 { 428 - struct ieee80211_local *local = sta->local; 429 373 struct ieee80211_sub_if_data *sdata = sta->sdata; 430 - unsigned long flags; 431 - int err = 0; 432 374 433 375 /* 434 376 * Can't be a WARN_ON because it can be triggered through a race: 435 377 * something inserts a STA (on one CPU) without holding the RTNL 436 378 * and another CPU turns off the net device. 437 379 */ 438 - if (unlikely(!ieee80211_sdata_running(sdata))) { 439 - err = -ENETDOWN; 440 - rcu_read_lock(); 441 - goto out_free; 442 - } 380 + if (unlikely(!ieee80211_sdata_running(sdata))) 381 + return -ENETDOWN; 443 382 444 383 if (WARN_ON(compare_ether_addr(sta->sta.addr, sdata->vif.addr) == 0 || 445 - is_multicast_ether_addr(sta->sta.addr))) { 446 - err = -EINVAL; 384 + is_multicast_ether_addr(sta->sta.addr))) 385 + return -EINVAL; 386 + 387 + return 0; 388 + } 389 + 390 + static int sta_info_insert_ibss(struct sta_info *sta) __acquires(RCU) 391 + { 392 + struct ieee80211_local *local = sta->local; 393 + struct ieee80211_sub_if_data *sdata = sta->sdata; 394 + unsigned long flags; 395 + 396 + spin_lock_irqsave(&local->sta_lock, flags); 397 + /* check if STA exists already */ 398 + if (sta_info_get_bss_rx(sdata, sta->sta.addr)) { 399 + spin_unlock_irqrestore(&local->sta_lock, flags); 400 + rcu_read_lock(); 401 + return -EEXIST; 402 + } 403 + 404 + local->num_sta++; 405 + local->sta_generation++; 406 + smp_mb(); 407 + sta_info_hash_add(local, sta); 408 + 409 + list_add_tail(&sta->list, &local->sta_pending_list); 410 + 411 + rcu_read_lock(); 412 + spin_unlock_irqrestore(&local->sta_lock, flags); 413 + 414 + #ifdef CONFIG_MAC80211_VERBOSE_DEBUG 415 + wiphy_debug(local->hw.wiphy, "Added IBSS STA %pM\n", 416 + sta->sta.addr); 417 + #endif /* CONFIG_MAC80211_VERBOSE_DEBUG */ 418 + 419 + ieee80211_queue_work(&local->hw, &local->sta_finish_work); 420 + 421 + return 0; 422 + } 423 + 424 + /* 425 + * should be called with sta_mtx locked 426 + * this function replaces the mutex lock 427 + * with a RCU lock 428 + */ 429 + static int sta_info_insert_non_ibss(struct sta_info *sta) __acquires(RCU) 430 + { 431 + struct ieee80211_local *local = sta->local; 432 + struct ieee80211_sub_if_data *sdata = sta->sdata; 433 + unsigned long flags; 434 + struct sta_info *exist_sta; 435 + bool dummy_reinsert = false; 436 + int err = 0; 437 + 438 + lockdep_assert_held(&local->sta_mtx); 439 + 440 + /* 441 + * On first glance, this will look racy, because the code 442 + * in this function, which inserts a station with sleeping, 443 + * unlocks the sta_lock between checking existence in the 444 + * hash table and inserting into it. 445 + * 446 + * However, it is not racy against itself because it keeps 447 + * the mutex locked. 448 + */ 449 + 450 + spin_lock_irqsave(&local->sta_lock, flags); 451 + /* 452 + * check if STA exists already. 453 + * only accept a scenario of a second call to sta_info_insert_non_ibss 454 + * with a dummy station entry that was inserted earlier 455 + * in that case - assume that the dummy station flag should 456 + * be removed. 457 + */ 458 + exist_sta = sta_info_get_bss_rx(sdata, sta->sta.addr); 459 + if (exist_sta) { 460 + if (exist_sta == sta && sta->dummy) { 461 + dummy_reinsert = true; 462 + } else { 463 + spin_unlock_irqrestore(&local->sta_lock, flags); 464 + mutex_unlock(&local->sta_mtx); 465 + rcu_read_lock(); 466 + return -EEXIST; 467 + } 468 + } 469 + 470 + spin_unlock_irqrestore(&local->sta_lock, flags); 471 + 472 + err = sta_info_finish_insert(sta, false, dummy_reinsert); 473 + if (err) { 474 + mutex_unlock(&local->sta_mtx); 475 + rcu_read_lock(); 476 + return err; 477 + } 478 + 479 + #ifdef CONFIG_MAC80211_VERBOSE_DEBUG 480 + wiphy_debug(local->hw.wiphy, "Inserted %sSTA %pM\n", 481 + sta->dummy ? "dummy " : "", sta->sta.addr); 482 + #endif /* CONFIG_MAC80211_VERBOSE_DEBUG */ 483 + 484 + /* move reference to rcu-protected */ 485 + rcu_read_lock(); 486 + mutex_unlock(&local->sta_mtx); 487 + 488 + if (ieee80211_vif_is_mesh(&sdata->vif)) 489 + mesh_accept_plinks_update(sdata); 490 + 491 + return 0; 492 + } 493 + 494 + int sta_info_insert_rcu(struct sta_info *sta) __acquires(RCU) 495 + { 496 + struct ieee80211_local *local = sta->local; 497 + struct ieee80211_sub_if_data *sdata = sta->sdata; 498 + int err = 0; 499 + 500 + err = sta_info_insert_check(sta); 501 + if (err) { 447 502 rcu_read_lock(); 448 503 goto out_free; 449 504 } ··· 564 399 * always do so in that case -- see the comment below. 565 400 */ 566 401 if (sdata->vif.type == NL80211_IFTYPE_ADHOC) { 567 - spin_lock_irqsave(&local->sta_lock, flags); 568 - /* check if STA exists already */ 569 - if (sta_info_get_bss(sdata, sta->sta.addr)) { 570 - spin_unlock_irqrestore(&local->sta_lock, flags); 571 - rcu_read_lock(); 572 - err = -EEXIST; 402 + err = sta_info_insert_ibss(sta); 403 + if (err) 573 404 goto out_free; 574 - } 575 - 576 - local->num_sta++; 577 - local->sta_generation++; 578 - smp_mb(); 579 - sta_info_hash_add(local, sta); 580 - 581 - list_add_tail(&sta->list, &local->sta_pending_list); 582 - 583 - rcu_read_lock(); 584 - spin_unlock_irqrestore(&local->sta_lock, flags); 585 - 586 - #ifdef CONFIG_MAC80211_VERBOSE_DEBUG 587 - wiphy_debug(local->hw.wiphy, "Added IBSS STA %pM\n", 588 - sta->sta.addr); 589 - #endif /* CONFIG_MAC80211_VERBOSE_DEBUG */ 590 - 591 - ieee80211_queue_work(&local->hw, &local->sta_finish_work); 592 405 593 406 return 0; 594 407 } 595 408 596 409 /* 597 - * On first glance, this will look racy, because the code 598 - * below this point, which inserts a station with sleeping, 599 - * unlocks the sta_lock between checking existence in the 600 - * hash table and inserting into it. 601 - * 602 - * However, it is not racy against itself because it keeps 603 - * the mutex locked. It still seems to race against the 604 - * above code that atomically inserts the station... That, 410 + * It might seem that the function called below is in race against 411 + * the function call above that atomically inserts the station... That, 605 412 * however, is not true because the above code can only 606 413 * be invoked for IBSS interfaces, and the below code will 607 414 * not be -- and the two do not race against each other as ··· 584 447 585 448 mutex_lock(&local->sta_mtx); 586 449 587 - spin_lock_irqsave(&local->sta_lock, flags); 588 - /* check if STA exists already */ 589 - if (sta_info_get_bss(sdata, sta->sta.addr)) { 590 - spin_unlock_irqrestore(&local->sta_lock, flags); 591 - mutex_unlock(&local->sta_mtx); 592 - rcu_read_lock(); 593 - err = -EEXIST; 450 + err = sta_info_insert_non_ibss(sta); 451 + if (err) 594 452 goto out_free; 595 - } 596 - 597 - spin_unlock_irqrestore(&local->sta_lock, flags); 598 - 599 - err = sta_info_finish_insert(sta, false); 600 - if (err) { 601 - mutex_unlock(&local->sta_mtx); 602 - rcu_read_lock(); 603 - goto out_free; 604 - } 605 - 606 - #ifdef CONFIG_MAC80211_VERBOSE_DEBUG 607 - wiphy_debug(local->hw.wiphy, "Inserted STA %pM\n", sta->sta.addr); 608 - #endif /* CONFIG_MAC80211_VERBOSE_DEBUG */ 609 - 610 - /* move reference to rcu-protected */ 611 - rcu_read_lock(); 612 - mutex_unlock(&local->sta_mtx); 613 - 614 - if (ieee80211_vif_is_mesh(&sdata->vif)) 615 - mesh_accept_plinks_update(sdata); 616 453 617 454 return 0; 618 455 out_free: ··· 601 490 602 491 rcu_read_unlock(); 603 492 493 + return err; 494 + } 495 + 496 + /* Caller must hold sta->local->sta_mtx */ 497 + int sta_info_reinsert(struct sta_info *sta) 498 + { 499 + struct ieee80211_local *local = sta->local; 500 + int err = 0; 501 + 502 + err = sta_info_insert_check(sta); 503 + if (err) { 504 + mutex_unlock(&local->sta_mtx); 505 + return err; 506 + } 507 + 508 + might_sleep(); 509 + 510 + err = sta_info_insert_non_ibss(sta); 511 + rcu_read_unlock(); 604 512 return err; 605 513 } 606 514 ··· 863 733 int ret; 864 734 865 735 mutex_lock(&sdata->local->sta_mtx); 866 - sta = sta_info_get(sdata, addr); 736 + sta = sta_info_get_rx(sdata, addr); 867 737 ret = __sta_info_destroy(sta); 868 738 mutex_unlock(&sdata->local->sta_mtx); 869 739 ··· 877 747 int ret; 878 748 879 749 mutex_lock(&sdata->local->sta_mtx); 880 - sta = sta_info_get_bss(sdata, addr); 750 + sta = sta_info_get_bss_rx(sdata, addr); 881 751 ret = __sta_info_destroy(sta); 882 752 mutex_unlock(&sdata->local->sta_mtx); 883 753
+29 -1
net/mac80211/sta_info.h
··· 238 238 * @plink_timer: peer link watch timer 239 239 * @plink_timer_was_running: used by suspend/resume to restore timers 240 240 * @debugfs: debug filesystem info 241 - * @sta: station information we share with the driver 242 241 * @dead: set to true when sta is unlinked 243 242 * @uploaded: set to true when sta is uploaded to the driver 244 243 * @lost_packets: number of consecutive lost packets 244 + * @dummy: indicate a dummy station created for receiving 245 + * EAP frames before association 246 + * @sta: station information we share with the driver 245 247 */ 246 248 struct sta_info { 247 249 /* General information, mostly static */ ··· 337 335 #endif 338 336 339 337 unsigned int lost_packets; 338 + 339 + /* should be right in front of sta to be in the same cache line */ 340 + bool dummy; 340 341 341 342 /* keep last! */ 342 343 struct ieee80211_sta sta; ··· 441 436 struct sta_info *sta_info_get(struct ieee80211_sub_if_data *sdata, 442 437 const u8 *addr); 443 438 439 + struct sta_info *sta_info_get_rx(struct ieee80211_sub_if_data *sdata, 440 + const u8 *addr); 441 + 444 442 struct sta_info *sta_info_get_bss(struct ieee80211_sub_if_data *sdata, 443 + const u8 *addr); 444 + 445 + struct sta_info *sta_info_get_bss_rx(struct ieee80211_sub_if_data *sdata, 445 446 const u8 *addr); 446 447 447 448 static inline ··· 459 448 } 460 449 461 450 #define for_each_sta_info(local, _addr, _sta, nxt) \ 451 + for ( /* initialise loop */ \ 452 + _sta = rcu_dereference(local->sta_hash[STA_HASH(_addr)]),\ 453 + nxt = _sta ? rcu_dereference(_sta->hnext) : NULL; \ 454 + /* typecheck */ \ 455 + for_each_sta_info_type_check(local, (_addr), _sta, nxt),\ 456 + /* continue condition */ \ 457 + _sta; \ 458 + /* advance loop */ \ 459 + _sta = nxt, \ 460 + nxt = _sta ? rcu_dereference(_sta->hnext) : NULL \ 461 + ) \ 462 + /* run code only if address matches and it's not a dummy sta */ \ 463 + if (memcmp(_sta->sta.addr, (_addr), ETH_ALEN) == 0 && \ 464 + !_sta->dummy) 465 + 466 + #define for_each_sta_info_rx(local, _addr, _sta, nxt) \ 462 467 for ( /* initialise loop */ \ 463 468 _sta = rcu_dereference(local->sta_hash[STA_HASH(_addr)]),\ 464 469 nxt = _sta ? rcu_dereference(_sta->hnext) : NULL; \ ··· 511 484 int sta_info_insert(struct sta_info *sta); 512 485 int sta_info_insert_rcu(struct sta_info *sta) __acquires(RCU); 513 486 int sta_info_insert_atomic(struct sta_info *sta); 487 + int sta_info_reinsert(struct sta_info *sta); 514 488 515 489 int sta_info_destroy_addr(struct ieee80211_sub_if_data *sdata, 516 490 const u8 *addr);
+18
net/mac80211/status.c
··· 187 187 int rates_idx = -1; 188 188 bool send_to_cooked; 189 189 bool acked; 190 + struct ieee80211_bar *bar; 191 + u16 tid; 190 192 191 193 for (i = 0; i < IEEE80211_TX_MAX_RATES; i++) { 192 194 if (info->status.rates[i].idx < 0) { ··· 243 241 & IEEE80211_SCTL_SEQ); 244 242 ieee80211_send_bar(sta->sdata, hdr->addr1, 245 243 tid, ssn); 244 + } 245 + 246 + if (!acked && ieee80211_is_back_req(fc)) { 247 + /* 248 + * BAR failed, let's tear down the BA session as a 249 + * last resort as some STAs (Intel 5100 on Windows) 250 + * can get stuck when the BA window isn't flushed 251 + * correctly. 252 + */ 253 + bar = (struct ieee80211_bar *) skb->data; 254 + if (!(bar->control & IEEE80211_BAR_CTRL_MULTI_TID)) { 255 + tid = (bar->control & 256 + IEEE80211_BAR_CTRL_TID_INFO_MASK) >> 257 + IEEE80211_BAR_CTRL_TID_INFO_SHIFT; 258 + ieee80211_stop_tx_ba_session(&sta->sta, tid); 259 + } 246 260 } 247 261 248 262 if (info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
+12 -2
net/mac80211/tx.c
··· 2295 2295 memcpy(mgmt->bssid, sdata->vif.addr, ETH_ALEN); 2296 2296 mgmt->u.beacon.beacon_int = 2297 2297 cpu_to_le16(sdata->vif.bss_conf.beacon_int); 2298 - mgmt->u.beacon.capab_info = 0x0; /* 0x0 for MPs */ 2298 + mgmt->u.beacon.capab_info |= cpu_to_le16( 2299 + sdata->u.mesh.security ? WLAN_CAPABILITY_PRIVACY : 0); 2299 2300 2300 2301 pos = skb_put(skb, 2); 2301 2302 *pos++ = WLAN_EID_SSID; 2302 2303 *pos++ = 0x0; 2303 2304 2304 - mesh_mgmt_ies_add(skb, sdata); 2305 + if (mesh_add_srates_ie(skb, sdata) || 2306 + mesh_add_ds_params_ie(skb, sdata) || 2307 + mesh_add_ext_srates_ie(skb, sdata) || 2308 + mesh_add_rsn_ie(skb, sdata) || 2309 + mesh_add_meshid_ie(skb, sdata) || 2310 + mesh_add_meshconf_ie(skb, sdata) || 2311 + mesh_add_vendor_ies(skb, sdata)) { 2312 + pr_err("o11s: couldn't add ies!\n"); 2313 + goto out; 2314 + } 2305 2315 } else { 2306 2316 WARN_ON(1); 2307 2317 goto out;
+5 -1
net/nfc/core.c
··· 322 322 * @supported_protocols: NFC protocols supported by the device 323 323 */ 324 324 struct nfc_dev *nfc_allocate_device(struct nfc_ops *ops, 325 - u32 supported_protocols) 325 + u32 supported_protocols, 326 + int tx_headroom, 327 + int tx_tailroom) 326 328 { 327 329 static atomic_t dev_no = ATOMIC_INIT(0); 328 330 struct nfc_dev *dev; ··· 347 345 348 346 dev->ops = ops; 349 347 dev->supported_protocols = supported_protocols; 348 + dev->tx_headroom = tx_headroom; 349 + dev->tx_tailroom = tx_tailroom; 350 350 351 351 spin_lock_init(&dev->targets_lock); 352 352 nfc_genl_data_init(&dev->genl_data);
+6 -7
net/nfc/rawsock.c
··· 123 123 124 124 static int rawsock_add_header(struct sk_buff *skb) 125 125 { 126 - 127 - if (skb_cow_head(skb, 1)) 128 - return -ENOMEM; 129 - 130 - *skb_push(skb, 1) = 0; 126 + *skb_push(skb, NFC_HEADER_SIZE) = 0; 131 127 132 128 return 0; 133 129 } ··· 193 197 struct msghdr *msg, size_t len) 194 198 { 195 199 struct sock *sk = sock->sk; 200 + struct nfc_dev *dev = nfc_rawsock(sk)->dev; 196 201 struct sk_buff *skb; 197 202 int rc; 198 203 ··· 205 208 if (sock->state != SS_CONNECTED) 206 209 return -ENOTCONN; 207 210 208 - skb = sock_alloc_send_skb(sk, len, msg->msg_flags & MSG_DONTWAIT, 209 - &rc); 211 + skb = sock_alloc_send_skb(sk, len + dev->tx_headroom + dev->tx_tailroom + NFC_HEADER_SIZE, 212 + msg->msg_flags & MSG_DONTWAIT, &rc); 210 213 if (!skb) 211 214 return rc; 215 + 216 + skb_reserve(skb, dev->tx_headroom + NFC_HEADER_SIZE); 212 217 213 218 rc = memcpy_fromiovec(skb_put(skb, len), msg->msg_iov, len); 214 219 if (rc < 0) {
+3
net/wireless/mesh.c
··· 12 12 #define MESH_HOLD_T 100 13 13 14 14 #define MESH_PATH_TIMEOUT 5000 15 + #define MESH_RANN_INTERVAL 5000 15 16 16 17 /* 17 18 * Minimum interval between two consecutive PREQs originated by the same ··· 50 49 .dot11MeshHWMPmaxPREQretries = MESH_MAX_PREQ_RETRIES, 51 50 .path_refresh_time = MESH_PATH_REFRESH_TIME, 52 51 .min_discovery_timeout = MESH_MIN_DISCOVERY_TIMEOUT, 52 + .dot11MeshHWMPRannInterval = MESH_RANN_INTERVAL, 53 + .dot11MeshGateAnnouncementProtocol = false, 53 54 }; 54 55 55 56 const struct mesh_setup default_mesh_setup = {
+42
net/wireless/nl80211.c
··· 2545 2545 return err; 2546 2546 } 2547 2547 2548 + static struct nla_policy 2549 + nl80211_sta_wme_policy[NL80211_STA_WME_MAX + 1] __read_mostly = { 2550 + [NL80211_STA_WME_UAPSD_QUEUES] = { .type = NLA_U8 }, 2551 + [NL80211_STA_WME_MAX_SP] = { .type = NLA_U8 }, 2552 + }; 2553 + 2548 2554 static int nl80211_new_station(struct sk_buff *skb, struct genl_info *info) 2549 2555 { 2550 2556 struct cfg80211_registered_device *rdev = info->user_ptr[0]; ··· 2595 2589 2596 2590 if (parse_station_flags(info, &params)) 2597 2591 return -EINVAL; 2592 + 2593 + /* parse WME attributes if sta is WME capable */ 2594 + if ((params.sta_flags_set & NL80211_STA_FLAG_WME) && 2595 + info->attrs[NL80211_ATTR_STA_WME]) { 2596 + struct nlattr *tb[NL80211_STA_WME_MAX + 1]; 2597 + struct nlattr *nla; 2598 + 2599 + nla = info->attrs[NL80211_ATTR_STA_WME]; 2600 + err = nla_parse_nested(tb, NL80211_STA_WME_MAX, nla, 2601 + nl80211_sta_wme_policy); 2602 + if (err) 2603 + return err; 2604 + 2605 + if (tb[NL80211_STA_WME_UAPSD_QUEUES]) 2606 + params.uapsd_queues = 2607 + nla_get_u8(tb[NL80211_STA_WME_UAPSD_QUEUES]); 2608 + 2609 + if (tb[NL80211_STA_WME_MAX_SP]) 2610 + params.max_sp = 2611 + nla_get_u8(tb[NL80211_STA_WME_MAX_SP]); 2612 + } 2598 2613 2599 2614 if (dev->ieee80211_ptr->iftype != NL80211_IFTYPE_AP && 2600 2615 dev->ieee80211_ptr->iftype != NL80211_IFTYPE_AP_VLAN && ··· 3062 3035 cur_params.dot11MeshHWMPnetDiameterTraversalTime); 3063 3036 NLA_PUT_U8(msg, NL80211_MESHCONF_HWMP_ROOTMODE, 3064 3037 cur_params.dot11MeshHWMPRootMode); 3038 + NLA_PUT_U16(msg, NL80211_MESHCONF_HWMP_RANN_INTERVAL, 3039 + cur_params.dot11MeshHWMPRannInterval); 3040 + NLA_PUT_U8(msg, NL80211_MESHCONF_GATE_ANNOUNCEMENTS, 3041 + cur_params.dot11MeshGateAnnouncementProtocol); 3065 3042 nla_nest_end(msg, pinfoattr); 3066 3043 genlmsg_end(msg, hdr); 3067 3044 return genlmsg_reply(msg, info); ··· 3093 3062 [NL80211_MESHCONF_HWMP_ACTIVE_PATH_TIMEOUT] = { .type = NLA_U32 }, 3094 3063 [NL80211_MESHCONF_HWMP_PREQ_MIN_INTERVAL] = { .type = NLA_U16 }, 3095 3064 [NL80211_MESHCONF_HWMP_NET_DIAM_TRVS_TIME] = { .type = NLA_U16 }, 3065 + [NL80211_MESHCONF_HWMP_ROOTMODE] = { .type = NLA_U8 }, 3066 + [NL80211_MESHCONF_HWMP_RANN_INTERVAL] = { .type = NLA_U16 }, 3067 + [NL80211_MESHCONF_GATE_ANNOUNCEMENTS] = { .type = NLA_U8 }, 3096 3068 }; 3097 3069 3098 3070 static const struct nla_policy ··· 3173 3139 FILL_IN_MESH_PARAM_IF_SET(tb, cfg, 3174 3140 dot11MeshHWMPRootMode, mask, 3175 3141 NL80211_MESHCONF_HWMP_ROOTMODE, 3142 + nla_get_u8); 3143 + FILL_IN_MESH_PARAM_IF_SET(tb, cfg, 3144 + dot11MeshHWMPRannInterval, mask, 3145 + NL80211_MESHCONF_HWMP_RANN_INTERVAL, 3146 + nla_get_u16); 3147 + FILL_IN_MESH_PARAM_IF_SET(tb, cfg, 3148 + dot11MeshGateAnnouncementProtocol, mask, 3149 + NL80211_MESHCONF_GATE_ANNOUNCEMENTS, 3176 3150 nla_get_u8); 3177 3151 if (mask_out) 3178 3152 *mask_out = mask;
+3 -3
net/wireless/util.c
··· 1158 1158 if (elen >= sizeof(struct ieee80211_meshconf_ie)) 1159 1159 elems->mesh_config = (void *)pos; 1160 1160 break; 1161 - case WLAN_EID_PEER_LINK: 1162 - elems->peer_link = pos; 1163 - elems->peer_link_len = elen; 1161 + case WLAN_EID_PEER_MGMT: 1162 + elems->peering = pos; 1163 + elems->peering_len = elen; 1164 1164 break; 1165 1165 case WLAN_EID_PREQ: 1166 1166 elems->preq = pos;