tjh.dev
+11
-3
arch/arm/kernel/devtree.c
+11
-3
arch/arm/kernel/devtree.c
···
88
88
return;
89
89
90
90
for_each_child_of_node(cpus, cpu) {
91
+
const __be32 *cell;
92
+
int prop_bytes;
91
93
u32 hwid;
92
94
93
95
if (of_node_cmp(cpu->type, "cpu"))
···
101
99
* properties is considered invalid to build the
102
100
* cpu_logical_map.
103
101
*/
104
-
if (of_property_read_u32(cpu, "reg", &hwid)) {
102
+
cell = of_get_property(cpu, "reg", &prop_bytes);
103
+
if (!cell || prop_bytes < sizeof(*cell)) {
105
104
pr_debug(" * %s missing reg property\n",
106
105
cpu->full_name);
107
106
of_node_put(cpu);
···
110
107
}
111
108
112
109
/*
113
-
* 8 MSBs must be set to 0 in the DT since the reg property
110
+
* Bits n:24 must be set to 0 in the DT since the reg property
114
111
* defines the MPIDR[23:0].
115
112
*/
116
-
if (hwid & ~MPIDR_HWID_BITMASK) {
113
+
do {
114
+
hwid = be32_to_cpu(*cell++);
115
+
prop_bytes -= sizeof(*cell);
116
+
} while (!hwid && prop_bytes > 0);
117
+
118
+
if (prop_bytes || (hwid & ~MPIDR_HWID_BITMASK)) {
117
119
of_node_put(cpu);
118
120
return;
119
121
}