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linux
ARM: shmobile: r8a7790: Add Audio DMAC devices to DT
Instantiate the two Audio DMA controllers in the r8a7790 device tree.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[geert: corrected spelling of audmac1]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
authored by
Kuninori Morimoto
and committed by
Simon Horman
ba3240be
148ebf47
+63
-3
+61
-3
arch/arm/boot/dts/r8a7790.dtsi
+61
-3
arch/arm/boot/dts/r8a7790.dtsi
···
312
312
#dma-cells = <1>;
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dma-channels = <15>;
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};
315
+
316
+
audma0: dma-controller@ec700000 {
317
+
compatible = "renesas,rcar-dmac";
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+
reg = <0 0xec700000 0 0x10000>;
319
+
interrupts = <0 346 IRQ_TYPE_LEVEL_HIGH
320
+
0 320 IRQ_TYPE_LEVEL_HIGH
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+
0 321 IRQ_TYPE_LEVEL_HIGH
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+
0 322 IRQ_TYPE_LEVEL_HIGH
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+
0 323 IRQ_TYPE_LEVEL_HIGH
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+
0 324 IRQ_TYPE_LEVEL_HIGH
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+
0 325 IRQ_TYPE_LEVEL_HIGH
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+
0 326 IRQ_TYPE_LEVEL_HIGH
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+
0 327 IRQ_TYPE_LEVEL_HIGH
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+
0 328 IRQ_TYPE_LEVEL_HIGH
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+
0 329 IRQ_TYPE_LEVEL_HIGH
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+
0 330 IRQ_TYPE_LEVEL_HIGH
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+
0 331 IRQ_TYPE_LEVEL_HIGH
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+
0 332 IRQ_TYPE_LEVEL_HIGH>;
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+
interrupt-names = "error",
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+
"ch0", "ch1", "ch2", "ch3",
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+
"ch4", "ch5", "ch6", "ch7",
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+
"ch8", "ch9", "ch10", "ch11",
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+
"ch12";
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+
clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC0>;
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+
clock-names = "fck";
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+
#dma-cells = <1>;
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+
dma-channels = <13>;
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+
};
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+
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+
audma1: dma-controller@ec720000 {
345
+
compatible = "renesas,rcar-dmac";
346
+
reg = <0 0xec720000 0 0x10000>;
347
+
interrupts = <0 347 IRQ_TYPE_LEVEL_HIGH
348
+
0 333 IRQ_TYPE_LEVEL_HIGH
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+
0 334 IRQ_TYPE_LEVEL_HIGH
350
+
0 335 IRQ_TYPE_LEVEL_HIGH
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+
0 336 IRQ_TYPE_LEVEL_HIGH
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+
0 337 IRQ_TYPE_LEVEL_HIGH
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+
0 338 IRQ_TYPE_LEVEL_HIGH
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+
0 339 IRQ_TYPE_LEVEL_HIGH
355
+
0 340 IRQ_TYPE_LEVEL_HIGH
356
+
0 341 IRQ_TYPE_LEVEL_HIGH
357
+
0 342 IRQ_TYPE_LEVEL_HIGH
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+
0 343 IRQ_TYPE_LEVEL_HIGH
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+
0 344 IRQ_TYPE_LEVEL_HIGH
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+
0 345 IRQ_TYPE_LEVEL_HIGH>;
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+
interrupt-names = "error",
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+
"ch0", "ch1", "ch2", "ch3",
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+
"ch4", "ch5", "ch6", "ch7",
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+
"ch8", "ch9", "ch10", "ch11",
365
+
"ch12";
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+
clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC1>;
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+
clock-names = "fck";
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+
#dma-cells = <1>;
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+
dma-channels = <13>;
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+
};
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+
315
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i2c0: i2c@e6508000 {
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#address-cells = <1>;
317
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#size-cells = <0>;
···
1107
1050
mstp5_clks: mstp5_clks@e6150144 {
1108
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compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1109
1052
reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
1110
-
clocks = <&extal_clk>, <&p_clk>;
1053
+
clocks = <&hp_clk>, <&hp_clk>, <&extal_clk>, <&p_clk>;
1111
1054
#clock-cells = <1>;
1112
-
renesas,clock-indices = <R8A7790_CLK_THERMAL R8A7790_CLK_PWM>;
1113
-
clock-output-names = "thermal", "pwm";
1055
+
renesas,clock-indices = <R8A7790_CLK_AUDIO_DMAC0 R8A7790_CLK_AUDIO_DMAC1
1056
+
R8A7790_CLK_THERMAL R8A7790_CLK_PWM>;
1057
+
clock-output-names = "audmac0", "audmac1", "thermal", "pwm";
1114
1058
};
1115
1059
mstp7_clks: mstp7_clks@e615014c {
1116
1060
compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";