Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

media: nxp: imx8-isi: fix buiding on 32-bit

The #if check is wrong, leading to a build failure:

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c: In function 'mxc_isi_channel_set_inbuf':
drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c:33:5: error: "CONFIG_ARCH_DMA_ADDR_T_64BIT" is not defined, evaluates to 0 [-Werror=undef]
33 | #if CONFIG_ARCH_DMA_ADDR_T_64BIT
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~

This could just be an #ifdef, but it seems nicer to just remove the
check entirely. Apparently the only reason for the #ifdef is to avoid
another warning:

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c:55:24: error: right shift count >= width of type [-Werror=shift-count-overflow]

But this is best avoided by using the lower_32_bits()/upper_32_bits()
helpers.

Fixes: cf21f328fcaf ("media: nxp: Add i.MX8 ISI driver")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

authored by

Arnd Bergmann and committed by
Linus Torvalds
ba0ad6ed ac9a7868

+21 -20
+21 -20
drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
··· 29 29 30 30 void mxc_isi_channel_set_inbuf(struct mxc_isi_pipe *pipe, dma_addr_t dma_addr) 31 31 { 32 - mxc_isi_write(pipe, CHNL_IN_BUF_ADDR, dma_addr); 33 - #if CONFIG_ARCH_DMA_ADDR_T_64BIT 32 + mxc_isi_write(pipe, CHNL_IN_BUF_ADDR, lower_32_bits(dma_addr)); 34 33 if (pipe->isi->pdata->has_36bit_dma) 35 - mxc_isi_write(pipe, CHNL_IN_BUF_XTND_ADDR, dma_addr >> 32); 36 - #endif 34 + mxc_isi_write(pipe, CHNL_IN_BUF_XTND_ADDR, 35 + upper_32_bits(dma_addr)); 37 36 } 38 37 39 38 void mxc_isi_channel_set_outbuf(struct mxc_isi_pipe *pipe, ··· 44 45 val = mxc_isi_read(pipe, CHNL_OUT_BUF_CTRL); 45 46 46 47 if (buf_id == MXC_ISI_BUF1) { 47 - mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_Y, dma_addrs[0]); 48 - mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_U, dma_addrs[1]); 49 - mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_V, dma_addrs[2]); 50 - #if CONFIG_ARCH_DMA_ADDR_T_64BIT 48 + mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_Y, 49 + lower_32_bits(dma_addrs[0])); 50 + mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_U, 51 + lower_32_bits(dma_addrs[1])); 52 + mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_V, 53 + lower_32_bits(dma_addrs[2])); 51 54 if (pipe->isi->pdata->has_36bit_dma) { 52 55 mxc_isi_write(pipe, CHNL_Y_BUF1_XTND_ADDR, 53 - dma_addrs[0] >> 32); 56 + upper_32_bits(dma_addrs[0])); 54 57 mxc_isi_write(pipe, CHNL_U_BUF1_XTND_ADDR, 55 - dma_addrs[1] >> 32); 58 + upper_32_bits(dma_addrs[1])); 56 59 mxc_isi_write(pipe, CHNL_V_BUF1_XTND_ADDR, 57 - dma_addrs[2] >> 32); 60 + upper_32_bits(dma_addrs[2])); 58 61 } 59 - #endif 60 62 val ^= CHNL_OUT_BUF_CTRL_LOAD_BUF1_ADDR; 61 63 } else { 62 - mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_Y, dma_addrs[0]); 63 - mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_U, dma_addrs[1]); 64 - mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_V, dma_addrs[2]); 65 - #if CONFIG_ARCH_DMA_ADDR_T_64BIT 64 + mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_Y, 65 + lower_32_bits(dma_addrs[0])); 66 + mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_U, 67 + lower_32_bits(dma_addrs[1])); 68 + mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_V, 69 + lower_32_bits(dma_addrs[2])); 66 70 if (pipe->isi->pdata->has_36bit_dma) { 67 71 mxc_isi_write(pipe, CHNL_Y_BUF2_XTND_ADDR, 68 - dma_addrs[0] >> 32); 72 + upper_32_bits(dma_addrs[0])); 69 73 mxc_isi_write(pipe, CHNL_U_BUF2_XTND_ADDR, 70 - dma_addrs[1] >> 32); 74 + upper_32_bits(dma_addrs[1])); 71 75 mxc_isi_write(pipe, CHNL_V_BUF2_XTND_ADDR, 72 - dma_addrs[2] >> 32); 76 + upper_32_bits(dma_addrs[2])); 73 77 } 74 - #endif 75 78 val ^= CHNL_OUT_BUF_CTRL_LOAD_BUF2_ADDR; 76 79 } 77 80