Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
tjh.dev
kernel
os
linux
sata_mv: PHY_MODE4 cleanups
The handling for PHY_MODE4 was originally just cloned from the
Marvell proprietary driver (with their blessing).
But we can do better than that.
Tidy things up with some judicious mask definitions, to improve maintainability.
Signed-off-by: Mark Lord <mlord@pobox.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
authored by Mark Lord and committed by Jeff Garzik ba069e37 e1fefea9
+14
-10
drivers/ata/sata_mv.c
+14
-10
drivers/ata/sata_mv.c
···
224
225
PHY_MODE3 = 0x310,
226
PHY_MODE4 = 0x314,
227
PHY_MODE2 = 0x330,
228
SATA_IFCTL_OFS = 0x344,
229
SATA_TESTCTL_OFS = 0x348,
···
2568
m3 &= ~0x1c;
2569
2570
if (fix_phy_mode4) {
2571
-
u32 m4;
2572
-
2573
-
m4 = readl(port_mmio + PHY_MODE4);
2574
-
2575
-
/* workaround for errata FEr SATA#10 (part 1) */
2576
-
m4 = (m4 & ~(1 << 1)) | (1 << 0);
2577
-
2578
-
/* enforce bit restrictions on GenIIe devices */
2579
if (IS_GEN_IIE(hpriv))
2580
-
m4 = (m4 & ~0x5DE3FFFC) | (1 << 2);
2581
-
2582
writel(m4, port_mmio + PHY_MODE4);
2583
}
2584
/*
···
224
225
PHY_MODE3 = 0x310,
226
PHY_MODE4 = 0x314,
227
+
PHY_MODE4_CFG_MASK = 0x00000003, /* phy internal config field */
228
+
PHY_MODE4_CFG_VALUE = 0x00000001, /* phy internal config field */
229
+
PHY_MODE4_RSVD_ZEROS = 0x5de3fffa, /* Gen2e always write zeros */
230
+
PHY_MODE4_RSVD_ONES = 0x00000005, /* Gen2e always write ones */
231
+
232
PHY_MODE2 = 0x330,
233
SATA_IFCTL_OFS = 0x344,
234
SATA_TESTCTL_OFS = 0x348,
···
2563
m3 &= ~0x1c;
2564
2565
if (fix_phy_mode4) {
2566
+
u32 m4 = readl(port_mmio + PHY_MODE4);
2567
+
/*
2568
+
* Enforce reserved-bit restrictions on GenIIe devices only.
2569
+
* For earlier chipsets, force only the internal config field
2570
+
* (workaround for errata FEr SATA#10 part 1).
2571
+
*/
2572
if (IS_GEN_IIE(hpriv))
2573
+
m4 = (m4 & ~PHY_MODE4_RSVD_ZEROS) | PHY_MODE4_RSVD_ONES;
2574
+
else
2575
+
m4 = (m4 & ~PHY_MODE4_CFG_MASK) | PHY_MODE4_CFG_VALUE;
2576
writel(m4, port_mmio + PHY_MODE4);
2577
}
2578
/*