Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'ux500-dts-v5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt

Ux500 DTS updates for the v5.17 kernel series:

- Add reset lines to applicable IP blocks
- Fix the magnetometer in the Gavini device tree

* tag 'ux500-dts-v5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: ux500: Fixup Gavini magnetometer
ARM: dts: ux500: Add reset lines to IP blocks

Link: https://lore.kernel.org/r/CACRpkdZuDPLj5Tcxbyd+JGfvBGQ8RuMP9PAsGsZT7pY8KoyOKg@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

+45 -20
+26
arch/arm/boot/dts/ste-dbx5x0.dtsi
··· 5 5 6 6 #include <dt-bindings/interrupt-controller/irq.h> 7 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 + #include <dt-bindings/reset/stericsson,db8500-prcc-reset.h> 8 9 #include <dt-bindings/mfd/dbx500-prcmu.h> 9 10 #include <dt-bindings/arm/ux500_pm_domains.h> 10 11 #include <dt-bindings/gpio/gpio.h> ··· 299 298 300 299 prcc_kclk: prcc-kernel-clock { 301 300 #clock-cells = <2>; 301 + }; 302 + 303 + prcc_reset: prcc-reset-controller { 304 + #reset-cells = <2>; 302 305 }; 303 306 304 307 rtc_clk: rtc32k-clock { ··· 667 662 clocks = <&prcc_kclk 3 3>, <&prcc_pclk 3 3>; 668 663 clock-names = "i2cclk", "apb_pclk"; 669 664 power-domains = <&pm_domains DOMAIN_VAPE>; 665 + resets = <&prcc_reset DB8500_PRCC_3 DB8500_PRCC_3_RESET_I2C0>; 670 666 671 667 status = "disabled"; 672 668 }; ··· 686 680 clocks = <&prcc_kclk 1 2>, <&prcc_pclk 1 2>; 687 681 clock-names = "i2cclk", "apb_pclk"; 688 682 power-domains = <&pm_domains DOMAIN_VAPE>; 683 + resets = <&prcc_reset DB8500_PRCC_1 DB8500_PRCC_1_RESET_I2C1>; 689 684 690 685 status = "disabled"; 691 686 }; ··· 705 698 clocks = <&prcc_kclk 1 6>, <&prcc_pclk 1 6>; 706 699 clock-names = "i2cclk", "apb_pclk"; 707 700 power-domains = <&pm_domains DOMAIN_VAPE>; 701 + resets = <&prcc_reset DB8500_PRCC_1 DB8500_PRCC_1_RESET_I2C2>; 708 702 709 703 status = "disabled"; 710 704 }; ··· 724 716 clocks = <&prcc_kclk 2 0>, <&prcc_pclk 2 0>; 725 717 clock-names = "i2cclk", "apb_pclk"; 726 718 power-domains = <&pm_domains DOMAIN_VAPE>; 719 + resets = <&prcc_reset DB8500_PRCC_2 DB8500_PRCC_2_RESET_I2C3>; 727 720 728 721 status = "disabled"; 729 722 }; ··· 743 734 clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 10>; 744 735 clock-names = "i2cclk", "apb_pclk"; 745 736 power-domains = <&pm_domains DOMAIN_VAPE>; 737 + resets = <&prcc_reset DB8500_PRCC_1 DB8500_PRCC_1_RESET_I2C4>; 746 738 747 739 status = "disabled"; 748 740 }; ··· 760 750 <&dma 8 0 0x0>; /* Logical - MemToDev */ 761 751 dma-names = "rx", "tx"; 762 752 power-domains = <&pm_domains DOMAIN_VAPE>; 753 + resets = <&prcc_reset DB8500_PRCC_3 DB8500_PRCC_3_RESET_SSP0>; 763 754 764 755 status = "disabled"; 765 756 }; ··· 777 766 <&dma 9 0 0x0>; /* Logical - MemToDev */ 778 767 dma-names = "rx", "tx"; 779 768 power-domains = <&pm_domains DOMAIN_VAPE>; 769 + resets = <&prcc_reset DB8500_PRCC_3 DB8500_PRCC_3_RESET_SSP1>; 780 770 781 771 status = "disabled"; 782 772 }; ··· 846 834 <&dma 40 0 0x0>; /* Logical - MemToDev */ 847 835 dma-names = "rx", "tx"; 848 836 power-domains = <&pm_domains DOMAIN_VAPE>; 837 + resets = <&prcc_reset DB8500_PRCC_1 DB8500_PRCC_1_RESET_SPI3>; 849 838 850 839 status = "disabled"; 851 840 }; ··· 862 849 863 850 clocks = <&prcc_kclk 1 0>, <&prcc_pclk 1 0>; 864 851 clock-names = "uart", "apb_pclk"; 852 + resets = <&prcc_reset DB8500_PRCC_1 DB8500_PRCC_1_RESET_UART0>; 865 853 866 854 status = "disabled"; 867 855 }; ··· 878 864 879 865 clocks = <&prcc_kclk 1 1>, <&prcc_pclk 1 1>; 880 866 clock-names = "uart", "apb_pclk"; 867 + resets = <&prcc_reset DB8500_PRCC_1 DB8500_PRCC_1_RESET_UART1>; 881 868 882 869 status = "disabled"; 883 870 }; ··· 894 879 895 880 clocks = <&prcc_kclk 3 6>, <&prcc_pclk 3 6>; 896 881 clock-names = "uart", "apb_pclk"; 882 + resets = <&prcc_reset DB8500_PRCC_3 DB8500_PRCC_3_RESET_UART2>; 897 883 898 884 status = "disabled"; 899 885 }; ··· 911 895 clocks = <&prcc_kclk 1 5>, <&prcc_pclk 1 5>; 912 896 clock-names = "sdi", "apb_pclk"; 913 897 power-domains = <&pm_domains DOMAIN_VAPE>; 898 + resets = <&prcc_reset DB8500_PRCC_1 DB8500_PRCC_1_RESET_SDI0>; 914 899 915 900 status = "disabled"; 916 901 }; ··· 928 911 clocks = <&prcc_kclk 2 4>, <&prcc_pclk 2 6>; 929 912 clock-names = "sdi", "apb_pclk"; 930 913 power-domains = <&pm_domains DOMAIN_VAPE>; 914 + resets = <&prcc_reset DB8500_PRCC_2 DB8500_PRCC_2_RESET_SDI1>; 931 915 932 916 status = "disabled"; 933 917 }; ··· 945 927 clocks = <&prcc_kclk 3 4>, <&prcc_pclk 3 4>; 946 928 clock-names = "sdi", "apb_pclk"; 947 929 power-domains = <&pm_domains DOMAIN_VAPE>; 930 + resets = <&prcc_reset DB8500_PRCC_3 DB8500_PRCC_3_RESET_SDI2>; 948 931 949 932 status = "disabled"; 950 933 }; ··· 962 943 clocks = <&prcc_kclk 2 5>, <&prcc_pclk 2 7>; 963 944 clock-names = "sdi", "apb_pclk"; 964 945 power-domains = <&pm_domains DOMAIN_VAPE>; 946 + resets = <&prcc_reset DB8500_PRCC_2 DB8500_PRCC_2_RESET_SDI3>; 965 947 966 948 status = "disabled"; 967 949 }; ··· 979 959 clocks = <&prcc_kclk 2 2>, <&prcc_pclk 2 4>; 980 960 clock-names = "sdi", "apb_pclk"; 981 961 power-domains = <&pm_domains DOMAIN_VAPE>; 962 + resets = <&prcc_reset DB8500_PRCC_2 DB8500_PRCC_2_RESET_SDI4>; 982 963 983 964 status = "disabled"; 984 965 }; ··· 996 975 clocks = <&prcc_kclk 3 7>, <&prcc_pclk 3 7>; 997 976 clock-names = "sdi", "apb_pclk"; 998 977 power-domains = <&pm_domains DOMAIN_VAPE>; 978 + resets = <&prcc_reset DB8500_PRCC_3 DB8500_PRCC_3_RESET_SDI5>; 999 979 1000 980 status = "disabled"; 1001 981 }; ··· 1018 996 1019 997 clocks = <&prcc_kclk 1 3>, <&prcc_pclk 1 3>; 1020 998 clock-names = "msp", "apb_pclk"; 999 + resets = <&prcc_reset DB8500_PRCC_1 DB8500_PRCC_1_RESET_MSP0>; 1021 1000 1022 1001 status = "disabled"; 1023 1002 }; ··· 1035 1012 1036 1013 clocks = <&prcc_kclk 1 4>, <&prcc_pclk 1 4>; 1037 1014 clock-names = "msp", "apb_pclk"; 1015 + resets = <&prcc_reset DB8500_PRCC_1 DB8500_PRCC_1_RESET_MSP1>; 1038 1016 1039 1017 status = "disabled"; 1040 1018 }; ··· 1054 1030 1055 1031 clocks = <&prcc_kclk 2 3>, <&prcc_pclk 2 5>; 1056 1032 clock-names = "msp", "apb_pclk"; 1033 + resets = <&prcc_reset DB8500_PRCC_2 DB8500_PRCC_2_RESET_MSP2>; 1057 1034 1058 1035 status = "disabled"; 1059 1036 }; ··· 1071 1046 1072 1047 clocks = <&prcc_kclk 1 10>, <&prcc_pclk 1 11>; 1073 1048 clock-names = "msp", "apb_pclk"; 1049 + resets = <&prcc_reset DB8500_PRCC_1 DB8500_PRCC_1_RESET_MSP3>; 1074 1050 1075 1051 status = "disabled"; 1076 1052 };
+19 -20
arch/arm/boot/dts/ste-ux500-samsung-gavini.dts
··· 232 232 #address-cells = <1>; 233 233 #size-cells = <0>; 234 234 235 - /* TODO: Memsic MMC328 magnetometer */ 236 - magnetometer@30 { 237 - compatible = "memsic,mmc328"; 238 - reg = <0x30>; 239 - /* TODO: if you have the schematic, check if both voltages come from AUX2 */ 240 - /* VDA 1.8 V */ 241 - vda-supply = <&ab8500_ldo_aux2_reg>; 242 - /* VDD 1.8V */ 243 - vdd-supply = <&ab8500_ldo_aux2_reg>; 244 - /* GPIO204 */ 235 + /* Yamaha YAS530 magnetometer */ 236 + magnetometer@2e { 237 + compatible = "yamaha,yas530"; 238 + reg = <0x2e>; 239 + /* VDD 3V */ 240 + vdd-supply = <&ab8500_ldo_aux1_reg>; 241 + /* IOVDD 1.8V */ 242 + iovdd-supply = <&ab8500_ldo_aux2_reg>; 243 + /* GPIO204 COMPASS_RST_N */ 245 244 reset-gpios = <&gpio6 12 GPIO_ACTIVE_LOW>; 246 245 pinctrl-names = "default"; 247 - pinctrl-0 = <&mmc328_default>; 246 + pinctrl-0 = <&yas530_default>; 248 247 }; 249 248 /* TODO: this should also be used by the NCP6914 Camera power management unit */ 250 249 }; ··· 644 645 }; 645 646 }; 646 647 }; 648 + /* Reset line for the Yamaha YAS530 magnetometer */ 649 + yas530 { 650 + yas530_default: yas530_janice { 651 + janice_cfg1 { 652 + pins = "GPIO204_AF23"; 653 + ste,config = <&gpio_out_hi>; 654 + }; 655 + }; 656 + }; 647 657 /* Flash and torch */ 648 658 flash { 649 659 gpio_flash_default_mode: flash_default { ··· 752 744 gavini_cfg1 { 753 745 pins = "GPIO218_AH11"; /* TSP_INT_1V8 */ 754 746 ste,config = <&gpio_in_nopull>; 755 - }; 756 - }; 757 - }; 758 - /* Reset line for the Memsic MMC328 magnetometer */ 759 - mmc328 { 760 - mmc328_default: mmc328_gavini { 761 - gavini_cfg1 { 762 - pins = "GPIO204_AF23"; 763 - ste,config = <&gpio_out_hi>; 764 747 }; 765 748 }; 766 749 };