drm/amdgpu: update Polaris11 golden setting

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Flora Cui and committed by

Alex Deucher 10 years ago b9934878 35621b80

+6 -3

3 changed files

expand all

drivers

gpu

drm

amd

amdgpu

dce_v11_0.c

gfx_v8_0.c

sdma_v3_0.c

+1 -1

drivers/gpu/drm/amd/amdgpu/dce_v11_0.c

··· 137 137 mmDCI_CLK_CNTL, 0x00000080, 0x00000000, 138 138 mmFBC_DEBUG_COMP, 0x000000f0, 0x00000070, 139 139 mmFBC_DEBUG1, 0xffffffff, 0x00000008, 140 - mmFBC_MISC, 0x9f313fff, 0x14300008, 140 + mmFBC_MISC, 0x9f313fff, 0x14302008, 141 141 mmHDMI_CONTROL, 0x313f031f, 0x00000011, 142 142 }; 143 143

+3 -2

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

··· 267 267 268 268 static const u32 golden_settings_polaris11_a11[] = 269 269 { 270 + mmCB_HW_CONTROL, 0xfffdf3cf, 0x00006208, 270 271 mmCB_HW_CONTROL_3, 0x000001ff, 0x00000040, 271 272 mmDB_DEBUG2, 0xf00fffff, 0x00000400, 272 273 mmPA_SC_ENHANCE, 0xffffffff, 0x20000001, 273 274 mmPA_SC_LINE_STIPPLE_STATE, 0x0000ff0f, 0x00000000, 275 + mmPA_SC_RASTER_CONFIG, 0x3f3fffff, 0x16000012, 276 + mmPA_SC_RASTER_CONFIG_1, 0x0000003f, 0x00000000, 274 277 mmRLC_CGCG_CGLS_CTRL, 0x00000003, 0x0001003c, 275 278 mmRLC_CGCG_CGLS_CTRL_3D, 0xffffffff, 0x0001003c, 276 279 mmSQ_CONFIG, 0x07f80000, 0x07180000, ··· 287 284 static const u32 polaris11_golden_common_all[] = 288 285 { 289 286 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000, 290 - mmPA_SC_RASTER_CONFIG, 0xffffffff, 0x16000012, 291 - mmPA_SC_RASTER_CONFIG_1, 0xffffffff, 0x00000000, 292 287 mmGB_ADDR_CONFIG, 0xffffffff, 0x22011002, 293 288 mmSPI_RESOURCE_RESERVE_CU_0, 0xffffffff, 0x00000800, 294 289 mmSPI_RESOURCE_RESERVE_CU_1, 0xffffffff, 0x00000800,

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

··· 109 109 static const u32 golden_settings_polaris11_a11[] = 110 110 { 111 111 mmSDMA0_CHICKEN_BITS, 0xfc910007, 0x00810007, 112 + mmSDMA0_CLK_CTRL, 0xff000fff, 0x00000000, 112 113 mmSDMA0_GFX_IB_CNTL, 0x800f0111, 0x00000100, 113 114 mmSDMA0_RLC0_IB_CNTL, 0x800f0111, 0x00000100, 114 115 mmSDMA0_RLC1_IB_CNTL, 0x800f0111, 0x00000100, 115 116 mmSDMA1_CHICKEN_BITS, 0xfc910007, 0x00810007, 117 + mmSDMA1_CLK_CTRL, 0xff000fff, 0x00000000, 116 118 mmSDMA1_GFX_IB_CNTL, 0x800f0111, 0x00000100, 117 119 mmSDMA1_RLC0_IB_CNTL, 0x800f0111, 0x00000100, 118 120 mmSDMA1_RLC1_IB_CNTL, 0x800f0111, 0x00000100,