tjh.dev / kernel
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radeon/audio: fix whitespace

Use proper tabs.

Signed-off-by: Slava Grigorev <slava.grigorev@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Slava Grigorev and committed by
Alex Deucher b983a8f4 5c046a57

+16 -16
+16 -16
drivers/gpu/drm/radeon/dce6_afmt.c
··· 252 252 void dce6_hdmi_audio_set_dto(struct radeon_device *rdev, 253 253 struct radeon_crtc *crtc, unsigned int clock) 254 254 { 255 - /* Two dtos; generally use dto0 for HDMI */ 255 + /* Two dtos; generally use dto0 for HDMI */ 256 256 u32 value = 0; 257 257 258 - if (crtc) 258 + if (crtc) 259 259 value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id); 260 260 261 261 WREG32(DCCG_AUDIO_DTO_SOURCE, value); 262 262 263 - /* Express [24MHz / target pixel clock] as an exact rational 264 - * number (coefficient of two integer numbers. DCCG_AUDIO_DTOx_PHASE 265 - * is the numerator, DCCG_AUDIO_DTOx_MODULE is the denominator 266 - */ 267 - WREG32(DCCG_AUDIO_DTO0_PHASE, 24000); 268 - WREG32(DCCG_AUDIO_DTO0_MODULE, clock); 263 + /* Express [24MHz / target pixel clock] as an exact rational 264 + * number (coefficient of two integer numbers. DCCG_AUDIO_DTOx_PHASE 265 + * is the numerator, DCCG_AUDIO_DTOx_MODULE is the denominator 266 + */ 267 + WREG32(DCCG_AUDIO_DTO0_PHASE, 24000); 268 + WREG32(DCCG_AUDIO_DTO0_MODULE, clock); 269 269 } 270 270 271 271 void dce6_dp_audio_set_dto(struct radeon_device *rdev, 272 272 struct radeon_crtc *crtc, unsigned int clock) 273 273 { 274 - /* Two dtos; generally use dto1 for DP */ 274 + /* Two dtos; generally use dto1 for DP */ 275 275 u32 value = 0; 276 276 value |= DCCG_AUDIO_DTO_SEL; 277 277 278 - if (crtc) 278 + if (crtc) 279 279 value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id); 280 280 281 281 WREG32(DCCG_AUDIO_DTO_SOURCE, value); 282 282 283 - /* Express [24MHz / target pixel clock] as an exact rational 284 - * number (coefficient of two integer numbers. DCCG_AUDIO_DTOx_PHASE 285 - * is the numerator, DCCG_AUDIO_DTOx_MODULE is the denominator 286 - */ 287 - WREG32(DCCG_AUDIO_DTO1_PHASE, 24000); 288 - WREG32(DCCG_AUDIO_DTO1_MODULE, clock); 283 + /* Express [24MHz / target pixel clock] as an exact rational 284 + * number (coefficient of two integer numbers. DCCG_AUDIO_DTOx_PHASE 285 + * is the numerator, DCCG_AUDIO_DTOx_MODULE is the denominator 286 + */ 287 + WREG32(DCCG_AUDIO_DTO1_PHASE, 24000); 288 + WREG32(DCCG_AUDIO_DTO1_MODULE, clock); 289 289 } 290 290 291 291 void dce6_dp_enable(struct drm_encoder *encoder, bool enable)