Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amdgpu: move get_gpu_clock_counter into the gfx struct

It's gfx IP specific, not asic specific, so move to a
gfx callback.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

+22 -14
+7 -3
drivers/gpu/drm/amd/amdgpu/amdgpu.h
··· 1150 1150 uint32_t bitmap[4][4]; 1151 1151 }; 1152 1152 1153 + struct amdgpu_gfx_funcs { 1154 + /* get the gpu clock counter */ 1155 + uint64_t (*get_gpu_clock_counter)(struct amdgpu_device *adev); 1156 + }; 1157 + 1153 1158 struct amdgpu_gfx { 1154 1159 struct mutex gpu_clock_mutex; 1155 1160 struct amdgpu_gca_config config; ··· 1191 1186 /* ce ram size*/ 1192 1187 unsigned ce_ram_size; 1193 1188 struct amdgpu_cu_info cu_info; 1189 + const struct amdgpu_gfx_funcs *funcs; 1194 1190 }; 1195 1191 1196 1192 int amdgpu_ib_get(struct amdgpu_device *adev, struct amdgpu_vm *vm, ··· 1835 1829 int (*reset)(struct amdgpu_device *adev); 1836 1830 /* get the reference clock */ 1837 1831 u32 (*get_xclk)(struct amdgpu_device *adev); 1838 - /* get the gpu clock counter */ 1839 - uint64_t (*get_gpu_clock_counter)(struct amdgpu_device *adev); 1840 1832 /* MM block clocks */ 1841 1833 int (*set_uvd_clocks)(struct amdgpu_device *adev, u32 vclk, u32 dclk); 1842 1834 int (*set_vce_clocks)(struct amdgpu_device *adev, u32 evclk, u32 ecclk); ··· 2229 2225 #define amdgpu_asic_set_uvd_clocks(adev, v, d) (adev)->asic_funcs->set_uvd_clocks((adev), (v), (d)) 2230 2226 #define amdgpu_asic_set_vce_clocks(adev, ev, ec) (adev)->asic_funcs->set_vce_clocks((adev), (ev), (ec)) 2231 2227 #define amdgpu_asic_get_virtual_caps(adev) ((adev)->asic_funcs->get_virtual_caps((adev))) 2232 - #define amdgpu_asic_get_gpu_clock_counter(adev) (adev)->asic_funcs->get_gpu_clock_counter((adev)) 2233 2228 #define amdgpu_asic_read_disabled_bios(adev) (adev)->asic_funcs->read_disabled_bios((adev)) 2234 2229 #define amdgpu_asic_read_bios_from_rom(adev, b, l) (adev)->asic_funcs->read_bios_from_rom((adev), (b), (l)) 2235 2230 #define amdgpu_asic_read_register(adev, se, sh, offset, v)((adev)->asic_funcs->read_register((adev), (se), (sh), (offset), (v))) ··· 2281 2278 #define amdgpu_dpm_print_power_state(adev, ps) (adev)->pm.funcs->print_power_state((adev), (ps)) 2282 2279 #define amdgpu_dpm_vblank_too_short(adev) (adev)->pm.funcs->vblank_too_short((adev)) 2283 2280 #define amdgpu_dpm_enable_bapm(adev, e) (adev)->pm.funcs->enable_bapm((adev), (e)) 2281 + #define amdgpu_gfx_get_gpu_clock_counter(adev) (adev)->gfx.funcs->get_gpu_clock_counter((adev)) 2284 2282 2285 2283 #define amdgpu_dpm_get_temperature(adev) \ 2286 2284 ((adev)->pp_enabled ? \
+2 -2
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
··· 240 240 { 241 241 struct amdgpu_device *rdev = (struct amdgpu_device *)kgd; 242 242 243 - if (rdev->asic_funcs->get_gpu_clock_counter) 244 - return rdev->asic_funcs->get_gpu_clock_counter(rdev); 243 + if (rdev->gfx.funcs->get_gpu_clock_counter) 244 + return rdev->gfx.funcs->get_gpu_clock_counter(rdev); 245 245 return 0; 246 246 } 247 247
+1 -1
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
··· 347 347 return copy_to_user(out, &count, min(size, 4u)) ? -EFAULT : 0; 348 348 } 349 349 case AMDGPU_INFO_TIMESTAMP: 350 - ui64 = amdgpu_asic_get_gpu_clock_counter(adev); 350 + ui64 = amdgpu_gfx_get_gpu_clock_counter(adev); 351 351 return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0; 352 352 case AMDGPU_INFO_FW_VERSION: { 353 353 struct drm_amdgpu_info_firmware fw_info;
-2
drivers/gpu/drm/amd/amdgpu/cik.c
··· 2022 2022 .set_uvd_clocks = &cik_set_uvd_clocks, 2023 2023 .set_vce_clocks = &cik_set_vce_clocks, 2024 2024 .get_virtual_caps = &cik_get_virtual_caps, 2025 - /* these should be moved to their own ip modules */ 2026 - .get_gpu_clock_counter = &gfx_v7_0_get_gpu_clock_counter, 2027 2025 }; 2028 2026 2029 2027 static int cik_common_early_init(void *handle)
+6 -1
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
··· 4138 4138 * Fetches a GPU clock counter snapshot (SI). 4139 4139 * Returns the 64 bit clock counter snapshot. 4140 4140 */ 4141 - uint64_t gfx_v7_0_get_gpu_clock_counter(struct amdgpu_device *adev) 4141 + static uint64_t gfx_v7_0_get_gpu_clock_counter(struct amdgpu_device *adev) 4142 4142 { 4143 4143 uint64_t clock; 4144 4144 ··· 4198 4198 amdgpu_ring_write(ring, (1 << (oa_size + oa_base)) - (1 << oa_base)); 4199 4199 } 4200 4200 4201 + static const struct amdgpu_gfx_funcs gfx_v7_0_gfx_funcs = { 4202 + .get_gpu_clock_counter = &gfx_v7_0_get_gpu_clock_counter, 4203 + }; 4204 + 4201 4205 static int gfx_v7_0_early_init(void *handle) 4202 4206 { 4203 4207 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 4204 4208 4205 4209 adev->gfx.num_gfx_rings = GFX7_NUM_GFX_RINGS; 4206 4210 adev->gfx.num_compute_rings = GFX7_NUM_COMPUTE_RINGS; 4211 + adev->gfx.funcs = &gfx_v7_0_gfx_funcs; 4207 4212 gfx_v7_0_set_ring_funcs(adev); 4208 4213 gfx_v7_0_set_irq_funcs(adev); 4209 4214 gfx_v7_0_set_gds_init(adev);
-1
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.h
··· 30 30 void gfx_v7_0_enter_rlc_safe_mode(struct amdgpu_device *adev); 31 31 void gfx_v7_0_exit_rlc_safe_mode(struct amdgpu_device *adev); 32 32 void gfx_v7_0_rlc_stop(struct amdgpu_device *adev); 33 - uint64_t gfx_v7_0_get_gpu_clock_counter(struct amdgpu_device *adev); 34 33 void gfx_v7_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num); 35 34 36 35 #endif
+6 -1
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
··· 5147 5147 * Fetches a GPU clock counter snapshot. 5148 5148 * Returns the 64 bit clock counter snapshot. 5149 5149 */ 5150 - uint64_t gfx_v8_0_get_gpu_clock_counter(struct amdgpu_device *adev) 5150 + static uint64_t gfx_v8_0_get_gpu_clock_counter(struct amdgpu_device *adev) 5151 5151 { 5152 5152 uint64_t clock; 5153 5153 ··· 5207 5207 amdgpu_ring_write(ring, (1 << (oa_size + oa_base)) - (1 << oa_base)); 5208 5208 } 5209 5209 5210 + static const struct amdgpu_gfx_funcs gfx_v8_0_gfx_funcs = { 5211 + .get_gpu_clock_counter = &gfx_v8_0_get_gpu_clock_counter, 5212 + }; 5213 + 5210 5214 static int gfx_v8_0_early_init(void *handle) 5211 5215 { 5212 5216 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 5213 5217 5214 5218 adev->gfx.num_gfx_rings = GFX8_NUM_GFX_RINGS; 5215 5219 adev->gfx.num_compute_rings = GFX8_NUM_COMPUTE_RINGS; 5220 + adev->gfx.funcs = &gfx_v8_0_gfx_funcs; 5216 5221 gfx_v8_0_set_ring_funcs(adev); 5217 5222 gfx_v8_0_set_irq_funcs(adev); 5218 5223 gfx_v8_0_set_gds_init(adev);
-1
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.h
··· 26 26 27 27 extern const struct amd_ip_funcs gfx_v8_0_ip_funcs; 28 28 29 - uint64_t gfx_v8_0_get_gpu_clock_counter(struct amdgpu_device *adev); 30 29 void gfx_v8_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num); 31 30 32 31 #endif
-2
drivers/gpu/drm/amd/amdgpu/vi.c
··· 1138 1138 .set_uvd_clocks = &vi_set_uvd_clocks, 1139 1139 .set_vce_clocks = &vi_set_vce_clocks, 1140 1140 .get_virtual_caps = &vi_get_virtual_caps, 1141 - /* these should be moved to their own ip modules */ 1142 - .get_gpu_clock_counter = &gfx_v8_0_get_gpu_clock_counter, 1143 1141 }; 1144 1142 1145 1143 static int vi_common_early_init(void *handle)