Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'stm32-dt-for-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT updates for v5.3, round 1

Highlights:
----------

MPU part:
-Add stm32mp157a-avenger board support:
This board embeds a STM32MP157a SOC with AC package (TFBGA361, 148 ios)
, 1024MB of DDR3 and STPMIC1A pmic . Several connections are available on this boards:
2x Type A (USB 2.0) Host and 1x Micro B (USB 2.0) OTG, ethernet
10/100/1000, WiFi 5 GHz & 2.4GHz, ...
-Add STMFX support en stm32mp157c-ev1 and enable joystick connected on
it.
-Add I2S and SAI support on stm32mp157c.
-Add and enable support of Vivante GPU on stm32mp157 ED1 and DK1 boards
(EV1 and DK2 inherit of it).
-Add camera support:
-Add DCMI support on stm32mp157c SOC
-Enabled OV5640 camera support on stm32mp157c-ev1 board
-Enable hdmi bridge sii9022 & display controller on stm32mp157c-dk1
board.

MCU part:
-Add STMFX support en stm32746g-eval and enable connections on it:
leds and joystick

* tag 'stm32-dt-for-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (27 commits)
ARM: dts: stm32: replace rgmii mode with rgmii-id on stm32mp15 boards
ARM: dts: stm32: Add Avenger96 devicetree support based on STM32MP157A
dt-bindings: arm: stm32: Document Avenger96 devicetree binding
dt-bindings: arm: stm32: Convert STM32 SoC bindings to DT schema
ARM: dts: stm32: Add missing pinctrl definitions for STM32MP157
ARM: dts: stm32: add sai id registers to stm32mp157c
ARM: dts: stm32: add power supply of rm68200 on stm32mp157c-ev1
ARM: dts: stm32: enable display on stm32mp157c-dk1 board
ARM: dts: stm32: Add I2C 1 config for stm32mp157a-dk1
ARM: dts: stm32: enable OV5640 camera on stm32mp157c-ev1 board
ARM: dts: stm32: add DCMI pins to stm32mp157c
ARM: dts: stm32: add DCMI camera interface support on stm32mp157c
ARM: dts: stm32: enable Vivante GPU support on stm32mp157a-dk1 board
ARM: dts: stm32: enable Vivante GPU support on stm32mp157c-ed1 board
ARM: dts: stm32: Add Vivante GPU support on STM32MP157c
ARM: dts: stm32: add i2s pins muxing on stm32mp157
ARM: dts: stm32: add i2s support on stm32mp157c
ARM: dts: stm32: add sai pins muxing on stm32mp157
ARM: dts: stm32: add sai support on stm32mp157c
ARM: dts: stm32: add jedec compatible for nor flash on stm32mp157c-ev1
...

Signed-off-by: Olof Johansson <olof@lixom.net>

+1345 -15
-10
Documentation/devicetree/bindings/arm/stm32/stm32.txt
··· 1 - STMicroelectronics STM32 Platforms Device Tree Bindings 2 - 3 - Each device tree must specify which STM32 SoC it uses, 4 - using one of the following compatible strings: 5 - 6 - st,stm32f429 7 - st,stm32f469 8 - st,stm32f746 9 - st,stm32h743 10 - st,stm32mp157
+31
Documentation/devicetree/bindings/arm/stm32/stm32.yaml
··· 1 + # SPDX-License-Identifier: GPL-2.0 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/arm/stm32/stm32.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: STMicroelectronics STM32 Platforms Device Tree Bindings 8 + 9 + maintainers: 10 + - Alexandre Torgue <alexandre.torgue@st.com> 11 + 12 + properties: 13 + compatible: 14 + oneOf: 15 + - items: 16 + - const: st,stm32f429 17 + 18 + - items: 19 + - const: st,stm32f469 20 + 21 + - items: 22 + - const: st,stm32f746 23 + 24 + - items: 25 + - const: st,stm32h743 26 + 27 + - items: 28 + - enum: 29 + - arrow,stm32mp157a-avenger96 # Avenger96 30 + - const: st,stm32mp157 31 + ...
+1
arch/arm/boot/dts/Makefile
··· 976 976 stm32746g-eval.dtb \ 977 977 stm32h743i-eval.dtb \ 978 978 stm32h743i-disco.dtb \ 979 + stm32mp157a-avenger96.dtb \ 979 980 stm32mp157a-dk1.dtb \ 980 981 stm32mp157c-dk2.dtb \ 981 982 stm32mp157c-ed1.dtb \
+66
arch/arm/boot/dts/stm32746g-eval.dts
··· 44 44 #include "stm32f746.dtsi" 45 45 #include "stm32f746-pinctrl.dtsi" 46 46 #include <dt-bindings/input/input.h> 47 + #include <dt-bindings/interrupt-controller/irq.h> 47 48 48 49 / { 49 50 model = "STMicroelectronics STM32746g-EVAL board"; ··· 70 69 gpios = <&gpiof 10 1>; 71 70 linux,default-trigger = "heartbeat"; 72 71 }; 72 + orange { 73 + gpios = <&stmfx_pinctrl 17 1>; 74 + }; 73 75 red { 74 76 gpios = <&gpiob 7 1>; 77 + }; 78 + blue { 79 + gpios = <&stmfx_pinctrl 19 1>; 75 80 }; 76 81 }; 77 82 ··· 90 83 label = "Wake up"; 91 84 linux,code = <KEY_WAKEUP>; 92 85 gpios = <&gpioc 13 0>; 86 + }; 87 + }; 88 + 89 + joystick { 90 + compatible = "gpio-keys"; 91 + #size-cells = <0>; 92 + pinctrl-0 = <&joystick_pins>; 93 + pinctrl-names = "default"; 94 + button-0 { 95 + label = "JoySel"; 96 + linux,code = <KEY_ENTER>; 97 + interrupt-parent = <&stmfx_pinctrl>; 98 + interrupts = <0 IRQ_TYPE_EDGE_FALLING>; 99 + }; 100 + button-1 { 101 + label = "JoyDown"; 102 + linux,code = <KEY_DOWN>; 103 + interrupt-parent = <&stmfx_pinctrl>; 104 + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; 105 + }; 106 + button-2 { 107 + label = "JoyLeft"; 108 + linux,code = <KEY_LEFT>; 109 + interrupt-parent = <&stmfx_pinctrl>; 110 + interrupts = <2 IRQ_TYPE_EDGE_FALLING>; 111 + }; 112 + button-3 { 113 + label = "JoyRight"; 114 + linux,code = <KEY_RIGHT>; 115 + interrupt-parent = <&stmfx_pinctrl>; 116 + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; 117 + }; 118 + button-4 { 119 + label = "JoyUp"; 120 + linux,code = <KEY_UP>; 121 + interrupt-parent = <&stmfx_pinctrl>; 122 + interrupts = <4 IRQ_TYPE_EDGE_FALLING>; 93 123 }; 94 124 }; 95 125 ··· 159 115 i2c-scl-rising-time-ns = <185>; 160 116 i2c-scl-falling-time-ns = <20>; 161 117 status = "okay"; 118 + 119 + stmfx: stmfx@42 { 120 + compatible = "st,stmfx-0300"; 121 + reg = <0x42>; 122 + interrupts = <8 IRQ_TYPE_EDGE_RISING>; 123 + interrupt-parent = <&gpioi>; 124 + 125 + stmfx_pinctrl: stmfx-pin-controller { 126 + compatible = "st,stmfx-0300-pinctrl"; 127 + gpio-controller; 128 + #gpio-cells = <2>; 129 + interrupt-controller; 130 + #interrupt-cells = <2>; 131 + gpio-ranges = <&stmfx_pinctrl 0 0 24>; 132 + 133 + joystick_pins: joystick { 134 + pins = "gpio0", "gpio1", "gpio2", "gpio3", "gpio4"; 135 + drive-push-pull; 136 + bias-pull-up; 137 + }; 138 + }; 139 + }; 162 140 }; 163 141 164 142 &rtc {
+246
arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
··· 26 26 st,bank-name = "GPIOA"; 27 27 ngpios = <16>; 28 28 gpio-ranges = <&pinctrl 0 0 16>; 29 + status = "disabled"; 29 30 }; 30 31 31 32 gpiob: gpio@50003000 { ··· 39 38 st,bank-name = "GPIOB"; 40 39 ngpios = <16>; 41 40 gpio-ranges = <&pinctrl 0 16 16>; 41 + status = "disabled"; 42 42 }; 43 43 44 44 gpioc: gpio@50004000 { ··· 52 50 st,bank-name = "GPIOC"; 53 51 ngpios = <16>; 54 52 gpio-ranges = <&pinctrl 0 32 16>; 53 + status = "disabled"; 55 54 }; 56 55 57 56 gpiod: gpio@50005000 { ··· 65 62 st,bank-name = "GPIOD"; 66 63 ngpios = <16>; 67 64 gpio-ranges = <&pinctrl 0 48 16>; 65 + status = "disabled"; 68 66 }; 69 67 70 68 gpioe: gpio@50006000 { ··· 78 74 st,bank-name = "GPIOE"; 79 75 ngpios = <16>; 80 76 gpio-ranges = <&pinctrl 0 64 16>; 77 + status = "disabled"; 81 78 }; 82 79 83 80 gpiof: gpio@50007000 { ··· 91 86 st,bank-name = "GPIOF"; 92 87 ngpios = <16>; 93 88 gpio-ranges = <&pinctrl 0 80 16>; 89 + status = "disabled"; 94 90 }; 95 91 96 92 gpiog: gpio@50008000 { ··· 104 98 st,bank-name = "GPIOG"; 105 99 ngpios = <16>; 106 100 gpio-ranges = <&pinctrl 0 96 16>; 101 + status = "disabled"; 107 102 }; 108 103 109 104 gpioh: gpio@50009000 { ··· 117 110 st,bank-name = "GPIOH"; 118 111 ngpios = <16>; 119 112 gpio-ranges = <&pinctrl 0 112 16>; 113 + status = "disabled"; 120 114 }; 121 115 122 116 gpioi: gpio@5000a000 { ··· 130 122 st,bank-name = "GPIOI"; 131 123 ngpios = <16>; 132 124 gpio-ranges = <&pinctrl 0 128 16>; 125 + status = "disabled"; 133 126 }; 134 127 135 128 gpioj: gpio@5000b000 { ··· 143 134 st,bank-name = "GPIOJ"; 144 135 ngpios = <16>; 145 136 gpio-ranges = <&pinctrl 0 144 16>; 137 + status = "disabled"; 146 138 }; 147 139 148 140 gpiok: gpio@5000c000 { ··· 156 146 st,bank-name = "GPIOK"; 157 147 ngpios = <8>; 158 148 gpio-ranges = <&pinctrl 0 160 8>; 149 + status = "disabled"; 159 150 }; 160 151 161 152 cec_pins_a: cec-0 { ··· 186 175 cec_pins_sleep_b: cec-sleep-1 { 187 176 pins { 188 177 pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */ 178 + }; 179 + }; 180 + 181 + dcmi_pins_a: dcmi-0 { 182 + pins { 183 + pinmux = <STM32_PINMUX('H', 8, AF13)>,/* DCMI_HSYNC */ 184 + <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */ 185 + <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */ 186 + <STM32_PINMUX('H', 9, AF13)>,/* DCMI_D0 */ 187 + <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */ 188 + <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */ 189 + <STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */ 190 + <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */ 191 + <STM32_PINMUX('I', 4, AF13)>,/* DCMI_D5 */ 192 + <STM32_PINMUX('B', 8, AF13)>,/* DCMI_D6 */ 193 + <STM32_PINMUX('E', 6, AF13)>,/* DCMI_D7 */ 194 + <STM32_PINMUX('I', 1, AF13)>,/* DCMI_D8 */ 195 + <STM32_PINMUX('H', 7, AF13)>,/* DCMI_D9 */ 196 + <STM32_PINMUX('I', 3, AF13)>,/* DCMI_D10 */ 197 + <STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */ 198 + bias-disable; 199 + }; 200 + }; 201 + 202 + dcmi_sleep_pins_a: dcmi-sleep-0 { 203 + pins { 204 + pinmux = <STM32_PINMUX('H', 8, ANALOG)>,/* DCMI_HSYNC */ 205 + <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */ 206 + <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */ 207 + <STM32_PINMUX('H', 9, ANALOG)>,/* DCMI_D0 */ 208 + <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */ 209 + <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */ 210 + <STM32_PINMUX('H', 12, ANALOG)>,/* DCMI_D3 */ 211 + <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */ 212 + <STM32_PINMUX('I', 4, ANALOG)>,/* DCMI_D5 */ 213 + <STM32_PINMUX('B', 8, ANALOG)>,/* DCMI_D6 */ 214 + <STM32_PINMUX('E', 6, ANALOG)>,/* DCMI_D7 */ 215 + <STM32_PINMUX('I', 1, ANALOG)>,/* DCMI_D8 */ 216 + <STM32_PINMUX('H', 7, ANALOG)>,/* DCMI_D9 */ 217 + <STM32_PINMUX('I', 3, ANALOG)>,/* DCMI_D10 */ 218 + <STM32_PINMUX('H', 15, ANALOG)>;/* DCMI_D11 */ 189 219 }; 190 220 }; 191 221 ··· 293 241 }; 294 242 }; 295 243 244 + i2c1_pins_b: i2c1-2 { 245 + pins { 246 + pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */ 247 + <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */ 248 + bias-disable; 249 + drive-open-drain; 250 + slew-rate = <0>; 251 + }; 252 + }; 253 + 254 + i2c1_pins_sleep_b: i2c1-3 { 255 + pins { 256 + pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */ 257 + <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */ 258 + }; 259 + }; 260 + 296 261 i2c2_pins_a: i2c2-0 { 297 262 pins { 298 263 pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */ ··· 324 255 pins { 325 256 pinmux = <STM32_PINMUX('H', 4, ANALOG)>, /* I2C2_SCL */ 326 257 <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */ 258 + }; 259 + }; 260 + 261 + i2c2_pins_b1: i2c2-2 { 262 + pins { 263 + pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */ 264 + bias-disable; 265 + drive-open-drain; 266 + slew-rate = <0>; 267 + }; 268 + }; 269 + 270 + i2c2_pins_sleep_b1: i2c2-3 { 271 + pins { 272 + pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */ 327 273 }; 328 274 }; 329 275 ··· 357 273 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C5_SCL */ 358 274 <STM32_PINMUX('A', 12, ANALOG)>; /* I2C5_SDA */ 359 275 276 + }; 277 + }; 278 + 279 + i2s2_pins_a: i2s2-0 { 280 + pins { 281 + pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */ 282 + <STM32_PINMUX('B', 9, AF5)>, /* I2S2_WS */ 283 + <STM32_PINMUX('A', 9, AF5)>; /* I2S2_CK */ 284 + slew-rate = <1>; 285 + drive-push-pull; 286 + bias-disable; 287 + }; 288 + }; 289 + 290 + i2s2_pins_sleep_a: i2s2-1 { 291 + pins { 292 + pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */ 293 + <STM32_PINMUX('B', 9, ANALOG)>, /* I2S2_WS */ 294 + <STM32_PINMUX('A', 9, ANALOG)>; /* I2S2_CK */ 360 295 }; 361 296 }; 362 297 ··· 573 470 }; 574 471 }; 575 472 473 + qspi_clk_sleep_pins_a: qspi-clk-sleep-0 { 474 + pins { 475 + pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */ 476 + }; 477 + }; 478 + 576 479 qspi_bk1_pins_a: qspi-bk1-0 { 577 480 pins1 { 578 481 pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */ ··· 597 488 }; 598 489 }; 599 490 491 + qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 { 492 + pins { 493 + pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */ 494 + <STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */ 495 + <STM32_PINMUX('F', 7, ANALOG)>, /* QSPI_BK1_IO2 */ 496 + <STM32_PINMUX('F', 6, ANALOG)>, /* QSPI_BK1_IO3 */ 497 + <STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */ 498 + }; 499 + }; 500 + 600 501 qspi_bk2_pins_a: qspi-bk2-0 { 601 502 pins1 { 602 503 pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */ ··· 622 503 bias-pull-up; 623 504 drive-push-pull; 624 505 slew-rate = <3>; 506 + }; 507 + }; 508 + 509 + qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 { 510 + pins { 511 + pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */ 512 + <STM32_PINMUX('H', 3, ANALOG)>, /* QSPI_BK2_IO1 */ 513 + <STM32_PINMUX('G', 10, ANALOG)>, /* QSPI_BK2_IO2 */ 514 + <STM32_PINMUX('G', 7, ANALOG)>, /* QSPI_BK2_IO3 */ 515 + <STM32_PINMUX('C', 0, ANALOG)>; /* QSPI_BK2_NCS */ 516 + }; 517 + }; 518 + 519 + sai2a_pins_a: sai2a-0 { 520 + pins { 521 + pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */ 522 + <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */ 523 + <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */ 524 + <STM32_PINMUX('E', 0, AF10)>; /* SAI2_MCLK_A */ 525 + slew-rate = <0>; 526 + drive-push-pull; 527 + bias-disable; 528 + }; 529 + }; 530 + 531 + sai2a_sleep_pins_a: sai2a-1 { 532 + pins { 533 + pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */ 534 + <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */ 535 + <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */ 536 + <STM32_PINMUX('E', 0, ANALOG)>; /* SAI2_MCLK_A */ 537 + }; 538 + }; 539 + 540 + sai2b_pins_a: sai2b-0 { 541 + pins1 { 542 + pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */ 543 + <STM32_PINMUX('E', 13, AF10)>, /* SAI2_FS_B */ 544 + <STM32_PINMUX('E', 14, AF10)>; /* SAI2_MCLK_B */ 545 + slew-rate = <0>; 546 + drive-push-pull; 547 + bias-disable; 548 + }; 549 + pins2 { 550 + pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */ 551 + bias-disable; 552 + }; 553 + }; 554 + 555 + sai2b_sleep_pins_a: sai2b-1 { 556 + pins { 557 + pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */ 558 + <STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */ 559 + <STM32_PINMUX('E', 13, ANALOG)>, /* SAI2_FS_B */ 560 + <STM32_PINMUX('E', 14, ANALOG)>; /* SAI2_MCLK_B */ 561 + }; 562 + }; 563 + 564 + sai2b_pins_b: sai2b-2 { 565 + pins { 566 + pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */ 567 + bias-disable; 568 + }; 569 + }; 570 + 571 + sai2b_sleep_pins_b: sai2b-3 { 572 + pins { 573 + pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */ 574 + }; 575 + }; 576 + 577 + sai4a_pins_a: sai4a-0 { 578 + pins { 579 + pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */ 580 + slew-rate = <0>; 581 + drive-push-pull; 582 + bias-disable; 583 + }; 584 + }; 585 + 586 + sai4a_sleep_pins_a: sai4a-1 { 587 + pins { 588 + pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */ 625 589 }; 626 590 }; 627 591 ··· 801 599 bias-disable; 802 600 }; 803 601 }; 602 + 603 + uart4_pins_b: uart4-1 { 604 + pins1 { 605 + pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */ 606 + bias-disable; 607 + drive-push-pull; 608 + slew-rate = <0>; 609 + }; 610 + pins2 { 611 + pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ 612 + bias-disable; 613 + }; 614 + }; 615 + 616 + uart7_pins_a: uart7-0 { 617 + pins1 { 618 + pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART4_TX */ 619 + bias-disable; 620 + drive-push-pull; 621 + slew-rate = <0>; 622 + }; 623 + pins2 { 624 + pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART4_RX */ 625 + <STM32_PINMUX('E', 10, AF7)>, /* UART4_CTS */ 626 + <STM32_PINMUX('E', 9, AF7)>; /* UART4_RTS */ 627 + bias-disable; 628 + }; 629 + }; 804 630 }; 805 631 806 632 pinctrl_z: pin-controller-z@54004000 { ··· 851 621 st,bank-ioport = <11>; 852 622 ngpios = <8>; 853 623 gpio-ranges = <&pinctrl_z 0 400 8>; 624 + status = "disabled"; 625 + }; 626 + 627 + i2c2_pins_b2: i2c2-0 { 628 + pins { 629 + pinmux = <STM32_PINMUX('Z', 0, AF3)>; /* I2C2_SCL */ 630 + bias-disable; 631 + drive-open-drain; 632 + slew-rate = <0>; 633 + }; 634 + }; 635 + 636 + i2c2_pins_sleep_b2: i2c2-1 { 637 + pins { 638 + pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */ 639 + }; 854 640 }; 855 641 856 642 i2c4_pins_a: i2c4-0 {
+321
arch/arm/boot/dts/stm32mp157a-avenger96.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 2 + /* 3 + * Copyright (C) Linaro Ltd 2019 - All Rights Reserved 4 + * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 5 + */ 6 + 7 + /dts-v1/; 8 + 9 + #include "stm32mp157c.dtsi" 10 + #include "stm32mp157xac-pinctrl.dtsi" 11 + #include <dt-bindings/gpio/gpio.h> 12 + #include <dt-bindings/mfd/st,stpmic1.h> 13 + 14 + / { 15 + model = "Arrow Electronics STM32MP157A Avenger96 board"; 16 + compatible = "arrow,stm32mp157a-avenger96", "st,stm32mp157"; 17 + 18 + aliases { 19 + ethernet0 = &ethernet0; 20 + mmc0 = &sdmmc1; 21 + serial0 = &uart4; 22 + serial1 = &uart7; 23 + }; 24 + 25 + chosen { 26 + stdout-path = "serial0:115200n8"; 27 + }; 28 + 29 + memory@c0000000 { 30 + device_type = "memory"; 31 + reg = <0xc0000000 0x40000000>; 32 + }; 33 + 34 + led { 35 + compatible = "gpio-leds"; 36 + led1 { 37 + label = "green:user1"; 38 + gpios = <&gpioz 7 GPIO_ACTIVE_HIGH>; 39 + linux,default-trigger = "heartbeat"; 40 + default-state = "off"; 41 + }; 42 + 43 + led2 { 44 + label = "green:user2"; 45 + gpios = <&gpiof 3 GPIO_ACTIVE_HIGH>; 46 + linux,default-trigger = "mmc0"; 47 + default-state = "off"; 48 + }; 49 + 50 + led3 { 51 + label = "green:user3"; 52 + gpios = <&gpiog 0 GPIO_ACTIVE_HIGH>; 53 + linux,default-trigger = "mmc1"; 54 + default-state = "off"; 55 + }; 56 + 57 + led4 { 58 + label = "green:user3"; 59 + gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>; 60 + linux,default-trigger = "none"; 61 + default-state = "off"; 62 + panic-indicator; 63 + }; 64 + 65 + led5 { 66 + label = "yellow:wifi"; 67 + gpios = <&gpioz 3 GPIO_ACTIVE_HIGH>; 68 + linux,default-trigger = "phy0tx"; 69 + default-state = "off"; 70 + }; 71 + 72 + led6 { 73 + label = "blue:bt"; 74 + gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>; 75 + linux,default-trigger = "bluetooth-power"; 76 + default-state = "off"; 77 + }; 78 + }; 79 + }; 80 + 81 + &ethernet0 { 82 + status = "okay"; 83 + pinctrl-0 = <&ethernet0_rgmii_pins_a>; 84 + pinctrl-1 = <&ethernet0_rgmii_pins_sleep_a>; 85 + pinctrl-names = "default", "sleep"; 86 + phy-mode = "rgmii"; 87 + max-speed = <1000>; 88 + phy-handle = <&phy0>; 89 + 90 + mdio0 { 91 + #address-cells = <1>; 92 + #size-cells = <0>; 93 + compatible = "snps,dwmac-mdio"; 94 + phy0: ethernet-phy@7 { 95 + reg = <7>; 96 + }; 97 + }; 98 + }; 99 + 100 + &i2c1 { 101 + pinctrl-names = "default"; 102 + pinctrl-0 = <&i2c1_pins_b>; 103 + i2c-scl-rising-time-ns = <185>; 104 + i2c-scl-falling-time-ns = <20>; 105 + status = "okay"; 106 + /delete-property/dmas; 107 + /delete-property/dma-names; 108 + }; 109 + 110 + &i2c2 { 111 + pinctrl-names = "default"; 112 + pinctrl-0 = <&i2c2_pins_b1 &i2c2_pins_b2>; 113 + i2c-scl-rising-time-ns = <185>; 114 + i2c-scl-falling-time-ns = <20>; 115 + status = "okay"; 116 + /delete-property/dmas; 117 + /delete-property/dma-names; 118 + }; 119 + 120 + &i2c4 { 121 + pinctrl-names = "default"; 122 + pinctrl-0 = <&i2c4_pins_a>; 123 + i2c-scl-rising-time-ns = <185>; 124 + i2c-scl-falling-time-ns = <20>; 125 + status = "okay"; 126 + /delete-property/dmas; 127 + /delete-property/dma-names; 128 + 129 + pmic: stpmic@33 { 130 + compatible = "st,stpmic1"; 131 + reg = <0x33>; 132 + interrupts-extended = <&exti 55 IRQ_TYPE_EDGE_FALLING>; 133 + interrupt-controller; 134 + #interrupt-cells = <2>; 135 + status = "okay"; 136 + 137 + st,main-control-register = <0x04>; 138 + st,vin-control-register = <0xc0>; 139 + st,usb-control-register = <0x30>; 140 + 141 + regulators { 142 + compatible = "st,stpmic1-regulators"; 143 + 144 + ldo1-supply = <&v3v3>; 145 + ldo2-supply = <&v3v3>; 146 + ldo3-supply = <&vdd_ddr>; 147 + ldo5-supply = <&v3v3>; 148 + ldo6-supply = <&v3v3>; 149 + pwr_sw1-supply = <&bst_out>; 150 + pwr_sw2-supply = <&bst_out>; 151 + 152 + vddcore: buck1 { 153 + regulator-name = "vddcore"; 154 + regulator-min-microvolt = <1200000>; 155 + regulator-max-microvolt = <1350000>; 156 + regulator-always-on; 157 + regulator-initial-mode = <0>; 158 + regulator-over-current-protection; 159 + }; 160 + 161 + vdd_ddr: buck2 { 162 + regulator-name = "vdd_ddr"; 163 + regulator-min-microvolt = <1350000>; 164 + regulator-max-microvolt = <1350000>; 165 + regulator-always-on; 166 + regulator-initial-mode = <0>; 167 + regulator-over-current-protection; 168 + }; 169 + 170 + vdd: buck3 { 171 + regulator-name = "vdd"; 172 + regulator-min-microvolt = <3300000>; 173 + regulator-max-microvolt = <3300000>; 174 + regulator-always-on; 175 + st,mask_reset; 176 + regulator-initial-mode = <0>; 177 + regulator-over-current-protection; 178 + }; 179 + 180 + v3v3: buck4 { 181 + regulator-name = "v3v3"; 182 + regulator-min-microvolt = <3300000>; 183 + regulator-max-microvolt = <3300000>; 184 + regulator-always-on; 185 + regulator-over-current-protection; 186 + regulator-initial-mode = <0>; 187 + }; 188 + 189 + vdda: ldo1 { 190 + regulator-name = "vdda"; 191 + regulator-min-microvolt = <2900000>; 192 + regulator-max-microvolt = <2900000>; 193 + interrupts = <IT_CURLIM_LDO1 0>; 194 + interrupt-parent = <&pmic>; 195 + }; 196 + 197 + v2v8: ldo2 { 198 + regulator-name = "v2v8"; 199 + regulator-min-microvolt = <2800000>; 200 + regulator-max-microvolt = <2800000>; 201 + interrupts = <IT_CURLIM_LDO2 0>; 202 + interrupt-parent = <&pmic>; 203 + }; 204 + 205 + vtt_ddr: ldo3 { 206 + regulator-name = "vtt_ddr"; 207 + regulator-min-microvolt = <500000>; 208 + regulator-max-microvolt = <750000>; 209 + regulator-always-on; 210 + regulator-over-current-protection; 211 + }; 212 + 213 + vdd_usb: ldo4 { 214 + regulator-name = "vdd_usb"; 215 + regulator-min-microvolt = <3300000>; 216 + regulator-max-microvolt = <3300000>; 217 + interrupts = <IT_CURLIM_LDO4 0>; 218 + interrupt-parent = <&pmic>; 219 + }; 220 + 221 + vdd_sd: ldo5 { 222 + regulator-name = "vdd_sd"; 223 + regulator-min-microvolt = <2900000>; 224 + regulator-max-microvolt = <2900000>; 225 + interrupts = <IT_CURLIM_LDO5 0>; 226 + interrupt-parent = <&pmic>; 227 + regulator-boot-on; 228 + }; 229 + 230 + v1v8: ldo6 { 231 + regulator-name = "v1v8"; 232 + regulator-min-microvolt = <1800000>; 233 + regulator-max-microvolt = <1800000>; 234 + interrupts = <IT_CURLIM_LDO6 0>; 235 + interrupt-parent = <&pmic>; 236 + regulator-enable-ramp-delay = <300000>; 237 + }; 238 + 239 + vref_ddr: vref_ddr { 240 + regulator-name = "vref_ddr"; 241 + regulator-always-on; 242 + regulator-over-current-protection; 243 + }; 244 + 245 + bst_out: boost { 246 + regulator-name = "bst_out"; 247 + interrupts = <IT_OCP_BOOST 0>; 248 + interrupt-parent = <&pmic>; 249 + }; 250 + 251 + vbus_otg: pwr_sw1 { 252 + regulator-name = "vbus_otg"; 253 + interrupts = <IT_OCP_OTG 0>; 254 + interrupt-parent = <&pmic>; 255 + regulator-active-discharge; 256 + }; 257 + 258 + vbus_sw: pwr_sw2 { 259 + regulator-name = "vbus_sw"; 260 + interrupts = <IT_OCP_SWOUT 0>; 261 + interrupt-parent = <&pmic>; 262 + regulator-active-discharge; 263 + }; 264 + }; 265 + 266 + onkey { 267 + compatible = "st,stpmic1-onkey"; 268 + interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>; 269 + interrupt-names = "onkey-falling", "onkey-rising"; 270 + status = "okay"; 271 + }; 272 + 273 + watchdog { 274 + compatible = "st,stpmic1-wdt"; 275 + status = "disabled"; 276 + }; 277 + }; 278 + }; 279 + 280 + &iwdg2 { 281 + timeout-sec = <32>; 282 + status = "okay"; 283 + }; 284 + 285 + &rng1 { 286 + status = "okay"; 287 + }; 288 + 289 + &rtc { 290 + status = "okay"; 291 + }; 292 + 293 + &sdmmc1 { 294 + pinctrl-names = "default", "opendrain", "sleep"; 295 + pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>; 296 + pinctrl-1 = <&sdmmc1_b4_od_pins_a>; 297 + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; 298 + broken-cd; 299 + st,sig-dir; 300 + st,neg-edge; 301 + st,use-ckin; 302 + bus-width = <4>; 303 + vmmc-supply = <&vdd_sd>; 304 + status = "okay"; 305 + }; 306 + 307 + &uart4 { 308 + /* On Low speed expansion header */ 309 + label = "LS-UART1"; 310 + pinctrl-names = "default"; 311 + pinctrl-0 = <&uart4_pins_b>; 312 + status = "okay"; 313 + }; 314 + 315 + &uart7 { 316 + /* On Low speed expansion header */ 317 + label = "LS-UART0"; 318 + pinctrl-names = "default"; 319 + pinctrl-0 = <&uart7_pins_a>; 320 + status = "okay"; 321 + };
+68 -2
arch/arm/boot/dts/stm32mp157a-dk1.dts
··· 7 7 /dts-v1/; 8 8 9 9 #include "stm32mp157c.dtsi" 10 - #include "stm32mp157-pinctrl.dtsi" 10 + #include "stm32mp157xac-pinctrl.dtsi" 11 11 #include <dt-bindings/gpio/gpio.h> 12 12 #include <dt-bindings/mfd/st,stpmic1.h> 13 13 ··· 26 26 27 27 memory@c0000000 { 28 28 reg = <0xc0000000 0x20000000>; 29 + }; 30 + 31 + reserved-memory { 32 + #address-cells = <1>; 33 + #size-cells = <1>; 34 + ranges; 35 + 36 + gpu_reserved: gpu@d4000000 { 37 + reg = <0xd4000000 0x4000000>; 38 + no-map; 39 + }; 29 40 }; 30 41 31 42 led { ··· 62 51 pinctrl-0 = <&ethernet0_rgmii_pins_a>; 63 52 pinctrl-1 = <&ethernet0_rgmii_pins_sleep_a>; 64 53 pinctrl-names = "default", "sleep"; 65 - phy-mode = "rgmii"; 54 + phy-mode = "rgmii-id"; 66 55 max-speed = <1000>; 67 56 phy-handle = <&phy0>; 68 57 ··· 76 65 }; 77 66 }; 78 67 68 + &gpu { 69 + contiguous-area = <&gpu_reserved>; 70 + status = "okay"; 71 + }; 72 + 73 + &i2c1 { 74 + pinctrl-names = "default", "sleep"; 75 + pinctrl-0 = <&i2c1_pins_a>; 76 + pinctrl-1 = <&i2c1_pins_sleep_a>; 77 + i2c-scl-rising-time-ns = <100>; 78 + i2c-scl-falling-time-ns = <7>; 79 + status = "okay"; 80 + /delete-property/dmas; 81 + /delete-property/dma-names; 82 + 83 + hdmi-transmitter@39 { 84 + compatible = "sil,sii9022"; 85 + reg = <0x39>; 86 + iovcc-supply = <&v3v3_hdmi>; 87 + cvcc12-supply = <&v1v2_hdmi>; 88 + reset-gpios = <&gpioa 10 GPIO_ACTIVE_LOW>; 89 + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; 90 + interrupt-parent = <&gpiog>; 91 + pinctrl-names = "default", "sleep"; 92 + pinctrl-0 = <&ltdc_pins_a>; 93 + pinctrl-1 = <&ltdc_pins_sleep_a>; 94 + status = "okay"; 95 + 96 + ports { 97 + #address-cells = <1>; 98 + #size-cells = <0>; 99 + 100 + port@0 { 101 + reg = <0>; 102 + sii9022_in: endpoint { 103 + remote-endpoint = <&ltdc_ep0_out>; 104 + }; 105 + }; 106 + }; 107 + }; 108 + }; 79 109 80 110 &i2c4 { 81 111 pinctrl-names = "default"; ··· 273 221 &iwdg2 { 274 222 timeout-sec = <32>; 275 223 status = "okay"; 224 + }; 225 + 226 + &ltdc { 227 + status = "okay"; 228 + 229 + port { 230 + #address-cells = <1>; 231 + #size-cells = <0>; 232 + 233 + ltdc_ep0_out: endpoint@0 { 234 + reg = <0>; 235 + remote-endpoint = <&sii9022_in>; 236 + }; 237 + }; 276 238 }; 277 239 278 240 &rng1 {
+17 -1
arch/arm/boot/dts/stm32mp157c-ed1.dts
··· 6 6 /dts-v1/; 7 7 8 8 #include "stm32mp157c.dtsi" 9 - #include "stm32mp157-pinctrl.dtsi" 9 + #include "stm32mp157xaa-pinctrl.dtsi" 10 10 #include <dt-bindings/gpio/gpio.h> 11 11 #include <dt-bindings/mfd/st,stpmic1.h> 12 12 ··· 21 21 memory@c0000000 { 22 22 device_type = "memory"; 23 23 reg = <0xC0000000 0x40000000>; 24 + }; 25 + 26 + reserved-memory { 27 + #address-cells = <1>; 28 + #size-cells = <1>; 29 + ranges; 30 + 31 + gpu_reserved: gpu@e8000000 { 32 + reg = <0xe8000000 0x8000000>; 33 + no-map; 34 + }; 24 35 }; 25 36 26 37 aliases { ··· 69 58 }; 70 59 71 60 &dts { 61 + status = "okay"; 62 + }; 63 + 64 + &gpu { 65 + contiguous-area = <&gpu_reserved>; 72 66 status = "okay"; 73 67 }; 74 68
+123 -2
arch/arm/boot/dts/stm32mp157c-ev1.dts
··· 7 7 8 8 #include "stm32mp157c-ed1.dts" 9 9 #include <dt-bindings/gpio/gpio.h> 10 + #include <dt-bindings/input/input.h> 10 11 11 12 / { 12 13 model = "STMicroelectronics STM32MP157C eval daughter on eval mother"; ··· 22 21 ethernet0 = &ethernet0; 23 22 }; 24 23 24 + clocks { 25 + clk_ext_camera: clk-ext-camera { 26 + #clock-cells = <0>; 27 + compatible = "fixed-clock"; 28 + clock-frequency = <24000000>; 29 + }; 30 + }; 31 + 32 + joystick { 33 + compatible = "gpio-keys"; 34 + #size-cells = <0>; 35 + pinctrl-0 = <&joystick_pins>; 36 + pinctrl-names = "default"; 37 + button-0 { 38 + label = "JoySel"; 39 + linux,code = <KEY_ENTER>; 40 + interrupt-parent = <&stmfx_pinctrl>; 41 + interrupts = <0 IRQ_TYPE_EDGE_RISING>; 42 + }; 43 + button-1 { 44 + label = "JoyDown"; 45 + linux,code = <KEY_DOWN>; 46 + interrupt-parent = <&stmfx_pinctrl>; 47 + interrupts = <1 IRQ_TYPE_EDGE_RISING>; 48 + }; 49 + button-2 { 50 + label = "JoyLeft"; 51 + linux,code = <KEY_LEFT>; 52 + interrupt-parent = <&stmfx_pinctrl>; 53 + interrupts = <2 IRQ_TYPE_EDGE_RISING>; 54 + }; 55 + button-3 { 56 + label = "JoyRight"; 57 + linux,code = <KEY_RIGHT>; 58 + interrupt-parent = <&stmfx_pinctrl>; 59 + interrupts = <3 IRQ_TYPE_EDGE_RISING>; 60 + }; 61 + button-4 { 62 + label = "JoyUp"; 63 + linux,code = <KEY_UP>; 64 + interrupt-parent = <&stmfx_pinctrl>; 65 + interrupts = <4 IRQ_TYPE_EDGE_RISING>; 66 + }; 67 + }; 68 + 25 69 panel_backlight: panel-backlight { 26 70 compatible = "gpio-backlight"; 27 71 gpios = <&gpiod 13 GPIO_ACTIVE_LOW>; ··· 79 33 pinctrl-names = "default"; 80 34 pinctrl-0 = <&cec_pins_a>; 81 35 status = "okay"; 36 + }; 37 + 38 + &dcmi { 39 + status = "okay"; 40 + pinctrl-names = "default", "sleep"; 41 + pinctrl-0 = <&dcmi_pins_a>; 42 + pinctrl-1 = <&dcmi_sleep_pins_a>; 43 + 44 + port { 45 + dcmi_0: endpoint { 46 + remote-endpoint = <&ov5640_0>; 47 + bus-width = <8>; 48 + hsync-active = <0>; 49 + vsync-active = <0>; 50 + pclk-sample = <1>; 51 + }; 52 + }; 82 53 }; 83 54 84 55 &dsi { ··· 127 64 reg = <0>; 128 65 reset-gpios = <&gpiof 15 GPIO_ACTIVE_LOW>; 129 66 backlight = <&panel_backlight>; 67 + power-supply = <&v3v3>; 130 68 status = "okay"; 131 69 132 70 port { ··· 143 79 pinctrl-0 = <&ethernet0_rgmii_pins_a>; 144 80 pinctrl-1 = <&ethernet0_rgmii_pins_sleep_a>; 145 81 pinctrl-names = "default", "sleep"; 146 - phy-mode = "rgmii"; 82 + phy-mode = "rgmii-id"; 147 83 max-speed = <1000>; 148 84 phy-handle = <&phy0>; 149 85 ··· 163 99 i2c-scl-rising-time-ns = <185>; 164 100 i2c-scl-falling-time-ns = <20>; 165 101 status = "okay"; 102 + 103 + ov5640: camera@3c { 104 + compatible = "ovti,ov5640"; 105 + pinctrl-names = "default"; 106 + pinctrl-0 = <&ov5640_pins>; 107 + reg = <0x3c>; 108 + clocks = <&clk_ext_camera>; 109 + clock-names = "xclk"; 110 + DOVDD-supply = <&v2v8>; 111 + powerdown-gpios = <&stmfx_pinctrl 18 GPIO_ACTIVE_HIGH>; 112 + reset-gpios = <&stmfx_pinctrl 19 GPIO_ACTIVE_LOW>; 113 + rotation = <180>; 114 + status = "okay"; 115 + 116 + port { 117 + ov5640_0: endpoint { 118 + remote-endpoint = <&dcmi_0>; 119 + bus-width = <8>; 120 + data-shift = <2>; /* lines 9:2 are used */ 121 + hsync-active = <0>; 122 + vsync-active = <0>; 123 + pclk-sample = <1>; 124 + }; 125 + }; 126 + }; 127 + 128 + stmfx: stmfx@42 { 129 + compatible = "st,stmfx-0300"; 130 + reg = <0x42>; 131 + interrupts = <8 IRQ_TYPE_EDGE_RISING>; 132 + interrupt-parent = <&gpioi>; 133 + vdd-supply = <&v3v3>; 134 + 135 + stmfx_pinctrl: stmfx-pin-controller { 136 + compatible = "st,stmfx-0300-pinctrl"; 137 + gpio-controller; 138 + #gpio-cells = <2>; 139 + interrupt-controller; 140 + #interrupt-cells = <2>; 141 + gpio-ranges = <&stmfx_pinctrl 0 0 24>; 142 + 143 + joystick_pins: joystick { 144 + pins = "gpio0", "gpio1", "gpio2", "gpio3", "gpio4"; 145 + drive-push-pull; 146 + bias-pull-down; 147 + }; 148 + 149 + ov5640_pins: camera { 150 + pins = "agpio2", "agpio3"; /* stmfx pins 18 & 19 */ 151 + drive-push-pull; 152 + output-low; 153 + }; 154 + }; 155 + }; 166 156 }; 167 157 168 158 &i2c5 { ··· 249 131 }; 250 132 251 133 &qspi { 252 - pinctrl-names = "default"; 134 + pinctrl-names = "default", "sleep"; 253 135 pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a &qspi_bk2_pins_a>; 136 + pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a &qspi_bk2_sleep_pins_a>; 254 137 reg = <0x58003000 0x1000>, <0x70000000 0x4000000>; 255 138 #address-cells = <1>; 256 139 #size-cells = <0>; 257 140 status = "okay"; 258 141 259 142 flash0: mx66l51235l@0 { 143 + compatible = "jedec,spi-nor"; 260 144 reg = <0>; 261 145 spi-rx-bus-width = <4>; 262 146 spi-max-frequency = <108000000>; ··· 267 147 }; 268 148 269 149 flash1: mx66l51235l@1 { 150 + compatible = "jedec,spi-nor"; 270 151 reg = <1>; 271 152 spi-rx-bus-width = <4>; 272 153 spi-max-frequency = <108000000>;
+180
arch/arm/boot/dts/stm32mp157c.dtsi
··· 365 365 status = "disabled"; 366 366 }; 367 367 368 + i2s2: audio-controller@4000b000 { 369 + compatible = "st,stm32h7-i2s"; 370 + #sound-dai-cells = <0>; 371 + reg = <0x4000b000 0x400>; 372 + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 373 + dmas = <&dmamux1 39 0x400 0x01>, 374 + <&dmamux1 40 0x400 0x01>; 375 + dma-names = "rx", "tx"; 376 + status = "disabled"; 377 + }; 378 + 368 379 spi3: spi@4000c000 { 369 380 #address-cells = <1>; 370 381 #size-cells = <0>; ··· 386 375 resets = <&rcc SPI3_R>; 387 376 dmas = <&dmamux1 61 0x400 0x05>, 388 377 <&dmamux1 62 0x400 0x05>; 378 + dma-names = "rx", "tx"; 379 + status = "disabled"; 380 + }; 381 + 382 + i2s3: audio-controller@4000c000 { 383 + compatible = "st,stm32h7-i2s"; 384 + #sound-dai-cells = <0>; 385 + reg = <0x4000c000 0x400>; 386 + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; 387 + dmas = <&dmamux1 61 0x400 0x01>, 388 + <&dmamux1 62 0x400 0x01>; 389 389 dma-names = "rx", "tx"; 390 390 status = "disabled"; 391 391 }; ··· 629 607 status = "disabled"; 630 608 }; 631 609 610 + i2s1: audio-controller@44004000 { 611 + compatible = "st,stm32h7-i2s"; 612 + #sound-dai-cells = <0>; 613 + reg = <0x44004000 0x400>; 614 + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 615 + dmas = <&dmamux1 37 0x400 0x01>, 616 + <&dmamux1 38 0x400 0x01>; 617 + dma-names = "rx", "tx"; 618 + status = "disabled"; 619 + }; 620 + 632 621 spi4: spi@44005000 { 633 622 #address-cells = <1>; 634 623 #size-cells = <0>; ··· 739 706 <&dmamux1 86 0x400 0x05>; 740 707 dma-names = "rx", "tx"; 741 708 status = "disabled"; 709 + }; 710 + 711 + sai1: sai@4400a000 { 712 + compatible = "st,stm32h7-sai"; 713 + #address-cells = <1>; 714 + #size-cells = <1>; 715 + ranges = <0 0x4400a000 0x400>; 716 + reg = <0x4400a000 0x4>, <0x4400a3f0 0x10>; 717 + interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 718 + resets = <&rcc SAI1_R>; 719 + status = "disabled"; 720 + 721 + sai1a: audio-controller@4400a004 { 722 + #sound-dai-cells = <0>; 723 + 724 + compatible = "st,stm32-sai-sub-a"; 725 + reg = <0x4 0x1c>; 726 + clocks = <&rcc SAI1_K>; 727 + clock-names = "sai_ck"; 728 + dmas = <&dmamux1 87 0x400 0x01>; 729 + status = "disabled"; 730 + }; 731 + 732 + sai1b: audio-controller@4400a024 { 733 + #sound-dai-cells = <0>; 734 + compatible = "st,stm32-sai-sub-b"; 735 + reg = <0x24 0x1c>; 736 + clocks = <&rcc SAI1_K>; 737 + clock-names = "sai_ck"; 738 + dmas = <&dmamux1 88 0x400 0x01>; 739 + status = "disabled"; 740 + }; 741 + }; 742 + 743 + sai2: sai@4400b000 { 744 + compatible = "st,stm32h7-sai"; 745 + #address-cells = <1>; 746 + #size-cells = <1>; 747 + ranges = <0 0x4400b000 0x400>; 748 + reg = <0x4400b000 0x4>, <0x4400b3f0 0x10>; 749 + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 750 + resets = <&rcc SAI2_R>; 751 + status = "disabled"; 752 + 753 + sai2a: audio-controller@4400b004 { 754 + #sound-dai-cells = <0>; 755 + compatible = "st,stm32-sai-sub-a"; 756 + reg = <0x4 0x1c>; 757 + clocks = <&rcc SAI2_K>; 758 + clock-names = "sai_ck"; 759 + dmas = <&dmamux1 89 0x400 0x01>; 760 + status = "disabled"; 761 + }; 762 + 763 + sai2b: audio-controller@4400b024 { 764 + #sound-dai-cells = <0>; 765 + compatible = "st,stm32-sai-sub-b"; 766 + reg = <0x24 0x1c>; 767 + clocks = <&rcc SAI2_K>; 768 + clock-names = "sai_ck"; 769 + dmas = <&dmamux1 90 0x400 0x01>; 770 + status = "disabled"; 771 + }; 772 + }; 773 + 774 + sai3: sai@4400c000 { 775 + compatible = "st,stm32h7-sai"; 776 + #address-cells = <1>; 777 + #size-cells = <1>; 778 + ranges = <0 0x4400c000 0x400>; 779 + reg = <0x4400c000 0x4>, <0x4400c3f0 0x10>; 780 + interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; 781 + resets = <&rcc SAI3_R>; 782 + status = "disabled"; 783 + 784 + sai3a: audio-controller@4400c004 { 785 + #sound-dai-cells = <0>; 786 + compatible = "st,stm32-sai-sub-a"; 787 + reg = <0x04 0x1c>; 788 + clocks = <&rcc SAI3_K>; 789 + clock-names = "sai_ck"; 790 + dmas = <&dmamux1 113 0x400 0x01>; 791 + status = "disabled"; 792 + }; 793 + 794 + sai3b: audio-controller@4400c024 { 795 + #sound-dai-cells = <0>; 796 + compatible = "st,stm32-sai-sub-b"; 797 + reg = <0x24 0x1c>; 798 + clocks = <&rcc SAI3_K>; 799 + clock-names = "sai_ck"; 800 + dmas = <&dmamux1 114 0x400 0x01>; 801 + status = "disabled"; 802 + }; 742 803 }; 743 804 744 805 dfsdm: dfsdm@4400d000 { ··· 1041 914 status = "disabled"; 1042 915 }; 1043 916 917 + dcmi: dcmi@4c006000 { 918 + compatible = "st,stm32-dcmi"; 919 + reg = <0x4c006000 0x400>; 920 + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 921 + resets = <&rcc CAMITF_R>; 922 + clocks = <&rcc DCMI>; 923 + clock-names = "mclk"; 924 + dmas = <&dmamux1 75 0x400 0x0d>; 925 + dma-names = "tx"; 926 + status = "disabled"; 927 + }; 928 + 1044 929 rcc: rcc@50000000 { 1045 930 compatible = "st,stm32mp1-rcc", "syscon"; 1046 931 reg = <0x50000000 0x1000>; ··· 1157 1018 regulator-max-microvolt = <2500000>; 1158 1019 clocks = <&rcc VREF>; 1159 1020 status = "disabled"; 1021 + }; 1022 + 1023 + sai4: sai@50027000 { 1024 + compatible = "st,stm32h7-sai"; 1025 + #address-cells = <1>; 1026 + #size-cells = <1>; 1027 + ranges = <0 0x50027000 0x400>; 1028 + reg = <0x50027000 0x4>, <0x500273f0 0x10>; 1029 + interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 1030 + resets = <&rcc SAI4_R>; 1031 + status = "disabled"; 1032 + 1033 + sai4a: audio-controller@50027004 { 1034 + #sound-dai-cells = <0>; 1035 + compatible = "st,stm32-sai-sub-a"; 1036 + reg = <0x04 0x1c>; 1037 + clocks = <&rcc SAI4_K>; 1038 + clock-names = "sai_ck"; 1039 + dmas = <&dmamux1 99 0x400 0x01>; 1040 + status = "disabled"; 1041 + }; 1042 + 1043 + sai4b: audio-controller@50027024 { 1044 + #sound-dai-cells = <0>; 1045 + compatible = "st,stm32-sai-sub-b"; 1046 + reg = <0x24 0x1c>; 1047 + clocks = <&rcc SAI4_K>; 1048 + clock-names = "sai_ck"; 1049 + dmas = <&dmamux1 100 0x400 0x01>; 1050 + status = "disabled"; 1051 + }; 1160 1052 }; 1161 1053 1162 1054 dts: thermal@50028000 { ··· 1316 1146 resets = <&rcc USBH_R>; 1317 1147 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 1318 1148 companion = <&usbh_ohci>; 1149 + status = "disabled"; 1150 + }; 1151 + 1152 + gpu: gpu@59000000 { 1153 + compatible = "vivante,gc"; 1154 + reg = <0x59000000 0x800>; 1155 + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 1156 + clocks = <&rcc GPU>, <&rcc GPU_K>; 1157 + clock-names = "bus" ,"core"; 1158 + resets = <&rcc GPU_R>; 1319 1159 status = "disabled"; 1320 1160 }; 1321 1161
+90
arch/arm/boot/dts/stm32mp157xaa-pinctrl.dtsi
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2 + /* 3 + * Copyright (C) STMicroelectronics 2019 - All Rights Reserved 4 + * Author: Alexandre Torgue <alexandre.torgue@st.com> 5 + */ 6 + 7 + #include "stm32mp157-pinctrl.dtsi" 8 + / { 9 + soc { 10 + pinctrl: pin-controller@50002000 { 11 + st,package = <STM32MP_PKG_AA>; 12 + 13 + gpioa: gpio@50002000 { 14 + status = "okay"; 15 + ngpios = <16>; 16 + gpio-ranges = <&pinctrl 0 0 16>; 17 + }; 18 + 19 + gpiob: gpio@50003000 { 20 + status = "okay"; 21 + ngpios = <16>; 22 + gpio-ranges = <&pinctrl 0 16 16>; 23 + }; 24 + 25 + gpioc: gpio@50004000 { 26 + status = "okay"; 27 + ngpios = <16>; 28 + gpio-ranges = <&pinctrl 0 32 16>; 29 + }; 30 + 31 + gpiod: gpio@50005000 { 32 + status = "okay"; 33 + ngpios = <16>; 34 + gpio-ranges = <&pinctrl 0 48 16>; 35 + }; 36 + 37 + gpioe: gpio@50006000 { 38 + status = "okay"; 39 + ngpios = <16>; 40 + gpio-ranges = <&pinctrl 0 64 16>; 41 + }; 42 + 43 + gpiof: gpio@50007000 { 44 + status = "okay"; 45 + ngpios = <16>; 46 + gpio-ranges = <&pinctrl 0 80 16>; 47 + }; 48 + 49 + gpiog: gpio@50008000 { 50 + status = "okay"; 51 + ngpios = <16>; 52 + gpio-ranges = <&pinctrl 0 96 16>; 53 + }; 54 + 55 + gpioh: gpio@50009000 { 56 + status = "okay"; 57 + ngpios = <16>; 58 + gpio-ranges = <&pinctrl 0 112 16>; 59 + }; 60 + 61 + gpioi: gpio@5000a000 { 62 + status = "okay"; 63 + ngpios = <16>; 64 + gpio-ranges = <&pinctrl 0 128 16>; 65 + }; 66 + 67 + gpioj: gpio@5000b000 { 68 + status = "okay"; 69 + ngpios = <16>; 70 + gpio-ranges = <&pinctrl 0 144 16>; 71 + }; 72 + 73 + gpiok: gpio@5000c000 { 74 + status = "okay"; 75 + ngpios = <8>; 76 + gpio-ranges = <&pinctrl 0 160 8>; 77 + }; 78 + }; 79 + 80 + pinctrl_z: pin-controller-z@54004000 { 81 + st,package = <STM32MP_PKG_AA>; 82 + 83 + gpioz: gpio@54004000 { 84 + status = "okay"; 85 + ngpios = <8>; 86 + gpio-ranges = <&pinctrl_z 0 400 8>; 87 + }; 88 + }; 89 + }; 90 + };
+62
arch/arm/boot/dts/stm32mp157xab-pinctrl.dtsi
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2 + /* 3 + * Copyright (C) STMicroelectronics 2019 - All Rights Reserved 4 + * Author: Alexandre Torgue <alexandre.torgue@st.com> 5 + */ 6 + 7 + #include "stm32mp157-pinctrl.dtsi" 8 + / { 9 + soc { 10 + pinctrl: pin-controller@50002000 { 11 + st,package = <STM32MP_PKG_AB>; 12 + 13 + gpioa: gpio@50002000 { 14 + status = "okay"; 15 + ngpios = <16>; 16 + gpio-ranges = <&pinctrl 0 0 16>; 17 + }; 18 + 19 + gpiob: gpio@50003000 { 20 + status = "okay"; 21 + ngpios = <16>; 22 + gpio-ranges = <&pinctrl 0 16 16>; 23 + }; 24 + 25 + gpioc: gpio@50004000 { 26 + status = "okay"; 27 + ngpios = <16>; 28 + gpio-ranges = <&pinctrl 0 32 16>; 29 + }; 30 + 31 + gpiod: gpio@50005000 { 32 + status = "okay"; 33 + ngpios = <16>; 34 + gpio-ranges = <&pinctrl 0 48 16>; 35 + }; 36 + 37 + gpioe: gpio@50006000 { 38 + status = "okay"; 39 + ngpios = <16>; 40 + gpio-ranges = <&pinctrl 0 64 16>; 41 + }; 42 + 43 + gpiof: gpio@50007000 { 44 + status = "okay"; 45 + ngpios = <6>; 46 + gpio-ranges = <&pinctrl 6 86 6>; 47 + }; 48 + 49 + gpiog: gpio@50008000 { 50 + status = "okay"; 51 + ngpios = <10>; 52 + gpio-ranges = <&pinctrl 6 102 10>; 53 + }; 54 + 55 + gpioh: gpio@50009000 { 56 + status = "okay"; 57 + ngpios = <2>; 58 + gpio-ranges = <&pinctrl 0 112 2>; 59 + }; 60 + }; 61 + }; 62 + };
+78
arch/arm/boot/dts/stm32mp157xac-pinctrl.dtsi
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2 + /* 3 + * Copyright (C) STMicroelectronics 2019 - All Rights Reserved 4 + * Author: Alexandre Torgue <alexandre.torgue@st.com> 5 + */ 6 + 7 + #include "stm32mp157-pinctrl.dtsi" 8 + / { 9 + soc { 10 + pinctrl: pin-controller@50002000 { 11 + st,package = <STM32MP_PKG_AC>; 12 + 13 + gpioa: gpio@50002000 { 14 + status = "okay"; 15 + ngpios = <16>; 16 + gpio-ranges = <&pinctrl 0 0 16>; 17 + }; 18 + 19 + gpiob: gpio@50003000 { 20 + status = "okay"; 21 + ngpios = <16>; 22 + gpio-ranges = <&pinctrl 0 16 16>; 23 + }; 24 + 25 + gpioc: gpio@50004000 { 26 + status = "okay"; 27 + ngpios = <16>; 28 + gpio-ranges = <&pinctrl 0 32 16>; 29 + }; 30 + 31 + gpiod: gpio@50005000 { 32 + status = "okay"; 33 + ngpios = <16>; 34 + gpio-ranges = <&pinctrl 0 48 16>; 35 + }; 36 + 37 + gpioe: gpio@50006000 { 38 + status = "okay"; 39 + ngpios = <16>; 40 + gpio-ranges = <&pinctrl 0 64 16>; 41 + }; 42 + 43 + gpiof: gpio@50007000 { 44 + status = "okay"; 45 + ngpios = <16>; 46 + gpio-ranges = <&pinctrl 0 80 16>; 47 + }; 48 + 49 + gpiog: gpio@50008000 { 50 + status = "okay"; 51 + ngpios = <16>; 52 + gpio-ranges = <&pinctrl 0 96 16>; 53 + }; 54 + 55 + gpioh: gpio@50009000 { 56 + status = "okay"; 57 + ngpios = <16>; 58 + gpio-ranges = <&pinctrl 0 112 16>; 59 + }; 60 + 61 + gpioi: gpio@5000a000 { 62 + status = "okay"; 63 + ngpios = <12>; 64 + gpio-ranges = <&pinctrl 0 128 12>; 65 + }; 66 + }; 67 + 68 + pinctrl_z: pin-controller-z@54004000 { 69 + st,package = <STM32MP_PKG_AC>; 70 + 71 + gpioz: gpio@54004000 { 72 + status = "okay"; 73 + ngpios = <8>; 74 + gpio-ranges = <&pinctrl_z 0 400 8>; 75 + }; 76 + }; 77 + }; 78 + };
+62
arch/arm/boot/dts/stm32mp157xad-pinctrl.dtsi
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2 + /* 3 + * Copyright (C) STMicroelectronics 2019 - All Rights Reserved 4 + * Author: Alexandre Torgue <alexandre.torgue@st.com> 5 + */ 6 + 7 + #include "stm32mp157-pinctrl.dtsi" 8 + / { 9 + soc { 10 + pinctrl: pin-controller@50002000 { 11 + st,package = <STM32MP_PKG_AD>; 12 + 13 + gpioa: gpio@50002000 { 14 + status = "okay"; 15 + ngpios = <16>; 16 + gpio-ranges = <&pinctrl 0 0 16>; 17 + }; 18 + 19 + gpiob: gpio@50003000 { 20 + status = "okay"; 21 + ngpios = <16>; 22 + gpio-ranges = <&pinctrl 0 16 16>; 23 + }; 24 + 25 + gpioc: gpio@50004000 { 26 + status = "okay"; 27 + ngpios = <16>; 28 + gpio-ranges = <&pinctrl 0 32 16>; 29 + }; 30 + 31 + gpiod: gpio@50005000 { 32 + status = "okay"; 33 + ngpios = <16>; 34 + gpio-ranges = <&pinctrl 0 48 16>; 35 + }; 36 + 37 + gpioe: gpio@50006000 { 38 + status = "okay"; 39 + ngpios = <16>; 40 + gpio-ranges = <&pinctrl 0 64 16>; 41 + }; 42 + 43 + gpiof: gpio@50007000 { 44 + status = "okay"; 45 + ngpios = <6>; 46 + gpio-ranges = <&pinctrl 6 86 6>; 47 + }; 48 + 49 + gpiog: gpio@50008000 { 50 + status = "okay"; 51 + ngpios = <10>; 52 + gpio-ranges = <&pinctrl 6 102 10>; 53 + }; 54 + 55 + gpioh: gpio@50009000 { 56 + status = "okay"; 57 + ngpios = <2>; 58 + gpio-ranges = <&pinctrl 0 112 2>; 59 + }; 60 + }; 61 + }; 62 + };