tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'pci-v5.16-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull PCI fixes from Bjorn Helgaas:

- Revert emulation of Marvell Armada A3720 expansion ROM because it
doesn't work as expected (Marek Behún)

- Assert PERST# in Apple M1 driver to fix initialization when booting
from bootloaders using PCIe, such as U-Boot (Marc Zyngier)

- Describe PERST# as active low in Apple T8103 DT and update driver to
match (Marc Zyngier)

* tag 'pci-v5.16-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
PCI: apple: Fix PERST# polarity
arm64: dts: apple: t8103: Mark PCIe PERST# polarity active low in DT
PCI: apple: Follow the PCIe specifications when resetting the port
Revert "PCI: aardvark: Fix support for PCI_ROM_ADDRESS1 on emulated bridge"

Linus Torvalds b8a98b6b 2ca4b651

+16 -14
+4 -3
arch/arm64/boot/dts/apple/t8103.dtsi
··· 7 7 * Copyright The Asahi Linux Contributors 8 8 */ 9 9 10 + #include <dt-bindings/gpio/gpio.h> 10 11 #include <dt-bindings/interrupt-controller/apple-aic.h> 11 12 #include <dt-bindings/interrupt-controller/irq.h> 12 13 #include <dt-bindings/pinctrl/apple.h> ··· 282 281 port00: pci@0,0 { 283 282 device_type = "pci"; 284 283 reg = <0x0 0x0 0x0 0x0 0x0>; 285 - reset-gpios = <&pinctrl_ap 152 0>; 284 + reset-gpios = <&pinctrl_ap 152 GPIO_ACTIVE_LOW>; 286 285 max-link-speed = <2>; 287 286 288 287 #address-cells = <3>; ··· 302 301 port01: pci@1,0 { 303 302 device_type = "pci"; 304 303 reg = <0x800 0x0 0x0 0x0 0x0>; 305 - reset-gpios = <&pinctrl_ap 153 0>; 304 + reset-gpios = <&pinctrl_ap 153 GPIO_ACTIVE_LOW>; 306 305 max-link-speed = <2>; 307 306 308 307 #address-cells = <3>; ··· 322 321 port02: pci@2,0 { 323 322 device_type = "pci"; 324 323 reg = <0x1000 0x0 0x0 0x0 0x0>; 325 - reset-gpios = <&pinctrl_ap 33 0>; 324 + reset-gpios = <&pinctrl_ap 33 GPIO_ACTIVE_LOW>; 326 325 max-link-speed = <1>; 327 326 328 327 #address-cells = <3>;
-9
drivers/pci/controller/pci-aardvark.c
··· 32 32 #define PCIE_CORE_DEV_ID_REG 0x0 33 33 #define PCIE_CORE_CMD_STATUS_REG 0x4 34 34 #define PCIE_CORE_DEV_REV_REG 0x8 35 - #define PCIE_CORE_EXP_ROM_BAR_REG 0x30 36 35 #define PCIE_CORE_PCIEXP_CAP 0xc0 37 36 #define PCIE_CORE_ERR_CAPCTL_REG 0x118 38 37 #define PCIE_CORE_ERR_CAPCTL_ECRC_CHK_TX BIT(5) ··· 773 774 *value = advk_readl(pcie, PCIE_CORE_CMD_STATUS_REG); 774 775 return PCI_BRIDGE_EMUL_HANDLED; 775 776 776 - case PCI_ROM_ADDRESS1: 777 - *value = advk_readl(pcie, PCIE_CORE_EXP_ROM_BAR_REG); 778 - return PCI_BRIDGE_EMUL_HANDLED; 779 - 780 777 case PCI_INTERRUPT_LINE: { 781 778 /* 782 779 * From the whole 32bit register we support reading from HW only ··· 803 808 switch (reg) { 804 809 case PCI_COMMAND: 805 810 advk_writel(pcie, new, PCIE_CORE_CMD_STATUS_REG); 806 - break; 807 - 808 - case PCI_ROM_ADDRESS1: 809 - advk_writel(pcie, new, PCIE_CORE_EXP_ROM_BAR_REG); 810 811 break; 811 812 812 813 case PCI_INTERRUPT_LINE:
+12 -2
drivers/pci/controller/pcie-apple.c
··· 516 516 int ret, i; 517 517 518 518 reset = gpiod_get_from_of_node(np, "reset-gpios", 0, 519 - GPIOD_OUT_LOW, "#PERST"); 519 + GPIOD_OUT_LOW, "PERST#"); 520 520 if (IS_ERR(reset)) 521 521 return PTR_ERR(reset); 522 522 ··· 539 539 540 540 rmw_set(PORT_APPCLK_EN, port->base + PORT_APPCLK); 541 541 542 + /* Assert PERST# before setting up the clock */ 543 + gpiod_set_value(reset, 1); 544 + 542 545 ret = apple_pcie_setup_refclk(pcie, port); 543 546 if (ret < 0) 544 547 return ret; 545 548 549 + /* The minimal Tperst-clk value is 100us (PCIe CEM r5.0, 2.9.2) */ 550 + usleep_range(100, 200); 551 + 552 + /* Deassert PERST# */ 546 553 rmw_set(PORT_PERST_OFF, port->base + PORT_PERST); 547 - gpiod_set_value(reset, 1); 554 + gpiod_set_value(reset, 0); 555 + 556 + /* Wait for 100ms after PERST# deassertion (PCIe r5.0, 6.6.1) */ 557 + msleep(100); 548 558 549 559 ret = readl_relaxed_poll_timeout(port->base + PORT_STATUS, stat, 550 560 stat & PORT_STATUS_READY, 100, 250000);