Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

sh: mach-se evt2irq migration.

Migrate Solution Engine boards to evt2irq backed hwirq lookups.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

+52 -42
+2 -1
arch/sh/boards/mach-se/7722/setup.c
··· 16 16 #include <linux/input.h> 17 17 #include <linux/input/sh_keysc.h> 18 18 #include <linux/smc91x.h> 19 + #include <linux/sh_intc.h> 19 20 #include <mach-se/mach/se7722.h> 20 21 #include <mach-se/mach/mrshpc.h> 21 22 #include <asm/machvec.h> ··· 115 114 .flags = IORESOURCE_MEM, 116 115 }, 117 116 [1] = { 118 - .start = 79, 117 + .start = evt2irq(0xbe0), 119 118 .flags = IORESOURCE_IRQ, 120 119 }, 121 120 };
+16 -15
arch/sh/boards/mach-se/7724/setup.c
··· 24 24 #include <linux/input/sh_keysc.h> 25 25 #include <linux/usb/r8a66597.h> 26 26 #include <linux/sh_eth.h> 27 + #include <linux/sh_intc.h> 27 28 #include <linux/videodev2.h> 28 29 #include <video/sh_mobile_lcdc.h> 29 30 #include <media/sh_mobile_ceu.h> ··· 198 197 .flags = IORESOURCE_MEM, 199 198 }, 200 199 [1] = { 201 - .start = 106, 200 + .start = evt2irq(0xf40), 202 201 .flags = IORESOURCE_IRQ, 203 202 }, 204 203 }; ··· 225 224 .flags = IORESOURCE_MEM, 226 225 }, 227 226 [1] = { 228 - .start = 52, 227 + .start = evt2irq(0x880), 229 228 .flags = IORESOURCE_IRQ, 230 229 }, 231 230 [2] = { ··· 256 255 .flags = IORESOURCE_MEM, 257 256 }, 258 257 [1] = { 259 - .start = 63, 258 + .start = evt2irq(0x9e0), 260 259 .flags = IORESOURCE_IRQ, 261 260 }, 262 261 [2] = { ··· 290 289 .flags = IORESOURCE_MEM, 291 290 }, 292 291 [1] = { 293 - .start = 108, 292 + .start = evt2irq(0xf80), 294 293 .flags = IORESOURCE_IRQ, 295 294 }, 296 295 }; ··· 344 343 .flags = IORESOURCE_MEM, 345 344 }, 346 345 [1] = { 347 - .start = 79, 346 + .start = evt2irq(0xbe0), 348 347 .flags = IORESOURCE_IRQ, 349 348 }, 350 349 }; ··· 367 366 .flags = IORESOURCE_MEM, 368 367 }, 369 368 [1] = { 370 - .start = 91, 369 + .start = evt2irq(0xd60), 371 370 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 372 371 }, 373 372 }; ··· 398 397 .flags = IORESOURCE_MEM, 399 398 }, 400 399 [1] = { 401 - .start = 65, 402 - .end = 65, 400 + .start = evt2irq(0xa20), 401 + .end = evt2irq(0xa20), 403 402 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, 404 403 }, 405 404 }; ··· 427 426 .flags = IORESOURCE_MEM, 428 427 }, 429 428 [1] = { 430 - .start = 66, 431 - .end = 66, 429 + .start = evt2irq(0xa40), 430 + .end = evt2irq(0xa40), 432 431 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, 433 432 }, 434 433 }; ··· 453 452 .flags = IORESOURCE_MEM, 454 453 }, 455 454 [1] = { 456 - .start = 100, 455 + .start = evt2irq(0xe80), 457 456 .flags = IORESOURCE_IRQ, 458 457 }, 459 458 }; ··· 482 481 .flags = IORESOURCE_MEM, 483 482 }, 484 483 [1] = { 485 - .start = 23, 484 + .start = evt2irq(0x4e0), 486 485 .flags = IORESOURCE_IRQ, 487 486 }, 488 487 }; ··· 512 511 .flags = IORESOURCE_MEM, 513 512 }, 514 513 [1] = { 515 - .start = 20, 514 + .start = evt2irq(0x480), 516 515 .flags = IORESOURCE_IRQ, 517 516 }, 518 517 }; ··· 550 549 .flags = IORESOURCE_MEM, 551 550 }, 552 551 [1] = { 553 - .start = 55, 552 + .start = evt2irq(0x8e0), 554 553 .flags = IORESOURCE_IRQ, 555 554 }, 556 555 }; ··· 596 595 #define EEPROM_DATA 0xBA20600C 597 596 #define EEPROM_STAT 0xBA206010 598 597 #define EEPROM_STRT 0xBA206014 598 + 599 599 static int __init sh_eth_is_eeprom_ready(void) 600 600 { 601 601 int t = 10000; ··· 652 650 extern char ms7724se_sdram_enter_end; 653 651 extern char ms7724se_sdram_leave_start; 654 652 extern char ms7724se_sdram_leave_end; 655 - 656 653 657 654 static int __init arch_setup(void) 658 655 {
+10 -9
arch/sh/include/mach-se/mach/se.h
··· 8 8 * 9 9 * Hitachi SolutionEngine support 10 10 */ 11 + #include <linux/sh_intc.h> 11 12 12 13 /* Box specific addresses. */ 13 14 ··· 83 82 #define INTC_IPRD 0xa4000018UL 84 83 #define INTC_IPRE 0xa400001aUL 85 84 86 - #define IRQ0_IRQ 32 87 - #define IRQ1_IRQ 33 85 + #define IRQ0_IRQ evt2irq(0x600) 86 + #define IRQ1_IRQ evt2irq(0x620) 88 87 #endif 89 88 90 89 #if defined(CONFIG_CPU_SUBTYPE_SH7705) 91 - #define IRQ_STNIC 12 92 - #define IRQ_CFCARD 14 90 + #define IRQ_STNIC evt2irq(0x380) 91 + #define IRQ_CFCARD evt2irq(0x3c0) 93 92 #else 94 - #define IRQ_STNIC 10 95 - #define IRQ_CFCARD 7 93 + #define IRQ_STNIC evt2irq(0x340) 94 + #define IRQ_CFCARD evt2irq(0x2e0) 96 95 #endif 97 96 98 97 /* SH Ether support (SH7710/SH7712) */ ··· 106 105 # define PHY_ID 0x01 107 106 #endif 108 107 /* Ether IRQ */ 109 - #define SH_ETH0_IRQ 80 110 - #define SH_ETH1_IRQ 81 111 - #define SH_TSU_IRQ 82 108 + #define SH_ETH0_IRQ evt2irq(0xc00) 109 + #define SH_ETH1_IRQ evt2irq(0xc20) 110 + #define SH_TSU_IRQ evt2irq(0xc40) 112 111 113 112 void init_se_IRQ(void); 114 113
+5 -4
arch/sh/include/mach-se/mach/se7343.h
··· 8 8 * 9 9 * SH-Mobile SolutionEngine 7343 support 10 10 */ 11 + #include <linux/sh_intc.h> 11 12 12 13 /* Box specific addresses. */ 13 14 ··· 119 118 #define FPGA_IN 0xb1400000 120 119 #define FPGA_OUT 0xb1400002 121 120 122 - #define IRQ0_IRQ 32 123 - #define IRQ1_IRQ 33 124 - #define IRQ4_IRQ 36 125 - #define IRQ5_IRQ 37 121 + #define IRQ0_IRQ evt2irq(0x600) 122 + #define IRQ1_IRQ evt2irq(0x620) 123 + #define IRQ4_IRQ evt2irq(0x680) 124 + #define IRQ5_IRQ evt2irq(0x6a0) 126 125 127 126 #define SE7343_FPGA_IRQ_MRSHPC0 0 128 127 #define SE7343_FPGA_IRQ_MRSHPC1 1
+4 -2
arch/sh/include/mach-se/mach/se7721.h
··· 11 11 12 12 #ifndef __ASM_SH_SE7721_H 13 13 #define __ASM_SH_SE7721_H 14 + 15 + #include <linux/sh_intc.h> 14 16 #include <asm/addrspace.h> 15 17 16 18 /* Box specific addresses. */ ··· 51 49 #define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) 52 50 53 51 #define PA_LED 0xB6800000 /* 8bit LED */ 54 - #define PA_FPGA 0xB7000000 /* FPGA base address */ 52 + #define PA_FPGA 0xB7000000 /* FPGA base address */ 55 53 56 - #define MRSHPC_IRQ0 10 54 + #define MRSHPC_IRQ0 evt2irq(0x340) 57 55 58 56 #define FPGA_ILSR1 (PA_FPGA + 0x02) 59 57 #define FPGA_ILSR2 (PA_FPGA + 0x03)
+5 -4
arch/sh/include/mach-se/mach/se7722.h
··· 13 13 * for more details. 14 14 * 15 15 */ 16 + #include <linux/sh_intc.h> 16 17 #include <asm/addrspace.h> 17 18 18 19 /* Box specific addresses. */ ··· 32 31 33 32 #define PA_PERIPHERAL 0xB0000000 34 33 35 - #define PA_PCIC PA_PERIPHERAL /* MR-SHPC-01 PCMCIA */ 34 + #define PA_PCIC PA_PERIPHERAL /* MR-SHPC-01 PCMCIA */ 36 35 #define PA_MRSHPC (PA_PERIPHERAL + 0x003fffe0) /* MR-SHPC-01 PCMCIA controller */ 37 36 #define PA_MRSHPC_MW1 (PA_PERIPHERAL + 0x00400000) /* MR-SHPC-01 memory window base */ 38 37 #define PA_MRSHPC_MW2 (PA_PERIPHERAL + 0x00500000) /* MR-SHPC-01 attribute window base */ ··· 52 51 #define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) 53 52 54 53 #define PA_LED (PA_PERIPHERAL + 0x00800000) /* 8bit LED */ 55 - #define PA_FPGA (PA_PERIPHERAL + 0x01800000) /* FPGA base address */ 54 + #define PA_FPGA (PA_PERIPHERAL + 0x01800000) /* FPGA base address */ 56 55 57 56 #define PA_LAN (PA_AREA6_IO + 0) /* SMC LAN91C111 */ 58 57 /* GPIO */ ··· 78 77 #define PORT_HIZCRC 0xA405015CUL 79 78 80 79 /* IRQ */ 81 - #define IRQ0_IRQ 32 82 - #define IRQ1_IRQ 33 80 + #define IRQ0_IRQ evt2irq(0x600) 81 + #define IRQ1_IRQ evt2irq(0x620) 83 82 84 83 #define IRQ01_MODE 0xb1800000 85 84 #define IRQ01_STS 0xb1800004
+4 -3
arch/sh/include/mach-se/mach/se7724.h
··· 18 18 * for more details. 19 19 * 20 20 */ 21 + #include <linux/sh_intc.h> 21 22 #include <asm/addrspace.h> 22 23 23 24 /* SH Eth */ ··· 36 35 #define IRQ2_MR (0xba200028) 37 36 38 37 /* IRQ */ 39 - #define IRQ0_IRQ 32 40 - #define IRQ1_IRQ 33 41 - #define IRQ2_IRQ 34 38 + #define IRQ0_IRQ evt2irq(0x600) 39 + #define IRQ1_IRQ evt2irq(0x620) 40 + #define IRQ2_IRQ evt2irq(0x640) 42 41 43 42 /* Bits in IRQ012 registers */ 44 43 #define SE7724_FPGA_IRQ_BASE 220
+2 -1
arch/sh/include/mach-se/mach/se7751.h
··· 11 11 * Modified for 7751 Solution Engine by 12 12 * Ian da Silva and Jeremy Siegel, 2001. 13 13 */ 14 + #include <linux/sh_intc.h> 14 15 15 16 /* Box specific addresses. */ 16 17 ··· 64 63 #define BCR_ILCRF (PA_BCR + 10) 65 64 #define BCR_ILCRG (PA_BCR + 12) 66 65 67 - #define IRQ_79C973 13 66 + #define IRQ_79C973 evt2irq(0x3a0) 68 67 69 68 void init_7751se_IRQ(void); 70 69
+4 -3
arch/sh/include/mach-se/mach/se7780.h
··· 12 12 * License. See the file "COPYING" in the main directory of this archive 13 13 * for more details. 14 14 */ 15 + #include <linux/sh_intc.h> 15 16 #include <asm/addrspace.h> 16 17 17 18 /* Box specific addresses. */ ··· 81 80 #define IRQPOS_PCCPW (0 * 4) 82 81 83 82 /* IDE interrupt */ 84 - #define IRQ_IDE0 67 /* iVDR */ 83 + #define IRQ_IDE0 evt2irq(0xa60) /* iVDR */ 85 84 86 85 /* SMC interrupt */ 87 - #define SMC_IRQ 8 86 + #define SMC_IRQ evt2irq(0x300) 88 87 89 88 /* SM501 interrupt */ 90 - #define SM501_IRQ 0 89 + #define SM501_IRQ evt2irq(0x200) 91 90 92 91 /* interrupt pin */ 93 92 #define IRQPIN_EXTINT1 0 /* IRQ0 pin */