Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/xe/dg1: Fix power gate sequence.

sub-pipe PG is not present on DG1. Setting these bits can disable
other power gates and cause GPU hangs on video playbacks.

VLK: 16314, 4304

Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13381
Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241219235536.454270-1-rodrigo.vivi@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
(cherry picked from commit 2f12e9c029315c1400059b2e7fdf53117c09c3a9)
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>

authored by

Rodrigo Vivi and committed by
Thomas Hellström
b84e1cd2 9ab49815

+6 -4
+6 -4
drivers/gpu/drm/xe/xe_gt_idle.c
··· 122 122 if (!xe_gt_is_media_type(gt)) 123 123 gtidle->powergate_enable |= RENDER_POWERGATE_ENABLE; 124 124 125 - for (i = XE_HW_ENGINE_VCS0, j = 0; i <= XE_HW_ENGINE_VCS7; ++i, ++j) { 126 - if ((gt->info.engine_mask & BIT(i))) 127 - gtidle->powergate_enable |= (VDN_HCP_POWERGATE_ENABLE(j) | 128 - VDN_MFXVDENC_POWERGATE_ENABLE(j)); 125 + if (xe->info.platform != XE_DG1) { 126 + for (i = XE_HW_ENGINE_VCS0, j = 0; i <= XE_HW_ENGINE_VCS7; ++i, ++j) { 127 + if ((gt->info.engine_mask & BIT(i))) 128 + gtidle->powergate_enable |= (VDN_HCP_POWERGATE_ENABLE(j) | 129 + VDN_MFXVDENC_POWERGATE_ENABLE(j)); 130 + } 129 131 } 130 132 131 133 fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);