Merge branch 'cpus4096-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'cpus4096-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (66 commits)
x86: export vector_used_by_percpu_irq
x86: use logical apicid in x2apic_cluster's x2apic_cpu_mask_to_apicid_and()
sched: nominate preferred wakeup cpu, fix
x86: fix lguest used_vectors breakage, -v2
x86: fix warning in arch/x86/kernel/io_apic.c
sched: fix warning in kernel/sched.c
sched: move test_sd_parent() to an SMP section of sched.h
sched: add SD_BALANCE_NEWIDLE at MC and CPU level for sched_mc>0
sched: activate active load balancing in new idle cpus
sched: bias task wakeups to preferred semi-idle packages
sched: nominate preferred wakeup cpu
sched: favour lower logical cpu number for sched_mc balance
sched: framework for sched_mc/smt_power_savings=N
sched: convert BALANCE_FOR_xx_POWER to inline functions
x86: use possible_cpus=NUM to extend the possible cpus allowed
x86: fix cpu_mask_to_apicid_and to include cpu_online_mask
x86: update io_apic.c to the new cpumask code
x86: Introduce topology_core_cpumask()/topology_thread_cpumask()
x86: xen: use smp_call_function_many()
x86: use work_on_cpu in x86/kernel/cpu/mcheck/mce_amd_64.c
...

Fixed up trivial conflict in kernel/time/tick-sched.c manually

+2018 -1423
+9 -8
Documentation/cpu-hotplug.txt
··· 50 cpu_possible_map = cpu_present_map + additional_cpus 51 52 (*) Option valid only for following architectures 53 - - x86_64, ia64 54 55 - ia64 and x86_64 use the number of disabled local apics in ACPI tables MADT 56 - to determine the number of potentially hot-pluggable cpus. The implementation 57 - should only rely on this to count the # of cpus, but *MUST* not rely on the 58 - apicid values in those tables for disabled apics. In the event BIOS doesn't 59 - mark such hot-pluggable cpus as disabled entries, one could use this 60 - parameter "additional_cpus=x" to represent those cpus in the cpu_possible_map. 61 62 - possible_cpus=n [s390 only] use this to set hotpluggable cpus. 63 This option sets possible_cpus bits in 64 cpu_possible_map. Thus keeping the numbers of bits set 65 constant even if the machine gets rebooted.
··· 50 cpu_possible_map = cpu_present_map + additional_cpus 51 52 (*) Option valid only for following architectures 53 + - ia64 54 55 + ia64 uses the number of disabled local apics in ACPI tables MADT to 56 + determine the number of potentially hot-pluggable cpus. The implementation 57 + should only rely on this to count the # of cpus, but *MUST* not rely 58 + on the apicid values in those tables for disabled apics. In the event 59 + BIOS doesn't mark such hot-pluggable cpus as disabled entries, one could 60 + use this parameter "additional_cpus=x" to represent those cpus in the 61 + cpu_possible_map. 62 63 + possible_cpus=n [s390,x86_64] use this to set hotpluggable cpus. 64 This option sets possible_cpus bits in 65 cpu_possible_map. Thus keeping the numbers of bits set 66 constant even if the machine gets rebooted.
-1
arch/alpha/include/asm/smp.h
··· 45 #define raw_smp_processor_id() (current_thread_info()->cpu) 46 47 extern int smp_num_cpus; 48 - #define cpu_possible_map cpu_present_map 49 50 extern void arch_send_call_function_single_ipi(int cpu); 51 extern void arch_send_call_function_ipi(cpumask_t mask);
··· 45 #define raw_smp_processor_id() (current_thread_info()->cpu) 46 47 extern int smp_num_cpus; 48 49 extern void arch_send_call_function_single_ipi(int cpu); 50 extern void arch_send_call_function_ipi(cpumask_t mask);
+1 -1
arch/alpha/kernel/irq.c
··· 55 last_cpu = cpu; 56 57 irq_desc[irq].affinity = cpumask_of_cpu(cpu); 58 - irq_desc[irq].chip->set_affinity(irq, cpumask_of_cpu(cpu)); 59 return 0; 60 } 61 #endif /* CONFIG_SMP */
··· 55 last_cpu = cpu; 56 57 irq_desc[irq].affinity = cpumask_of_cpu(cpu); 58 + irq_desc[irq].chip->set_affinity(irq, cpumask_of(cpu)); 59 return 0; 60 } 61 #endif /* CONFIG_SMP */
+2
arch/alpha/kernel/process.c
··· 94 flags |= 0x00040000UL; /* "remain halted" */ 95 *pflags = flags; 96 cpu_clear(cpuid, cpu_present_map); 97 halt(); 98 } 99 #endif ··· 121 #ifdef CONFIG_SMP 122 /* Wait for the secondaries to halt. */ 123 cpu_clear(boot_cpuid, cpu_present_map); 124 while (cpus_weight(cpu_present_map)) 125 barrier(); 126 #endif
··· 94 flags |= 0x00040000UL; /* "remain halted" */ 95 *pflags = flags; 96 cpu_clear(cpuid, cpu_present_map); 97 + cpu_clear(cpuid, cpu_possible_map); 98 halt(); 99 } 100 #endif ··· 120 #ifdef CONFIG_SMP 121 /* Wait for the secondaries to halt. */ 122 cpu_clear(boot_cpuid, cpu_present_map); 123 + cpu_clear(boot_cpuid, cpu_possible_map); 124 while (cpus_weight(cpu_present_map)) 125 barrier(); 126 #endif
+2 -5
arch/alpha/kernel/smp.c
··· 70 /* Set to a secondary's cpuid when it comes online. */ 71 static int smp_secondary_alive __devinitdata = 0; 72 73 - /* Which cpus ids came online. */ 74 - cpumask_t cpu_online_map; 75 - 76 - EXPORT_SYMBOL(cpu_online_map); 77 - 78 int smp_num_probed; /* Internal processor count */ 79 int smp_num_cpus = 1; /* Number that came online. */ 80 EXPORT_SYMBOL(smp_num_cpus); ··· 435 ((char *)cpubase + i*hwrpb->processor_size); 436 if ((cpu->flags & 0x1cc) == 0x1cc) { 437 smp_num_probed++; 438 cpu_set(i, cpu_present_map); 439 cpu->pal_revision = boot_cpu_palrev; 440 } ··· 469 470 /* Nothing to do on a UP box, or when told not to. */ 471 if (smp_num_probed == 1 || max_cpus == 0) { 472 cpu_present_map = cpumask_of_cpu(boot_cpuid); 473 printk(KERN_INFO "SMP mode deactivated.\n"); 474 return;
··· 70 /* Set to a secondary's cpuid when it comes online. */ 71 static int smp_secondary_alive __devinitdata = 0; 72 73 int smp_num_probed; /* Internal processor count */ 74 int smp_num_cpus = 1; /* Number that came online. */ 75 EXPORT_SYMBOL(smp_num_cpus); ··· 440 ((char *)cpubase + i*hwrpb->processor_size); 441 if ((cpu->flags & 0x1cc) == 0x1cc) { 442 smp_num_probed++; 443 + cpu_set(i, cpu_possible_map); 444 cpu_set(i, cpu_present_map); 445 cpu->pal_revision = boot_cpu_palrev; 446 } ··· 473 474 /* Nothing to do on a UP box, or when told not to. */ 475 if (smp_num_probed == 1 || max_cpus == 0) { 476 + cpu_possible_map = cpumask_of_cpu(boot_cpuid); 477 cpu_present_map = cpumask_of_cpu(boot_cpuid); 478 printk(KERN_INFO "SMP mode deactivated.\n"); 479 return;
+4 -4
arch/alpha/kernel/sys_dp264.c
··· 177 } 178 179 static void 180 - dp264_set_affinity(unsigned int irq, cpumask_t affinity) 181 { 182 spin_lock(&dp264_irq_lock); 183 - cpu_set_irq_affinity(irq, affinity); 184 tsunami_update_irq_hw(cached_irq_mask); 185 spin_unlock(&dp264_irq_lock); 186 } 187 188 static void 189 - clipper_set_affinity(unsigned int irq, cpumask_t affinity) 190 { 191 spin_lock(&dp264_irq_lock); 192 - cpu_set_irq_affinity(irq - 16, affinity); 193 tsunami_update_irq_hw(cached_irq_mask); 194 spin_unlock(&dp264_irq_lock); 195 }
··· 177 } 178 179 static void 180 + dp264_set_affinity(unsigned int irq, const struct cpumask *affinity) 181 { 182 spin_lock(&dp264_irq_lock); 183 + cpu_set_irq_affinity(irq, *affinity); 184 tsunami_update_irq_hw(cached_irq_mask); 185 spin_unlock(&dp264_irq_lock); 186 } 187 188 static void 189 + clipper_set_affinity(unsigned int irq, const struct cpumask *affinity) 190 { 191 spin_lock(&dp264_irq_lock); 192 + cpu_set_irq_affinity(irq - 16, *affinity); 193 tsunami_update_irq_hw(cached_irq_mask); 194 spin_unlock(&dp264_irq_lock); 195 }
+2 -2
arch/alpha/kernel/sys_titan.c
··· 158 } 159 160 static void 161 - titan_set_irq_affinity(unsigned int irq, cpumask_t affinity) 162 { 163 spin_lock(&titan_irq_lock); 164 - titan_cpu_set_irq_affinity(irq - 16, affinity); 165 titan_update_irq_hw(titan_cached_irq_mask); 166 spin_unlock(&titan_irq_lock); 167 }
··· 158 } 159 160 static void 161 + titan_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) 162 { 163 spin_lock(&titan_irq_lock); 164 + titan_cpu_set_irq_affinity(irq - 16, *affinity); 165 titan_update_irq_hw(titan_cached_irq_mask); 166 spin_unlock(&titan_irq_lock); 167 }
+2 -2
arch/arm/common/gic.c
··· 109 } 110 111 #ifdef CONFIG_SMP 112 - static void gic_set_cpu(unsigned int irq, cpumask_t mask_val) 113 { 114 void __iomem *reg = gic_dist_base(irq) + GIC_DIST_TARGET + (gic_irq(irq) & ~3); 115 unsigned int shift = (irq % 4) * 8; 116 - unsigned int cpu = first_cpu(mask_val); 117 u32 val; 118 119 spin_lock(&irq_controller_lock);
··· 109 } 110 111 #ifdef CONFIG_SMP 112 + static void gic_set_cpu(unsigned int irq, const struct cpumask *mask_val) 113 { 114 void __iomem *reg = gic_dist_base(irq) + GIC_DIST_TARGET + (gic_irq(irq) & ~3); 115 unsigned int shift = (irq % 4) * 8; 116 + unsigned int cpu = cpumask_first(mask_val); 117 u32 val; 118 119 spin_lock(&irq_controller_lock);
+1 -1
arch/arm/kernel/irq.c
··· 174 pr_debug("IRQ%u: moving from cpu%u to cpu%u\n", irq, desc->cpu, cpu); 175 176 spin_lock_irq(&desc->lock); 177 - desc->chip->set_affinity(irq, cpumask_of_cpu(cpu)); 178 spin_unlock_irq(&desc->lock); 179 } 180
··· 174 pr_debug("IRQ%u: moving from cpu%u to cpu%u\n", irq, desc->cpu, cpu); 175 176 spin_lock_irq(&desc->lock); 177 + desc->chip->set_affinity(irq, cpumask_of(cpu)); 178 spin_unlock_irq(&desc->lock); 179 } 180
-10
arch/arm/kernel/smp.c
··· 34 #include <asm/ptrace.h> 35 36 /* 37 - * bitmask of present and online CPUs. 38 - * The present bitmask indicates that the CPU is physically present. 39 - * The online bitmask indicates that the CPU is up and running. 40 - */ 41 - cpumask_t cpu_possible_map; 42 - EXPORT_SYMBOL(cpu_possible_map); 43 - cpumask_t cpu_online_map; 44 - EXPORT_SYMBOL(cpu_online_map); 45 - 46 - /* 47 * as from 2.5, kernels no longer have an init_tasks structure 48 * so we need some other way of telling a new secondary core 49 * where to place its SVC stack
··· 34 #include <asm/ptrace.h> 35 36 /* 37 * as from 2.5, kernels no longer have an init_tasks structure 38 * so we need some other way of telling a new secondary core 39 * where to place its SVC stack
+1 -2
arch/arm/mach-at91/at91rm9200_time.c
··· 178 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 179 .shift = 32, 180 .rating = 150, 181 - .cpumask = CPU_MASK_CPU0, 182 .set_next_event = clkevt32k_next_event, 183 .set_mode = clkevt32k_mode, 184 }; ··· 205 clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift); 206 clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt); 207 clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1; 208 - clkevt.cpumask = cpumask_of_cpu(0); 209 clockevents_register_device(&clkevt); 210 211 /* register clocksource */
··· 178 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 179 .shift = 32, 180 .rating = 150, 181 .set_next_event = clkevt32k_next_event, 182 .set_mode = clkevt32k_mode, 183 }; ··· 206 clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift); 207 clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt); 208 clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1; 209 + clkevt.cpumask = cpumask_of(0); 210 clockevents_register_device(&clkevt); 211 212 /* register clocksource */
+1 -1
arch/arm/mach-at91/at91sam926x_time.c
··· 91 .features = CLOCK_EVT_FEAT_PERIODIC, 92 .shift = 32, 93 .rating = 100, 94 - .cpumask = CPU_MASK_CPU0, 95 .set_mode = pit_clkevt_mode, 96 }; 97 ··· 172 173 /* Set up and register clockevents */ 174 pit_clkevt.mult = div_sc(pit_rate, NSEC_PER_SEC, pit_clkevt.shift); 175 clockevents_register_device(&pit_clkevt); 176 } 177
··· 91 .features = CLOCK_EVT_FEAT_PERIODIC, 92 .shift = 32, 93 .rating = 100, 94 .set_mode = pit_clkevt_mode, 95 }; 96 ··· 173 174 /* Set up and register clockevents */ 175 pit_clkevt.mult = div_sc(pit_rate, NSEC_PER_SEC, pit_clkevt.shift); 176 + pit_clkevt.cpumask = cpumask_of(0); 177 clockevents_register_device(&pit_clkevt); 178 } 179
+1 -1
arch/arm/mach-davinci/time.c
··· 322 clockevent_davinci.min_delta_ns = 323 clockevent_delta2ns(1, &clockevent_davinci); 324 325 - clockevent_davinci.cpumask = cpumask_of_cpu(0); 326 clockevents_register_device(&clockevent_davinci); 327 } 328
··· 322 clockevent_davinci.min_delta_ns = 323 clockevent_delta2ns(1, &clockevent_davinci); 324 325 + clockevent_davinci.cpumask = cpumask_of(0); 326 clockevents_register_device(&clockevent_davinci); 327 } 328
+1 -1
arch/arm/mach-imx/time.c
··· 184 clockevent_imx.min_delta_ns = 185 clockevent_delta2ns(0xf, &clockevent_imx); 186 187 - clockevent_imx.cpumask = cpumask_of_cpu(0); 188 189 clockevents_register_device(&clockevent_imx); 190
··· 184 clockevent_imx.min_delta_ns = 185 clockevent_delta2ns(0xf, &clockevent_imx); 186 187 + clockevent_imx.cpumask = cpumask_of(0); 188 189 clockevents_register_device(&clockevent_imx); 190
+1 -1
arch/arm/mach-ixp4xx/common.c
··· 487 clockevent_delta2ns(0xfffffffe, &clockevent_ixp4xx); 488 clockevent_ixp4xx.min_delta_ns = 489 clockevent_delta2ns(0xf, &clockevent_ixp4xx); 490 - clockevent_ixp4xx.cpumask = cpumask_of_cpu(0); 491 492 clockevents_register_device(&clockevent_ixp4xx); 493 return 0;
··· 487 clockevent_delta2ns(0xfffffffe, &clockevent_ixp4xx); 488 clockevent_ixp4xx.min_delta_ns = 489 clockevent_delta2ns(0xf, &clockevent_ixp4xx); 490 + clockevent_ixp4xx.cpumask = cpumask_of(0); 491 492 clockevents_register_device(&clockevent_ixp4xx); 493 return 0;
+1 -1
arch/arm/mach-msm/timer.c
··· 182 clockevent_delta2ns(0xf0000000 >> clock->shift, ce); 183 /* 4 gets rounded down to 3 */ 184 ce->min_delta_ns = clockevent_delta2ns(4, ce); 185 - ce->cpumask = cpumask_of_cpu(0); 186 187 cs->mult = clocksource_hz2mult(clock->freq, cs->shift); 188 res = clocksource_register(cs);
··· 182 clockevent_delta2ns(0xf0000000 >> clock->shift, ce); 183 /* 4 gets rounded down to 3 */ 184 ce->min_delta_ns = clockevent_delta2ns(4, ce); 185 + ce->cpumask = cpumask_of(0); 186 187 cs->mult = clocksource_hz2mult(clock->freq, cs->shift); 188 res = clocksource_register(cs);
+1 -1
arch/arm/mach-ns9xxx/time-ns9360.c
··· 173 ns9360_clockevent_device.min_delta_ns = 174 clockevent_delta2ns(1, &ns9360_clockevent_device); 175 176 - ns9360_clockevent_device.cpumask = cpumask_of_cpu(0); 177 clockevents_register_device(&ns9360_clockevent_device); 178 179 setup_irq(IRQ_NS9360_TIMER0 + TIMER_CLOCKEVENT,
··· 173 ns9360_clockevent_device.min_delta_ns = 174 clockevent_delta2ns(1, &ns9360_clockevent_device); 175 176 + ns9360_clockevent_device.cpumask = cpumask_of(0); 177 clockevents_register_device(&ns9360_clockevent_device); 178 179 setup_irq(IRQ_NS9360_TIMER0 + TIMER_CLOCKEVENT,
+1 -1
arch/arm/mach-omap1/time.c
··· 173 clockevent_mpu_timer1.min_delta_ns = 174 clockevent_delta2ns(1, &clockevent_mpu_timer1); 175 176 - clockevent_mpu_timer1.cpumask = cpumask_of_cpu(0); 177 clockevents_register_device(&clockevent_mpu_timer1); 178 } 179
··· 173 clockevent_mpu_timer1.min_delta_ns = 174 clockevent_delta2ns(1, &clockevent_mpu_timer1); 175 176 + clockevent_mpu_timer1.cpumask = cpumask_of(0); 177 clockevents_register_device(&clockevent_mpu_timer1); 178 } 179
+1 -1
arch/arm/mach-omap1/timer32k.c
··· 187 clockevent_32k_timer.min_delta_ns = 188 clockevent_delta2ns(1, &clockevent_32k_timer); 189 190 - clockevent_32k_timer.cpumask = cpumask_of_cpu(0); 191 clockevents_register_device(&clockevent_32k_timer); 192 } 193
··· 187 clockevent_32k_timer.min_delta_ns = 188 clockevent_delta2ns(1, &clockevent_32k_timer); 189 190 + clockevent_32k_timer.cpumask = cpumask_of(0); 191 clockevents_register_device(&clockevent_32k_timer); 192 } 193
+1 -1
arch/arm/mach-omap2/timer-gp.c
··· 120 clockevent_gpt.min_delta_ns = 121 clockevent_delta2ns(1, &clockevent_gpt); 122 123 - clockevent_gpt.cpumask = cpumask_of_cpu(0); 124 clockevents_register_device(&clockevent_gpt); 125 } 126
··· 120 clockevent_gpt.min_delta_ns = 121 clockevent_delta2ns(1, &clockevent_gpt); 122 123 + clockevent_gpt.cpumask = cpumask_of(0); 124 clockevents_register_device(&clockevent_gpt); 125 } 126
+1 -1
arch/arm/mach-pxa/time.c
··· 122 .features = CLOCK_EVT_FEAT_ONESHOT, 123 .shift = 32, 124 .rating = 200, 125 - .cpumask = CPU_MASK_CPU0, 126 .set_next_event = pxa_osmr0_set_next_event, 127 .set_mode = pxa_osmr0_set_mode, 128 }; ··· 162 clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0); 163 ckevt_pxa_osmr0.min_delta_ns = 164 clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_pxa_osmr0) + 1; 165 166 cksrc_pxa_oscr0.mult = 167 clocksource_hz2mult(clock_tick_rate, cksrc_pxa_oscr0.shift);
··· 122 .features = CLOCK_EVT_FEAT_ONESHOT, 123 .shift = 32, 124 .rating = 200, 125 .set_next_event = pxa_osmr0_set_next_event, 126 .set_mode = pxa_osmr0_set_mode, 127 }; ··· 163 clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0); 164 ckevt_pxa_osmr0.min_delta_ns = 165 clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_pxa_osmr0) + 1; 166 + ckevt_pxa_osmr0.cpumask = cpumask_of(0); 167 168 cksrc_pxa_oscr0.mult = 169 clocksource_hz2mult(clock_tick_rate, cksrc_pxa_oscr0.shift);
+1 -1
arch/arm/mach-realview/core.c
··· 624 .set_mode = timer_set_mode, 625 .set_next_event = timer_set_next_event, 626 .rating = 300, 627 - .cpumask = CPU_MASK_ALL, 628 }; 629 630 static void __init realview_clockevents_init(unsigned int timer_irq)
··· 624 .set_mode = timer_set_mode, 625 .set_next_event = timer_set_next_event, 626 .rating = 300, 627 + .cpumask = cpu_all_mask, 628 }; 629 630 static void __init realview_clockevents_init(unsigned int timer_irq)
+2 -2
arch/arm/mach-realview/localtimer.c
··· 154 clk->set_mode = local_timer_set_mode; 155 clk->set_next_event = local_timer_set_next_event; 156 clk->irq = IRQ_LOCALTIMER; 157 - clk->cpumask = cpumask_of_cpu(cpu); 158 clk->shift = 20; 159 clk->mult = div_sc(mpcore_timer_rate, NSEC_PER_SEC, clk->shift); 160 clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk); ··· 193 clk->rating = 200; 194 clk->set_mode = dummy_timer_set_mode; 195 clk->broadcast = smp_timer_broadcast; 196 - clk->cpumask = cpumask_of_cpu(cpu); 197 198 clockevents_register_device(clk); 199 }
··· 154 clk->set_mode = local_timer_set_mode; 155 clk->set_next_event = local_timer_set_next_event; 156 clk->irq = IRQ_LOCALTIMER; 157 + clk->cpumask = cpumask_of(cpu); 158 clk->shift = 20; 159 clk->mult = div_sc(mpcore_timer_rate, NSEC_PER_SEC, clk->shift); 160 clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk); ··· 193 clk->rating = 200; 194 clk->set_mode = dummy_timer_set_mode; 195 clk->broadcast = smp_timer_broadcast; 196 + clk->cpumask = cpumask_of(cpu); 197 198 clockevents_register_device(clk); 199 }
+1 -1
arch/arm/mach-sa1100/time.c
··· 73 .features = CLOCK_EVT_FEAT_ONESHOT, 74 .shift = 32, 75 .rating = 200, 76 - .cpumask = CPU_MASK_CPU0, 77 .set_next_event = sa1100_osmr0_set_next_event, 78 .set_mode = sa1100_osmr0_set_mode, 79 }; ··· 109 clockevent_delta2ns(0x7fffffff, &ckevt_sa1100_osmr0); 110 ckevt_sa1100_osmr0.min_delta_ns = 111 clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_sa1100_osmr0) + 1; 112 113 cksrc_sa1100_oscr.mult = 114 clocksource_hz2mult(CLOCK_TICK_RATE, cksrc_sa1100_oscr.shift);
··· 73 .features = CLOCK_EVT_FEAT_ONESHOT, 74 .shift = 32, 75 .rating = 200, 76 .set_next_event = sa1100_osmr0_set_next_event, 77 .set_mode = sa1100_osmr0_set_mode, 78 }; ··· 110 clockevent_delta2ns(0x7fffffff, &ckevt_sa1100_osmr0); 111 ckevt_sa1100_osmr0.min_delta_ns = 112 clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_sa1100_osmr0) + 1; 113 + ckevt_sa1100_osmr0.cpumask = cpumask_of(0); 114 115 cksrc_sa1100_oscr.mult = 116 clocksource_hz2mult(CLOCK_TICK_RATE, cksrc_sa1100_oscr.shift);
+1 -1
arch/arm/mach-versatile/core.c
··· 1005 timer0_clockevent.min_delta_ns = 1006 clockevent_delta2ns(0xf, &timer0_clockevent); 1007 1008 - timer0_clockevent.cpumask = cpumask_of_cpu(0); 1009 clockevents_register_device(&timer0_clockevent); 1010 } 1011
··· 1005 timer0_clockevent.min_delta_ns = 1006 clockevent_delta2ns(0xf, &timer0_clockevent); 1007 1008 + timer0_clockevent.cpumask = cpumask_of(0); 1009 clockevents_register_device(&timer0_clockevent); 1010 } 1011
+2 -2
arch/arm/oprofile/op_model_mpcore.c
··· 260 static void em_route_irq(int irq, unsigned int cpu) 261 { 262 struct irq_desc *desc = irq_desc + irq; 263 - cpumask_t mask = cpumask_of_cpu(cpu); 264 265 spin_lock_irq(&desc->lock); 266 - desc->affinity = mask; 267 desc->chip->set_affinity(irq, mask); 268 spin_unlock_irq(&desc->lock); 269 }
··· 260 static void em_route_irq(int irq, unsigned int cpu) 261 { 262 struct irq_desc *desc = irq_desc + irq; 263 + const struct cpumask *mask = cpumask_of(cpu); 264 265 spin_lock_irq(&desc->lock); 266 + desc->affinity = *mask; 267 desc->chip->set_affinity(irq, mask); 268 spin_unlock_irq(&desc->lock); 269 }
+1 -1
arch/arm/plat-mxc/time.c
··· 190 clockevent_mxc.min_delta_ns = 191 clockevent_delta2ns(0xff, &clockevent_mxc); 192 193 - clockevent_mxc.cpumask = cpumask_of_cpu(0); 194 195 clockevents_register_device(&clockevent_mxc); 196
··· 190 clockevent_mxc.min_delta_ns = 191 clockevent_delta2ns(0xff, &clockevent_mxc); 192 193 + clockevent_mxc.cpumask = cpumask_of(0); 194 195 clockevents_register_device(&clockevent_mxc); 196
+1 -1
arch/arm/plat-orion/time.c
··· 149 .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC, 150 .shift = 32, 151 .rating = 300, 152 - .cpumask = CPU_MASK_CPU0, 153 .set_next_event = orion_clkevt_next_event, 154 .set_mode = orion_clkevt_mode, 155 }; ··· 198 orion_clkevt.mult = div_sc(tclk, NSEC_PER_SEC, orion_clkevt.shift); 199 orion_clkevt.max_delta_ns = clockevent_delta2ns(0xfffffffe, &orion_clkevt); 200 orion_clkevt.min_delta_ns = clockevent_delta2ns(1, &orion_clkevt); 201 clockevents_register_device(&orion_clkevt); 202 }
··· 149 .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC, 150 .shift = 32, 151 .rating = 300, 152 .set_next_event = orion_clkevt_next_event, 153 .set_mode = orion_clkevt_mode, 154 }; ··· 199 orion_clkevt.mult = div_sc(tclk, NSEC_PER_SEC, orion_clkevt.shift); 200 orion_clkevt.max_delta_ns = clockevent_delta2ns(0xfffffffe, &orion_clkevt); 201 orion_clkevt.min_delta_ns = clockevent_delta2ns(1, &orion_clkevt); 202 + orion_clkevt.cpumask = cpumask_of(0); 203 clockevents_register_device(&orion_clkevt); 204 }
+1 -1
arch/avr32/kernel/time.c
··· 106 .features = CLOCK_EVT_FEAT_ONESHOT, 107 .shift = 16, 108 .rating = 50, 109 - .cpumask = CPU_MASK_CPU0, 110 .set_next_event = comparator_next_event, 111 .set_mode = comparator_mode, 112 }; ··· 133 comparator.mult = div_sc(counter_hz, NSEC_PER_SEC, comparator.shift); 134 comparator.max_delta_ns = clockevent_delta2ns((u32)~0, &comparator); 135 comparator.min_delta_ns = clockevent_delta2ns(50, &comparator) + 1; 136 137 sysreg_write(COMPARE, 0); 138 timer_irqaction.dev_id = &comparator;
··· 106 .features = CLOCK_EVT_FEAT_ONESHOT, 107 .shift = 16, 108 .rating = 50, 109 .set_next_event = comparator_next_event, 110 .set_mode = comparator_mode, 111 }; ··· 134 comparator.mult = div_sc(counter_hz, NSEC_PER_SEC, comparator.shift); 135 comparator.max_delta_ns = clockevent_delta2ns((u32)~0, &comparator); 136 comparator.min_delta_ns = clockevent_delta2ns(50, &comparator) + 1; 137 + comparator.cpumask = cpumask_of(0); 138 139 sysreg_write(COMPARE, 0); 140 timer_irqaction.dev_id = &comparator;
+1 -1
arch/blackfin/kernel/time-ts.c
··· 162 .name = "bfin_core_timer", 163 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 164 .shift = 32, 165 - .cpumask = CPU_MASK_CPU0, 166 .set_next_event = bfin_timer_set_next_event, 167 .set_mode = bfin_timer_set_mode, 168 }; ··· 192 clockevent_bfin.mult = div_sc(timer_clk, NSEC_PER_SEC, clockevent_bfin.shift); 193 clockevent_bfin.max_delta_ns = clockevent_delta2ns(-1, &clockevent_bfin); 194 clockevent_bfin.min_delta_ns = clockevent_delta2ns(100, &clockevent_bfin); 195 clockevents_register_device(&clockevent_bfin); 196 197 return 0;
··· 162 .name = "bfin_core_timer", 163 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 164 .shift = 32, 165 .set_next_event = bfin_timer_set_next_event, 166 .set_mode = bfin_timer_set_mode, 167 }; ··· 193 clockevent_bfin.mult = div_sc(timer_clk, NSEC_PER_SEC, clockevent_bfin.shift); 194 clockevent_bfin.max_delta_ns = clockevent_delta2ns(-1, &clockevent_bfin); 195 clockevent_bfin.min_delta_ns = clockevent_delta2ns(100, &clockevent_bfin); 196 + clockevent_bfin.cpumask = cpumask_of(0); 197 clockevents_register_device(&clockevent_bfin); 198 199 return 0;
+2 -2
arch/cris/arch-v32/kernel/irq.c
··· 325 { 326 } 327 328 - void set_affinity_crisv32_irq(unsigned int irq, cpumask_t dest) 329 { 330 unsigned long flags; 331 spin_lock_irqsave(&irq_lock, flags); 332 - irq_allocations[irq - FIRST_IRQ].mask = dest; 333 spin_unlock_irqrestore(&irq_lock, flags); 334 } 335
··· 325 { 326 } 327 328 + void set_affinity_crisv32_irq(unsigned int irq, const struct cpumask *dest) 329 { 330 unsigned long flags; 331 spin_lock_irqsave(&irq_lock, flags); 332 + irq_allocations[irq - FIRST_IRQ].mask = *dest; 333 spin_unlock_irqrestore(&irq_lock, flags); 334 } 335
-4
arch/cris/arch-v32/kernel/smp.c
··· 29 spinlock_t cris_atomic_locks[] = { [0 ... LOCK_COUNT - 1] = SPIN_LOCK_UNLOCKED}; 30 31 /* CPU masks */ 32 - cpumask_t cpu_online_map = CPU_MASK_NONE; 33 - EXPORT_SYMBOL(cpu_online_map); 34 cpumask_t phys_cpu_present_map = CPU_MASK_NONE; 35 - cpumask_t cpu_possible_map; 36 - EXPORT_SYMBOL(cpu_possible_map); 37 EXPORT_SYMBOL(phys_cpu_present_map); 38 39 /* Variables used during SMP boot */
··· 29 spinlock_t cris_atomic_locks[] = { [0 ... LOCK_COUNT - 1] = SPIN_LOCK_UNLOCKED}; 30 31 /* CPU masks */ 32 cpumask_t phys_cpu_present_map = CPU_MASK_NONE; 33 EXPORT_SYMBOL(phys_cpu_present_map); 34 35 /* Variables used during SMP boot */
-1
arch/cris/include/asm/smp.h
··· 4 #include <linux/cpumask.h> 5 6 extern cpumask_t phys_cpu_present_map; 7 - extern cpumask_t cpu_possible_map; 8 9 #define raw_smp_processor_id() (current_thread_info()->cpu) 10
··· 4 #include <linux/cpumask.h> 5 6 extern cpumask_t phys_cpu_present_map; 7 8 #define raw_smp_processor_id() (current_thread_info()->cpu) 9
+1 -1
arch/ia64/hp/sim/hpsim_irq.c
··· 22 } 23 24 static void 25 - hpsim_set_affinity_noop (unsigned int a, cpumask_t b) 26 { 27 } 28
··· 22 } 23 24 static void 25 + hpsim_set_affinity_noop(unsigned int a, const struct cpumask *b) 26 { 27 } 28
-1
arch/ia64/include/asm/smp.h
··· 57 58 extern char no_int_routing __devinitdata; 59 60 - extern cpumask_t cpu_online_map; 61 extern cpumask_t cpu_core_map[NR_CPUS]; 62 DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); 63 extern int smp_num_siblings;
··· 57 58 extern char no_int_routing __devinitdata; 59 60 extern cpumask_t cpu_core_map[NR_CPUS]; 61 DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); 62 extern int smp_num_siblings;
-2
arch/ia64/include/asm/topology.h
··· 55 void build_cpu_to_node_map(void); 56 57 #define SD_CPU_INIT (struct sched_domain) { \ 58 - .span = CPU_MASK_NONE, \ 59 .parent = NULL, \ 60 .child = NULL, \ 61 .groups = NULL, \ ··· 79 80 /* sched_domains SD_NODE_INIT for IA64 NUMA machines */ 81 #define SD_NODE_INIT (struct sched_domain) { \ 82 - .span = CPU_MASK_NONE, \ 83 .parent = NULL, \ 84 .child = NULL, \ 85 .groups = NULL, \
··· 55 void build_cpu_to_node_map(void); 56 57 #define SD_CPU_INIT (struct sched_domain) { \ 58 .parent = NULL, \ 59 .child = NULL, \ 60 .groups = NULL, \ ··· 80 81 /* sched_domains SD_NODE_INIT for IA64 NUMA machines */ 82 #define SD_NODE_INIT (struct sched_domain) { \ 83 .parent = NULL, \ 84 .child = NULL, \ 85 .groups = NULL, \
+6 -6
arch/ia64/kernel/iosapic.c
··· 330 331 332 static void 333 - iosapic_set_affinity (unsigned int irq, cpumask_t mask) 334 { 335 #ifdef CONFIG_SMP 336 u32 high32, low32; 337 - int dest, rte_index; 338 int redir = (irq & IA64_IRQ_REDIRECTED) ? 1 : 0; 339 struct iosapic_rte_info *rte; 340 struct iosapic *iosapic; 341 342 irq &= (~IA64_IRQ_REDIRECTED); 343 344 - cpus_and(mask, mask, cpu_online_map); 345 - if (cpus_empty(mask)) 346 return; 347 348 - if (irq_prepare_move(irq, first_cpu(mask))) 349 return; 350 351 - dest = cpu_physical_id(first_cpu(mask)); 352 353 if (!iosapic_intr_info[irq].count) 354 return; /* not an IOSAPIC interrupt */
··· 330 331 332 static void 333 + iosapic_set_affinity(unsigned int irq, const struct cpumask *mask) 334 { 335 #ifdef CONFIG_SMP 336 u32 high32, low32; 337 + int cpu, dest, rte_index; 338 int redir = (irq & IA64_IRQ_REDIRECTED) ? 1 : 0; 339 struct iosapic_rte_info *rte; 340 struct iosapic *iosapic; 341 342 irq &= (~IA64_IRQ_REDIRECTED); 343 344 + cpu = cpumask_first_and(cpu_online_mask, mask); 345 + if (cpu >= nr_cpu_ids) 346 return; 347 348 + if (irq_prepare_move(irq, cpu)) 349 return; 350 351 + dest = cpu_physical_id(cpu); 352 353 if (!iosapic_intr_info[irq].count) 354 return; /* not an IOSAPIC interrupt */
+4 -5
arch/ia64/kernel/irq.c
··· 133 */ 134 static void migrate_irqs(void) 135 { 136 - cpumask_t mask; 137 irq_desc_t *desc; 138 int irq, new_cpu; 139 ··· 151 if (desc->status == IRQ_PER_CPU) 152 continue; 153 154 - cpus_and(mask, irq_desc[irq].affinity, cpu_online_map); 155 - if (any_online_cpu(mask) == NR_CPUS) { 156 /* 157 * Save it for phase 2 processing 158 */ 159 vectors_in_migration[irq] = irq; 160 161 new_cpu = any_online_cpu(cpu_online_map); 162 - mask = cpumask_of_cpu(new_cpu); 163 164 /* 165 * Al three are essential, currently WARN_ON.. maybe panic? ··· 166 if (desc->chip && desc->chip->disable && 167 desc->chip->enable && desc->chip->set_affinity) { 168 desc->chip->disable(irq); 169 - desc->chip->set_affinity(irq, mask); 170 desc->chip->enable(irq); 171 } else { 172 WARN_ON((!(desc->chip) || !(desc->chip->disable) ||
··· 133 */ 134 static void migrate_irqs(void) 135 { 136 irq_desc_t *desc; 137 int irq, new_cpu; 138 ··· 152 if (desc->status == IRQ_PER_CPU) 153 continue; 154 155 + if (cpumask_any_and(&irq_desc[irq].affinity, cpu_online_mask) 156 + >= nr_cpu_ids) { 157 /* 158 * Save it for phase 2 processing 159 */ 160 vectors_in_migration[irq] = irq; 161 162 new_cpu = any_online_cpu(cpu_online_map); 163 164 /* 165 * Al three are essential, currently WARN_ON.. maybe panic? ··· 168 if (desc->chip && desc->chip->disable && 169 desc->chip->enable && desc->chip->set_affinity) { 170 desc->chip->disable(irq); 171 + desc->chip->set_affinity(irq, 172 + cpumask_of(new_cpu)); 173 desc->chip->enable(irq); 174 } else { 175 WARN_ON((!(desc->chip) || !(desc->chip->disable) ||
+6 -6
arch/ia64/kernel/msi_ia64.c
··· 49 static struct irq_chip ia64_msi_chip; 50 51 #ifdef CONFIG_SMP 52 - static void ia64_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask) 53 { 54 struct msi_msg msg; 55 u32 addr, data; 56 - int cpu = first_cpu(cpu_mask); 57 58 if (!cpu_online(cpu)) 59 return; ··· 167 168 #ifdef CONFIG_DMAR 169 #ifdef CONFIG_SMP 170 - static void dmar_msi_set_affinity(unsigned int irq, cpumask_t mask) 171 { 172 struct irq_cfg *cfg = irq_cfg + irq; 173 struct msi_msg msg; 174 - int cpu = first_cpu(mask); 175 - 176 177 if (!cpu_online(cpu)) 178 return; ··· 187 msg.address_lo |= MSI_ADDR_DESTID_CPU(cpu_physical_id(cpu)); 188 189 dmar_msi_write(irq, &msg); 190 - irq_desc[irq].affinity = mask; 191 } 192 #endif /* CONFIG_SMP */ 193
··· 49 static struct irq_chip ia64_msi_chip; 50 51 #ifdef CONFIG_SMP 52 + static void ia64_set_msi_irq_affinity(unsigned int irq, 53 + const cpumask_t *cpu_mask) 54 { 55 struct msi_msg msg; 56 u32 addr, data; 57 + int cpu = first_cpu(*cpu_mask); 58 59 if (!cpu_online(cpu)) 60 return; ··· 166 167 #ifdef CONFIG_DMAR 168 #ifdef CONFIG_SMP 169 + static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) 170 { 171 struct irq_cfg *cfg = irq_cfg + irq; 172 struct msi_msg msg; 173 + int cpu = cpumask_first(mask); 174 175 if (!cpu_online(cpu)) 176 return; ··· 187 msg.address_lo |= MSI_ADDR_DESTID_CPU(cpu_physical_id(cpu)); 188 189 dmar_msi_write(irq, &msg); 190 + irq_desc[irq].affinity = *mask; 191 } 192 #endif /* CONFIG_SMP */ 193
+2 -8
arch/ia64/kernel/smpboot.c
··· 131 */ 132 DEFINE_PER_CPU(int, cpu_state); 133 134 - /* Bitmasks of currently online, and possible CPUs */ 135 - cpumask_t cpu_online_map; 136 - EXPORT_SYMBOL(cpu_online_map); 137 - cpumask_t cpu_possible_map = CPU_MASK_NONE; 138 - EXPORT_SYMBOL(cpu_possible_map); 139 - 140 cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned; 141 EXPORT_SYMBOL(cpu_core_map); 142 DEFINE_PER_CPU_SHARED_ALIGNED(cpumask_t, cpu_sibling_map); ··· 682 { 683 int new_cpei_cpu; 684 irq_desc_t *desc = NULL; 685 - cpumask_t mask; 686 int retval = 0; 687 688 /* ··· 695 * Now re-target the CPEI to a different processor 696 */ 697 new_cpei_cpu = any_online_cpu(cpu_online_map); 698 - mask = cpumask_of_cpu(new_cpei_cpu); 699 set_cpei_target_cpu(new_cpei_cpu); 700 desc = irq_desc + ia64_cpe_irq; 701 /*
··· 131 */ 132 DEFINE_PER_CPU(int, cpu_state); 133 134 cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned; 135 EXPORT_SYMBOL(cpu_core_map); 136 DEFINE_PER_CPU_SHARED_ALIGNED(cpumask_t, cpu_sibling_map); ··· 688 { 689 int new_cpei_cpu; 690 irq_desc_t *desc = NULL; 691 + const struct cpumask *mask; 692 int retval = 0; 693 694 /* ··· 701 * Now re-target the CPEI to a different processor 702 */ 703 new_cpei_cpu = any_online_cpu(cpu_online_map); 704 + mask = cpumask_of(new_cpei_cpu); 705 set_cpei_target_cpu(new_cpei_cpu); 706 desc = irq_desc + ia64_cpe_irq; 707 /*
+1 -1
arch/ia64/kernel/topology.c
··· 219 cpumask_t shared_cpu_map; 220 221 cpus_and(shared_cpu_map, this_leaf->shared_cpu_map, cpu_online_map); 222 - len = cpumask_scnprintf(buf, NR_CPUS+1, shared_cpu_map); 223 len += sprintf(buf+len, "\n"); 224 return len; 225 }
··· 219 cpumask_t shared_cpu_map; 220 221 cpus_and(shared_cpu_map, this_leaf->shared_cpu_map, cpu_online_map); 222 + len = cpumask_scnprintf(buf, NR_CPUS+1, &shared_cpu_map); 223 len += sprintf(buf+len, "\n"); 224 return len; 225 }
+3 -3
arch/ia64/sn/kernel/irq.c
··· 227 return new_irq_info; 228 } 229 230 - static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask) 231 { 232 struct sn_irq_info *sn_irq_info, *sn_irq_info_safe; 233 nasid_t nasid; 234 int slice; 235 236 - nasid = cpuid_to_nasid(first_cpu(mask)); 237 - slice = cpuid_to_slice(first_cpu(mask)); 238 239 list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe, 240 sn_irq_lh[irq], list)
··· 227 return new_irq_info; 228 } 229 230 + static void sn_set_affinity_irq(unsigned int irq, const struct cpumask *mask) 231 { 232 struct sn_irq_info *sn_irq_info, *sn_irq_info_safe; 233 nasid_t nasid; 234 int slice; 235 236 + nasid = cpuid_to_nasid(cpumask_first(mask)); 237 + slice = cpuid_to_slice(cpumask_first(mask)); 238 239 list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe, 240 sn_irq_lh[irq], list)
+4 -3
arch/ia64/sn/kernel/msi_sn.c
··· 151 } 152 153 #ifdef CONFIG_SMP 154 - static void sn_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask) 155 { 156 struct msi_msg msg; 157 int slice; ··· 165 struct sn_pcibus_provider *provider; 166 unsigned int cpu; 167 168 - cpu = first_cpu(cpu_mask); 169 sn_irq_info = sn_msi_info[irq].sn_irq_info; 170 if (sn_irq_info == NULL || sn_irq_info->irq_int_bit >= 0) 171 return; ··· 205 msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff); 206 207 write_msi_msg(irq, &msg); 208 - irq_desc[irq].affinity = cpu_mask; 209 } 210 #endif /* CONFIG_SMP */ 211
··· 151 } 152 153 #ifdef CONFIG_SMP 154 + static void sn_set_msi_irq_affinity(unsigned int irq, 155 + const struct cpumask *cpu_mask) 156 { 157 struct msi_msg msg; 158 int slice; ··· 164 struct sn_pcibus_provider *provider; 165 unsigned int cpu; 166 167 + cpu = cpumask_first(cpu_mask); 168 sn_irq_info = sn_msi_info[irq].sn_irq_info; 169 if (sn_irq_info == NULL || sn_irq_info->irq_int_bit >= 0) 170 return; ··· 204 msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff); 205 206 write_msi_msg(irq, &msg); 207 + irq_desc[irq].affinity = *cpu_mask; 208 } 209 #endif /* CONFIG_SMP */ 210
+1
arch/m32r/Kconfig
··· 10 default y 11 select HAVE_IDE 12 select HAVE_OPROFILE 13 14 config SBUS 15 bool
··· 10 default y 11 select HAVE_IDE 12 select HAVE_OPROFILE 13 + select INIT_ALL_POSSIBLE 14 15 config SBUS 16 bool
-6
arch/m32r/kernel/smpboot.c
··· 73 /* Bitmask of physically existing CPUs */ 74 physid_mask_t phys_cpu_present_map; 75 76 - /* Bitmask of currently online CPUs */ 77 - cpumask_t cpu_online_map; 78 - EXPORT_SYMBOL(cpu_online_map); 79 - 80 cpumask_t cpu_bootout_map; 81 cpumask_t cpu_bootin_map; 82 static cpumask_t cpu_callin_map; 83 cpumask_t cpu_callout_map; 84 EXPORT_SYMBOL(cpu_callout_map); 85 - cpumask_t cpu_possible_map = CPU_MASK_ALL; 86 - EXPORT_SYMBOL(cpu_possible_map); 87 88 /* Per CPU bogomips and other parameters */ 89 struct cpuinfo_m32r cpu_data[NR_CPUS] __cacheline_aligned;
··· 73 /* Bitmask of physically existing CPUs */ 74 physid_mask_t phys_cpu_present_map; 75 76 cpumask_t cpu_bootout_map; 77 cpumask_t cpu_bootin_map; 78 static cpumask_t cpu_callin_map; 79 cpumask_t cpu_callout_map; 80 EXPORT_SYMBOL(cpu_callout_map); 81 82 /* Per CPU bogomips and other parameters */ 83 struct cpuinfo_m32r cpu_data[NR_CPUS] __cacheline_aligned;
+1 -1
arch/m68knommu/platform/coldfire/pit.c
··· 156 { 157 u32 imr; 158 159 - cf_pit_clockevent.cpumask = cpumask_of_cpu(smp_processor_id()); 160 cf_pit_clockevent.mult = div_sc(FREQ, NSEC_PER_SEC, 32); 161 cf_pit_clockevent.max_delta_ns = 162 clockevent_delta2ns(0xFFFF, &cf_pit_clockevent);
··· 156 { 157 u32 imr; 158 159 + cf_pit_clockevent.cpumask = cpumask_of(smp_processor_id()); 160 cf_pit_clockevent.mult = div_sc(FREQ, NSEC_PER_SEC, 32); 161 cf_pit_clockevent.max_delta_ns = 162 clockevent_delta2ns(0xFFFF, &cf_pit_clockevent);
+2 -1
arch/mips/include/asm/irq.h
··· 49 #ifdef CONFIG_MIPS_MT_SMTC_IRQAFF 50 #include <linux/cpumask.h> 51 52 - extern void plat_set_irq_affinity(unsigned int irq, cpumask_t affinity); 53 extern void smtc_forward_irq(unsigned int irq); 54 55 /*
··· 49 #ifdef CONFIG_MIPS_MT_SMTC_IRQAFF 50 #include <linux/cpumask.h> 51 52 + extern void plat_set_irq_affinity(unsigned int irq, 53 + const struct cpumask *affinity); 54 extern void smtc_forward_irq(unsigned int irq); 55 56 /*
-1
arch/mips/include/asm/mach-ip27/topology.h
··· 37 38 /* sched_domains SD_NODE_INIT for SGI IP27 machines */ 39 #define SD_NODE_INIT (struct sched_domain) { \ 40 - .span = CPU_MASK_NONE, \ 41 .parent = NULL, \ 42 .child = NULL, \ 43 .groups = NULL, \
··· 37 38 /* sched_domains SD_NODE_INIT for SGI IP27 machines */ 39 #define SD_NODE_INIT (struct sched_domain) { \ 40 .parent = NULL, \ 41 .child = NULL, \ 42 .groups = NULL, \
-3
arch/mips/include/asm/smp.h
··· 38 #define SMP_RESCHEDULE_YOURSELF 0x1 /* XXX braindead */ 39 #define SMP_CALL_FUNCTION 0x2 40 41 - extern cpumask_t phys_cpu_present_map; 42 - #define cpu_possible_map phys_cpu_present_map 43 - 44 extern void asmlinkage smp_bootstrap(void); 45 46 /*
··· 38 #define SMP_RESCHEDULE_YOURSELF 0x1 /* XXX braindead */ 39 #define SMP_CALL_FUNCTION 0x2 40 41 extern void asmlinkage smp_bootstrap(void); 42 43 /*
+1 -1
arch/mips/jazz/irq.c
··· 146 147 BUG_ON(HZ != 100); 148 149 - cd->cpumask = cpumask_of_cpu(cpu); 150 clockevents_register_device(cd); 151 action->dev_id = cd; 152 setup_irq(JAZZ_TIMER_IRQ, action);
··· 146 147 BUG_ON(HZ != 100); 148 149 + cd->cpumask = cpumask_of(cpu); 150 clockevents_register_device(cd); 151 action->dev_id = cd; 152 setup_irq(JAZZ_TIMER_IRQ, action);
+2 -2
arch/mips/kernel/cevt-bcm1480.c
··· 126 cd->min_delta_ns = clockevent_delta2ns(2, cd); 127 cd->rating = 200; 128 cd->irq = irq; 129 - cd->cpumask = cpumask_of_cpu(cpu); 130 cd->set_next_event = sibyte_next_event; 131 cd->set_mode = sibyte_set_mode; 132 clockevents_register_device(cd); ··· 148 action->name = name; 149 action->dev_id = cd; 150 151 - irq_set_affinity(irq, cpumask_of_cpu(cpu)); 152 setup_irq(irq, action); 153 }
··· 126 cd->min_delta_ns = clockevent_delta2ns(2, cd); 127 cd->rating = 200; 128 cd->irq = irq; 129 + cd->cpumask = cpumask_of(cpu); 130 cd->set_next_event = sibyte_next_event; 131 cd->set_mode = sibyte_set_mode; 132 clockevents_register_device(cd); ··· 148 action->name = name; 149 action->dev_id = cd; 150 151 + irq_set_affinity(irq, cpumask_of(cpu)); 152 setup_irq(irq, action); 153 }
+1 -1
arch/mips/kernel/cevt-ds1287.c
··· 88 static struct clock_event_device ds1287_clockevent = { 89 .name = "ds1287", 90 .features = CLOCK_EVT_FEAT_PERIODIC, 91 - .cpumask = CPU_MASK_CPU0, 92 .set_next_event = ds1287_set_next_event, 93 .set_mode = ds1287_set_mode, 94 .event_handler = ds1287_event_handler, ··· 121 clockevent_set_clock(cd, 32768); 122 cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd); 123 cd->min_delta_ns = clockevent_delta2ns(0x300, cd); 124 125 clockevents_register_device(&ds1287_clockevent); 126
··· 88 static struct clock_event_device ds1287_clockevent = { 89 .name = "ds1287", 90 .features = CLOCK_EVT_FEAT_PERIODIC, 91 .set_next_event = ds1287_set_next_event, 92 .set_mode = ds1287_set_mode, 93 .event_handler = ds1287_event_handler, ··· 122 clockevent_set_clock(cd, 32768); 123 cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd); 124 cd->min_delta_ns = clockevent_delta2ns(0x300, cd); 125 + cd->cpumask = cpumask_of(0); 126 127 clockevents_register_device(&ds1287_clockevent); 128
+1 -1
arch/mips/kernel/cevt-gt641xx.c
··· 96 static struct clock_event_device gt641xx_timer0_clockevent = { 97 .name = "gt641xx-timer0", 98 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 99 - .cpumask = CPU_MASK_CPU0, 100 .irq = GT641XX_TIMER0_IRQ, 101 .set_next_event = gt641xx_timer0_set_next_event, 102 .set_mode = gt641xx_timer0_set_mode, ··· 131 clockevent_set_clock(cd, gt641xx_base_clock); 132 cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd); 133 cd->min_delta_ns = clockevent_delta2ns(0x300, cd); 134 135 clockevents_register_device(&gt641xx_timer0_clockevent); 136
··· 96 static struct clock_event_device gt641xx_timer0_clockevent = { 97 .name = "gt641xx-timer0", 98 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 99 .irq = GT641XX_TIMER0_IRQ, 100 .set_next_event = gt641xx_timer0_set_next_event, 101 .set_mode = gt641xx_timer0_set_mode, ··· 132 clockevent_set_clock(cd, gt641xx_base_clock); 133 cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd); 134 cd->min_delta_ns = clockevent_delta2ns(0x300, cd); 135 + cd->cpumask = cpumask_of(0); 136 137 clockevents_register_device(&gt641xx_timer0_clockevent); 138
+1 -1
arch/mips/kernel/cevt-r4k.c
··· 195 196 cd->rating = 300; 197 cd->irq = irq; 198 - cd->cpumask = cpumask_of_cpu(cpu); 199 cd->set_next_event = mips_next_event; 200 cd->set_mode = mips_set_clock_mode; 201 cd->event_handler = mips_event_handler;
··· 195 196 cd->rating = 300; 197 cd->irq = irq; 198 + cd->cpumask = cpumask_of(cpu); 199 cd->set_next_event = mips_next_event; 200 cd->set_mode = mips_set_clock_mode; 201 cd->event_handler = mips_event_handler;
+2 -2
arch/mips/kernel/cevt-sb1250.c
··· 125 cd->min_delta_ns = clockevent_delta2ns(2, cd); 126 cd->rating = 200; 127 cd->irq = irq; 128 - cd->cpumask = cpumask_of_cpu(cpu); 129 cd->set_next_event = sibyte_next_event; 130 cd->set_mode = sibyte_set_mode; 131 clockevents_register_device(cd); ··· 147 action->name = name; 148 action->dev_id = cd; 149 150 - irq_set_affinity(irq, cpumask_of_cpu(cpu)); 151 setup_irq(irq, action); 152 }
··· 125 cd->min_delta_ns = clockevent_delta2ns(2, cd); 126 cd->rating = 200; 127 cd->irq = irq; 128 + cd->cpumask = cpumask_of(cpu); 129 cd->set_next_event = sibyte_next_event; 130 cd->set_mode = sibyte_set_mode; 131 clockevents_register_device(cd); ··· 147 action->name = name; 148 action->dev_id = cd; 149 150 + irq_set_affinity(irq, cpumask_of(cpu)); 151 setup_irq(irq, action); 152 }
+1 -1
arch/mips/kernel/cevt-smtc.c
··· 292 293 cd->rating = 300; 294 cd->irq = irq; 295 - cd->cpumask = cpumask_of_cpu(cpu); 296 cd->set_next_event = mips_next_event; 297 cd->set_mode = mips_set_clock_mode; 298 cd->event_handler = mips_event_handler;
··· 292 293 cd->rating = 300; 294 cd->irq = irq; 295 + cd->cpumask = cpumask_of(cpu); 296 cd->set_next_event = mips_next_event; 297 cd->set_mode = mips_set_clock_mode; 298 cd->event_handler = mips_event_handler;
+1 -1
arch/mips/kernel/cevt-txx9.c
··· 112 .name = "TXx9", 113 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 114 .rating = 200, 115 - .cpumask = CPU_MASK_CPU0, 116 .set_mode = txx9tmr_set_mode, 117 .set_next_event = txx9tmr_set_next_event, 118 }; ··· 149 clockevent_delta2ns(0xffffffff >> (32 - TXX9_TIMER_BITS), cd); 150 cd->min_delta_ns = clockevent_delta2ns(0xf, cd); 151 cd->irq = irq; 152 clockevents_register_device(cd); 153 setup_irq(irq, &txx9tmr_irq); 154 printk(KERN_INFO "TXx9: clockevent device at 0x%lx, irq %d\n",
··· 112 .name = "TXx9", 113 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 114 .rating = 200, 115 .set_mode = txx9tmr_set_mode, 116 .set_next_event = txx9tmr_set_next_event, 117 }; ··· 150 clockevent_delta2ns(0xffffffff >> (32 - TXX9_TIMER_BITS), cd); 151 cd->min_delta_ns = clockevent_delta2ns(0xf, cd); 152 cd->irq = irq; 153 + cd->cpumask = cpumask_of(0), 154 clockevents_register_device(cd); 155 setup_irq(irq, &txx9tmr_irq); 156 printk(KERN_INFO "TXx9: clockevent device at 0x%lx, irq %d\n",
+1 -1
arch/mips/kernel/i8253.c
··· 115 * Start pit with the boot cpu mask and make it global after the 116 * IO_APIC has been initialized. 117 */ 118 - cd->cpumask = cpumask_of_cpu(cpu); 119 clockevent_set_clock(cd, CLOCK_TICK_RATE); 120 cd->max_delta_ns = clockevent_delta2ns(0x7FFF, cd); 121 cd->min_delta_ns = clockevent_delta2ns(0xF, cd);
··· 115 * Start pit with the boot cpu mask and make it global after the 116 * IO_APIC has been initialized. 117 */ 118 + cd->cpumask = cpumask_of(cpu); 119 clockevent_set_clock(cd, CLOCK_TICK_RATE); 120 cd->max_delta_ns = clockevent_delta2ns(0x7FFF, cd); 121 cd->min_delta_ns = clockevent_delta2ns(0xF, cd);
+3 -3
arch/mips/kernel/irq-gic.c
··· 155 156 static DEFINE_SPINLOCK(gic_lock); 157 158 - static void gic_set_affinity(unsigned int irq, cpumask_t cpumask) 159 { 160 cpumask_t tmp = CPU_MASK_NONE; 161 unsigned long flags; ··· 164 pr_debug(KERN_DEBUG "%s called\n", __func__); 165 irq -= _irqbase; 166 167 - cpus_and(tmp, cpumask, cpu_online_map); 168 if (cpus_empty(tmp)) 169 return; 170 ··· 187 set_bit(irq, pcpu_masks[first_cpu(tmp)].pcpu_mask); 188 189 } 190 - irq_desc[irq].affinity = cpumask; 191 spin_unlock_irqrestore(&gic_lock, flags); 192 193 }
··· 155 156 static DEFINE_SPINLOCK(gic_lock); 157 158 + static void gic_set_affinity(unsigned int irq, const struct cpumask *cpumask) 159 { 160 cpumask_t tmp = CPU_MASK_NONE; 161 unsigned long flags; ··· 164 pr_debug(KERN_DEBUG "%s called\n", __func__); 165 irq -= _irqbase; 166 167 + cpumask_and(&tmp, cpumask, cpu_online_mask); 168 if (cpus_empty(tmp)) 169 return; 170 ··· 187 set_bit(irq, pcpu_masks[first_cpu(tmp)].pcpu_mask); 188 189 } 190 + irq_desc[irq].affinity = *cpumask; 191 spin_unlock_irqrestore(&gic_lock, flags); 192 193 }
+3 -3
arch/mips/kernel/smp-cmp.c
··· 51 int len; 52 53 cpus_clear(cpu_allow_map); 54 - if (cpulist_parse(str, cpu_allow_map) == 0) { 55 cpu_set(0, cpu_allow_map); 56 cpus_and(cpu_possible_map, cpu_possible_map, cpu_allow_map); 57 - len = cpulist_scnprintf(buf, sizeof(buf)-1, cpu_possible_map); 58 buf[len] = '\0'; 59 pr_debug("Allowable CPUs: %s\n", buf); 60 return 1; ··· 226 227 for (i = 1; i < NR_CPUS; i++) { 228 if (amon_cpu_avail(i)) { 229 - cpu_set(i, phys_cpu_present_map); 230 __cpu_number_map[i] = ++ncpu; 231 __cpu_logical_map[ncpu] = i; 232 }
··· 51 int len; 52 53 cpus_clear(cpu_allow_map); 54 + if (cpulist_parse(str, &cpu_allow_map) == 0) { 55 cpu_set(0, cpu_allow_map); 56 cpus_and(cpu_possible_map, cpu_possible_map, cpu_allow_map); 57 + len = cpulist_scnprintf(buf, sizeof(buf)-1, &cpu_possible_map); 58 buf[len] = '\0'; 59 pr_debug("Allowable CPUs: %s\n", buf); 60 return 1; ··· 226 227 for (i = 1; i < NR_CPUS; i++) { 228 if (amon_cpu_avail(i)) { 229 + cpu_set(i, cpu_possible_map); 230 __cpu_number_map[i] = ++ncpu; 231 __cpu_logical_map[ncpu] = i; 232 }
+1 -1
arch/mips/kernel/smp-mt.c
··· 70 write_vpe_c0_vpeconf0(tmp); 71 72 /* Record this as available CPU */ 73 - cpu_set(tc, phys_cpu_present_map); 74 __cpu_number_map[tc] = ++ncpu; 75 __cpu_logical_map[ncpu] = tc; 76 }
··· 70 write_vpe_c0_vpeconf0(tmp); 71 72 /* Record this as available CPU */ 73 + cpu_set(tc, cpu_possible_map); 74 __cpu_number_map[tc] = ++ncpu; 75 __cpu_logical_map[ncpu] = tc; 76 }
+1 -6
arch/mips/kernel/smp.c
··· 44 #include <asm/mipsmtregs.h> 45 #endif /* CONFIG_MIPS_MT_SMTC */ 46 47 - cpumask_t phys_cpu_present_map; /* Bitmask of available CPUs */ 48 volatile cpumask_t cpu_callin_map; /* Bitmask of started secondaries */ 49 - cpumask_t cpu_online_map; /* Bitmask of currently online CPUs */ 50 int __cpu_number_map[NR_CPUS]; /* Map physical to logical */ 51 int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */ 52 - 53 - EXPORT_SYMBOL(phys_cpu_present_map); 54 - EXPORT_SYMBOL(cpu_online_map); 55 56 extern void cpu_idle(void); 57 ··· 190 /* preload SMP state for boot cpu */ 191 void __devinit smp_prepare_boot_cpu(void) 192 { 193 - cpu_set(0, phys_cpu_present_map); 194 cpu_set(0, cpu_online_map); 195 cpu_set(0, cpu_callin_map); 196 }
··· 44 #include <asm/mipsmtregs.h> 45 #endif /* CONFIG_MIPS_MT_SMTC */ 46 47 volatile cpumask_t cpu_callin_map; /* Bitmask of started secondaries */ 48 int __cpu_number_map[NR_CPUS]; /* Map physical to logical */ 49 int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */ 50 51 extern void cpu_idle(void); 52 ··· 195 /* preload SMP state for boot cpu */ 196 void __devinit smp_prepare_boot_cpu(void) 197 { 198 + cpu_set(0, cpu_possible_map); 199 cpu_set(0, cpu_online_map); 200 cpu_set(0, cpu_callin_map); 201 }
+3 -3
arch/mips/kernel/smtc.c
··· 290 * possibly leave some TCs/VPEs as "slave" processors. 291 * 292 * Use c0_MVPConf0 to find out how many TCs are available, setting up 293 - * phys_cpu_present_map and the logical/physical mappings. 294 */ 295 296 int __init smtc_build_cpu_map(int start_cpu_slot) ··· 304 */ 305 ntcs = ((read_c0_mvpconf0() & MVPCONF0_PTC) >> MVPCONF0_PTC_SHIFT) + 1; 306 for (i=start_cpu_slot; i<NR_CPUS && i<ntcs; i++) { 307 - cpu_set(i, phys_cpu_present_map); 308 __cpu_number_map[i] = i; 309 __cpu_logical_map[i] = i; 310 } ··· 521 * Pull any physically present but unused TCs out of circulation. 522 */ 523 while (tc < (((val & MVPCONF0_PTC) >> MVPCONF0_PTC_SHIFT) + 1)) { 524 - cpu_clear(tc, phys_cpu_present_map); 525 cpu_clear(tc, cpu_present_map); 526 tc++; 527 }
··· 290 * possibly leave some TCs/VPEs as "slave" processors. 291 * 292 * Use c0_MVPConf0 to find out how many TCs are available, setting up 293 + * cpu_possible_map and the logical/physical mappings. 294 */ 295 296 int __init smtc_build_cpu_map(int start_cpu_slot) ··· 304 */ 305 ntcs = ((read_c0_mvpconf0() & MVPCONF0_PTC) >> MVPCONF0_PTC_SHIFT) + 1; 306 for (i=start_cpu_slot; i<NR_CPUS && i<ntcs; i++) { 307 + cpu_set(i, cpu_possible_map); 308 __cpu_number_map[i] = i; 309 __cpu_logical_map[i] = i; 310 } ··· 521 * Pull any physically present but unused TCs out of circulation. 522 */ 523 while (tc < (((val & MVPCONF0_PTC) >> MVPCONF0_PTC_SHIFT) + 1)) { 524 + cpu_clear(tc, cpu_possible_map); 525 cpu_clear(tc, cpu_present_map); 526 tc++; 527 }
+3 -3
arch/mips/mti-malta/malta-smtc.c
··· 114 */ 115 116 117 - void plat_set_irq_affinity(unsigned int irq, cpumask_t affinity) 118 { 119 - cpumask_t tmask = affinity; 120 int cpu = 0; 121 void smtc_set_irq_affinity(unsigned int irq, cpumask_t aff); 122 ··· 139 * be made to forward to an offline "CPU". 140 */ 141 142 - for_each_cpu_mask(cpu, affinity) { 143 if ((cpu_data[cpu].vpe_id != 0) || !cpu_online(cpu)) 144 cpu_clear(cpu, tmask); 145 }
··· 114 */ 115 116 117 + void plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) 118 { 119 + cpumask_t tmask = *affinity; 120 int cpu = 0; 121 void smtc_set_irq_affinity(unsigned int irq, cpumask_t aff); 122 ··· 139 * be made to forward to an offline "CPU". 140 */ 141 142 + for_each_cpu(cpu, affinity) { 143 if ((cpu_data[cpu].vpe_id != 0) || !cpu_online(cpu)) 144 cpu_clear(cpu, tmask); 145 }
+1
arch/mips/nxp/pnx8550/common/time.c
··· 102 unsigned int p; 103 unsigned int pow2p; 104 105 clockevents_register_device(&pnx8xxx_clockevent); 106 clocksource_register(&pnx_clocksource); 107
··· 102 unsigned int p; 103 unsigned int pow2p; 104 105 + pnx8xxx_clockevent.cpumask = cpu_none_mask; 106 clockevents_register_device(&pnx8xxx_clockevent); 107 clocksource_register(&pnx_clocksource); 108
+3 -3
arch/mips/pmc-sierra/yosemite/smp.c
··· 141 } 142 143 /* 144 - * Detect available CPUs, populate phys_cpu_present_map before smp_init 145 * 146 * We don't want to start the secondary CPU yet nor do we have a nice probing 147 * feature in PMON so we just assume presence of the secondary core. ··· 150 { 151 int i; 152 153 - cpus_clear(phys_cpu_present_map); 154 155 for (i = 0; i < 2; i++) { 156 - cpu_set(i, phys_cpu_present_map); 157 __cpu_number_map[i] = i; 158 __cpu_logical_map[i] = i; 159 }
··· 141 } 142 143 /* 144 + * Detect available CPUs, populate cpu_possible_map before smp_init 145 * 146 * We don't want to start the secondary CPU yet nor do we have a nice probing 147 * feature in PMON so we just assume presence of the secondary core. ··· 150 { 151 int i; 152 153 + cpus_clear(cpu_possible_map); 154 155 for (i = 0; i < 2; i++) { 156 + cpu_set(i, cpu_possible_map); 157 __cpu_number_map[i] = i; 158 __cpu_logical_map[i] = i; 159 }
+1 -1
arch/mips/sgi-ip27/ip27-smp.c
··· 76 /* Only let it join in if it's marked enabled */ 77 if ((acpu->cpu_info.flags & KLINFO_ENABLE) && 78 (tot_cpus_found != NR_CPUS)) { 79 - cpu_set(cpuid, phys_cpu_present_map); 80 alloc_cpupda(cpuid, tot_cpus_found); 81 cpus_found++; 82 tot_cpus_found++;
··· 76 /* Only let it join in if it's marked enabled */ 77 if ((acpu->cpu_info.flags & KLINFO_ENABLE) && 78 (tot_cpus_found != NR_CPUS)) { 79 + cpu_set(cpuid, cpu_possible_map); 80 alloc_cpupda(cpuid, tot_cpus_found); 81 cpus_found++; 82 tot_cpus_found++;
+1 -1
arch/mips/sgi-ip27/ip27-timer.c
··· 134 cd->min_delta_ns = clockevent_delta2ns(0x300, cd); 135 cd->rating = 200; 136 cd->irq = irq; 137 - cd->cpumask = cpumask_of_cpu(cpu); 138 cd->set_next_event = rt_next_event; 139 cd->set_mode = rt_set_mode; 140 clockevents_register_device(cd);
··· 134 cd->min_delta_ns = clockevent_delta2ns(0x300, cd); 135 cd->rating = 200; 136 cd->irq = irq; 137 + cd->cpumask = cpumask_of(cpu); 138 cd->set_next_event = rt_next_event; 139 cd->set_mode = rt_set_mode; 140 clockevents_register_device(cd);
+4 -4
arch/mips/sibyte/bcm1480/irq.c
··· 50 static void disable_bcm1480_irq(unsigned int irq); 51 static void ack_bcm1480_irq(unsigned int irq); 52 #ifdef CONFIG_SMP 53 - static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask); 54 #endif 55 56 #ifdef CONFIG_PCI ··· 109 } 110 111 #ifdef CONFIG_SMP 112 - static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask) 113 { 114 int i = 0, old_cpu, cpu, int_on, k; 115 u64 cur_ints; ··· 117 unsigned long flags; 118 unsigned int irq_dirty; 119 120 - if (cpus_weight(mask) != 1) { 121 printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq); 122 return; 123 } 124 - i = first_cpu(mask); 125 126 /* Convert logical CPU to physical CPU */ 127 cpu = cpu_logical_map(i);
··· 50 static void disable_bcm1480_irq(unsigned int irq); 51 static void ack_bcm1480_irq(unsigned int irq); 52 #ifdef CONFIG_SMP 53 + static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask); 54 #endif 55 56 #ifdef CONFIG_PCI ··· 109 } 110 111 #ifdef CONFIG_SMP 112 + static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask) 113 { 114 int i = 0, old_cpu, cpu, int_on, k; 115 u64 cur_ints; ··· 117 unsigned long flags; 118 unsigned int irq_dirty; 119 120 + if (cpumask_weight(mask) != 1) { 121 printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq); 122 return; 123 } 124 + i = cpumask_first(mask); 125 126 /* Convert logical CPU to physical CPU */ 127 cpu = cpu_logical_map(i);
+4 -4
arch/mips/sibyte/bcm1480/smp.c
··· 136 137 /* 138 * Use CFE to find out how many CPUs are available, setting up 139 - * phys_cpu_present_map and the logical/physical mappings. 140 * XXXKW will the boot CPU ever not be physical 0? 141 * 142 * Common setup before any secondaries are started ··· 145 { 146 int i, num; 147 148 - cpus_clear(phys_cpu_present_map); 149 - cpu_set(0, phys_cpu_present_map); 150 __cpu_number_map[0] = 0; 151 __cpu_logical_map[0] = 0; 152 153 for (i = 1, num = 0; i < NR_CPUS; i++) { 154 if (cfe_cpu_stop(i) == 0) { 155 - cpu_set(i, phys_cpu_present_map); 156 __cpu_number_map[i] = ++num; 157 __cpu_logical_map[num] = i; 158 }
··· 136 137 /* 138 * Use CFE to find out how many CPUs are available, setting up 139 + * cpu_possible_map and the logical/physical mappings. 140 * XXXKW will the boot CPU ever not be physical 0? 141 * 142 * Common setup before any secondaries are started ··· 145 { 146 int i, num; 147 148 + cpus_clear(cpu_possible_map); 149 + cpu_set(0, cpu_possible_map); 150 __cpu_number_map[0] = 0; 151 __cpu_logical_map[0] = 0; 152 153 for (i = 1, num = 0; i < NR_CPUS; i++) { 154 if (cfe_cpu_stop(i) == 0) { 155 + cpu_set(i, cpu_possible_map); 156 __cpu_number_map[i] = ++num; 157 __cpu_logical_map[num] = i; 158 }
+4 -4
arch/mips/sibyte/sb1250/irq.c
··· 50 static void disable_sb1250_irq(unsigned int irq); 51 static void ack_sb1250_irq(unsigned int irq); 52 #ifdef CONFIG_SMP 53 - static void sb1250_set_affinity(unsigned int irq, cpumask_t mask); 54 #endif 55 56 #ifdef CONFIG_SIBYTE_HAS_LDT ··· 103 } 104 105 #ifdef CONFIG_SMP 106 - static void sb1250_set_affinity(unsigned int irq, cpumask_t mask) 107 { 108 int i = 0, old_cpu, cpu, int_on; 109 u64 cur_ints; 110 struct irq_desc *desc = irq_desc + irq; 111 unsigned long flags; 112 113 - i = first_cpu(mask); 114 115 - if (cpus_weight(mask) > 1) { 116 printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq); 117 return; 118 }
··· 50 static void disable_sb1250_irq(unsigned int irq); 51 static void ack_sb1250_irq(unsigned int irq); 52 #ifdef CONFIG_SMP 53 + static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask); 54 #endif 55 56 #ifdef CONFIG_SIBYTE_HAS_LDT ··· 103 } 104 105 #ifdef CONFIG_SMP 106 + static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask) 107 { 108 int i = 0, old_cpu, cpu, int_on; 109 u64 cur_ints; 110 struct irq_desc *desc = irq_desc + irq; 111 unsigned long flags; 112 113 + i = cpumask_first(mask); 114 115 + if (cpumask_weight(mask) > 1) { 116 printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq); 117 return; 118 }
+4 -4
arch/mips/sibyte/sb1250/smp.c
··· 124 125 /* 126 * Use CFE to find out how many CPUs are available, setting up 127 - * phys_cpu_present_map and the logical/physical mappings. 128 * XXXKW will the boot CPU ever not be physical 0? 129 * 130 * Common setup before any secondaries are started ··· 133 { 134 int i, num; 135 136 - cpus_clear(phys_cpu_present_map); 137 - cpu_set(0, phys_cpu_present_map); 138 __cpu_number_map[0] = 0; 139 __cpu_logical_map[0] = 0; 140 141 for (i = 1, num = 0; i < NR_CPUS; i++) { 142 if (cfe_cpu_stop(i) == 0) { 143 - cpu_set(i, phys_cpu_present_map); 144 __cpu_number_map[i] = ++num; 145 __cpu_logical_map[num] = i; 146 }
··· 124 125 /* 126 * Use CFE to find out how many CPUs are available, setting up 127 + * cpu_possible_map and the logical/physical mappings. 128 * XXXKW will the boot CPU ever not be physical 0? 129 * 130 * Common setup before any secondaries are started ··· 133 { 134 int i, num; 135 136 + cpus_clear(cpu_possible_map); 137 + cpu_set(0, cpu_possible_map); 138 __cpu_number_map[0] = 0; 139 __cpu_logical_map[0] = 0; 140 141 for (i = 1, num = 0; i < NR_CPUS; i++) { 142 if (cfe_cpu_stop(i) == 0) { 143 + cpu_set(i, cpu_possible_map); 144 __cpu_number_map[i] = ++num; 145 __cpu_logical_map[num] = i; 146 }
+1 -1
arch/mips/sni/time.c
··· 80 struct irqaction *action = &a20r_irqaction; 81 unsigned int cpu = smp_processor_id(); 82 83 - cd->cpumask = cpumask_of_cpu(cpu); 84 clockevents_register_device(cd); 85 action->dev_id = cd; 86 setup_irq(SNI_A20R_IRQ_TIMER, &a20r_irqaction);
··· 80 struct irqaction *action = &a20r_irqaction; 81 unsigned int cpu = smp_processor_id(); 82 83 + cd->cpumask = cpumask_of(cpu); 84 clockevents_register_device(cd); 85 action->dev_id = cd; 86 setup_irq(SNI_A20R_IRQ_TIMER, &a20r_irqaction);
+1
arch/parisc/Kconfig
··· 11 select HAVE_OPROFILE 12 select RTC_CLASS 13 select RTC_DRV_PARISC 14 help 15 The PA-RISC microprocessor is designed by Hewlett-Packard and used 16 in many of their workstations & servers (HP9000 700 and 800 series,
··· 11 select HAVE_OPROFILE 12 select RTC_CLASS 13 select RTC_DRV_PARISC 14 + select INIT_ALL_POSSIBLE 15 help 16 The PA-RISC microprocessor is designed by Hewlett-Packard and used 17 in many of their workstations & servers (HP9000 700 and 800 series,
+3 -3
arch/parisc/kernel/irq.c
··· 131 return 0; 132 } 133 134 - static void cpu_set_affinity_irq(unsigned int irq, cpumask_t dest) 135 { 136 - if (cpu_check_affinity(irq, &dest)) 137 return; 138 139 - irq_desc[irq].affinity = dest; 140 } 141 #endif 142
··· 131 return 0; 132 } 133 134 + static void cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest) 135 { 136 + if (cpu_check_affinity(irq, dest)) 137 return; 138 139 + irq_desc[irq].affinity = *dest; 140 } 141 #endif 142
-15
arch/parisc/kernel/smp.c
··· 67 68 static int parisc_max_cpus __read_mostly = 1; 69 70 - /* online cpus are ones that we've managed to bring up completely 71 - * possible cpus are all valid cpu 72 - * present cpus are all detected cpu 73 - * 74 - * On startup we bring up the "possible" cpus. Since we discover 75 - * CPUs later, we add them as hotplug, so the possible cpu mask is 76 - * empty in the beginning. 77 - */ 78 - 79 - cpumask_t cpu_online_map __read_mostly = CPU_MASK_NONE; /* Bitmap of online CPUs */ 80 - cpumask_t cpu_possible_map __read_mostly = CPU_MASK_ALL; /* Bitmap of Present CPUs */ 81 - 82 - EXPORT_SYMBOL(cpu_online_map); 83 - EXPORT_SYMBOL(cpu_possible_map); 84 - 85 DEFINE_PER_CPU(spinlock_t, ipi_lock) = SPIN_LOCK_UNLOCKED; 86 87 enum ipi_message_type {
··· 67 68 static int parisc_max_cpus __read_mostly = 1; 69 70 DEFINE_PER_CPU(spinlock_t, ipi_lock) = SPIN_LOCK_UNLOCKED; 71 72 enum ipi_message_type {
-1
arch/powerpc/include/asm/topology.h
··· 48 49 /* sched_domains SD_NODE_INIT for PPC64 machines */ 50 #define SD_NODE_INIT (struct sched_domain) { \ 51 - .span = CPU_MASK_NONE, \ 52 .parent = NULL, \ 53 .child = NULL, \ 54 .groups = NULL, \
··· 48 49 /* sched_domains SD_NODE_INIT for PPC64 machines */ 50 #define SD_NODE_INIT (struct sched_domain) { \ 51 .parent = NULL, \ 52 .child = NULL, \ 53 .groups = NULL, \
+1 -1
arch/powerpc/kernel/irq.c
··· 237 mask = map; 238 } 239 if (irq_desc[irq].chip->set_affinity) 240 - irq_desc[irq].chip->set_affinity(irq, mask); 241 else if (irq_desc[irq].action && !(warned++)) 242 printk("Cannot set affinity for irq %i\n", irq); 243 }
··· 237 mask = map; 238 } 239 if (irq_desc[irq].chip->set_affinity) 240 + irq_desc[irq].chip->set_affinity(irq, &mask); 241 else if (irq_desc[irq].action && !(warned++)) 242 printk("Cannot set affinity for irq %i\n", irq); 243 }
-4
arch/powerpc/kernel/smp.c
··· 59 60 struct thread_info *secondary_ti; 61 62 - cpumask_t cpu_possible_map = CPU_MASK_NONE; 63 - cpumask_t cpu_online_map = CPU_MASK_NONE; 64 DEFINE_PER_CPU(cpumask_t, cpu_sibling_map) = CPU_MASK_NONE; 65 DEFINE_PER_CPU(cpumask_t, cpu_core_map) = CPU_MASK_NONE; 66 67 - EXPORT_SYMBOL(cpu_online_map); 68 - EXPORT_SYMBOL(cpu_possible_map); 69 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map); 70 EXPORT_PER_CPU_SYMBOL(cpu_core_map); 71
··· 59 60 struct thread_info *secondary_ti; 61 62 DEFINE_PER_CPU(cpumask_t, cpu_sibling_map) = CPU_MASK_NONE; 63 DEFINE_PER_CPU(cpumask_t, cpu_core_map) = CPU_MASK_NONE; 64 65 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map); 66 EXPORT_PER_CPU_SYMBOL(cpu_core_map); 67
+1 -1
arch/powerpc/kernel/time.c
··· 844 struct clock_event_device *dec = &per_cpu(decrementers, cpu).event; 845 846 *dec = decrementer_clockevent; 847 - dec->cpumask = cpumask_of_cpu(cpu); 848 849 printk(KERN_DEBUG "clockevent: %s mult[%lx] shift[%d] cpu[%d]\n", 850 dec->name, dec->mult, dec->shift, cpu);
··· 844 struct clock_event_device *dec = &per_cpu(decrementers, cpu).event; 845 846 *dec = decrementer_clockevent; 847 + dec->cpumask = cpumask_of(cpu); 848 849 printk(KERN_DEBUG "clockevent: %s mult[%lx] shift[%d] cpu[%d]\n", 850 dec->name, dec->mult, dec->shift, cpu);
+2 -2
arch/powerpc/platforms/pseries/xics.c
··· 332 lpar_xirr_info_set((0xff << 24) | irq); 333 } 334 335 - static void xics_set_affinity(unsigned int virq, cpumask_t cpumask) 336 { 337 unsigned int irq; 338 int status; ··· 870 871 /* Reset affinity to all cpus */ 872 irq_desc[virq].affinity = CPU_MASK_ALL; 873 - desc->chip->set_affinity(virq, CPU_MASK_ALL); 874 unlock: 875 spin_unlock_irqrestore(&desc->lock, flags); 876 }
··· 332 lpar_xirr_info_set((0xff << 24) | irq); 333 } 334 335 + static void xics_set_affinity(unsigned int virq, const struct cpumask *cpumask) 336 { 337 unsigned int irq; 338 int status; ··· 870 871 /* Reset affinity to all cpus */ 872 irq_desc[virq].affinity = CPU_MASK_ALL; 873 + desc->chip->set_affinity(virq, cpu_all_mask); 874 unlock: 875 spin_unlock_irqrestore(&desc->lock, flags); 876 }
+2 -2
arch/powerpc/sysdev/mpic.c
··· 806 807 #endif /* CONFIG_SMP */ 808 809 - void mpic_set_affinity(unsigned int irq, cpumask_t cpumask) 810 { 811 struct mpic *mpic = mpic_from_irq(irq); 812 unsigned int src = mpic_irq_to_hw(irq); ··· 818 } else { 819 cpumask_t tmp; 820 821 - cpus_and(tmp, cpumask, cpu_online_map); 822 823 mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION), 824 mpic_physmask(cpus_addr(tmp)[0]));
··· 806 807 #endif /* CONFIG_SMP */ 808 809 + void mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask) 810 { 811 struct mpic *mpic = mpic_from_irq(irq); 812 unsigned int src = mpic_irq_to_hw(irq); ··· 818 } else { 819 cpumask_t tmp; 820 821 + cpumask_and(&tmp, cpumask, cpu_online_mask); 822 823 mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION), 824 mpic_physmask(cpus_addr(tmp)[0]));
+1 -1
arch/powerpc/sysdev/mpic.h
··· 36 37 extern int mpic_set_irq_type(unsigned int virq, unsigned int flow_type); 38 extern void mpic_set_vector(unsigned int virq, unsigned int vector); 39 - extern void mpic_set_affinity(unsigned int irq, cpumask_t cpumask); 40 41 #endif /* _POWERPC_SYSDEV_MPIC_H */
··· 36 37 extern int mpic_set_irq_type(unsigned int virq, unsigned int flow_type); 38 extern void mpic_set_vector(unsigned int virq, unsigned int vector); 39 + extern void mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask); 40 41 #endif /* _POWERPC_SYSDEV_MPIC_H */
+1
arch/s390/Kconfig
··· 83 select HAVE_KRETPROBES 84 select HAVE_KVM if 64BIT 85 select HAVE_ARCH_TRACEHOOK 86 87 source "init/Kconfig" 88
··· 83 select HAVE_KRETPROBES 84 select HAVE_KVM if 64BIT 85 select HAVE_ARCH_TRACEHOOK 86 + select INIT_ALL_POSSIBLE 87 88 source "init/Kconfig" 89
-6
arch/s390/kernel/smp.c
··· 55 struct _lowcore *lowcore_ptr[NR_CPUS]; 56 EXPORT_SYMBOL(lowcore_ptr); 57 58 - cpumask_t cpu_online_map = CPU_MASK_NONE; 59 - EXPORT_SYMBOL(cpu_online_map); 60 - 61 - cpumask_t cpu_possible_map = CPU_MASK_ALL; 62 - EXPORT_SYMBOL(cpu_possible_map); 63 - 64 static struct task_struct *current_set[NR_CPUS]; 65 66 static u8 smp_cpu_type;
··· 55 struct _lowcore *lowcore_ptr[NR_CPUS]; 56 EXPORT_SYMBOL(lowcore_ptr); 57 58 static struct task_struct *current_set[NR_CPUS]; 59 60 static u8 smp_cpu_type;
+1 -1
arch/s390/kernel/time.c
··· 160 cd->min_delta_ns = 1; 161 cd->max_delta_ns = LONG_MAX; 162 cd->rating = 400; 163 - cd->cpumask = cpumask_of_cpu(cpu); 164 cd->set_next_event = s390_next_event; 165 cd->set_mode = s390_set_mode; 166
··· 160 cd->min_delta_ns = 1; 161 cd->max_delta_ns = LONG_MAX; 162 cd->rating = 400; 163 + cd->cpumask = cpumask_of(cpu); 164 cd->set_next_event = s390_next_event; 165 cd->set_mode = s390_set_mode; 166
+1 -1
arch/sh/include/asm/smp.h
··· 31 }; 32 33 void smp_message_recv(unsigned int msg); 34 - void smp_timer_broadcast(cpumask_t mask); 35 36 void local_timer_interrupt(void); 37 void local_timer_setup(unsigned int cpu);
··· 31 }; 32 33 void smp_message_recv(unsigned int msg); 34 + void smp_timer_broadcast(const struct cpumask *mask); 35 36 void local_timer_interrupt(void); 37 void local_timer_setup(unsigned int cpu);
-1
arch/sh/include/asm/topology.h
··· 5 6 /* sched_domains SD_NODE_INIT for sh machines */ 7 #define SD_NODE_INIT (struct sched_domain) { \ 8 - .span = CPU_MASK_NONE, \ 9 .parent = NULL, \ 10 .child = NULL, \ 11 .groups = NULL, \
··· 5 6 /* sched_domains SD_NODE_INIT for sh machines */ 7 #define SD_NODE_INIT (struct sched_domain) { \ 8 .parent = NULL, \ 9 .child = NULL, \ 10 .groups = NULL, \
+2 -8
arch/sh/kernel/smp.c
··· 31 int __cpu_number_map[NR_CPUS]; /* Map physical to logical */ 32 int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */ 33 34 - cpumask_t cpu_possible_map; 35 - EXPORT_SYMBOL(cpu_possible_map); 36 - 37 - cpumask_t cpu_online_map; 38 - EXPORT_SYMBOL(cpu_online_map); 39 - 40 static inline void __init smp_store_cpu_info(unsigned int cpu) 41 { 42 struct sh_cpuinfo *c = cpu_data + cpu; ··· 184 plat_send_ipi(cpu, SMP_MSG_FUNCTION_SINGLE); 185 } 186 187 - void smp_timer_broadcast(cpumask_t mask) 188 { 189 int cpu; 190 191 - for_each_cpu_mask(cpu, mask) 192 plat_send_ipi(cpu, SMP_MSG_TIMER); 193 } 194
··· 31 int __cpu_number_map[NR_CPUS]; /* Map physical to logical */ 32 int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */ 33 34 static inline void __init smp_store_cpu_info(unsigned int cpu) 35 { 36 struct sh_cpuinfo *c = cpu_data + cpu; ··· 190 plat_send_ipi(cpu, SMP_MSG_FUNCTION_SINGLE); 191 } 192 193 + void smp_timer_broadcast(const struct cpumask *mask) 194 { 195 int cpu; 196 197 + for_each_cpu(cpu, mask) 198 plat_send_ipi(cpu, SMP_MSG_TIMER); 199 } 200
+1 -1
arch/sh/kernel/timers/timer-broadcast.c
··· 51 clk->mult = 1; 52 clk->set_mode = dummy_timer_set_mode; 53 clk->broadcast = smp_timer_broadcast; 54 - clk->cpumask = cpumask_of_cpu(cpu); 55 56 clockevents_register_device(clk); 57 }
··· 51 clk->mult = 1; 52 clk->set_mode = dummy_timer_set_mode; 53 clk->broadcast = smp_timer_broadcast; 54 + clk->cpumask = cpumask_of(cpu); 55 56 clockevents_register_device(clk); 57 }
+1 -1
arch/sh/kernel/timers/timer-tmu.c
··· 263 tmu0_clockevent.min_delta_ns = 264 clockevent_delta2ns(1, &tmu0_clockevent); 265 266 - tmu0_clockevent.cpumask = cpumask_of_cpu(0); 267 268 clockevents_register_device(&tmu0_clockevent); 269
··· 263 tmu0_clockevent.min_delta_ns = 264 clockevent_delta2ns(1, &tmu0_clockevent); 265 266 + tmu0_clockevent.cpumask = cpumask_of(0); 267 268 clockevents_register_device(&tmu0_clockevent); 269
-2
arch/sparc/include/asm/smp_32.h
··· 29 */ 30 31 extern unsigned char boot_cpu_id; 32 - extern cpumask_t phys_cpu_present_map; 33 - #define cpu_possible_map phys_cpu_present_map 34 35 typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long, 36 unsigned long, unsigned long);
··· 29 */ 30 31 extern unsigned char boot_cpu_id; 32 33 typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long, 34 unsigned long, unsigned long);
+7 -4
arch/sparc/kernel/irq_64.c
··· 312 } 313 } 314 315 - static void sun4u_set_affinity(unsigned int virt_irq, cpumask_t mask) 316 { 317 sun4u_irq_enable(virt_irq); 318 } ··· 363 ino, err); 364 } 365 366 - static void sun4v_set_affinity(unsigned int virt_irq, cpumask_t mask) 367 { 368 unsigned int ino = virt_irq_table[virt_irq].dev_ino; 369 unsigned long cpuid = irq_choose_cpu(virt_irq); ··· 431 dev_handle, dev_ino, err); 432 } 433 434 - static void sun4v_virt_set_affinity(unsigned int virt_irq, cpumask_t mask) 435 { 436 unsigned long cpuid, dev_handle, dev_ino; 437 int err; ··· 854 !(irq_desc[irq].status & IRQ_PER_CPU)) { 855 if (irq_desc[irq].chip->set_affinity) 856 irq_desc[irq].chip->set_affinity(irq, 857 - irq_desc[irq].affinity); 858 } 859 spin_unlock_irqrestore(&irq_desc[irq].lock, flags); 860 }
··· 312 } 313 } 314 315 + static void sun4u_set_affinity(unsigned int virt_irq, 316 + const struct cpumask *mask) 317 { 318 sun4u_irq_enable(virt_irq); 319 } ··· 362 ino, err); 363 } 364 365 + static void sun4v_set_affinity(unsigned int virt_irq, 366 + const struct cpumask *mask) 367 { 368 unsigned int ino = virt_irq_table[virt_irq].dev_ino; 369 unsigned long cpuid = irq_choose_cpu(virt_irq); ··· 429 dev_handle, dev_ino, err); 430 } 431 432 + static void sun4v_virt_set_affinity(unsigned int virt_irq, 433 + const struct cpumask *mask) 434 { 435 unsigned long cpuid, dev_handle, dev_ino; 436 int err; ··· 851 !(irq_desc[irq].status & IRQ_PER_CPU)) { 852 if (irq_desc[irq].chip->set_affinity) 853 irq_desc[irq].chip->set_affinity(irq, 854 + &irq_desc[irq].affinity); 855 } 856 spin_unlock_irqrestore(&irq_desc[irq].lock, flags); 857 }
+1 -1
arch/sparc/kernel/of_device_64.c
··· 780 if (nid != -1) { 781 cpumask_t numa_mask = node_to_cpumask(nid); 782 783 - irq_set_affinity(irq, numa_mask); 784 } 785 786 return irq;
··· 780 if (nid != -1) { 781 cpumask_t numa_mask = node_to_cpumask(nid); 782 783 + irq_set_affinity(irq, &numa_mask); 784 } 785 786 return irq;
+1 -1
arch/sparc/kernel/pci_msi.c
··· 288 if (nid != -1) { 289 cpumask_t numa_mask = node_to_cpumask(nid); 290 291 - irq_set_affinity(irq, numa_mask); 292 } 293 err = request_irq(irq, sparc64_msiq_interrupt, 0, 294 "MSIQ",
··· 288 if (nid != -1) { 289 cpumask_t numa_mask = node_to_cpumask(nid); 290 291 + irq_set_affinity(irq, &numa_mask); 292 } 293 err = request_irq(irq, sparc64_msiq_interrupt, 0, 294 "MSIQ",
+2 -4
arch/sparc/kernel/smp_32.c
··· 39 unsigned char boot_cpu_id = 0; 40 unsigned char boot_cpu_id4 = 0; /* boot_cpu_id << 2 */ 41 42 - cpumask_t cpu_online_map = CPU_MASK_NONE; 43 - cpumask_t phys_cpu_present_map = CPU_MASK_NONE; 44 cpumask_t smp_commenced_mask = CPU_MASK_NONE; 45 46 /* The only guaranteed locking primitive available on all Sparc ··· 332 instance = 0; 333 while (!cpu_find_by_instance(instance, NULL, &mid)) { 334 if (mid < NR_CPUS) { 335 - cpu_set(mid, phys_cpu_present_map); 336 cpu_set(mid, cpu_present_map); 337 } 338 instance++; ··· 352 353 current_thread_info()->cpu = cpuid; 354 cpu_set(cpuid, cpu_online_map); 355 - cpu_set(cpuid, phys_cpu_present_map); 356 } 357 358 int __cpuinit __cpu_up(unsigned int cpu)
··· 39 unsigned char boot_cpu_id = 0; 40 unsigned char boot_cpu_id4 = 0; /* boot_cpu_id << 2 */ 41 42 cpumask_t smp_commenced_mask = CPU_MASK_NONE; 43 44 /* The only guaranteed locking primitive available on all Sparc ··· 334 instance = 0; 335 while (!cpu_find_by_instance(instance, NULL, &mid)) { 336 if (mid < NR_CPUS) { 337 + cpu_set(mid, cpu_possible_map); 338 cpu_set(mid, cpu_present_map); 339 } 340 instance++; ··· 354 355 current_thread_info()->cpu = cpuid; 356 cpu_set(cpuid, cpu_online_map); 357 + cpu_set(cpuid, cpu_possible_map); 358 } 359 360 int __cpuinit __cpu_up(unsigned int cpu)
-4
arch/sparc/kernel/smp_64.c
··· 49 50 int sparc64_multi_core __read_mostly; 51 52 - cpumask_t cpu_possible_map __read_mostly = CPU_MASK_NONE; 53 - cpumask_t cpu_online_map __read_mostly = CPU_MASK_NONE; 54 DEFINE_PER_CPU(cpumask_t, cpu_sibling_map) = CPU_MASK_NONE; 55 cpumask_t cpu_core_map[NR_CPUS] __read_mostly = 56 { [0 ... NR_CPUS-1] = CPU_MASK_NONE }; 57 58 - EXPORT_SYMBOL(cpu_possible_map); 59 - EXPORT_SYMBOL(cpu_online_map); 60 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map); 61 EXPORT_SYMBOL(cpu_core_map); 62
··· 49 50 int sparc64_multi_core __read_mostly; 51 52 DEFINE_PER_CPU(cpumask_t, cpu_sibling_map) = CPU_MASK_NONE; 53 cpumask_t cpu_core_map[NR_CPUS] __read_mostly = 54 { [0 ... NR_CPUS-1] = CPU_MASK_NONE }; 55 56 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map); 57 EXPORT_SYMBOL(cpu_core_map); 58
-4
arch/sparc/kernel/sparc_ksyms_32.c
··· 112 #ifdef CONFIG_SMP 113 /* IRQ implementation. */ 114 EXPORT_SYMBOL(synchronize_irq); 115 - 116 - /* CPU online map and active count. */ 117 - EXPORT_SYMBOL(cpu_online_map); 118 - EXPORT_SYMBOL(phys_cpu_present_map); 119 #endif 120 121 EXPORT_SYMBOL(__udelay);
··· 112 #ifdef CONFIG_SMP 113 /* IRQ implementation. */ 114 EXPORT_SYMBOL(synchronize_irq); 115 #endif 116 117 EXPORT_SYMBOL(__udelay);
+1 -1
arch/sparc/kernel/time_64.c
··· 763 sevt = &__get_cpu_var(sparc64_events); 764 765 memcpy(sevt, &sparc64_clockevent, sizeof(*sevt)); 766 - sevt->cpumask = cpumask_of_cpu(smp_processor_id()); 767 768 clockevents_register_device(sevt); 769 }
··· 763 sevt = &__get_cpu_var(sparc64_events); 764 765 memcpy(sevt, &sparc64_clockevent, sizeof(*sevt)); 766 + sevt->cpumask = cpumask_of(smp_processor_id()); 767 768 clockevents_register_device(sevt); 769 }
-7
arch/um/kernel/smp.c
··· 25 #include "irq_user.h" 26 #include "os.h" 27 28 - /* CPU online map, set by smp_boot_cpus */ 29 - cpumask_t cpu_online_map = CPU_MASK_NONE; 30 - cpumask_t cpu_possible_map = CPU_MASK_NONE; 31 - 32 - EXPORT_SYMBOL(cpu_online_map); 33 - EXPORT_SYMBOL(cpu_possible_map); 34 - 35 /* Per CPU bogomips and other parameters 36 * The only piece used here is the ipi pipe, which is set before SMP is 37 * started and never changed.
··· 25 #include "irq_user.h" 26 #include "os.h" 27 28 /* Per CPU bogomips and other parameters 29 * The only piece used here is the ipi pipe, which is set before SMP is 30 * started and never changed.
+1 -1
arch/um/kernel/time.c
··· 50 static struct clock_event_device itimer_clockevent = { 51 .name = "itimer", 52 .rating = 250, 53 - .cpumask = CPU_MASK_ALL, 54 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 55 .set_mode = itimer_set_mode, 56 .set_next_event = itimer_next_event,
··· 50 static struct clock_event_device itimer_clockevent = { 51 .name = "itimer", 52 .rating = 250, 53 + .cpumask = cpu_all_mask, 54 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 55 .set_mode = itimer_set_mode, 56 .set_next_event = itimer_next_event,
+7 -6
arch/x86/Kconfig
··· 601 602 config MAXSMP 603 bool "Configure Maximum number of SMP Processors and NUMA Nodes" 604 - depends on X86_64 && SMP && BROKEN 605 default n 606 help 607 Configure maximum number of CPUS and NUMA Nodes for this architecture. 608 If unsure, say N. 609 610 config NR_CPUS 611 - int "Maximum number of CPUs (2-512)" if !MAXSMP 612 - range 2 512 613 - depends on SMP 614 default "4096" if MAXSMP 615 - default "32" if X86_NUMAQ || X86_SUMMIT || X86_BIGSMP || X86_ES7000 616 - default "8" 617 help 618 This allows you to specify the maximum number of CPUs which this 619 kernel will support. The maximum supported value is 512 and the
··· 601 602 config MAXSMP 603 bool "Configure Maximum number of SMP Processors and NUMA Nodes" 604 + depends on X86_64 && SMP && DEBUG_KERNEL && EXPERIMENTAL 605 + select CPUMASK_OFFSTACK 606 default n 607 help 608 Configure maximum number of CPUS and NUMA Nodes for this architecture. 609 If unsure, say N. 610 611 config NR_CPUS 612 + int "Maximum number of CPUs" if SMP && !MAXSMP 613 + range 2 512 if SMP && !MAXSMP 614 + default "1" if !SMP 615 default "4096" if MAXSMP 616 + default "32" if SMP && (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP || X86_ES7000) 617 + default "8" if SMP 618 help 619 This allows you to specify the maximum number of CPUs which this 620 kernel will support. The maximum supported value is 512 and the
+25 -7
arch/x86/include/asm/bigsmp/apic.h
··· 9 return (1); 10 } 11 12 - static inline cpumask_t target_cpus(void) 13 { 14 #ifdef CONFIG_SMP 15 - return cpu_online_map; 16 #else 17 - return cpumask_of_cpu(0); 18 #endif 19 } 20 ··· 79 80 static inline int cpu_present_to_apicid(int mps_cpu) 81 { 82 - if (mps_cpu < NR_CPUS) 83 return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu); 84 85 return BAD_APICID; ··· 94 /* Mapping from cpu number to logical apicid */ 95 static inline int cpu_to_logical_apicid(int cpu) 96 { 97 - if (cpu >= NR_CPUS) 98 return BAD_APICID; 99 return cpu_physical_id(cpu); 100 } ··· 119 } 120 121 /* As we are using single CPU as destination, pick only one CPU here */ 122 - static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) 123 { 124 int cpu; 125 int apicid; 126 127 - cpu = first_cpu(cpumask); 128 apicid = cpu_to_logical_apicid(cpu); 129 return apicid; 130 } 131 132 static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
··· 9 return (1); 10 } 11 12 + static inline const cpumask_t *target_cpus(void) 13 { 14 #ifdef CONFIG_SMP 15 + return &cpu_online_map; 16 #else 17 + return &cpumask_of_cpu(0); 18 #endif 19 } 20 ··· 79 80 static inline int cpu_present_to_apicid(int mps_cpu) 81 { 82 + if (mps_cpu < nr_cpu_ids) 83 return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu); 84 85 return BAD_APICID; ··· 94 /* Mapping from cpu number to logical apicid */ 95 static inline int cpu_to_logical_apicid(int cpu) 96 { 97 + if (cpu >= nr_cpu_ids) 98 return BAD_APICID; 99 return cpu_physical_id(cpu); 100 } ··· 119 } 120 121 /* As we are using single CPU as destination, pick only one CPU here */ 122 + static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask) 123 { 124 int cpu; 125 int apicid; 126 127 + cpu = first_cpu(*cpumask); 128 apicid = cpu_to_logical_apicid(cpu); 129 return apicid; 130 + } 131 + 132 + static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask, 133 + const struct cpumask *andmask) 134 + { 135 + int cpu; 136 + 137 + /* 138 + * We're using fixed IRQ delivery, can only return one phys APIC ID. 139 + * May as well be the first. 140 + */ 141 + for_each_cpu_and(cpu, cpumask, andmask) 142 + if (cpumask_test_cpu(cpu, cpu_online_mask)) 143 + break; 144 + if (cpu < nr_cpu_ids) 145 + return cpu_to_logical_apicid(cpu); 146 + 147 + return BAD_APICID; 148 } 149 150 static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
+5 -8
arch/x86/include/asm/bigsmp/ipi.h
··· 1 #ifndef __ASM_MACH_IPI_H 2 #define __ASM_MACH_IPI_H 3 4 - void send_IPI_mask_sequence(cpumask_t mask, int vector); 5 6 - static inline void send_IPI_mask(cpumask_t mask, int vector) 7 { 8 send_IPI_mask_sequence(mask, vector); 9 } 10 11 static inline void send_IPI_allbutself(int vector) 12 { 13 - cpumask_t mask = cpu_online_map; 14 - cpu_clear(smp_processor_id(), mask); 15 - 16 - if (!cpus_empty(mask)) 17 - send_IPI_mask(mask, vector); 18 } 19 20 static inline void send_IPI_all(int vector) 21 { 22 - send_IPI_mask(cpu_online_map, vector); 23 } 24 25 #endif /* __ASM_MACH_IPI_H */
··· 1 #ifndef __ASM_MACH_IPI_H 2 #define __ASM_MACH_IPI_H 3 4 + void send_IPI_mask_sequence(const struct cpumask *mask, int vector); 5 + void send_IPI_mask_allbutself(const struct cpumask *mask, int vector); 6 7 + static inline void send_IPI_mask(const struct cpumask *mask, int vector) 8 { 9 send_IPI_mask_sequence(mask, vector); 10 } 11 12 static inline void send_IPI_allbutself(int vector) 13 { 14 + send_IPI_mask_allbutself(cpu_online_mask, vector); 15 } 16 17 static inline void send_IPI_all(int vector) 18 { 19 + send_IPI_mask(cpu_online_mask, vector); 20 } 21 22 #endif /* __ASM_MACH_IPI_H */
+4 -6
arch/x86/include/asm/desc.h
··· 320 _set_gate(n, GATE_INTERRUPT, addr, 0, 0, __KERNEL_CS); 321 } 322 323 - #define SYS_VECTOR_FREE 0 324 - #define SYS_VECTOR_ALLOCED 1 325 - 326 extern int first_system_vector; 327 - extern char system_vectors[]; 328 329 static inline void alloc_system_vector(int vector) 330 { 331 - if (system_vectors[vector] == SYS_VECTOR_FREE) { 332 - system_vectors[vector] = SYS_VECTOR_ALLOCED; 333 if (first_system_vector > vector) 334 first_system_vector = vector; 335 } else
··· 320 _set_gate(n, GATE_INTERRUPT, addr, 0, 0, __KERNEL_CS); 321 } 322 323 extern int first_system_vector; 324 + /* used_vectors is BITMAP for irq is not managed by percpu vector_irq */ 325 + extern unsigned long used_vectors[]; 326 327 static inline void alloc_system_vector(int vector) 328 { 329 + if (!test_bit(vector, used_vectors)) { 330 + set_bit(vector, used_vectors); 331 if (first_system_vector > vector) 332 first_system_vector = vector; 333 } else
+64 -18
arch/x86/include/asm/es7000/apic.h
··· 9 return (1); 10 } 11 12 - static inline cpumask_t target_cpus_cluster(void) 13 { 14 - return CPU_MASK_ALL; 15 } 16 17 - static inline cpumask_t target_cpus(void) 18 { 19 - return cpumask_of_cpu(smp_processor_id()); 20 } 21 22 #define APIC_DFR_VALUE_CLUSTER (APIC_DFR_CLUSTER) ··· 80 static inline void setup_apic_routing(void) 81 { 82 int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id()); 83 - printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n", 84 (apic_version[apic] == 0x14) ? 85 - "Physical Cluster" : "Logical Cluster", nr_ioapics, cpus_addr(target_cpus())[0]); 86 } 87 88 static inline int multi_timer_check(int apic, int irq) ··· 101 { 102 if (!mps_cpu) 103 return boot_cpu_physical_apicid; 104 - else if (mps_cpu < NR_CPUS) 105 return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu); 106 else 107 return BAD_APICID; ··· 121 static inline int cpu_to_logical_apicid(int cpu) 122 { 123 #ifdef CONFIG_SMP 124 - if (cpu >= NR_CPUS) 125 - return BAD_APICID; 126 - return (int)cpu_2_logical_apicid[cpu]; 127 #else 128 return logical_smp_processor_id(); 129 #endif ··· 147 return (1); 148 } 149 150 - static inline unsigned int cpu_mask_to_apicid_cluster(cpumask_t cpumask) 151 { 152 int num_bits_set; 153 int cpus_found = 0; 154 int cpu; 155 int apicid; 156 157 - num_bits_set = cpus_weight(cpumask); 158 /* Return id to all */ 159 if (num_bits_set == NR_CPUS) 160 return 0xFF; ··· 163 * The cpus in the mask must all be on the apic cluster. If are not 164 * on the same apicid cluster return default value of TARGET_CPUS. 165 */ 166 - cpu = first_cpu(cpumask); 167 apicid = cpu_to_logical_apicid(cpu); 168 while (cpus_found < num_bits_set) { 169 - if (cpu_isset(cpu, cpumask)) { 170 int new_apicid = cpu_to_logical_apicid(cpu); 171 if (apicid_cluster(apicid) != 172 apicid_cluster(new_apicid)){ ··· 181 return apicid; 182 } 183 184 - static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) 185 { 186 int num_bits_set; 187 int cpus_found = 0; 188 int cpu; 189 int apicid; 190 191 - num_bits_set = cpus_weight(cpumask); 192 /* Return id to all */ 193 if (num_bits_set == NR_CPUS) 194 return cpu_to_logical_apicid(0); ··· 196 * The cpus in the mask must all be on the apic cluster. If are not 197 * on the same apicid cluster return default value of TARGET_CPUS. 198 */ 199 - cpu = first_cpu(cpumask); 200 apicid = cpu_to_logical_apicid(cpu); 201 while (cpus_found < num_bits_set) { 202 - if (cpu_isset(cpu, cpumask)) { 203 int new_apicid = cpu_to_logical_apicid(cpu); 204 if (apicid_cluster(apicid) != 205 apicid_cluster(new_apicid)){ ··· 211 } 212 cpu++; 213 } 214 return apicid; 215 } 216
··· 9 return (1); 10 } 11 12 + static inline const cpumask_t *target_cpus_cluster(void) 13 { 14 + return &CPU_MASK_ALL; 15 } 16 17 + static inline const cpumask_t *target_cpus(void) 18 { 19 + return &cpumask_of_cpu(smp_processor_id()); 20 } 21 22 #define APIC_DFR_VALUE_CLUSTER (APIC_DFR_CLUSTER) ··· 80 static inline void setup_apic_routing(void) 81 { 82 int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id()); 83 + printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n", 84 (apic_version[apic] == 0x14) ? 85 + "Physical Cluster" : "Logical Cluster", 86 + nr_ioapics, cpus_addr(*target_cpus())[0]); 87 } 88 89 static inline int multi_timer_check(int apic, int irq) ··· 100 { 101 if (!mps_cpu) 102 return boot_cpu_physical_apicid; 103 + else if (mps_cpu < nr_cpu_ids) 104 return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu); 105 else 106 return BAD_APICID; ··· 120 static inline int cpu_to_logical_apicid(int cpu) 121 { 122 #ifdef CONFIG_SMP 123 + if (cpu >= nr_cpu_ids) 124 + return BAD_APICID; 125 + return (int)cpu_2_logical_apicid[cpu]; 126 #else 127 return logical_smp_processor_id(); 128 #endif ··· 146 return (1); 147 } 148 149 + static inline unsigned int 150 + cpu_mask_to_apicid_cluster(const struct cpumask *cpumask) 151 { 152 int num_bits_set; 153 int cpus_found = 0; 154 int cpu; 155 int apicid; 156 157 + num_bits_set = cpumask_weight(cpumask); 158 /* Return id to all */ 159 if (num_bits_set == NR_CPUS) 160 return 0xFF; ··· 161 * The cpus in the mask must all be on the apic cluster. If are not 162 * on the same apicid cluster return default value of TARGET_CPUS. 163 */ 164 + cpu = cpumask_first(cpumask); 165 apicid = cpu_to_logical_apicid(cpu); 166 while (cpus_found < num_bits_set) { 167 + if (cpumask_test_cpu(cpu, cpumask)) { 168 int new_apicid = cpu_to_logical_apicid(cpu); 169 if (apicid_cluster(apicid) != 170 apicid_cluster(new_apicid)){ ··· 179 return apicid; 180 } 181 182 + static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask) 183 { 184 int num_bits_set; 185 int cpus_found = 0; 186 int cpu; 187 int apicid; 188 189 + num_bits_set = cpus_weight(*cpumask); 190 /* Return id to all */ 191 if (num_bits_set == NR_CPUS) 192 return cpu_to_logical_apicid(0); ··· 194 * The cpus in the mask must all be on the apic cluster. If are not 195 * on the same apicid cluster return default value of TARGET_CPUS. 196 */ 197 + cpu = first_cpu(*cpumask); 198 apicid = cpu_to_logical_apicid(cpu); 199 while (cpus_found < num_bits_set) { 200 + if (cpu_isset(cpu, *cpumask)) { 201 int new_apicid = cpu_to_logical_apicid(cpu); 202 if (apicid_cluster(apicid) != 203 apicid_cluster(new_apicid)){ ··· 209 } 210 cpu++; 211 } 212 + return apicid; 213 + } 214 + 215 + 216 + static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *inmask, 217 + const struct cpumask *andmask) 218 + { 219 + int num_bits_set; 220 + int cpus_found = 0; 221 + int cpu; 222 + int apicid = cpu_to_logical_apicid(0); 223 + cpumask_var_t cpumask; 224 + 225 + if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC)) 226 + return apicid; 227 + 228 + cpumask_and(cpumask, inmask, andmask); 229 + cpumask_and(cpumask, cpumask, cpu_online_mask); 230 + 231 + num_bits_set = cpumask_weight(cpumask); 232 + /* Return id to all */ 233 + if (num_bits_set == NR_CPUS) 234 + goto exit; 235 + /* 236 + * The cpus in the mask must all be on the apic cluster. If are not 237 + * on the same apicid cluster return default value of TARGET_CPUS. 238 + */ 239 + cpu = cpumask_first(cpumask); 240 + apicid = cpu_to_logical_apicid(cpu); 241 + while (cpus_found < num_bits_set) { 242 + if (cpumask_test_cpu(cpu, cpumask)) { 243 + int new_apicid = cpu_to_logical_apicid(cpu); 244 + if (apicid_cluster(apicid) != 245 + apicid_cluster(new_apicid)){ 246 + printk ("%s: Not a valid mask!\n", __func__); 247 + return cpu_to_logical_apicid(0); 248 + } 249 + apicid = new_apicid; 250 + cpus_found++; 251 + } 252 + cpu++; 253 + } 254 + exit: 255 + free_cpumask_var(cpumask); 256 return apicid; 257 } 258
+5 -7
arch/x86/include/asm/es7000/ipi.h
··· 1 #ifndef __ASM_ES7000_IPI_H 2 #define __ASM_ES7000_IPI_H 3 4 - void send_IPI_mask_sequence(cpumask_t mask, int vector); 5 6 - static inline void send_IPI_mask(cpumask_t mask, int vector) 7 { 8 send_IPI_mask_sequence(mask, vector); 9 } 10 11 static inline void send_IPI_allbutself(int vector) 12 { 13 - cpumask_t mask = cpu_online_map; 14 - cpu_clear(smp_processor_id(), mask); 15 - if (!cpus_empty(mask)) 16 - send_IPI_mask(mask, vector); 17 } 18 19 static inline void send_IPI_all(int vector) 20 { 21 - send_IPI_mask(cpu_online_map, vector); 22 } 23 24 #endif /* __ASM_ES7000_IPI_H */
··· 1 #ifndef __ASM_ES7000_IPI_H 2 #define __ASM_ES7000_IPI_H 3 4 + void send_IPI_mask_sequence(const struct cpumask *mask, int vector); 5 + void send_IPI_mask_allbutself(const struct cpumask *mask, int vector); 6 7 + static inline void send_IPI_mask(const struct cpumask *mask, int vector) 8 { 9 send_IPI_mask_sequence(mask, vector); 10 } 11 12 static inline void send_IPI_allbutself(int vector) 13 { 14 + send_IPI_mask_allbutself(cpu_online_mask, vector); 15 } 16 17 static inline void send_IPI_all(int vector) 18 { 19 + send_IPI_mask(cpu_online_mask, vector); 20 } 21 22 #endif /* __ASM_ES7000_IPI_H */
+9 -4
arch/x86/include/asm/genapic_32.h
··· 24 int (*probe)(void); 25 26 int (*apic_id_registered)(void); 27 - cpumask_t (*target_cpus)(void); 28 int int_delivery_mode; 29 int int_dest_mode; 30 int ESR_DISABLE; ··· 57 58 unsigned (*get_apic_id)(unsigned long x); 59 unsigned long apic_id_mask; 60 - unsigned int (*cpu_mask_to_apicid)(cpumask_t cpumask); 61 - cpumask_t (*vector_allocation_domain)(int cpu); 62 63 #ifdef CONFIG_SMP 64 /* ipi */ 65 - void (*send_IPI_mask)(cpumask_t mask, int vector); 66 void (*send_IPI_allbutself)(int vector); 67 void (*send_IPI_all)(int vector); 68 #endif ··· 118 APICFUNC(get_apic_id) \ 119 .apic_id_mask = APIC_ID_MASK, \ 120 APICFUNC(cpu_mask_to_apicid) \ 121 APICFUNC(vector_allocation_domain) \ 122 APICFUNC(acpi_madt_oem_check) \ 123 IPIFUNC(send_IPI_mask) \
··· 24 int (*probe)(void); 25 26 int (*apic_id_registered)(void); 27 + const struct cpumask *(*target_cpus)(void); 28 int int_delivery_mode; 29 int int_dest_mode; 30 int ESR_DISABLE; ··· 57 58 unsigned (*get_apic_id)(unsigned long x); 59 unsigned long apic_id_mask; 60 + unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask); 61 + unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask, 62 + const struct cpumask *andmask); 63 + void (*vector_allocation_domain)(int cpu, struct cpumask *retmask); 64 65 #ifdef CONFIG_SMP 66 /* ipi */ 67 + void (*send_IPI_mask)(const struct cpumask *mask, int vector); 68 + void (*send_IPI_mask_allbutself)(const struct cpumask *mask, 69 + int vector); 70 void (*send_IPI_allbutself)(int vector); 71 void (*send_IPI_all)(int vector); 72 #endif ··· 114 APICFUNC(get_apic_id) \ 115 .apic_id_mask = APIC_ID_MASK, \ 116 APICFUNC(cpu_mask_to_apicid) \ 117 + APICFUNC(cpu_mask_to_apicid_and) \ 118 APICFUNC(vector_allocation_domain) \ 119 APICFUNC(acpi_madt_oem_check) \ 120 IPIFUNC(send_IPI_mask) \
+10 -4
arch/x86/include/asm/genapic_64.h
··· 1 #ifndef _ASM_X86_GENAPIC_64_H 2 #define _ASM_X86_GENAPIC_64_H 3 4 /* 5 * Copyright 2004 James Cleverdon, IBM. 6 * Subject to the GNU Public License, v.2 ··· 20 u32 int_delivery_mode; 21 u32 int_dest_mode; 22 int (*apic_id_registered)(void); 23 - cpumask_t (*target_cpus)(void); 24 - cpumask_t (*vector_allocation_domain)(int cpu); 25 void (*init_apic_ldr)(void); 26 /* ipi */ 27 - void (*send_IPI_mask)(cpumask_t mask, int vector); 28 void (*send_IPI_allbutself)(int vector); 29 void (*send_IPI_all)(int vector); 30 void (*send_IPI_self)(int vector); 31 /* */ 32 - unsigned int (*cpu_mask_to_apicid)(cpumask_t cpumask); 33 unsigned int (*phys_pkg_id)(int index_msb); 34 unsigned int (*get_apic_id)(unsigned long x); 35 unsigned long (*set_apic_id)(unsigned int id);
··· 1 #ifndef _ASM_X86_GENAPIC_64_H 2 #define _ASM_X86_GENAPIC_64_H 3 4 + #include <linux/cpumask.h> 5 + 6 /* 7 * Copyright 2004 James Cleverdon, IBM. 8 * Subject to the GNU Public License, v.2 ··· 18 u32 int_delivery_mode; 19 u32 int_dest_mode; 20 int (*apic_id_registered)(void); 21 + const struct cpumask *(*target_cpus)(void); 22 + void (*vector_allocation_domain)(int cpu, struct cpumask *retmask); 23 void (*init_apic_ldr)(void); 24 /* ipi */ 25 + void (*send_IPI_mask)(const struct cpumask *mask, int vector); 26 + void (*send_IPI_mask_allbutself)(const struct cpumask *mask, 27 + int vector); 28 void (*send_IPI_allbutself)(int vector); 29 void (*send_IPI_all)(int vector); 30 void (*send_IPI_self)(int vector); 31 /* */ 32 + unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask); 33 + unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask, 34 + const struct cpumask *andmask); 35 unsigned int (*phys_pkg_id)(int index_msb); 36 unsigned int (*get_apic_id)(unsigned long x); 37 unsigned long (*set_apic_id)(unsigned int id);
+21 -2
arch/x86/include/asm/ipi.h
··· 117 native_apic_mem_write(APIC_ICR, cfg); 118 } 119 120 - static inline void send_IPI_mask_sequence(cpumask_t mask, int vector) 121 { 122 unsigned long flags; 123 unsigned long query_cpu; ··· 129 * - mbligh 130 */ 131 local_irq_save(flags); 132 - for_each_cpu_mask_nr(query_cpu, mask) { 133 __send_IPI_dest_field(per_cpu(x86_cpu_to_apicid, query_cpu), 134 vector, APIC_DEST_PHYSICAL); 135 } 136 local_irq_restore(flags); 137 } 138
··· 117 native_apic_mem_write(APIC_ICR, cfg); 118 } 119 120 + static inline void send_IPI_mask_sequence(const struct cpumask *mask, 121 + int vector) 122 { 123 unsigned long flags; 124 unsigned long query_cpu; ··· 128 * - mbligh 129 */ 130 local_irq_save(flags); 131 + for_each_cpu(query_cpu, mask) { 132 __send_IPI_dest_field(per_cpu(x86_cpu_to_apicid, query_cpu), 133 vector, APIC_DEST_PHYSICAL); 134 } 135 + local_irq_restore(flags); 136 + } 137 + 138 + static inline void send_IPI_mask_allbutself(const struct cpumask *mask, 139 + int vector) 140 + { 141 + unsigned long flags; 142 + unsigned int query_cpu; 143 + unsigned int this_cpu = smp_processor_id(); 144 + 145 + /* See Hack comment above */ 146 + 147 + local_irq_save(flags); 148 + for_each_cpu(query_cpu, mask) 149 + if (query_cpu != this_cpu) 150 + __send_IPI_dest_field( 151 + per_cpu(x86_cpu_to_apicid, query_cpu), 152 + vector, APIC_DEST_PHYSICAL); 153 local_irq_restore(flags); 154 } 155
+2 -1
arch/x86/include/asm/irq.h
··· 33 34 #ifdef CONFIG_HOTPLUG_CPU 35 #include <linux/cpumask.h> 36 - extern void fixup_irqs(cpumask_t map); 37 #endif 38 39 extern unsigned int do_IRQ(struct pt_regs *regs); ··· 42 43 /* Interrupt vector management */ 44 extern DECLARE_BITMAP(used_vectors, NR_VECTORS); 45 46 #endif /* _ASM_X86_IRQ_H */
··· 33 34 #ifdef CONFIG_HOTPLUG_CPU 35 #include <linux/cpumask.h> 36 + extern void fixup_irqs(void); 37 #endif 38 39 extern unsigned int do_IRQ(struct pt_regs *regs); ··· 42 43 /* Interrupt vector management */ 44 extern DECLARE_BITMAP(used_vectors, NR_VECTORS); 45 + extern int vector_used_by_percpu_irq(unsigned int vector); 46 47 #endif /* _ASM_X86_IRQ_H */
+19 -9
arch/x86/include/asm/mach-default/mach_apic.h
··· 8 9 #define APIC_DFR_VALUE (APIC_DFR_FLAT) 10 11 - static inline cpumask_t target_cpus(void) 12 { 13 #ifdef CONFIG_SMP 14 - return cpu_online_map; 15 #else 16 - return cpumask_of_cpu(0); 17 #endif 18 } 19 ··· 28 #define apic_id_registered (genapic->apic_id_registered) 29 #define init_apic_ldr (genapic->init_apic_ldr) 30 #define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid) 31 #define phys_pkg_id (genapic->phys_pkg_id) 32 #define vector_allocation_domain (genapic->vector_allocation_domain) 33 #define read_apic_id() (GET_APIC_ID(apic_read(APIC_ID))) ··· 62 return physid_isset(read_apic_id(), phys_cpu_present_map); 63 } 64 65 - static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) 66 { 67 - return cpus_addr(cpumask)[0]; 68 } 69 70 static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) ··· 99 #endif 100 } 101 102 - static inline cpumask_t vector_allocation_domain(int cpu) 103 { 104 /* Careful. Some cpus do not strictly honor the set of cpus 105 * specified in the interrupt destination when using lowest ··· 109 * deliver interrupts to the wrong hyperthread when only one 110 * hyperthread was specified in the interrupt desitination. 111 */ 112 - cpumask_t domain = { { [0] = APIC_ALL_CPUS, } }; 113 - return domain; 114 } 115 #endif 116 ··· 141 142 static inline int cpu_present_to_apicid(int mps_cpu) 143 { 144 - if (mps_cpu < NR_CPUS && cpu_present(mps_cpu)) 145 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu); 146 else 147 return BAD_APICID;
··· 8 9 #define APIC_DFR_VALUE (APIC_DFR_FLAT) 10 11 + static inline const struct cpumask *target_cpus(void) 12 { 13 #ifdef CONFIG_SMP 14 + return cpu_online_mask; 15 #else 16 + return cpumask_of(0); 17 #endif 18 } 19 ··· 28 #define apic_id_registered (genapic->apic_id_registered) 29 #define init_apic_ldr (genapic->init_apic_ldr) 30 #define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid) 31 + #define cpu_mask_to_apicid_and (genapic->cpu_mask_to_apicid_and) 32 #define phys_pkg_id (genapic->phys_pkg_id) 33 #define vector_allocation_domain (genapic->vector_allocation_domain) 34 #define read_apic_id() (GET_APIC_ID(apic_read(APIC_ID))) ··· 61 return physid_isset(read_apic_id(), phys_cpu_present_map); 62 } 63 64 + static inline unsigned int cpu_mask_to_apicid(const struct cpumask *cpumask) 65 { 66 + return cpumask_bits(cpumask)[0]; 67 + } 68 + 69 + static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask, 70 + const struct cpumask *andmask) 71 + { 72 + unsigned long mask1 = cpumask_bits(cpumask)[0]; 73 + unsigned long mask2 = cpumask_bits(andmask)[0]; 74 + unsigned long mask3 = cpumask_bits(cpu_online_mask)[0]; 75 + 76 + return (unsigned int)(mask1 & mask2 & mask3); 77 } 78 79 static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) ··· 88 #endif 89 } 90 91 + static inline void vector_allocation_domain(int cpu, struct cpumask *retmask) 92 { 93 /* Careful. Some cpus do not strictly honor the set of cpus 94 * specified in the interrupt destination when using lowest ··· 98 * deliver interrupts to the wrong hyperthread when only one 99 * hyperthread was specified in the interrupt desitination. 100 */ 101 + *retmask = (cpumask_t) { { [0] = APIC_ALL_CPUS } }; 102 } 103 #endif 104 ··· 131 132 static inline int cpu_present_to_apicid(int mps_cpu) 133 { 134 + if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu)) 135 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu); 136 else 137 return BAD_APICID;
+9 -9
arch/x86/include/asm/mach-default/mach_ipi.h
··· 4 /* Avoid include hell */ 5 #define NMI_VECTOR 0x02 6 7 - void send_IPI_mask_bitmask(cpumask_t mask, int vector); 8 void __send_IPI_shortcut(unsigned int shortcut, int vector); 9 10 extern int no_broadcast; ··· 13 #ifdef CONFIG_X86_64 14 #include <asm/genapic.h> 15 #define send_IPI_mask (genapic->send_IPI_mask) 16 #else 17 - static inline void send_IPI_mask(cpumask_t mask, int vector) 18 { 19 send_IPI_mask_bitmask(mask, vector); 20 } 21 #endif 22 23 static inline void __local_send_IPI_allbutself(int vector) 24 { 25 - if (no_broadcast || vector == NMI_VECTOR) { 26 - cpumask_t mask = cpu_online_map; 27 - 28 - cpu_clear(smp_processor_id(), mask); 29 - send_IPI_mask(mask, vector); 30 - } else 31 __send_IPI_shortcut(APIC_DEST_ALLBUT, vector); 32 } 33 34 static inline void __local_send_IPI_all(int vector) 35 { 36 if (no_broadcast || vector == NMI_VECTOR) 37 - send_IPI_mask(cpu_online_map, vector); 38 else 39 __send_IPI_shortcut(APIC_DEST_ALLINC, vector); 40 }
··· 4 /* Avoid include hell */ 5 #define NMI_VECTOR 0x02 6 7 + void send_IPI_mask_bitmask(const struct cpumask *mask, int vector); 8 + void send_IPI_mask_allbutself(const struct cpumask *mask, int vector); 9 void __send_IPI_shortcut(unsigned int shortcut, int vector); 10 11 extern int no_broadcast; ··· 12 #ifdef CONFIG_X86_64 13 #include <asm/genapic.h> 14 #define send_IPI_mask (genapic->send_IPI_mask) 15 + #define send_IPI_mask_allbutself (genapic->send_IPI_mask_allbutself) 16 #else 17 + static inline void send_IPI_mask(const struct cpumask *mask, int vector) 18 { 19 send_IPI_mask_bitmask(mask, vector); 20 } 21 + void send_IPI_mask_allbutself(const struct cpumask *mask, int vector); 22 #endif 23 24 static inline void __local_send_IPI_allbutself(int vector) 25 { 26 + if (no_broadcast || vector == NMI_VECTOR) 27 + send_IPI_mask_allbutself(cpu_online_mask, vector); 28 + else 29 __send_IPI_shortcut(APIC_DEST_ALLBUT, vector); 30 } 31 32 static inline void __local_send_IPI_all(int vector) 33 { 34 if (no_broadcast || vector == NMI_VECTOR) 35 + send_IPI_mask(cpu_online_mask, vector); 36 else 37 __send_IPI_shortcut(APIC_DEST_ALLINC, vector); 38 }
+1
arch/x86/include/asm/mach-generic/mach_apic.h
··· 24 #define check_phys_apicid_present (genapic->check_phys_apicid_present) 25 #define check_apicid_used (genapic->check_apicid_used) 26 #define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid) 27 #define vector_allocation_domain (genapic->vector_allocation_domain) 28 #define enable_apic_mode (genapic->enable_apic_mode) 29 #define phys_pkg_id (genapic->phys_pkg_id)
··· 24 #define check_phys_apicid_present (genapic->check_phys_apicid_present) 25 #define check_apicid_used (genapic->check_apicid_used) 26 #define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid) 27 + #define cpu_mask_to_apicid_and (genapic->cpu_mask_to_apicid_and) 28 #define vector_allocation_domain (genapic->vector_allocation_domain) 29 #define enable_apic_mode (genapic->enable_apic_mode) 30 #define phys_pkg_id (genapic->phys_pkg_id)
+9 -3
arch/x86/include/asm/numaq/apic.h
··· 7 8 #define APIC_DFR_VALUE (APIC_DFR_CLUSTER) 9 10 - static inline cpumask_t target_cpus(void) 11 { 12 - return CPU_MASK_ALL; 13 } 14 15 #define NO_BALANCE_IRQ (1) ··· 122 * We use physical apicids here, not logical, so just return the default 123 * physical broadcast to stop people from breaking us 124 */ 125 - static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) 126 { 127 return (int) 0xF; 128 }
··· 7 8 #define APIC_DFR_VALUE (APIC_DFR_CLUSTER) 9 10 + static inline const cpumask_t *target_cpus(void) 11 { 12 + return &CPU_MASK_ALL; 13 } 14 15 #define NO_BALANCE_IRQ (1) ··· 122 * We use physical apicids here, not logical, so just return the default 123 * physical broadcast to stop people from breaking us 124 */ 125 + static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask) 126 + { 127 + return (int) 0xF; 128 + } 129 + 130 + static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask, 131 + const struct cpumask *andmask) 132 { 133 return (int) 0xF; 134 }
+5 -8
arch/x86/include/asm/numaq/ipi.h
··· 1 #ifndef __ASM_NUMAQ_IPI_H 2 #define __ASM_NUMAQ_IPI_H 3 4 - void send_IPI_mask_sequence(cpumask_t, int vector); 5 6 - static inline void send_IPI_mask(cpumask_t mask, int vector) 7 { 8 send_IPI_mask_sequence(mask, vector); 9 } 10 11 static inline void send_IPI_allbutself(int vector) 12 { 13 - cpumask_t mask = cpu_online_map; 14 - cpu_clear(smp_processor_id(), mask); 15 - 16 - if (!cpus_empty(mask)) 17 - send_IPI_mask(mask, vector); 18 } 19 20 static inline void send_IPI_all(int vector) 21 { 22 - send_IPI_mask(cpu_online_map, vector); 23 } 24 25 #endif /* __ASM_NUMAQ_IPI_H */
··· 1 #ifndef __ASM_NUMAQ_IPI_H 2 #define __ASM_NUMAQ_IPI_H 3 4 + void send_IPI_mask_sequence(const struct cpumask *mask, int vector); 5 + void send_IPI_mask_allbutself(const struct cpumask *mask, int vector); 6 7 + static inline void send_IPI_mask(const struct cpumask *mask, int vector) 8 { 9 send_IPI_mask_sequence(mask, vector); 10 } 11 12 static inline void send_IPI_allbutself(int vector) 13 { 14 + send_IPI_mask_allbutself(cpu_online_mask, vector); 15 } 16 17 static inline void send_IPI_all(int vector) 18 { 19 + send_IPI_mask(cpu_online_mask, vector); 20 } 21 22 #endif /* __ASM_NUMAQ_IPI_H */
+3 -3
arch/x86/include/asm/smp.h
··· 60 void (*cpu_die)(unsigned int cpu); 61 void (*play_dead)(void); 62 63 - void (*send_call_func_ipi)(cpumask_t mask); 64 void (*send_call_func_single_ipi)(int cpu); 65 }; 66 ··· 125 126 static inline void arch_send_call_function_ipi(cpumask_t mask) 127 { 128 - smp_ops.send_call_func_ipi(mask); 129 } 130 131 void cpu_disable_common(void); ··· 138 void native_play_dead(void); 139 void play_dead_common(void); 140 141 - void native_send_call_func_ipi(cpumask_t mask); 142 void native_send_call_func_single_ipi(int cpu); 143 144 extern void prefill_possible_map(void);
··· 60 void (*cpu_die)(unsigned int cpu); 61 void (*play_dead)(void); 62 63 + void (*send_call_func_ipi)(const struct cpumask *mask); 64 void (*send_call_func_single_ipi)(int cpu); 65 }; 66 ··· 125 126 static inline void arch_send_call_function_ipi(cpumask_t mask) 127 { 128 + smp_ops.send_call_func_ipi(&mask); 129 } 130 131 void cpu_disable_common(void); ··· 138 void native_play_dead(void); 139 void play_dead_common(void); 140 141 + void native_send_call_func_ipi(const struct cpumask *mask); 142 void native_send_call_func_single_ipi(int cpu); 143 144 extern void prefill_possible_map(void);
+49 -6
arch/x86/include/asm/summit/apic.h
··· 14 15 #define APIC_DFR_VALUE (APIC_DFR_CLUSTER) 16 17 - static inline cpumask_t target_cpus(void) 18 { 19 /* CPU_MASK_ALL (0xff) has undefined behaviour with 20 * dest_LowestPrio mode logical clustered apic interrupt routing 21 * Just start on cpu 0. IRQ balancing will spread load 22 */ 23 - return cpumask_of_cpu(0); 24 } 25 26 #define INT_DELIVERY_MODE (dest_LowestPrio) ··· 137 { 138 } 139 140 - static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) 141 { 142 int num_bits_set; 143 int cpus_found = 0; 144 int cpu; 145 int apicid; 146 147 - num_bits_set = cpus_weight(cpumask); 148 /* Return id to all */ 149 if (num_bits_set == NR_CPUS) 150 return (int) 0xFF; ··· 152 * The cpus in the mask must all be on the apic cluster. If are not 153 * on the same apicid cluster return default value of TARGET_CPUS. 154 */ 155 - cpu = first_cpu(cpumask); 156 apicid = cpu_to_logical_apicid(cpu); 157 while (cpus_found < num_bits_set) { 158 - if (cpu_isset(cpu, cpumask)) { 159 int new_apicid = cpu_to_logical_apicid(cpu); 160 if (apicid_cluster(apicid) != 161 apicid_cluster(new_apicid)){ ··· 167 } 168 cpu++; 169 } 170 return apicid; 171 } 172
··· 14 15 #define APIC_DFR_VALUE (APIC_DFR_CLUSTER) 16 17 + static inline const cpumask_t *target_cpus(void) 18 { 19 /* CPU_MASK_ALL (0xff) has undefined behaviour with 20 * dest_LowestPrio mode logical clustered apic interrupt routing 21 * Just start on cpu 0. IRQ balancing will spread load 22 */ 23 + return &cpumask_of_cpu(0); 24 } 25 26 #define INT_DELIVERY_MODE (dest_LowestPrio) ··· 137 { 138 } 139 140 + static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask) 141 { 142 int num_bits_set; 143 int cpus_found = 0; 144 int cpu; 145 int apicid; 146 147 + num_bits_set = cpus_weight(*cpumask); 148 /* Return id to all */ 149 if (num_bits_set == NR_CPUS) 150 return (int) 0xFF; ··· 152 * The cpus in the mask must all be on the apic cluster. If are not 153 * on the same apicid cluster return default value of TARGET_CPUS. 154 */ 155 + cpu = first_cpu(*cpumask); 156 apicid = cpu_to_logical_apicid(cpu); 157 while (cpus_found < num_bits_set) { 158 + if (cpu_isset(cpu, *cpumask)) { 159 int new_apicid = cpu_to_logical_apicid(cpu); 160 if (apicid_cluster(apicid) != 161 apicid_cluster(new_apicid)){ ··· 167 } 168 cpu++; 169 } 170 + return apicid; 171 + } 172 + 173 + static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *inmask, 174 + const struct cpumask *andmask) 175 + { 176 + int num_bits_set; 177 + int cpus_found = 0; 178 + int cpu; 179 + int apicid = 0xFF; 180 + cpumask_var_t cpumask; 181 + 182 + if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC)) 183 + return (int) 0xFF; 184 + 185 + cpumask_and(cpumask, inmask, andmask); 186 + cpumask_and(cpumask, cpumask, cpu_online_mask); 187 + 188 + num_bits_set = cpumask_weight(cpumask); 189 + /* Return id to all */ 190 + if (num_bits_set == nr_cpu_ids) 191 + goto exit; 192 + /* 193 + * The cpus in the mask must all be on the apic cluster. If are not 194 + * on the same apicid cluster return default value of TARGET_CPUS. 195 + */ 196 + cpu = cpumask_first(cpumask); 197 + apicid = cpu_to_logical_apicid(cpu); 198 + while (cpus_found < num_bits_set) { 199 + if (cpumask_test_cpu(cpu, cpumask)) { 200 + int new_apicid = cpu_to_logical_apicid(cpu); 201 + if (apicid_cluster(apicid) != 202 + apicid_cluster(new_apicid)){ 203 + printk ("%s: Not a valid mask!\n", __func__); 204 + return 0xFF; 205 + } 206 + apicid = apicid | new_apicid; 207 + cpus_found++; 208 + } 209 + cpu++; 210 + } 211 + exit: 212 + free_cpumask_var(cpumask); 213 return apicid; 214 } 215
+5 -4
arch/x86/include/asm/summit/ipi.h
··· 1 #ifndef __ASM_SUMMIT_IPI_H 2 #define __ASM_SUMMIT_IPI_H 3 4 - void send_IPI_mask_sequence(cpumask_t mask, int vector); 5 6 - static inline void send_IPI_mask(cpumask_t mask, int vector) 7 { 8 send_IPI_mask_sequence(mask, vector); 9 } ··· 15 cpu_clear(smp_processor_id(), mask); 16 17 if (!cpus_empty(mask)) 18 - send_IPI_mask(mask, vector); 19 } 20 21 static inline void send_IPI_all(int vector) 22 { 23 - send_IPI_mask(cpu_online_map, vector); 24 } 25 26 #endif /* __ASM_SUMMIT_IPI_H */
··· 1 #ifndef __ASM_SUMMIT_IPI_H 2 #define __ASM_SUMMIT_IPI_H 3 4 + void send_IPI_mask_sequence(const cpumask_t *mask, int vector); 5 + void send_IPI_mask_allbutself(const cpumask_t *mask, int vector); 6 7 + static inline void send_IPI_mask(const cpumask_t *mask, int vector) 8 { 9 send_IPI_mask_sequence(mask, vector); 10 } ··· 14 cpu_clear(smp_processor_id(), mask); 15 16 if (!cpus_empty(mask)) 17 + send_IPI_mask(&mask, vector); 18 } 19 20 static inline void send_IPI_all(int vector) 21 { 22 + send_IPI_mask(&cpu_online_map, vector); 23 } 24 25 #endif /* __ASM_SUMMIT_IPI_H */
+2
arch/x86/include/asm/topology.h
··· 226 #define topology_core_id(cpu) (cpu_data(cpu).cpu_core_id) 227 #define topology_core_siblings(cpu) (per_cpu(cpu_core_map, cpu)) 228 #define topology_thread_siblings(cpu) (per_cpu(cpu_sibling_map, cpu)) 229 230 /* indicates that pointers to the topology cpumask_t maps are valid */ 231 #define arch_provides_topology_pointers yes
··· 226 #define topology_core_id(cpu) (cpu_data(cpu).cpu_core_id) 227 #define topology_core_siblings(cpu) (per_cpu(cpu_core_map, cpu)) 228 #define topology_thread_siblings(cpu) (per_cpu(cpu_sibling_map, cpu)) 229 + #define topology_core_cpumask(cpu) (&per_cpu(cpu_core_map, cpu)) 230 + #define topology_thread_cpumask(cpu) (&per_cpu(cpu_sibling_map, cpu)) 231 232 /* indicates that pointers to the topology cpumask_t maps are valid */ 233 #define arch_provides_topology_pointers yes
+18 -16
arch/x86/kernel/apic.c
··· 119 120 int first_system_vector = 0xfe; 121 122 - char system_vectors[NR_VECTORS] = { [0 ... NR_VECTORS-1] = SYS_VECTOR_FREE}; 123 - 124 /* 125 * Debug level, exported for io_apic.c 126 */ ··· 140 struct clock_event_device *evt); 141 static void lapic_timer_setup(enum clock_event_mode mode, 142 struct clock_event_device *evt); 143 - static void lapic_timer_broadcast(cpumask_t mask); 144 static void apic_pm_activate(void); 145 146 /* ··· 453 /* 454 * Local APIC timer broadcast function 455 */ 456 - static void lapic_timer_broadcast(cpumask_t mask) 457 { 458 #ifdef CONFIG_SMP 459 send_IPI_mask(mask, LOCAL_TIMER_VECTOR); ··· 469 struct clock_event_device *levt = &__get_cpu_var(lapic_events); 470 471 memcpy(levt, &lapic_clockevent, sizeof(*levt)); 472 - levt->cpumask = cpumask_of_cpu(smp_processor_id()); 473 474 clockevents_register_device(levt); 475 } ··· 1805 void __cpuinit generic_processor_info(int apicid, int version) 1806 { 1807 int cpu; 1808 - cpumask_t tmp_map; 1809 1810 /* 1811 * Validate version 1812 */ 1813 if (version == 0x0) { 1814 pr_warning("BIOS bug, APIC version is 0 for CPU#%d! " 1815 - "fixing up to 0x10. (tell your hw vendor)\n", 1816 - version); 1817 version = 0x10; 1818 } 1819 apic_version[apicid] = version; 1820 1821 - if (num_processors >= NR_CPUS) { 1822 - pr_warning("WARNING: NR_CPUS limit of %i reached." 1823 - " Processor ignored.\n", NR_CPUS); 1824 return; 1825 } 1826 1827 num_processors++; 1828 - cpus_complement(tmp_map, cpu_present_map); 1829 - cpu = first_cpu(tmp_map); 1830 1831 physid_set(apicid, phys_cpu_present_map); 1832 if (apicid == boot_cpu_physical_apicid) { ··· 1880 } 1881 #endif 1882 1883 - cpu_set(cpu, cpu_possible_map); 1884 - cpu_set(cpu, cpu_present_map); 1885 } 1886 1887 #ifdef CONFIG_X86_64 ··· 2083 bios_cpu_apicid = early_per_cpu_ptr(x86_bios_cpu_apicid); 2084 bitmap_zero(clustermap, NUM_APIC_CLUSTERS); 2085 2086 - for (i = 0; i < NR_CPUS; i++) { 2087 /* are we being called early in kernel startup? */ 2088 if (bios_cpu_apicid) { 2089 id = bios_cpu_apicid[i];
··· 119 120 int first_system_vector = 0xfe; 121 122 /* 123 * Debug level, exported for io_apic.c 124 */ ··· 142 struct clock_event_device *evt); 143 static void lapic_timer_setup(enum clock_event_mode mode, 144 struct clock_event_device *evt); 145 + static void lapic_timer_broadcast(const cpumask_t *mask); 146 static void apic_pm_activate(void); 147 148 /* ··· 455 /* 456 * Local APIC timer broadcast function 457 */ 458 + static void lapic_timer_broadcast(const cpumask_t *mask) 459 { 460 #ifdef CONFIG_SMP 461 send_IPI_mask(mask, LOCAL_TIMER_VECTOR); ··· 471 struct clock_event_device *levt = &__get_cpu_var(lapic_events); 472 473 memcpy(levt, &lapic_clockevent, sizeof(*levt)); 474 + levt->cpumask = cpumask_of(smp_processor_id()); 475 476 clockevents_register_device(levt); 477 } ··· 1807 void __cpuinit generic_processor_info(int apicid, int version) 1808 { 1809 int cpu; 1810 1811 /* 1812 * Validate version 1813 */ 1814 if (version == 0x0) { 1815 pr_warning("BIOS bug, APIC version is 0 for CPU#%d! " 1816 + "fixing up to 0x10. (tell your hw vendor)\n", 1817 + version); 1818 version = 0x10; 1819 } 1820 apic_version[apicid] = version; 1821 1822 + if (num_processors >= nr_cpu_ids) { 1823 + int max = nr_cpu_ids; 1824 + int thiscpu = max + disabled_cpus; 1825 + 1826 + pr_warning( 1827 + "ACPI: NR_CPUS/possible_cpus limit of %i reached." 1828 + " Processor %d/0x%x ignored.\n", max, thiscpu, apicid); 1829 + 1830 + disabled_cpus++; 1831 return; 1832 } 1833 1834 num_processors++; 1835 + cpu = cpumask_next_zero(-1, cpu_present_mask); 1836 1837 physid_set(apicid, phys_cpu_present_map); 1838 if (apicid == boot_cpu_physical_apicid) { ··· 1878 } 1879 #endif 1880 1881 + set_cpu_possible(cpu, true); 1882 + set_cpu_present(cpu, true); 1883 } 1884 1885 #ifdef CONFIG_X86_64 ··· 2081 bios_cpu_apicid = early_per_cpu_ptr(x86_bios_cpu_apicid); 2082 bitmap_zero(clustermap, NUM_APIC_CLUSTERS); 2083 2084 + for (i = 0; i < nr_cpu_ids; i++) { 2085 /* are we being called early in kernel startup? */ 2086 if (bios_cpu_apicid) { 2087 id = bios_cpu_apicid[i];
+23 -26
arch/x86/kernel/cpu/intel_cacheinfo.c
··· 534 per_cpu(cpuid4_info, cpu) = NULL; 535 } 536 537 static int __cpuinit detect_cache_attributes(unsigned int cpu) 538 { 539 - struct _cpuid4_info *this_leaf; 540 - unsigned long j; 541 int retval; 542 - cpumask_t oldmask; 543 544 if (num_cache_leaves == 0) 545 return -ENOENT; ··· 566 if (per_cpu(cpuid4_info, cpu) == NULL) 567 return -ENOMEM; 568 569 - oldmask = current->cpus_allowed; 570 - retval = set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu)); 571 - if (retval) 572 - goto out; 573 - 574 - /* Do cpuid and store the results */ 575 - for (j = 0; j < num_cache_leaves; j++) { 576 - this_leaf = CPUID4_INFO_IDX(cpu, j); 577 - retval = cpuid4_cache_lookup(j, this_leaf); 578 - if (unlikely(retval < 0)) { 579 - int i; 580 - 581 - for (i = 0; i < j; i++) 582 - cache_remove_shared_cpu_map(cpu, i); 583 - break; 584 - } 585 - cache_shared_cpu_map_setup(cpu, j); 586 - } 587 - set_cpus_allowed_ptr(current, &oldmask); 588 - 589 - out: 590 if (retval) { 591 kfree(per_cpu(cpuid4_info, cpu)); 592 per_cpu(cpuid4_info, cpu) = NULL; ··· 623 cpumask_t *mask = &this_leaf->shared_cpu_map; 624 625 n = type? 626 - cpulist_scnprintf(buf, len-2, *mask): 627 - cpumask_scnprintf(buf, len-2, *mask); 628 buf[n++] = '\n'; 629 buf[n] = '\0'; 630 }
··· 534 per_cpu(cpuid4_info, cpu) = NULL; 535 } 536 537 + static void get_cpu_leaves(void *_retval) 538 + { 539 + int j, *retval = _retval, cpu = smp_processor_id(); 540 + 541 + /* Do cpuid and store the results */ 542 + for (j = 0; j < num_cache_leaves; j++) { 543 + struct _cpuid4_info *this_leaf; 544 + this_leaf = CPUID4_INFO_IDX(cpu, j); 545 + *retval = cpuid4_cache_lookup(j, this_leaf); 546 + if (unlikely(*retval < 0)) { 547 + int i; 548 + 549 + for (i = 0; i < j; i++) 550 + cache_remove_shared_cpu_map(cpu, i); 551 + break; 552 + } 553 + cache_shared_cpu_map_setup(cpu, j); 554 + } 555 + } 556 + 557 static int __cpuinit detect_cache_attributes(unsigned int cpu) 558 { 559 int retval; 560 561 if (num_cache_leaves == 0) 562 return -ENOENT; ··· 549 if (per_cpu(cpuid4_info, cpu) == NULL) 550 return -ENOMEM; 551 552 + smp_call_function_single(cpu, get_cpu_leaves, &retval, true); 553 if (retval) { 554 kfree(per_cpu(cpuid4_info, cpu)); 555 per_cpu(cpuid4_info, cpu) = NULL; ··· 626 cpumask_t *mask = &this_leaf->shared_cpu_map; 627 628 n = type? 629 + cpulist_scnprintf(buf, len-2, mask) : 630 + cpumask_scnprintf(buf, len-2, mask); 631 buf[n++] = '\n'; 632 buf[n] = '\0'; 633 }
+55 -53
arch/x86/kernel/cpu/mcheck/mce_amd_64.c
··· 83 * CPU Initialization 84 */ 85 86 /* must be called with correct cpu affinity */ 87 - static void threshold_restart_bank(struct threshold_block *b, 88 - int reset, u16 old_limit) 89 { 90 u32 mci_misc_hi, mci_misc_lo; 91 92 - rdmsr(b->address, mci_misc_lo, mci_misc_hi); 93 94 - if (b->threshold_limit < (mci_misc_hi & THRESHOLD_MAX)) 95 - reset = 1; /* limit cannot be lower than err count */ 96 97 - if (reset) { /* reset err count and overflow bit */ 98 mci_misc_hi = 99 (mci_misc_hi & ~(MASK_ERR_COUNT_HI | MASK_OVERFLOW_HI)) | 100 - (THRESHOLD_MAX - b->threshold_limit); 101 - } else if (old_limit) { /* change limit w/o reset */ 102 int new_count = (mci_misc_hi & THRESHOLD_MAX) + 103 - (old_limit - b->threshold_limit); 104 mci_misc_hi = (mci_misc_hi & ~MASK_ERR_COUNT_HI) | 105 (new_count & THRESHOLD_MAX); 106 } 107 108 - b->interrupt_enable ? 109 (mci_misc_hi = (mci_misc_hi & ~MASK_INT_TYPE_HI) | INT_TYPE_APIC) : 110 (mci_misc_hi &= ~MASK_INT_TYPE_HI); 111 112 mci_misc_hi |= MASK_COUNT_EN_HI; 113 - wrmsr(b->address, mci_misc_lo, mci_misc_hi); 114 } 115 116 /* cpu init entry point, called from mce.c with preempt off */ ··· 127 unsigned int cpu = smp_processor_id(); 128 u8 lvt_off; 129 u32 low = 0, high = 0, address = 0; 130 131 for (bank = 0; bank < NR_BANKS; ++bank) { 132 for (block = 0; block < NR_BLOCKS; ++block) { ··· 170 wrmsr(address, low, high); 171 172 threshold_defaults.address = address; 173 - threshold_restart_bank(&threshold_defaults, 0, 0); 174 } 175 } 176 } ··· 262 ssize_t(*store) (struct threshold_block *, const char *, size_t count); 263 }; 264 265 - static void affinity_set(unsigned int cpu, cpumask_t *oldmask, 266 - cpumask_t *newmask) 267 - { 268 - *oldmask = current->cpus_allowed; 269 - cpus_clear(*newmask); 270 - cpu_set(cpu, *newmask); 271 - set_cpus_allowed_ptr(current, newmask); 272 - } 273 - 274 - static void affinity_restore(const cpumask_t *oldmask) 275 - { 276 - set_cpus_allowed_ptr(current, oldmask); 277 - } 278 - 279 #define SHOW_FIELDS(name) \ 280 static ssize_t show_ ## name(struct threshold_block * b, char *buf) \ 281 { \ ··· 274 const char *buf, size_t count) 275 { 276 char *end; 277 - cpumask_t oldmask, newmask; 278 unsigned long new = simple_strtoul(buf, &end, 0); 279 if (end == buf) 280 return -EINVAL; 281 b->interrupt_enable = !!new; 282 283 - affinity_set(b->cpu, &oldmask, &newmask); 284 - threshold_restart_bank(b, 0, 0); 285 - affinity_restore(&oldmask); 286 287 return end - buf; 288 } ··· 292 const char *buf, size_t count) 293 { 294 char *end; 295 - cpumask_t oldmask, newmask; 296 - u16 old; 297 unsigned long new = simple_strtoul(buf, &end, 0); 298 if (end == buf) 299 return -EINVAL; ··· 300 new = THRESHOLD_MAX; 301 if (new < 1) 302 new = 1; 303 - old = b->threshold_limit; 304 b->threshold_limit = new; 305 306 - affinity_set(b->cpu, &oldmask, &newmask); 307 - threshold_restart_bank(b, 0, old); 308 - affinity_restore(&oldmask); 309 310 return end - buf; 311 } 312 313 static ssize_t show_error_count(struct threshold_block *b, char *buf) 314 { 315 - u32 high, low; 316 - cpumask_t oldmask, newmask; 317 - affinity_set(b->cpu, &oldmask, &newmask); 318 - rdmsr(b->address, low, high); 319 - affinity_restore(&oldmask); 320 - return sprintf(buf, "%x\n", 321 - (high & 0xFFF) - (THRESHOLD_MAX - b->threshold_limit)); 322 } 323 324 static ssize_t store_error_count(struct threshold_block *b, 325 const char *buf, size_t count) 326 { 327 - cpumask_t oldmask, newmask; 328 - affinity_set(b->cpu, &oldmask, &newmask); 329 - threshold_restart_bank(b, 1, 0); 330 - affinity_restore(&oldmask); 331 return 1; 332 } 333 ··· 462 return err; 463 } 464 465 /* symlinks sibling shared banks to first core. first core owns dir/files. */ 466 static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank) 467 { 468 int i, err = 0; 469 struct threshold_bank *b = NULL; 470 - cpumask_t oldmask, newmask; 471 char name[32]; 472 473 sprintf(name, "threshold_bank%i", bank); ··· 525 526 per_cpu(threshold_banks, cpu)[bank] = b; 527 528 - affinity_set(cpu, &oldmask, &newmask); 529 - err = allocate_threshold_blocks(cpu, bank, 0, 530 - MSR_IA32_MC0_MISC + bank * 4); 531 - affinity_restore(&oldmask); 532 - 533 if (err) 534 goto out_free; 535
··· 83 * CPU Initialization 84 */ 85 86 + struct thresh_restart { 87 + struct threshold_block *b; 88 + int reset; 89 + u16 old_limit; 90 + }; 91 + 92 /* must be called with correct cpu affinity */ 93 + static long threshold_restart_bank(void *_tr) 94 { 95 + struct thresh_restart *tr = _tr; 96 u32 mci_misc_hi, mci_misc_lo; 97 98 + rdmsr(tr->b->address, mci_misc_lo, mci_misc_hi); 99 100 + if (tr->b->threshold_limit < (mci_misc_hi & THRESHOLD_MAX)) 101 + tr->reset = 1; /* limit cannot be lower than err count */ 102 103 + if (tr->reset) { /* reset err count and overflow bit */ 104 mci_misc_hi = 105 (mci_misc_hi & ~(MASK_ERR_COUNT_HI | MASK_OVERFLOW_HI)) | 106 + (THRESHOLD_MAX - tr->b->threshold_limit); 107 + } else if (tr->old_limit) { /* change limit w/o reset */ 108 int new_count = (mci_misc_hi & THRESHOLD_MAX) + 109 + (tr->old_limit - tr->b->threshold_limit); 110 mci_misc_hi = (mci_misc_hi & ~MASK_ERR_COUNT_HI) | 111 (new_count & THRESHOLD_MAX); 112 } 113 114 + tr->b->interrupt_enable ? 115 (mci_misc_hi = (mci_misc_hi & ~MASK_INT_TYPE_HI) | INT_TYPE_APIC) : 116 (mci_misc_hi &= ~MASK_INT_TYPE_HI); 117 118 mci_misc_hi |= MASK_COUNT_EN_HI; 119 + wrmsr(tr->b->address, mci_misc_lo, mci_misc_hi); 120 + return 0; 121 } 122 123 /* cpu init entry point, called from mce.c with preempt off */ ··· 120 unsigned int cpu = smp_processor_id(); 121 u8 lvt_off; 122 u32 low = 0, high = 0, address = 0; 123 + struct thresh_restart tr; 124 125 for (bank = 0; bank < NR_BANKS; ++bank) { 126 for (block = 0; block < NR_BLOCKS; ++block) { ··· 162 wrmsr(address, low, high); 163 164 threshold_defaults.address = address; 165 + tr.b = &threshold_defaults; 166 + tr.reset = 0; 167 + tr.old_limit = 0; 168 + threshold_restart_bank(&tr); 169 } 170 } 171 } ··· 251 ssize_t(*store) (struct threshold_block *, const char *, size_t count); 252 }; 253 254 #define SHOW_FIELDS(name) \ 255 static ssize_t show_ ## name(struct threshold_block * b, char *buf) \ 256 { \ ··· 277 const char *buf, size_t count) 278 { 279 char *end; 280 + struct thresh_restart tr; 281 unsigned long new = simple_strtoul(buf, &end, 0); 282 if (end == buf) 283 return -EINVAL; 284 b->interrupt_enable = !!new; 285 286 + tr.b = b; 287 + tr.reset = 0; 288 + tr.old_limit = 0; 289 + work_on_cpu(b->cpu, threshold_restart_bank, &tr); 290 291 return end - buf; 292 } ··· 294 const char *buf, size_t count) 295 { 296 char *end; 297 + struct thresh_restart tr; 298 unsigned long new = simple_strtoul(buf, &end, 0); 299 if (end == buf) 300 return -EINVAL; ··· 303 new = THRESHOLD_MAX; 304 if (new < 1) 305 new = 1; 306 + tr.old_limit = b->threshold_limit; 307 b->threshold_limit = new; 308 + tr.b = b; 309 + tr.reset = 0; 310 311 + work_on_cpu(b->cpu, threshold_restart_bank, &tr); 312 313 return end - buf; 314 } 315 316 + static long local_error_count(void *_b) 317 + { 318 + struct threshold_block *b = _b; 319 + u32 low, high; 320 + 321 + rdmsr(b->address, low, high); 322 + return (high & 0xFFF) - (THRESHOLD_MAX - b->threshold_limit); 323 + } 324 + 325 static ssize_t show_error_count(struct threshold_block *b, char *buf) 326 { 327 + return sprintf(buf, "%lx\n", work_on_cpu(b->cpu, local_error_count, b)); 328 } 329 330 static ssize_t store_error_count(struct threshold_block *b, 331 const char *buf, size_t count) 332 { 333 + struct thresh_restart tr = { .b = b, .reset = 1, .old_limit = 0 }; 334 + 335 + work_on_cpu(b->cpu, threshold_restart_bank, &tr); 336 return 1; 337 } 338 ··· 463 return err; 464 } 465 466 + static long local_allocate_threshold_blocks(void *_bank) 467 + { 468 + unsigned int *bank = _bank; 469 + 470 + return allocate_threshold_blocks(smp_processor_id(), *bank, 0, 471 + MSR_IA32_MC0_MISC + *bank * 4); 472 + } 473 + 474 /* symlinks sibling shared banks to first core. first core owns dir/files. */ 475 static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank) 476 { 477 int i, err = 0; 478 struct threshold_bank *b = NULL; 479 char name[32]; 480 481 sprintf(name, "threshold_bank%i", bank); ··· 519 520 per_cpu(threshold_banks, cpu)[bank] = b; 521 522 + err = work_on_cpu(cpu, local_allocate_threshold_blocks, &bank); 523 if (err) 524 goto out_free; 525
+81 -26
arch/x86/kernel/genapic_flat_64.c
··· 30 return 1; 31 } 32 33 - static cpumask_t flat_target_cpus(void) 34 { 35 - return cpu_online_map; 36 } 37 38 - static cpumask_t flat_vector_allocation_domain(int cpu) 39 { 40 /* Careful. Some cpus do not strictly honor the set of cpus 41 * specified in the interrupt destination when using lowest ··· 45 * deliver interrupts to the wrong hyperthread when only one 46 * hyperthread was specified in the interrupt desitination. 47 */ 48 - cpumask_t domain = { { [0] = APIC_ALL_CPUS, } }; 49 - return domain; 50 } 51 52 /* ··· 69 apic_write(APIC_LDR, val); 70 } 71 72 - static void flat_send_IPI_mask(cpumask_t cpumask, int vector) 73 { 74 - unsigned long mask = cpus_addr(cpumask)[0]; 75 unsigned long flags; 76 77 local_irq_save(flags); ··· 78 local_irq_restore(flags); 79 } 80 81 static void flat_send_IPI_allbutself(int vector) 82 { 83 #ifdef CONFIG_HOTPLUG_CPU 84 int hotplug = 1; 85 #else 86 int hotplug = 0; 87 #endif 88 if (hotplug || vector == NMI_VECTOR) { 89 - cpumask_t allbutme = cpu_online_map; 90 91 - cpu_clear(smp_processor_id(), allbutme); 92 93 - if (!cpus_empty(allbutme)) 94 - flat_send_IPI_mask(allbutme, vector); 95 } else if (num_online_cpus() > 1) { 96 __send_IPI_shortcut(APIC_DEST_ALLBUT, vector,APIC_DEST_LOGICAL); 97 } ··· 121 static void flat_send_IPI_all(int vector) 122 { 123 if (vector == NMI_VECTOR) 124 - flat_send_IPI_mask(cpu_online_map, vector); 125 else 126 __send_IPI_shortcut(APIC_DEST_ALLINC, vector, APIC_DEST_LOGICAL); 127 } ··· 155 return physid_isset(read_xapic_id(), phys_cpu_present_map); 156 } 157 158 - static unsigned int flat_cpu_mask_to_apicid(cpumask_t cpumask) 159 { 160 - return cpus_addr(cpumask)[0] & APIC_ALL_CPUS; 161 } 162 163 static unsigned int phys_pkg_id(int index_msb) ··· 186 .send_IPI_all = flat_send_IPI_all, 187 .send_IPI_allbutself = flat_send_IPI_allbutself, 188 .send_IPI_mask = flat_send_IPI_mask, 189 .send_IPI_self = apic_send_IPI_self, 190 .cpu_mask_to_apicid = flat_cpu_mask_to_apicid, 191 .phys_pkg_id = phys_pkg_id, 192 .get_apic_id = get_apic_id, 193 .set_apic_id = set_apic_id, ··· 219 return 0; 220 } 221 222 - static cpumask_t physflat_target_cpus(void) 223 { 224 - return cpu_online_map; 225 } 226 227 - static cpumask_t physflat_vector_allocation_domain(int cpu) 228 { 229 - return cpumask_of_cpu(cpu); 230 } 231 232 - static void physflat_send_IPI_mask(cpumask_t cpumask, int vector) 233 { 234 send_IPI_mask_sequence(cpumask, vector); 235 } 236 237 static void physflat_send_IPI_allbutself(int vector) 238 { 239 - cpumask_t allbutme = cpu_online_map; 240 - 241 - cpu_clear(smp_processor_id(), allbutme); 242 - physflat_send_IPI_mask(allbutme, vector); 243 } 244 245 static void physflat_send_IPI_all(int vector) 246 { 247 - physflat_send_IPI_mask(cpu_online_map, vector); 248 } 249 250 - static unsigned int physflat_cpu_mask_to_apicid(cpumask_t cpumask) 251 { 252 int cpu; 253 ··· 259 * We're using fixed IRQ delivery, can only return one phys APIC ID. 260 * May as well be the first. 261 */ 262 - cpu = first_cpu(cpumask); 263 if ((unsigned)cpu < nr_cpu_ids) 264 return per_cpu(x86_cpu_to_apicid, cpu); 265 else 266 return BAD_APICID; 267 } 268 269 struct genapic apic_physflat = { ··· 296 .send_IPI_all = physflat_send_IPI_all, 297 .send_IPI_allbutself = physflat_send_IPI_allbutself, 298 .send_IPI_mask = physflat_send_IPI_mask, 299 .send_IPI_self = apic_send_IPI_self, 300 .cpu_mask_to_apicid = physflat_cpu_mask_to_apicid, 301 .phys_pkg_id = phys_pkg_id, 302 .get_apic_id = get_apic_id, 303 .set_apic_id = set_apic_id,
··· 30 return 1; 31 } 32 33 + static const struct cpumask *flat_target_cpus(void) 34 { 35 + return cpu_online_mask; 36 } 37 38 + static void flat_vector_allocation_domain(int cpu, struct cpumask *retmask) 39 { 40 /* Careful. Some cpus do not strictly honor the set of cpus 41 * specified in the interrupt destination when using lowest ··· 45 * deliver interrupts to the wrong hyperthread when only one 46 * hyperthread was specified in the interrupt desitination. 47 */ 48 + cpumask_clear(retmask); 49 + cpumask_bits(retmask)[0] = APIC_ALL_CPUS; 50 } 51 52 /* ··· 69 apic_write(APIC_LDR, val); 70 } 71 72 + static inline void _flat_send_IPI_mask(unsigned long mask, int vector) 73 { 74 unsigned long flags; 75 76 local_irq_save(flags); ··· 79 local_irq_restore(flags); 80 } 81 82 + static void flat_send_IPI_mask(const struct cpumask *cpumask, int vector) 83 + { 84 + unsigned long mask = cpumask_bits(cpumask)[0]; 85 + 86 + _flat_send_IPI_mask(mask, vector); 87 + } 88 + 89 + static void flat_send_IPI_mask_allbutself(const struct cpumask *cpumask, 90 + int vector) 91 + { 92 + unsigned long mask = cpumask_bits(cpumask)[0]; 93 + int cpu = smp_processor_id(); 94 + 95 + if (cpu < BITS_PER_LONG) 96 + clear_bit(cpu, &mask); 97 + _flat_send_IPI_mask(mask, vector); 98 + } 99 + 100 static void flat_send_IPI_allbutself(int vector) 101 { 102 + int cpu = smp_processor_id(); 103 #ifdef CONFIG_HOTPLUG_CPU 104 int hotplug = 1; 105 #else 106 int hotplug = 0; 107 #endif 108 if (hotplug || vector == NMI_VECTOR) { 109 + if (!cpumask_equal(cpu_online_mask, cpumask_of(cpu))) { 110 + unsigned long mask = cpumask_bits(cpu_online_mask)[0]; 111 112 + if (cpu < BITS_PER_LONG) 113 + clear_bit(cpu, &mask); 114 115 + _flat_send_IPI_mask(mask, vector); 116 + } 117 } else if (num_online_cpus() > 1) { 118 __send_IPI_shortcut(APIC_DEST_ALLBUT, vector,APIC_DEST_LOGICAL); 119 } ··· 101 static void flat_send_IPI_all(int vector) 102 { 103 if (vector == NMI_VECTOR) 104 + flat_send_IPI_mask(cpu_online_mask, vector); 105 else 106 __send_IPI_shortcut(APIC_DEST_ALLINC, vector, APIC_DEST_LOGICAL); 107 } ··· 135 return physid_isset(read_xapic_id(), phys_cpu_present_map); 136 } 137 138 + static unsigned int flat_cpu_mask_to_apicid(const struct cpumask *cpumask) 139 { 140 + return cpumask_bits(cpumask)[0] & APIC_ALL_CPUS; 141 + } 142 + 143 + static unsigned int flat_cpu_mask_to_apicid_and(const struct cpumask *cpumask, 144 + const struct cpumask *andmask) 145 + { 146 + unsigned long mask1 = cpumask_bits(cpumask)[0] & APIC_ALL_CPUS; 147 + unsigned long mask2 = cpumask_bits(andmask)[0] & APIC_ALL_CPUS; 148 + 149 + return mask1 & mask2; 150 } 151 152 static unsigned int phys_pkg_id(int index_msb) ··· 157 .send_IPI_all = flat_send_IPI_all, 158 .send_IPI_allbutself = flat_send_IPI_allbutself, 159 .send_IPI_mask = flat_send_IPI_mask, 160 + .send_IPI_mask_allbutself = flat_send_IPI_mask_allbutself, 161 .send_IPI_self = apic_send_IPI_self, 162 .cpu_mask_to_apicid = flat_cpu_mask_to_apicid, 163 + .cpu_mask_to_apicid_and = flat_cpu_mask_to_apicid_and, 164 .phys_pkg_id = phys_pkg_id, 165 .get_apic_id = get_apic_id, 166 .set_apic_id = set_apic_id, ··· 188 return 0; 189 } 190 191 + static const struct cpumask *physflat_target_cpus(void) 192 { 193 + return cpu_online_mask; 194 } 195 196 + static void physflat_vector_allocation_domain(int cpu, struct cpumask *retmask) 197 { 198 + cpumask_clear(retmask); 199 + cpumask_set_cpu(cpu, retmask); 200 } 201 202 + static void physflat_send_IPI_mask(const struct cpumask *cpumask, int vector) 203 { 204 send_IPI_mask_sequence(cpumask, vector); 205 } 206 207 + static void physflat_send_IPI_mask_allbutself(const struct cpumask *cpumask, 208 + int vector) 209 + { 210 + send_IPI_mask_allbutself(cpumask, vector); 211 + } 212 + 213 static void physflat_send_IPI_allbutself(int vector) 214 { 215 + send_IPI_mask_allbutself(cpu_online_mask, vector); 216 } 217 218 static void physflat_send_IPI_all(int vector) 219 { 220 + physflat_send_IPI_mask(cpu_online_mask, vector); 221 } 222 223 + static unsigned int physflat_cpu_mask_to_apicid(const struct cpumask *cpumask) 224 { 225 int cpu; 226 ··· 224 * We're using fixed IRQ delivery, can only return one phys APIC ID. 225 * May as well be the first. 226 */ 227 + cpu = cpumask_first(cpumask); 228 if ((unsigned)cpu < nr_cpu_ids) 229 return per_cpu(x86_cpu_to_apicid, cpu); 230 else 231 return BAD_APICID; 232 + } 233 + 234 + static unsigned int 235 + physflat_cpu_mask_to_apicid_and(const struct cpumask *cpumask, 236 + const struct cpumask *andmask) 237 + { 238 + int cpu; 239 + 240 + /* 241 + * We're using fixed IRQ delivery, can only return one phys APIC ID. 242 + * May as well be the first. 243 + */ 244 + for_each_cpu_and(cpu, cpumask, andmask) 245 + if (cpumask_test_cpu(cpu, cpu_online_mask)) 246 + break; 247 + if (cpu < nr_cpu_ids) 248 + return per_cpu(x86_cpu_to_apicid, cpu); 249 + return BAD_APICID; 250 } 251 252 struct genapic apic_physflat = { ··· 243 .send_IPI_all = physflat_send_IPI_all, 244 .send_IPI_allbutself = physflat_send_IPI_allbutself, 245 .send_IPI_mask = physflat_send_IPI_mask, 246 + .send_IPI_mask_allbutself = physflat_send_IPI_mask_allbutself, 247 .send_IPI_self = apic_send_IPI_self, 248 .cpu_mask_to_apicid = physflat_cpu_mask_to_apicid, 249 + .cpu_mask_to_apicid_and = physflat_cpu_mask_to_apicid_and, 250 .phys_pkg_id = phys_pkg_id, 251 .get_apic_id = get_apic_id, 252 .set_apic_id = set_apic_id,
+60 -21
arch/x86/kernel/genx2apic_cluster.c
··· 22 23 /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ 24 25 - static cpumask_t x2apic_target_cpus(void) 26 { 27 - return cpumask_of_cpu(0); 28 } 29 30 /* 31 * for now each logical cpu is in its own vector allocation domain. 32 */ 33 - static cpumask_t x2apic_vector_allocation_domain(int cpu) 34 { 35 - cpumask_t domain = CPU_MASK_NONE; 36 - cpu_set(cpu, domain); 37 - return domain; 38 } 39 40 static void __x2apic_send_IPI_dest(unsigned int apicid, int vector, ··· 55 * at once. We have 16 cpu's in a cluster. This will minimize IPI register 56 * writes. 57 */ 58 - static void x2apic_send_IPI_mask(cpumask_t mask, int vector) 59 { 60 unsigned long flags; 61 unsigned long query_cpu; 62 63 local_irq_save(flags); 64 - for_each_cpu_mask(query_cpu, mask) { 65 - __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_logical_apicid, query_cpu), 66 - vector, APIC_DEST_LOGICAL); 67 - } 68 local_irq_restore(flags); 69 } 70 71 static void x2apic_send_IPI_allbutself(int vector) 72 { 73 - cpumask_t mask = cpu_online_map; 74 75 - cpu_clear(smp_processor_id(), mask); 76 - 77 - if (!cpus_empty(mask)) 78 - x2apic_send_IPI_mask(mask, vector); 79 } 80 81 static void x2apic_send_IPI_all(int vector) 82 { 83 - x2apic_send_IPI_mask(cpu_online_map, vector); 84 } 85 86 static int x2apic_apic_id_registered(void) ··· 109 return 1; 110 } 111 112 - static unsigned int x2apic_cpu_mask_to_apicid(cpumask_t cpumask) 113 { 114 int cpu; 115 116 /* 117 - * We're using fixed IRQ delivery, can only return one phys APIC ID. 118 * May as well be the first. 119 */ 120 - cpu = first_cpu(cpumask); 121 - if ((unsigned)cpu < NR_CPUS) 122 return per_cpu(x86_cpu_to_logical_apicid, cpu); 123 else 124 return BAD_APICID; 125 } 126 127 static unsigned int get_apic_id(unsigned long x) ··· 187 .send_IPI_all = x2apic_send_IPI_all, 188 .send_IPI_allbutself = x2apic_send_IPI_allbutself, 189 .send_IPI_mask = x2apic_send_IPI_mask, 190 .send_IPI_self = x2apic_send_IPI_self, 191 .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid, 192 .phys_pkg_id = phys_pkg_id, 193 .get_apic_id = get_apic_id, 194 .set_apic_id = set_apic_id,
··· 22 23 /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ 24 25 + static const struct cpumask *x2apic_target_cpus(void) 26 { 27 + return cpumask_of(0); 28 } 29 30 /* 31 * for now each logical cpu is in its own vector allocation domain. 32 */ 33 + static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask) 34 { 35 + cpumask_clear(retmask); 36 + cpumask_set_cpu(cpu, retmask); 37 } 38 39 static void __x2apic_send_IPI_dest(unsigned int apicid, int vector, ··· 56 * at once. We have 16 cpu's in a cluster. This will minimize IPI register 57 * writes. 58 */ 59 + static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector) 60 { 61 unsigned long flags; 62 unsigned long query_cpu; 63 64 local_irq_save(flags); 65 + for_each_cpu(query_cpu, mask) 66 + __x2apic_send_IPI_dest( 67 + per_cpu(x86_cpu_to_logical_apicid, query_cpu), 68 + vector, APIC_DEST_LOGICAL); 69 + local_irq_restore(flags); 70 + } 71 + 72 + static void x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, 73 + int vector) 74 + { 75 + unsigned long flags; 76 + unsigned long query_cpu; 77 + unsigned long this_cpu = smp_processor_id(); 78 + 79 + local_irq_save(flags); 80 + for_each_cpu(query_cpu, mask) 81 + if (query_cpu != this_cpu) 82 + __x2apic_send_IPI_dest( 83 + per_cpu(x86_cpu_to_logical_apicid, query_cpu), 84 + vector, APIC_DEST_LOGICAL); 85 local_irq_restore(flags); 86 } 87 88 static void x2apic_send_IPI_allbutself(int vector) 89 { 90 + unsigned long flags; 91 + unsigned long query_cpu; 92 + unsigned long this_cpu = smp_processor_id(); 93 94 + local_irq_save(flags); 95 + for_each_online_cpu(query_cpu) 96 + if (query_cpu != this_cpu) 97 + __x2apic_send_IPI_dest( 98 + per_cpu(x86_cpu_to_logical_apicid, query_cpu), 99 + vector, APIC_DEST_LOGICAL); 100 + local_irq_restore(flags); 101 } 102 103 static void x2apic_send_IPI_all(int vector) 104 { 105 + x2apic_send_IPI_mask(cpu_online_mask, vector); 106 } 107 108 static int x2apic_apic_id_registered(void) ··· 89 return 1; 90 } 91 92 + static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask) 93 { 94 int cpu; 95 96 /* 97 + * We're using fixed IRQ delivery, can only return one logical APIC ID. 98 * May as well be the first. 99 */ 100 + cpu = cpumask_first(cpumask); 101 + if ((unsigned)cpu < nr_cpu_ids) 102 return per_cpu(x86_cpu_to_logical_apicid, cpu); 103 else 104 return BAD_APICID; 105 + } 106 + 107 + static unsigned int x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask, 108 + const struct cpumask *andmask) 109 + { 110 + int cpu; 111 + 112 + /* 113 + * We're using fixed IRQ delivery, can only return one logical APIC ID. 114 + * May as well be the first. 115 + */ 116 + for_each_cpu_and(cpu, cpumask, andmask) 117 + if (cpumask_test_cpu(cpu, cpu_online_mask)) 118 + break; 119 + if (cpu < nr_cpu_ids) 120 + return per_cpu(x86_cpu_to_logical_apicid, cpu); 121 + return BAD_APICID; 122 } 123 124 static unsigned int get_apic_id(unsigned long x) ··· 150 .send_IPI_all = x2apic_send_IPI_all, 151 .send_IPI_allbutself = x2apic_send_IPI_allbutself, 152 .send_IPI_mask = x2apic_send_IPI_mask, 153 + .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself, 154 .send_IPI_self = x2apic_send_IPI_self, 155 .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid, 156 + .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and, 157 .phys_pkg_id = phys_pkg_id, 158 .get_apic_id = get_apic_id, 159 .set_apic_id = set_apic_id,
+57 -17
arch/x86/kernel/genx2apic_phys.c
··· 29 30 /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ 31 32 - static cpumask_t x2apic_target_cpus(void) 33 { 34 - return cpumask_of_cpu(0); 35 } 36 37 - static cpumask_t x2apic_vector_allocation_domain(int cpu) 38 { 39 - cpumask_t domain = CPU_MASK_NONE; 40 - cpu_set(cpu, domain); 41 - return domain; 42 } 43 44 static void __x2apic_send_IPI_dest(unsigned int apicid, int vector, ··· 53 x2apic_icr_write(cfg, apicid); 54 } 55 56 - static void x2apic_send_IPI_mask(cpumask_t mask, int vector) 57 { 58 unsigned long flags; 59 unsigned long query_cpu; 60 61 local_irq_save(flags); 62 - for_each_cpu_mask(query_cpu, mask) { 63 __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu), 64 vector, APIC_DEST_PHYSICAL); 65 } 66 local_irq_restore(flags); 67 } 68 69 static void x2apic_send_IPI_allbutself(int vector) 70 { 71 - cpumask_t mask = cpu_online_map; 72 73 - cpu_clear(smp_processor_id(), mask); 74 - 75 - if (!cpus_empty(mask)) 76 - x2apic_send_IPI_mask(mask, vector); 77 } 78 79 static void x2apic_send_IPI_all(int vector) 80 { 81 - x2apic_send_IPI_mask(cpu_online_map, vector); 82 } 83 84 static int x2apic_apic_id_registered(void) ··· 108 return 1; 109 } 110 111 - static unsigned int x2apic_cpu_mask_to_apicid(cpumask_t cpumask) 112 { 113 int cpu; 114 ··· 116 * We're using fixed IRQ delivery, can only return one phys APIC ID. 117 * May as well be the first. 118 */ 119 - cpu = first_cpu(cpumask); 120 - if ((unsigned)cpu < NR_CPUS) 121 return per_cpu(x86_cpu_to_apicid, cpu); 122 else 123 return BAD_APICID; 124 } 125 126 static unsigned int get_apic_id(unsigned long x) ··· 183 .send_IPI_all = x2apic_send_IPI_all, 184 .send_IPI_allbutself = x2apic_send_IPI_allbutself, 185 .send_IPI_mask = x2apic_send_IPI_mask, 186 .send_IPI_self = x2apic_send_IPI_self, 187 .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid, 188 .phys_pkg_id = phys_pkg_id, 189 .get_apic_id = get_apic_id, 190 .set_apic_id = set_apic_id,
··· 29 30 /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ 31 32 + static const struct cpumask *x2apic_target_cpus(void) 33 { 34 + return cpumask_of(0); 35 } 36 37 + static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask) 38 { 39 + cpumask_clear(retmask); 40 + cpumask_set_cpu(cpu, retmask); 41 } 42 43 static void __x2apic_send_IPI_dest(unsigned int apicid, int vector, ··· 54 x2apic_icr_write(cfg, apicid); 55 } 56 57 + static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector) 58 { 59 unsigned long flags; 60 unsigned long query_cpu; 61 62 local_irq_save(flags); 63 + for_each_cpu(query_cpu, mask) { 64 __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu), 65 vector, APIC_DEST_PHYSICAL); 66 } 67 local_irq_restore(flags); 68 } 69 70 + static void x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, 71 + int vector) 72 + { 73 + unsigned long flags; 74 + unsigned long query_cpu; 75 + unsigned long this_cpu = smp_processor_id(); 76 + 77 + local_irq_save(flags); 78 + for_each_cpu(query_cpu, mask) { 79 + if (query_cpu != this_cpu) 80 + __x2apic_send_IPI_dest( 81 + per_cpu(x86_cpu_to_apicid, query_cpu), 82 + vector, APIC_DEST_PHYSICAL); 83 + } 84 + local_irq_restore(flags); 85 + } 86 + 87 static void x2apic_send_IPI_allbutself(int vector) 88 { 89 + unsigned long flags; 90 + unsigned long query_cpu; 91 + unsigned long this_cpu = smp_processor_id(); 92 93 + local_irq_save(flags); 94 + for_each_online_cpu(query_cpu) 95 + if (query_cpu != this_cpu) 96 + __x2apic_send_IPI_dest( 97 + per_cpu(x86_cpu_to_apicid, query_cpu), 98 + vector, APIC_DEST_PHYSICAL); 99 + local_irq_restore(flags); 100 } 101 102 static void x2apic_send_IPI_all(int vector) 103 { 104 + x2apic_send_IPI_mask(cpu_online_mask, vector); 105 } 106 107 static int x2apic_apic_id_registered(void) ··· 87 return 1; 88 } 89 90 + static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask) 91 { 92 int cpu; 93 ··· 95 * We're using fixed IRQ delivery, can only return one phys APIC ID. 96 * May as well be the first. 97 */ 98 + cpu = cpumask_first(cpumask); 99 + if ((unsigned)cpu < nr_cpu_ids) 100 return per_cpu(x86_cpu_to_apicid, cpu); 101 else 102 return BAD_APICID; 103 + } 104 + 105 + static unsigned int x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask, 106 + const struct cpumask *andmask) 107 + { 108 + int cpu; 109 + 110 + /* 111 + * We're using fixed IRQ delivery, can only return one phys APIC ID. 112 + * May as well be the first. 113 + */ 114 + for_each_cpu_and(cpu, cpumask, andmask) 115 + if (cpumask_test_cpu(cpu, cpu_online_mask)) 116 + break; 117 + if (cpu < nr_cpu_ids) 118 + return per_cpu(x86_cpu_to_apicid, cpu); 119 + return BAD_APICID; 120 } 121 122 static unsigned int get_apic_id(unsigned long x) ··· 145 .send_IPI_all = x2apic_send_IPI_all, 146 .send_IPI_allbutself = x2apic_send_IPI_allbutself, 147 .send_IPI_mask = x2apic_send_IPI_mask, 148 + .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself, 149 .send_IPI_self = x2apic_send_IPI_self, 150 .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid, 151 + .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and, 152 .phys_pkg_id = phys_pkg_id, 153 .get_apic_id = get_apic_id, 154 .set_apic_id = set_apic_id,
+44 -17
arch/x86/kernel/genx2apic_uv_x.c
··· 79 80 /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ 81 82 - static cpumask_t uv_target_cpus(void) 83 { 84 - return cpumask_of_cpu(0); 85 } 86 87 - static cpumask_t uv_vector_allocation_domain(int cpu) 88 { 89 - cpumask_t domain = CPU_MASK_NONE; 90 - cpu_set(cpu, domain); 91 - return domain; 92 } 93 94 int uv_wakeup_secondary(int phys_apicid, unsigned int start_rip) ··· 126 uv_write_global_mmr64(pnode, UVH_IPI_INT, val); 127 } 128 129 - static void uv_send_IPI_mask(cpumask_t mask, int vector) 130 { 131 unsigned int cpu; 132 133 - for_each_possible_cpu(cpu) 134 - if (cpu_isset(cpu, mask)) 135 uv_send_IPI_one(cpu, vector); 136 } 137 138 static void uv_send_IPI_allbutself(int vector) 139 { 140 - cpumask_t mask = cpu_online_map; 141 142 - cpu_clear(smp_processor_id(), mask); 143 - 144 - if (!cpus_empty(mask)) 145 - uv_send_IPI_mask(mask, vector); 146 } 147 148 static void uv_send_IPI_all(int vector) 149 { 150 - uv_send_IPI_mask(cpu_online_map, vector); 151 } 152 153 static int uv_apic_id_registered(void) ··· 168 { 169 } 170 171 - static unsigned int uv_cpu_mask_to_apicid(cpumask_t cpumask) 172 { 173 int cpu; 174 ··· 176 * We're using fixed IRQ delivery, can only return one phys APIC ID. 177 * May as well be the first. 178 */ 179 - cpu = first_cpu(cpumask); 180 if ((unsigned)cpu < nr_cpu_ids) 181 return per_cpu(x86_cpu_to_apicid, cpu); 182 else 183 return BAD_APICID; 184 } 185 186 static unsigned int get_apic_id(unsigned long x) ··· 247 .send_IPI_all = uv_send_IPI_all, 248 .send_IPI_allbutself = uv_send_IPI_allbutself, 249 .send_IPI_mask = uv_send_IPI_mask, 250 .send_IPI_self = uv_send_IPI_self, 251 .cpu_mask_to_apicid = uv_cpu_mask_to_apicid, 252 .phys_pkg_id = phys_pkg_id, 253 .get_apic_id = get_apic_id, 254 .set_apic_id = set_apic_id,
··· 79 80 /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ 81 82 + static const struct cpumask *uv_target_cpus(void) 83 { 84 + return cpumask_of(0); 85 } 86 87 + static void uv_vector_allocation_domain(int cpu, struct cpumask *retmask) 88 { 89 + cpumask_clear(retmask); 90 + cpumask_set_cpu(cpu, retmask); 91 } 92 93 int uv_wakeup_secondary(int phys_apicid, unsigned int start_rip) ··· 127 uv_write_global_mmr64(pnode, UVH_IPI_INT, val); 128 } 129 130 + static void uv_send_IPI_mask(const struct cpumask *mask, int vector) 131 { 132 unsigned int cpu; 133 134 + for_each_cpu(cpu, mask) 135 + uv_send_IPI_one(cpu, vector); 136 + } 137 + 138 + static void uv_send_IPI_mask_allbutself(const struct cpumask *mask, int vector) 139 + { 140 + unsigned int cpu; 141 + unsigned int this_cpu = smp_processor_id(); 142 + 143 + for_each_cpu(cpu, mask) 144 + if (cpu != this_cpu) 145 uv_send_IPI_one(cpu, vector); 146 } 147 148 static void uv_send_IPI_allbutself(int vector) 149 { 150 + unsigned int cpu; 151 + unsigned int this_cpu = smp_processor_id(); 152 153 + for_each_online_cpu(cpu) 154 + if (cpu != this_cpu) 155 + uv_send_IPI_one(cpu, vector); 156 } 157 158 static void uv_send_IPI_all(int vector) 159 { 160 + uv_send_IPI_mask(cpu_online_mask, vector); 161 } 162 163 static int uv_apic_id_registered(void) ··· 160 { 161 } 162 163 + static unsigned int uv_cpu_mask_to_apicid(const struct cpumask *cpumask) 164 { 165 int cpu; 166 ··· 168 * We're using fixed IRQ delivery, can only return one phys APIC ID. 169 * May as well be the first. 170 */ 171 + cpu = cpumask_first(cpumask); 172 if ((unsigned)cpu < nr_cpu_ids) 173 return per_cpu(x86_cpu_to_apicid, cpu); 174 else 175 return BAD_APICID; 176 + } 177 + 178 + static unsigned int uv_cpu_mask_to_apicid_and(const struct cpumask *cpumask, 179 + const struct cpumask *andmask) 180 + { 181 + int cpu; 182 + 183 + /* 184 + * We're using fixed IRQ delivery, can only return one phys APIC ID. 185 + * May as well be the first. 186 + */ 187 + for_each_cpu_and(cpu, cpumask, andmask) 188 + if (cpumask_test_cpu(cpu, cpu_online_mask)) 189 + break; 190 + if (cpu < nr_cpu_ids) 191 + return per_cpu(x86_cpu_to_apicid, cpu); 192 + return BAD_APICID; 193 } 194 195 static unsigned int get_apic_id(unsigned long x) ··· 222 .send_IPI_all = uv_send_IPI_all, 223 .send_IPI_allbutself = uv_send_IPI_allbutself, 224 .send_IPI_mask = uv_send_IPI_mask, 225 + .send_IPI_mask_allbutself = uv_send_IPI_mask_allbutself, 226 .send_IPI_self = uv_send_IPI_self, 227 .cpu_mask_to_apicid = uv_cpu_mask_to_apicid, 228 + .cpu_mask_to_apicid_and = uv_cpu_mask_to_apicid_and, 229 .phys_pkg_id = phys_pkg_id, 230 .get_apic_id = get_apic_id, 231 .set_apic_id = set_apic_id,
+4 -4
arch/x86/kernel/hpet.c
··· 248 * Start hpet with the boot cpu mask and make it 249 * global after the IO_APIC has been initialized. 250 */ 251 - hpet_clockevent.cpumask = cpumask_of_cpu(smp_processor_id()); 252 clockevents_register_device(&hpet_clockevent); 253 global_clock_event = &hpet_clockevent; 254 printk(KERN_DEBUG "hpet clockevent registered\n"); ··· 303 struct hpet_dev *hdev = EVT_TO_HPET_DEV(evt); 304 hpet_setup_msi_irq(hdev->irq); 305 disable_irq(hdev->irq); 306 - irq_set_affinity(hdev->irq, cpumask_of_cpu(hdev->cpu)); 307 enable_irq(hdev->irq); 308 } 309 break; ··· 451 return -1; 452 453 disable_irq(dev->irq); 454 - irq_set_affinity(dev->irq, cpumask_of_cpu(dev->cpu)); 455 enable_irq(dev->irq); 456 457 printk(KERN_DEBUG "hpet: %s irq %d for MSI\n", ··· 502 /* 5 usec minimum reprogramming delta. */ 503 evt->min_delta_ns = 5000; 504 505 - evt->cpumask = cpumask_of_cpu(hdev->cpu); 506 clockevents_register_device(evt); 507 } 508
··· 248 * Start hpet with the boot cpu mask and make it 249 * global after the IO_APIC has been initialized. 250 */ 251 + hpet_clockevent.cpumask = cpumask_of(smp_processor_id()); 252 clockevents_register_device(&hpet_clockevent); 253 global_clock_event = &hpet_clockevent; 254 printk(KERN_DEBUG "hpet clockevent registered\n"); ··· 303 struct hpet_dev *hdev = EVT_TO_HPET_DEV(evt); 304 hpet_setup_msi_irq(hdev->irq); 305 disable_irq(hdev->irq); 306 + irq_set_affinity(hdev->irq, cpumask_of(hdev->cpu)); 307 enable_irq(hdev->irq); 308 } 309 break; ··· 451 return -1; 452 453 disable_irq(dev->irq); 454 + irq_set_affinity(dev->irq, cpumask_of(dev->cpu)); 455 enable_irq(dev->irq); 456 457 printk(KERN_DEBUG "hpet: %s irq %d for MSI\n", ··· 502 /* 5 usec minimum reprogramming delta. */ 503 evt->min_delta_ns = 5000; 504 505 + evt->cpumask = cpumask_of(hdev->cpu); 506 clockevents_register_device(evt); 507 } 508
+1 -1
arch/x86/kernel/i8253.c
··· 114 * Start pit with the boot cpu mask and make it global after the 115 * IO_APIC has been initialized. 116 */ 117 - pit_clockevent.cpumask = cpumask_of_cpu(smp_processor_id()); 118 pit_clockevent.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, 119 pit_clockevent.shift); 120 pit_clockevent.max_delta_ns =
··· 114 * Start pit with the boot cpu mask and make it global after the 115 * IO_APIC has been initialized. 116 */ 117 + pit_clockevent.cpumask = cpumask_of(smp_processor_id()); 118 pit_clockevent.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, 119 pit_clockevent.shift); 120 pit_clockevent.max_delta_ns =
+178 -192
arch/x86/kernel/io_apic.c
··· 136 137 struct irq_cfg { 138 struct irq_pin_list *irq_2_pin; 139 - cpumask_t domain; 140 - cpumask_t old_domain; 141 unsigned move_cleanup_count; 142 u8 vector; 143 u8 move_in_progress : 1; ··· 152 #else 153 static struct irq_cfg irq_cfgx[NR_IRQS] = { 154 #endif 155 - [0] = { .domain = CPU_MASK_ALL, .vector = IRQ0_VECTOR, }, 156 - [1] = { .domain = CPU_MASK_ALL, .vector = IRQ1_VECTOR, }, 157 - [2] = { .domain = CPU_MASK_ALL, .vector = IRQ2_VECTOR, }, 158 - [3] = { .domain = CPU_MASK_ALL, .vector = IRQ3_VECTOR, }, 159 - [4] = { .domain = CPU_MASK_ALL, .vector = IRQ4_VECTOR, }, 160 - [5] = { .domain = CPU_MASK_ALL, .vector = IRQ5_VECTOR, }, 161 - [6] = { .domain = CPU_MASK_ALL, .vector = IRQ6_VECTOR, }, 162 - [7] = { .domain = CPU_MASK_ALL, .vector = IRQ7_VECTOR, }, 163 - [8] = { .domain = CPU_MASK_ALL, .vector = IRQ8_VECTOR, }, 164 - [9] = { .domain = CPU_MASK_ALL, .vector = IRQ9_VECTOR, }, 165 - [10] = { .domain = CPU_MASK_ALL, .vector = IRQ10_VECTOR, }, 166 - [11] = { .domain = CPU_MASK_ALL, .vector = IRQ11_VECTOR, }, 167 - [12] = { .domain = CPU_MASK_ALL, .vector = IRQ12_VECTOR, }, 168 - [13] = { .domain = CPU_MASK_ALL, .vector = IRQ13_VECTOR, }, 169 - [14] = { .domain = CPU_MASK_ALL, .vector = IRQ14_VECTOR, }, 170 - [15] = { .domain = CPU_MASK_ALL, .vector = IRQ15_VECTOR, }, 171 }; 172 173 int __init arch_early_irq_init(void) ··· 183 for (i = 0; i < count; i++) { 184 desc = irq_to_desc(i); 185 desc->chip_data = &cfg[i]; 186 } 187 188 return 0; ··· 213 node = cpu_to_node(cpu); 214 215 cfg = kzalloc_node(sizeof(*cfg), GFP_ATOMIC, node); 216 printk(KERN_DEBUG " alloc irq_cfg on cpu %d node %d\n", cpu, node); 217 218 return cfg; ··· 351 } 352 } 353 354 - static void set_extra_move_desc(struct irq_desc *desc, cpumask_t mask) 355 { 356 struct irq_cfg *cfg = desc->chip_data; 357 358 if (!cfg->move_in_progress) { 359 /* it means that domain is not changed */ 360 - if (!cpus_intersects(desc->affinity, mask)) 361 cfg->move_desc_pending = 1; 362 } 363 } ··· 373 #endif 374 375 #ifndef CONFIG_NUMA_MIGRATE_IRQ_DESC 376 - static inline void set_extra_move_desc(struct irq_desc *desc, cpumask_t mask) 377 { 378 } 379 #endif ··· 505 } 506 507 #ifdef CONFIG_SMP 508 static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, struct irq_cfg *cfg) 509 { 510 int apic, pin; ··· 560 } 561 } 562 563 - static int assign_irq_vector(int irq, struct irq_cfg *cfg, cpumask_t mask); 564 565 - static void set_ioapic_affinity_irq_desc(struct irq_desc *desc, cpumask_t mask) 566 { 567 struct irq_cfg *cfg; 568 - unsigned long flags; 569 - unsigned int dest; 570 - cpumask_t tmp; 571 unsigned int irq; 572 573 - cpus_and(tmp, mask, cpu_online_map); 574 - if (cpus_empty(tmp)) 575 - return; 576 577 irq = desc->irq; 578 cfg = desc->chip_data; 579 if (assign_irq_vector(irq, cfg, mask)) 580 - return; 581 582 set_extra_move_desc(desc, mask); 583 584 - cpus_and(tmp, cfg->domain, mask); 585 - dest = cpu_mask_to_apicid(tmp); 586 - /* 587 - * Only the high 8 bits are valid. 588 - */ 589 - dest = SET_APIC_LOGICAL_ID(dest); 590 591 spin_lock_irqsave(&ioapic_lock, flags); 592 - __target_IO_APIC_irq(irq, dest, cfg); 593 - desc->affinity = mask; 594 spin_unlock_irqrestore(&ioapic_lock, flags); 595 } 596 597 - static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t mask) 598 { 599 struct irq_desc *desc; 600 ··· 1276 spin_unlock(&vector_lock); 1277 } 1278 1279 - static int __assign_irq_vector(int irq, struct irq_cfg *cfg, cpumask_t mask) 1280 { 1281 /* 1282 * NOTE! The local APIC isn't very good at handling ··· 1292 */ 1293 static int current_vector = FIRST_DEVICE_VECTOR, current_offset = 0; 1294 unsigned int old_vector; 1295 - int cpu; 1296 1297 if ((cfg->move_in_progress) || cfg->move_cleanup_count) 1298 return -EBUSY; 1299 1300 - /* Only try and allocate irqs on cpus that are present */ 1301 - cpus_and(mask, mask, cpu_online_map); 1302 1303 old_vector = cfg->vector; 1304 if (old_vector) { 1305 - cpumask_t tmp; 1306 - cpus_and(tmp, cfg->domain, mask); 1307 - if (!cpus_empty(tmp)) 1308 return 0; 1309 } 1310 1311 - for_each_cpu_mask_nr(cpu, mask) { 1312 - cpumask_t domain, new_mask; 1313 int new_cpu; 1314 int vector, offset; 1315 1316 - domain = vector_allocation_domain(cpu); 1317 - cpus_and(new_mask, domain, cpu_online_map); 1318 1319 vector = current_vector; 1320 offset = current_offset; 1321 next: 1322 vector += 8; 1323 if (vector >= first_system_vector) { 1324 - /* If we run out of vectors on large boxen, must share them. */ 1325 offset = (offset + 1) % 8; 1326 vector = FIRST_DEVICE_VECTOR + offset; 1327 } 1328 if (unlikely(current_vector == vector)) 1329 continue; 1330 - #ifdef CONFIG_X86_64 1331 - if (vector == IA32_SYSCALL_VECTOR) 1332 goto next; 1333 - #else 1334 - if (vector == SYSCALL_VECTOR) 1335 - goto next; 1336 - #endif 1337 - for_each_cpu_mask_nr(new_cpu, new_mask) 1338 if (per_cpu(vector_irq, new_cpu)[vector] != -1) 1339 goto next; 1340 /* Found one! */ ··· 1342 current_offset = offset; 1343 if (old_vector) { 1344 cfg->move_in_progress = 1; 1345 - cfg->old_domain = cfg->domain; 1346 } 1347 - for_each_cpu_mask_nr(new_cpu, new_mask) 1348 per_cpu(vector_irq, new_cpu)[vector] = irq; 1349 cfg->vector = vector; 1350 - cfg->domain = domain; 1351 - return 0; 1352 } 1353 - return -ENOSPC; 1354 } 1355 1356 - static int assign_irq_vector(int irq, struct irq_cfg *cfg, cpumask_t mask) 1357 { 1358 int err; 1359 unsigned long flags; ··· 1369 1370 static void __clear_irq_vector(int irq, struct irq_cfg *cfg) 1371 { 1372 - cpumask_t mask; 1373 int cpu, vector; 1374 1375 BUG_ON(!cfg->vector); 1376 1377 vector = cfg->vector; 1378 - cpus_and(mask, cfg->domain, cpu_online_map); 1379 - for_each_cpu_mask_nr(cpu, mask) 1380 per_cpu(vector_irq, cpu)[vector] = -1; 1381 1382 cfg->vector = 0; 1383 - cpus_clear(cfg->domain); 1384 1385 if (likely(!cfg->move_in_progress)) 1386 return; 1387 - cpus_and(mask, cfg->old_domain, cpu_online_map); 1388 - for_each_cpu_mask_nr(cpu, mask) { 1389 for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS; 1390 vector++) { 1391 if (per_cpu(vector_irq, cpu)[vector] != irq) ··· 1405 /* Mark the inuse vectors */ 1406 for_each_irq_desc(irq, desc) { 1407 cfg = desc->chip_data; 1408 - if (!cpu_isset(cpu, cfg->domain)) 1409 continue; 1410 vector = cfg->vector; 1411 per_cpu(vector_irq, cpu)[vector] = irq; ··· 1417 continue; 1418 1419 cfg = irq_cfg(irq); 1420 - if (!cpu_isset(cpu, cfg->domain)) 1421 per_cpu(vector_irq, cpu)[vector] = -1; 1422 } 1423 } ··· 1553 { 1554 struct irq_cfg *cfg; 1555 struct IO_APIC_route_entry entry; 1556 - cpumask_t mask; 1557 1558 if (!IO_APIC_IRQ(irq)) 1559 return; 1560 1561 cfg = desc->chip_data; 1562 1563 - mask = TARGET_CPUS; 1564 - if (assign_irq_vector(irq, cfg, mask)) 1565 return; 1566 1567 - cpus_and(mask, cfg->domain, mask); 1568 1569 apic_printk(APIC_VERBOSE,KERN_DEBUG 1570 "IOAPIC[%d]: Set routing entry (%d-%d -> 0x%x -> " ··· 1573 1574 1575 if (setup_ioapic_entry(mp_ioapics[apic].mp_apicid, irq, &entry, 1576 - cpu_mask_to_apicid(mask), trigger, polarity, 1577 - cfg->vector)) { 1578 printk("Failed to setup ioapic entry for ioapic %d, pin %d\n", 1579 mp_ioapics[apic].mp_apicid, pin); 1580 __clear_irq_vector(irq, cfg); ··· 2293 unsigned long flags; 2294 2295 spin_lock_irqsave(&vector_lock, flags); 2296 - send_IPI_mask(cpumask_of_cpu(first_cpu(cfg->domain)), cfg->vector); 2297 spin_unlock_irqrestore(&vector_lock, flags); 2298 2299 return 1; ··· 2342 * as simple as edge triggered migration and we can do the irq migration 2343 * with a simple atomic update to IO-APIC RTE. 2344 */ 2345 - static void migrate_ioapic_irq_desc(struct irq_desc *desc, cpumask_t mask) 2346 { 2347 struct irq_cfg *cfg; 2348 - cpumask_t tmp, cleanup_mask; 2349 struct irte irte; 2350 int modify_ioapic_rte; 2351 unsigned int dest; 2352 unsigned long flags; 2353 unsigned int irq; 2354 2355 - cpus_and(tmp, mask, cpu_online_map); 2356 - if (cpus_empty(tmp)) 2357 return; 2358 2359 irq = desc->irq; ··· 2365 2366 set_extra_move_desc(desc, mask); 2367 2368 - cpus_and(tmp, cfg->domain, mask); 2369 - dest = cpu_mask_to_apicid(tmp); 2370 2371 modify_ioapic_rte = desc->status & IRQ_LEVEL; 2372 if (modify_ioapic_rte) { ··· 2382 */ 2383 modify_irte(irq, &irte); 2384 2385 - if (cfg->move_in_progress) { 2386 - cpus_and(cleanup_mask, cfg->old_domain, cpu_online_map); 2387 - cfg->move_cleanup_count = cpus_weight(cleanup_mask); 2388 - send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR); 2389 - cfg->move_in_progress = 0; 2390 - } 2391 2392 - desc->affinity = mask; 2393 } 2394 2395 static int migrate_irq_remapped_level_desc(struct irq_desc *desc) ··· 2407 } 2408 2409 /* everthing is clear. we have right of way */ 2410 - migrate_ioapic_irq_desc(desc, desc->pending_mask); 2411 2412 ret = 0; 2413 desc->status &= ~IRQ_MOVE_PENDING; 2414 - cpus_clear(desc->pending_mask); 2415 2416 unmask: 2417 unmask_IO_APIC_irq_desc(desc); ··· 2436 continue; 2437 } 2438 2439 - desc->chip->set_affinity(irq, desc->pending_mask); 2440 spin_unlock_irqrestore(&desc->lock, flags); 2441 } 2442 } ··· 2445 /* 2446 * Migrates the IRQ destination in the process context. 2447 */ 2448 - static void set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc, cpumask_t mask) 2449 { 2450 if (desc->status & IRQ_LEVEL) { 2451 desc->status |= IRQ_MOVE_PENDING; 2452 - desc->pending_mask = mask; 2453 migrate_irq_remapped_level_desc(desc); 2454 return; 2455 } 2456 2457 migrate_ioapic_irq_desc(desc, mask); 2458 } 2459 - static void set_ir_ioapic_affinity_irq(unsigned int irq, cpumask_t mask) 2460 { 2461 struct irq_desc *desc = irq_to_desc(irq); 2462 ··· 2493 if (!cfg->move_cleanup_count) 2494 goto unlock; 2495 2496 - if ((vector == cfg->vector) && cpu_isset(me, cfg->domain)) 2497 goto unlock; 2498 2499 __get_cpu_var(vector_irq)[vector] = -1; ··· 2530 2531 vector = ~get_irq_regs()->orig_ax; 2532 me = smp_processor_id(); 2533 - if ((vector == cfg->vector) && cpu_isset(me, cfg->domain)) { 2534 - cpumask_t cleanup_mask; 2535 - 2536 #ifdef CONFIG_NUMA_MIGRATE_IRQ_DESC 2537 *descp = desc = move_irq_desc(desc, me); 2538 /* get the new one */ 2539 cfg = desc->chip_data; 2540 #endif 2541 2542 - cpus_and(cleanup_mask, cfg->old_domain, cpu_online_map); 2543 - cfg->move_cleanup_count = cpus_weight(cleanup_mask); 2544 - send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR); 2545 - cfg->move_in_progress = 0; 2546 - } 2547 } 2548 #else 2549 static inline void irq_complete_move(struct irq_desc **descp) {} ··· 3259 struct irq_cfg *cfg; 3260 int err; 3261 unsigned dest; 3262 - cpumask_t tmp; 3263 3264 cfg = irq_cfg(irq); 3265 - tmp = TARGET_CPUS; 3266 - err = assign_irq_vector(irq, cfg, tmp); 3267 if (err) 3268 return err; 3269 3270 - cpus_and(tmp, cfg->domain, tmp); 3271 - dest = cpu_mask_to_apicid(tmp); 3272 3273 #ifdef CONFIG_INTR_REMAP 3274 if (irq_remapped(irq)) { ··· 3319 } 3320 3321 #ifdef CONFIG_SMP 3322 - static void set_msi_irq_affinity(unsigned int irq, cpumask_t mask) 3323 { 3324 struct irq_desc *desc = irq_to_desc(irq); 3325 struct irq_cfg *cfg; 3326 struct msi_msg msg; 3327 unsigned int dest; 3328 - cpumask_t tmp; 3329 3330 - cpus_and(tmp, mask, cpu_online_map); 3331 - if (cpus_empty(tmp)) 3332 return; 3333 3334 cfg = desc->chip_data; 3335 - if (assign_irq_vector(irq, cfg, mask)) 3336 - return; 3337 - 3338 - set_extra_move_desc(desc, mask); 3339 - 3340 - cpus_and(tmp, cfg->domain, mask); 3341 - dest = cpu_mask_to_apicid(tmp); 3342 3343 read_msi_msg_desc(desc, &msg); 3344 ··· 3340 msg.address_lo |= MSI_ADDR_DEST_ID(dest); 3341 3342 write_msi_msg_desc(desc, &msg); 3343 - desc->affinity = mask; 3344 } 3345 #ifdef CONFIG_INTR_REMAP 3346 /* 3347 * Migrate the MSI irq to another cpumask. This migration is 3348 * done in the process context using interrupt-remapping hardware. 3349 */ 3350 - static void ir_set_msi_irq_affinity(unsigned int irq, cpumask_t mask) 3351 { 3352 struct irq_desc *desc = irq_to_desc(irq); 3353 - struct irq_cfg *cfg; 3354 unsigned int dest; 3355 - cpumask_t tmp, cleanup_mask; 3356 struct irte irte; 3357 - 3358 - cpus_and(tmp, mask, cpu_online_map); 3359 - if (cpus_empty(tmp)) 3360 - return; 3361 3362 if (get_irte(irq, &irte)) 3363 return; 3364 3365 - cfg = desc->chip_data; 3366 - if (assign_irq_vector(irq, cfg, mask)) 3367 return; 3368 - 3369 - set_extra_move_desc(desc, mask); 3370 - 3371 - cpus_and(tmp, cfg->domain, mask); 3372 - dest = cpu_mask_to_apicid(tmp); 3373 3374 irte.vector = cfg->vector; 3375 irte.dest_id = IRTE_DEST(dest); ··· 3374 * at the new destination. So, time to cleanup the previous 3375 * vector allocation. 3376 */ 3377 - if (cfg->move_in_progress) { 3378 - cpus_and(cleanup_mask, cfg->old_domain, cpu_online_map); 3379 - cfg->move_cleanup_count = cpus_weight(cleanup_mask); 3380 - send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR); 3381 - cfg->move_in_progress = 0; 3382 - } 3383 - 3384 - desc->affinity = mask; 3385 } 3386 3387 #endif ··· 3566 3567 #ifdef CONFIG_DMAR 3568 #ifdef CONFIG_SMP 3569 - static void dmar_msi_set_affinity(unsigned int irq, cpumask_t mask) 3570 { 3571 struct irq_desc *desc = irq_to_desc(irq); 3572 struct irq_cfg *cfg; 3573 struct msi_msg msg; 3574 unsigned int dest; 3575 - cpumask_t tmp; 3576 3577 - cpus_and(tmp, mask, cpu_online_map); 3578 - if (cpus_empty(tmp)) 3579 return; 3580 3581 cfg = desc->chip_data; 3582 - if (assign_irq_vector(irq, cfg, mask)) 3583 - return; 3584 - 3585 - set_extra_move_desc(desc, mask); 3586 - 3587 - cpus_and(tmp, cfg->domain, mask); 3588 - dest = cpu_mask_to_apicid(tmp); 3589 3590 dmar_msi_read(irq, &msg); 3591 ··· 3587 msg.address_lo |= MSI_ADDR_DEST_ID(dest); 3588 3589 dmar_msi_write(irq, &msg); 3590 - desc->affinity = mask; 3591 } 3592 3593 #endif /* CONFIG_SMP */ ··· 3620 #ifdef CONFIG_HPET_TIMER 3621 3622 #ifdef CONFIG_SMP 3623 - static void hpet_msi_set_affinity(unsigned int irq, cpumask_t mask) 3624 { 3625 struct irq_desc *desc = irq_to_desc(irq); 3626 struct irq_cfg *cfg; 3627 struct msi_msg msg; 3628 unsigned int dest; 3629 - cpumask_t tmp; 3630 3631 - cpus_and(tmp, mask, cpu_online_map); 3632 - if (cpus_empty(tmp)) 3633 return; 3634 3635 cfg = desc->chip_data; 3636 - if (assign_irq_vector(irq, cfg, mask)) 3637 - return; 3638 - 3639 - set_extra_move_desc(desc, mask); 3640 - 3641 - cpus_and(tmp, cfg->domain, mask); 3642 - dest = cpu_mask_to_apicid(tmp); 3643 3644 hpet_msi_read(irq, &msg); 3645 ··· 3641 msg.address_lo |= MSI_ADDR_DEST_ID(dest); 3642 3643 hpet_msi_write(irq, &msg); 3644 - desc->affinity = mask; 3645 } 3646 3647 #endif /* CONFIG_SMP */ ··· 3695 write_ht_irq_msg(irq, &msg); 3696 } 3697 3698 - static void set_ht_irq_affinity(unsigned int irq, cpumask_t mask) 3699 { 3700 struct irq_desc *desc = irq_to_desc(irq); 3701 struct irq_cfg *cfg; 3702 unsigned int dest; 3703 - cpumask_t tmp; 3704 3705 - cpus_and(tmp, mask, cpu_online_map); 3706 - if (cpus_empty(tmp)) 3707 return; 3708 3709 cfg = desc->chip_data; 3710 - if (assign_irq_vector(irq, cfg, mask)) 3711 - return; 3712 - 3713 - set_extra_move_desc(desc, mask); 3714 - 3715 - cpus_and(tmp, cfg->domain, mask); 3716 - dest = cpu_mask_to_apicid(tmp); 3717 3718 target_ht_irq(irq, dest, cfg->vector); 3719 - desc->affinity = mask; 3720 } 3721 3722 #endif ··· 3727 { 3728 struct irq_cfg *cfg; 3729 int err; 3730 - cpumask_t tmp; 3731 3732 cfg = irq_cfg(irq); 3733 - tmp = TARGET_CPUS; 3734 - err = assign_irq_vector(irq, cfg, tmp); 3735 if (!err) { 3736 struct ht_irq_msg msg; 3737 unsigned dest; 3738 3739 - cpus_and(tmp, cfg->domain, tmp); 3740 - dest = cpu_mask_to_apicid(tmp); 3741 3742 msg.address_hi = HT_IRQ_HIGH_DEST_ID(dest); 3743 ··· 3770 int arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade, 3771 unsigned long mmr_offset) 3772 { 3773 - const cpumask_t *eligible_cpu = get_cpu_mask(cpu); 3774 struct irq_cfg *cfg; 3775 int mmr_pnode; 3776 unsigned long mmr_value; ··· 3780 3781 cfg = irq_cfg(irq); 3782 3783 - err = assign_irq_vector(irq, cfg, *eligible_cpu); 3784 if (err != 0) 3785 return err; 3786 ··· 3799 entry->polarity = 0; 3800 entry->trigger = 0; 3801 entry->mask = 0; 3802 - entry->dest = cpu_mask_to_apicid(*eligible_cpu); 3803 3804 mmr_pnode = uv_blade_to_pnode(mmr_blade); 3805 uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value); ··· 4010 int pin, ioapic, irq, irq_entry; 4011 struct irq_desc *desc; 4012 struct irq_cfg *cfg; 4013 - cpumask_t mask; 4014 4015 if (skip_ioapic_setup == 1) 4016 return; ··· 4041 */ 4042 if (desc->status & 4043 (IRQ_NO_BALANCING | IRQ_AFFINITY_SET)) 4044 - mask = desc->affinity; 4045 else 4046 mask = TARGET_CPUS; 4047
··· 136 137 struct irq_cfg { 138 struct irq_pin_list *irq_2_pin; 139 + cpumask_var_t domain; 140 + cpumask_var_t old_domain; 141 unsigned move_cleanup_count; 142 u8 vector; 143 u8 move_in_progress : 1; ··· 152 #else 153 static struct irq_cfg irq_cfgx[NR_IRQS] = { 154 #endif 155 + [0] = { .vector = IRQ0_VECTOR, }, 156 + [1] = { .vector = IRQ1_VECTOR, }, 157 + [2] = { .vector = IRQ2_VECTOR, }, 158 + [3] = { .vector = IRQ3_VECTOR, }, 159 + [4] = { .vector = IRQ4_VECTOR, }, 160 + [5] = { .vector = IRQ5_VECTOR, }, 161 + [6] = { .vector = IRQ6_VECTOR, }, 162 + [7] = { .vector = IRQ7_VECTOR, }, 163 + [8] = { .vector = IRQ8_VECTOR, }, 164 + [9] = { .vector = IRQ9_VECTOR, }, 165 + [10] = { .vector = IRQ10_VECTOR, }, 166 + [11] = { .vector = IRQ11_VECTOR, }, 167 + [12] = { .vector = IRQ12_VECTOR, }, 168 + [13] = { .vector = IRQ13_VECTOR, }, 169 + [14] = { .vector = IRQ14_VECTOR, }, 170 + [15] = { .vector = IRQ15_VECTOR, }, 171 }; 172 173 int __init arch_early_irq_init(void) ··· 183 for (i = 0; i < count; i++) { 184 desc = irq_to_desc(i); 185 desc->chip_data = &cfg[i]; 186 + alloc_bootmem_cpumask_var(&cfg[i].domain); 187 + alloc_bootmem_cpumask_var(&cfg[i].old_domain); 188 + if (i < NR_IRQS_LEGACY) 189 + cpumask_setall(cfg[i].domain); 190 } 191 192 return 0; ··· 209 node = cpu_to_node(cpu); 210 211 cfg = kzalloc_node(sizeof(*cfg), GFP_ATOMIC, node); 212 + if (cfg) { 213 + /* FIXME: needs alloc_cpumask_var_node() */ 214 + if (!alloc_cpumask_var(&cfg->domain, GFP_ATOMIC)) { 215 + kfree(cfg); 216 + cfg = NULL; 217 + } else if (!alloc_cpumask_var(&cfg->old_domain, GFP_ATOMIC)) { 218 + free_cpumask_var(cfg->domain); 219 + kfree(cfg); 220 + cfg = NULL; 221 + } else { 222 + cpumask_clear(cfg->domain); 223 + cpumask_clear(cfg->old_domain); 224 + } 225 + } 226 printk(KERN_DEBUG " alloc irq_cfg on cpu %d node %d\n", cpu, node); 227 228 return cfg; ··· 333 } 334 } 335 336 + static void 337 + set_extra_move_desc(struct irq_desc *desc, const struct cpumask *mask) 338 { 339 struct irq_cfg *cfg = desc->chip_data; 340 341 if (!cfg->move_in_progress) { 342 /* it means that domain is not changed */ 343 + if (!cpumask_intersects(&desc->affinity, mask)) 344 cfg->move_desc_pending = 1; 345 } 346 } ··· 354 #endif 355 356 #ifndef CONFIG_NUMA_MIGRATE_IRQ_DESC 357 + static inline void 358 + set_extra_move_desc(struct irq_desc *desc, const struct cpumask *mask) 359 { 360 } 361 #endif ··· 485 } 486 487 #ifdef CONFIG_SMP 488 + static void send_cleanup_vector(struct irq_cfg *cfg) 489 + { 490 + cpumask_var_t cleanup_mask; 491 + 492 + if (unlikely(!alloc_cpumask_var(&cleanup_mask, GFP_ATOMIC))) { 493 + unsigned int i; 494 + cfg->move_cleanup_count = 0; 495 + for_each_cpu_and(i, cfg->old_domain, cpu_online_mask) 496 + cfg->move_cleanup_count++; 497 + for_each_cpu_and(i, cfg->old_domain, cpu_online_mask) 498 + send_IPI_mask(cpumask_of(i), IRQ_MOVE_CLEANUP_VECTOR); 499 + } else { 500 + cpumask_and(cleanup_mask, cfg->old_domain, cpu_online_mask); 501 + cfg->move_cleanup_count = cpumask_weight(cleanup_mask); 502 + send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR); 503 + free_cpumask_var(cleanup_mask); 504 + } 505 + cfg->move_in_progress = 0; 506 + } 507 + 508 static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, struct irq_cfg *cfg) 509 { 510 int apic, pin; ··· 520 } 521 } 522 523 + static int 524 + assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask); 525 526 + /* 527 + * Either sets desc->affinity to a valid value, and returns cpu_mask_to_apicid 528 + * of that, or returns BAD_APICID and leaves desc->affinity untouched. 529 + */ 530 + static unsigned int 531 + set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask) 532 { 533 struct irq_cfg *cfg; 534 unsigned int irq; 535 536 + if (!cpumask_intersects(mask, cpu_online_mask)) 537 + return BAD_APICID; 538 539 irq = desc->irq; 540 cfg = desc->chip_data; 541 if (assign_irq_vector(irq, cfg, mask)) 542 + return BAD_APICID; 543 544 + cpumask_and(&desc->affinity, cfg->domain, mask); 545 set_extra_move_desc(desc, mask); 546 + return cpu_mask_to_apicid_and(&desc->affinity, cpu_online_mask); 547 + } 548 549 + static void 550 + set_ioapic_affinity_irq_desc(struct irq_desc *desc, const struct cpumask *mask) 551 + { 552 + struct irq_cfg *cfg; 553 + unsigned long flags; 554 + unsigned int dest; 555 + unsigned int irq; 556 + 557 + irq = desc->irq; 558 + cfg = desc->chip_data; 559 560 spin_lock_irqsave(&ioapic_lock, flags); 561 + dest = set_desc_affinity(desc, mask); 562 + if (dest != BAD_APICID) { 563 + /* Only the high 8 bits are valid. */ 564 + dest = SET_APIC_LOGICAL_ID(dest); 565 + __target_IO_APIC_irq(irq, dest, cfg); 566 + } 567 spin_unlock_irqrestore(&ioapic_lock, flags); 568 } 569 570 + static void 571 + set_ioapic_affinity_irq(unsigned int irq, const struct cpumask *mask) 572 { 573 struct irq_desc *desc; 574 ··· 1222 spin_unlock(&vector_lock); 1223 } 1224 1225 + static int 1226 + __assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask) 1227 { 1228 /* 1229 * NOTE! The local APIC isn't very good at handling ··· 1237 */ 1238 static int current_vector = FIRST_DEVICE_VECTOR, current_offset = 0; 1239 unsigned int old_vector; 1240 + int cpu, err; 1241 + cpumask_var_t tmp_mask; 1242 1243 if ((cfg->move_in_progress) || cfg->move_cleanup_count) 1244 return -EBUSY; 1245 1246 + if (!alloc_cpumask_var(&tmp_mask, GFP_ATOMIC)) 1247 + return -ENOMEM; 1248 1249 old_vector = cfg->vector; 1250 if (old_vector) { 1251 + cpumask_and(tmp_mask, mask, cpu_online_mask); 1252 + cpumask_and(tmp_mask, cfg->domain, tmp_mask); 1253 + if (!cpumask_empty(tmp_mask)) { 1254 + free_cpumask_var(tmp_mask); 1255 return 0; 1256 + } 1257 } 1258 1259 + /* Only try and allocate irqs on cpus that are present */ 1260 + err = -ENOSPC; 1261 + for_each_cpu_and(cpu, mask, cpu_online_mask) { 1262 int new_cpu; 1263 int vector, offset; 1264 1265 + vector_allocation_domain(cpu, tmp_mask); 1266 1267 vector = current_vector; 1268 offset = current_offset; 1269 next: 1270 vector += 8; 1271 if (vector >= first_system_vector) { 1272 + /* If out of vectors on large boxen, must share them. */ 1273 offset = (offset + 1) % 8; 1274 vector = FIRST_DEVICE_VECTOR + offset; 1275 } 1276 if (unlikely(current_vector == vector)) 1277 continue; 1278 + 1279 + if (test_bit(vector, used_vectors)) 1280 goto next; 1281 + 1282 + for_each_cpu_and(new_cpu, tmp_mask, cpu_online_mask) 1283 if (per_cpu(vector_irq, new_cpu)[vector] != -1) 1284 goto next; 1285 /* Found one! */ ··· 1287 current_offset = offset; 1288 if (old_vector) { 1289 cfg->move_in_progress = 1; 1290 + cpumask_copy(cfg->old_domain, cfg->domain); 1291 } 1292 + for_each_cpu_and(new_cpu, tmp_mask, cpu_online_mask) 1293 per_cpu(vector_irq, new_cpu)[vector] = irq; 1294 cfg->vector = vector; 1295 + cpumask_copy(cfg->domain, tmp_mask); 1296 + err = 0; 1297 + break; 1298 } 1299 + free_cpumask_var(tmp_mask); 1300 + return err; 1301 } 1302 1303 + static int 1304 + assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask) 1305 { 1306 int err; 1307 unsigned long flags; ··· 1311 1312 static void __clear_irq_vector(int irq, struct irq_cfg *cfg) 1313 { 1314 int cpu, vector; 1315 1316 BUG_ON(!cfg->vector); 1317 1318 vector = cfg->vector; 1319 + for_each_cpu_and(cpu, cfg->domain, cpu_online_mask) 1320 per_cpu(vector_irq, cpu)[vector] = -1; 1321 1322 cfg->vector = 0; 1323 + cpumask_clear(cfg->domain); 1324 1325 if (likely(!cfg->move_in_progress)) 1326 return; 1327 + for_each_cpu_and(cpu, cfg->old_domain, cpu_online_mask) { 1328 for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS; 1329 vector++) { 1330 if (per_cpu(vector_irq, cpu)[vector] != irq) ··· 1350 /* Mark the inuse vectors */ 1351 for_each_irq_desc(irq, desc) { 1352 cfg = desc->chip_data; 1353 + if (!cpumask_test_cpu(cpu, cfg->domain)) 1354 continue; 1355 vector = cfg->vector; 1356 per_cpu(vector_irq, cpu)[vector] = irq; ··· 1362 continue; 1363 1364 cfg = irq_cfg(irq); 1365 + if (!cpumask_test_cpu(cpu, cfg->domain)) 1366 per_cpu(vector_irq, cpu)[vector] = -1; 1367 } 1368 } ··· 1498 { 1499 struct irq_cfg *cfg; 1500 struct IO_APIC_route_entry entry; 1501 + unsigned int dest; 1502 1503 if (!IO_APIC_IRQ(irq)) 1504 return; 1505 1506 cfg = desc->chip_data; 1507 1508 + if (assign_irq_vector(irq, cfg, TARGET_CPUS)) 1509 return; 1510 1511 + dest = cpu_mask_to_apicid_and(cfg->domain, TARGET_CPUS); 1512 1513 apic_printk(APIC_VERBOSE,KERN_DEBUG 1514 "IOAPIC[%d]: Set routing entry (%d-%d -> 0x%x -> " ··· 1519 1520 1521 if (setup_ioapic_entry(mp_ioapics[apic].mp_apicid, irq, &entry, 1522 + dest, trigger, polarity, cfg->vector)) { 1523 printk("Failed to setup ioapic entry for ioapic %d, pin %d\n", 1524 mp_ioapics[apic].mp_apicid, pin); 1525 __clear_irq_vector(irq, cfg); ··· 2240 unsigned long flags; 2241 2242 spin_lock_irqsave(&vector_lock, flags); 2243 + send_IPI_mask(cpumask_of(cpumask_first(cfg->domain)), cfg->vector); 2244 spin_unlock_irqrestore(&vector_lock, flags); 2245 2246 return 1; ··· 2289 * as simple as edge triggered migration and we can do the irq migration 2290 * with a simple atomic update to IO-APIC RTE. 2291 */ 2292 + static void 2293 + migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask) 2294 { 2295 struct irq_cfg *cfg; 2296 struct irte irte; 2297 int modify_ioapic_rte; 2298 unsigned int dest; 2299 unsigned long flags; 2300 unsigned int irq; 2301 2302 + if (!cpumask_intersects(mask, cpu_online_mask)) 2303 return; 2304 2305 irq = desc->irq; ··· 2313 2314 set_extra_move_desc(desc, mask); 2315 2316 + dest = cpu_mask_to_apicid_and(cfg->domain, mask); 2317 2318 modify_ioapic_rte = desc->status & IRQ_LEVEL; 2319 if (modify_ioapic_rte) { ··· 2331 */ 2332 modify_irte(irq, &irte); 2333 2334 + if (cfg->move_in_progress) 2335 + send_cleanup_vector(cfg); 2336 2337 + cpumask_copy(&desc->affinity, mask); 2338 } 2339 2340 static int migrate_irq_remapped_level_desc(struct irq_desc *desc) ··· 2360 } 2361 2362 /* everthing is clear. we have right of way */ 2363 + migrate_ioapic_irq_desc(desc, &desc->pending_mask); 2364 2365 ret = 0; 2366 desc->status &= ~IRQ_MOVE_PENDING; 2367 + cpumask_clear(&desc->pending_mask); 2368 2369 unmask: 2370 unmask_IO_APIC_irq_desc(desc); ··· 2389 continue; 2390 } 2391 2392 + desc->chip->set_affinity(irq, &desc->pending_mask); 2393 spin_unlock_irqrestore(&desc->lock, flags); 2394 } 2395 } ··· 2398 /* 2399 * Migrates the IRQ destination in the process context. 2400 */ 2401 + static void set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc, 2402 + const struct cpumask *mask) 2403 { 2404 if (desc->status & IRQ_LEVEL) { 2405 desc->status |= IRQ_MOVE_PENDING; 2406 + cpumask_copy(&desc->pending_mask, mask); 2407 migrate_irq_remapped_level_desc(desc); 2408 return; 2409 } 2410 2411 migrate_ioapic_irq_desc(desc, mask); 2412 } 2413 + static void set_ir_ioapic_affinity_irq(unsigned int irq, 2414 + const struct cpumask *mask) 2415 { 2416 struct irq_desc *desc = irq_to_desc(irq); 2417 ··· 2444 if (!cfg->move_cleanup_count) 2445 goto unlock; 2446 2447 + if (vector == cfg->vector && cpumask_test_cpu(me, cfg->domain)) 2448 goto unlock; 2449 2450 __get_cpu_var(vector_irq)[vector] = -1; ··· 2481 2482 vector = ~get_irq_regs()->orig_ax; 2483 me = smp_processor_id(); 2484 #ifdef CONFIG_NUMA_MIGRATE_IRQ_DESC 2485 *descp = desc = move_irq_desc(desc, me); 2486 /* get the new one */ 2487 cfg = desc->chip_data; 2488 #endif 2489 2490 + if (vector == cfg->vector && cpumask_test_cpu(me, cfg->domain)) 2491 + send_cleanup_vector(cfg); 2492 } 2493 #else 2494 static inline void irq_complete_move(struct irq_desc **descp) {} ··· 3216 struct irq_cfg *cfg; 3217 int err; 3218 unsigned dest; 3219 3220 cfg = irq_cfg(irq); 3221 + err = assign_irq_vector(irq, cfg, TARGET_CPUS); 3222 if (err) 3223 return err; 3224 3225 + dest = cpu_mask_to_apicid_and(cfg->domain, TARGET_CPUS); 3226 3227 #ifdef CONFIG_INTR_REMAP 3228 if (irq_remapped(irq)) { ··· 3279 } 3280 3281 #ifdef CONFIG_SMP 3282 + static void set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) 3283 { 3284 struct irq_desc *desc = irq_to_desc(irq); 3285 struct irq_cfg *cfg; 3286 struct msi_msg msg; 3287 unsigned int dest; 3288 3289 + dest = set_desc_affinity(desc, mask); 3290 + if (dest == BAD_APICID) 3291 return; 3292 3293 cfg = desc->chip_data; 3294 3295 read_msi_msg_desc(desc, &msg); 3296 ··· 3308 msg.address_lo |= MSI_ADDR_DEST_ID(dest); 3309 3310 write_msi_msg_desc(desc, &msg); 3311 } 3312 #ifdef CONFIG_INTR_REMAP 3313 /* 3314 * Migrate the MSI irq to another cpumask. This migration is 3315 * done in the process context using interrupt-remapping hardware. 3316 */ 3317 + static void 3318 + ir_set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) 3319 { 3320 struct irq_desc *desc = irq_to_desc(irq); 3321 + struct irq_cfg *cfg = desc->chip_data; 3322 unsigned int dest; 3323 struct irte irte; 3324 3325 if (get_irte(irq, &irte)) 3326 return; 3327 3328 + dest = set_desc_affinity(desc, mask); 3329 + if (dest == BAD_APICID) 3330 return; 3331 3332 irte.vector = cfg->vector; 3333 irte.dest_id = IRTE_DEST(dest); ··· 3352 * at the new destination. So, time to cleanup the previous 3353 * vector allocation. 3354 */ 3355 + if (cfg->move_in_progress) 3356 + send_cleanup_vector(cfg); 3357 } 3358 3359 #endif ··· 3550 3551 #ifdef CONFIG_DMAR 3552 #ifdef CONFIG_SMP 3553 + static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) 3554 { 3555 struct irq_desc *desc = irq_to_desc(irq); 3556 struct irq_cfg *cfg; 3557 struct msi_msg msg; 3558 unsigned int dest; 3559 3560 + dest = set_desc_affinity(desc, mask); 3561 + if (dest == BAD_APICID) 3562 return; 3563 3564 cfg = desc->chip_data; 3565 3566 dmar_msi_read(irq, &msg); 3567 ··· 3579 msg.address_lo |= MSI_ADDR_DEST_ID(dest); 3580 3581 dmar_msi_write(irq, &msg); 3582 } 3583 3584 #endif /* CONFIG_SMP */ ··· 3613 #ifdef CONFIG_HPET_TIMER 3614 3615 #ifdef CONFIG_SMP 3616 + static void hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask) 3617 { 3618 struct irq_desc *desc = irq_to_desc(irq); 3619 struct irq_cfg *cfg; 3620 struct msi_msg msg; 3621 unsigned int dest; 3622 3623 + dest = set_desc_affinity(desc, mask); 3624 + if (dest == BAD_APICID) 3625 return; 3626 3627 cfg = desc->chip_data; 3628 3629 hpet_msi_read(irq, &msg); 3630 ··· 3642 msg.address_lo |= MSI_ADDR_DEST_ID(dest); 3643 3644 hpet_msi_write(irq, &msg); 3645 } 3646 3647 #endif /* CONFIG_SMP */ ··· 3697 write_ht_irq_msg(irq, &msg); 3698 } 3699 3700 + static void set_ht_irq_affinity(unsigned int irq, const struct cpumask *mask) 3701 { 3702 struct irq_desc *desc = irq_to_desc(irq); 3703 struct irq_cfg *cfg; 3704 unsigned int dest; 3705 3706 + dest = set_desc_affinity(desc, mask); 3707 + if (dest == BAD_APICID) 3708 return; 3709 3710 cfg = desc->chip_data; 3711 3712 target_ht_irq(irq, dest, cfg->vector); 3713 } 3714 3715 #endif ··· 3738 { 3739 struct irq_cfg *cfg; 3740 int err; 3741 3742 cfg = irq_cfg(irq); 3743 + err = assign_irq_vector(irq, cfg, TARGET_CPUS); 3744 if (!err) { 3745 struct ht_irq_msg msg; 3746 unsigned dest; 3747 3748 + dest = cpu_mask_to_apicid_and(cfg->domain, TARGET_CPUS); 3749 3750 msg.address_hi = HT_IRQ_HIGH_DEST_ID(dest); 3751 ··· 3784 int arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade, 3785 unsigned long mmr_offset) 3786 { 3787 + const struct cpumask *eligible_cpu = cpumask_of(cpu); 3788 struct irq_cfg *cfg; 3789 int mmr_pnode; 3790 unsigned long mmr_value; ··· 3794 3795 cfg = irq_cfg(irq); 3796 3797 + err = assign_irq_vector(irq, cfg, eligible_cpu); 3798 if (err != 0) 3799 return err; 3800 ··· 3813 entry->polarity = 0; 3814 entry->trigger = 0; 3815 entry->mask = 0; 3816 + entry->dest = cpu_mask_to_apicid(eligible_cpu); 3817 3818 mmr_pnode = uv_blade_to_pnode(mmr_blade); 3819 uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value); ··· 4024 int pin, ioapic, irq, irq_entry; 4025 struct irq_desc *desc; 4026 struct irq_cfg *cfg; 4027 + const struct cpumask *mask; 4028 4029 if (skip_ioapic_setup == 1) 4030 return; ··· 4055 */ 4056 if (desc->status & 4057 (IRQ_NO_BALANCING | IRQ_AFFINITY_SET)) 4058 + mask = &desc->affinity; 4059 else 4060 mask = TARGET_CPUS; 4061
+20 -8
arch/x86/kernel/ipi.c
··· 116 /* 117 * This is only used on smaller machines. 118 */ 119 - void send_IPI_mask_bitmask(cpumask_t cpumask, int vector) 120 { 121 - unsigned long mask = cpus_addr(cpumask)[0]; 122 unsigned long flags; 123 124 local_irq_save(flags); 125 - WARN_ON(mask & ~cpus_addr(cpu_online_map)[0]); 126 __send_IPI_dest_field(mask, vector); 127 local_irq_restore(flags); 128 } 129 130 - void send_IPI_mask_sequence(cpumask_t mask, int vector) 131 { 132 unsigned long flags; 133 unsigned int query_cpu; ··· 139 */ 140 141 local_irq_save(flags); 142 - for_each_possible_cpu(query_cpu) { 143 - if (cpu_isset(query_cpu, mask)) { 144 __send_IPI_dest_field(cpu_to_logical_apicid(query_cpu), 145 vector); 146 - } 147 - } 148 local_irq_restore(flags); 149 } 150
··· 116 /* 117 * This is only used on smaller machines. 118 */ 119 + void send_IPI_mask_bitmask(const struct cpumask *cpumask, int vector) 120 { 121 + unsigned long mask = cpumask_bits(cpumask)[0]; 122 unsigned long flags; 123 124 local_irq_save(flags); 125 + WARN_ON(mask & ~cpumask_bits(cpu_online_mask)[0]); 126 __send_IPI_dest_field(mask, vector); 127 local_irq_restore(flags); 128 } 129 130 + void send_IPI_mask_sequence(const struct cpumask *mask, int vector) 131 { 132 unsigned long flags; 133 unsigned int query_cpu; ··· 139 */ 140 141 local_irq_save(flags); 142 + for_each_cpu(query_cpu, mask) 143 + __send_IPI_dest_field(cpu_to_logical_apicid(query_cpu), vector); 144 + local_irq_restore(flags); 145 + } 146 + 147 + void send_IPI_mask_allbutself(const struct cpumask *mask, int vector) 148 + { 149 + unsigned long flags; 150 + unsigned int query_cpu; 151 + unsigned int this_cpu = smp_processor_id(); 152 + 153 + /* See Hack comment above */ 154 + 155 + local_irq_save(flags); 156 + for_each_cpu(query_cpu, mask) 157 + if (query_cpu != this_cpu) 158 __send_IPI_dest_field(cpu_to_logical_apicid(query_cpu), 159 vector); 160 local_irq_restore(flags); 161 } 162
+3
arch/x86/kernel/irq.c
··· 9 #include <asm/apic.h> 10 #include <asm/io_apic.h> 11 #include <asm/smp.h> 12 13 atomic_t irq_err_count; 14 ··· 191 #endif 192 return sum; 193 }
··· 9 #include <asm/apic.h> 10 #include <asm/io_apic.h> 11 #include <asm/smp.h> 12 + #include <asm/irq.h> 13 14 atomic_t irq_err_count; 15 ··· 190 #endif 191 return sum; 192 } 193 + 194 + EXPORT_SYMBOL_GPL(vector_used_by_percpu_irq);
+7 -6
arch/x86/kernel/irq_32.c
··· 233 #ifdef CONFIG_HOTPLUG_CPU 234 #include <mach_apic.h> 235 236 - void fixup_irqs(cpumask_t map) 237 { 238 unsigned int irq; 239 static int warned; 240 struct irq_desc *desc; 241 242 for_each_irq_desc(irq, desc) { 243 - cpumask_t mask; 244 245 if (!desc) 246 continue; 247 if (irq == 2) 248 continue; 249 250 - cpus_and(mask, desc->affinity, map); 251 - if (any_online_cpu(mask) == NR_CPUS) { 252 printk("Breaking affinity for irq %i\n", irq); 253 - mask = map; 254 } 255 if (desc->chip->set_affinity) 256 - desc->chip->set_affinity(irq, mask); 257 else if (desc->action && !(warned++)) 258 printk("Cannot set affinity for irq %i\n", irq); 259 }
··· 233 #ifdef CONFIG_HOTPLUG_CPU 234 #include <mach_apic.h> 235 236 + /* A cpu has been removed from cpu_online_mask. Reset irq affinities. */ 237 + void fixup_irqs(void) 238 { 239 unsigned int irq; 240 static int warned; 241 struct irq_desc *desc; 242 243 for_each_irq_desc(irq, desc) { 244 + const struct cpumask *affinity; 245 246 if (!desc) 247 continue; 248 if (irq == 2) 249 continue; 250 251 + affinity = &desc->affinity; 252 + if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) { 253 printk("Breaking affinity for irq %i\n", irq); 254 + affinity = cpu_all_mask; 255 } 256 if (desc->chip->set_affinity) 257 + desc->chip->set_affinity(irq, affinity); 258 else if (desc->action && !(warned++)) 259 printk("Cannot set affinity for irq %i\n", irq); 260 }
+8 -7
arch/x86/kernel/irq_64.c
··· 80 } 81 82 #ifdef CONFIG_HOTPLUG_CPU 83 - void fixup_irqs(cpumask_t map) 84 { 85 unsigned int irq; 86 static int warned; 87 struct irq_desc *desc; 88 89 for_each_irq_desc(irq, desc) { 90 - cpumask_t mask; 91 int break_affinity = 0; 92 int set_affinity = 1; 93 94 if (!desc) 95 continue; ··· 100 /* interrupt's are disabled at this point */ 101 spin_lock(&desc->lock); 102 103 if (!irq_has_action(irq) || 104 - cpus_equal(desc->affinity, map)) { 105 spin_unlock(&desc->lock); 106 continue; 107 } 108 109 - cpus_and(mask, desc->affinity, map); 110 - if (cpus_empty(mask)) { 111 break_affinity = 1; 112 - mask = map; 113 } 114 115 if (desc->chip->mask) 116 desc->chip->mask(irq); 117 118 if (desc->chip->set_affinity) 119 - desc->chip->set_affinity(irq, mask); 120 else if (!(warned++)) 121 set_affinity = 0; 122
··· 80 } 81 82 #ifdef CONFIG_HOTPLUG_CPU 83 + /* A cpu has been removed from cpu_online_mask. Reset irq affinities. */ 84 + void fixup_irqs(void) 85 { 86 unsigned int irq; 87 static int warned; 88 struct irq_desc *desc; 89 90 for_each_irq_desc(irq, desc) { 91 int break_affinity = 0; 92 int set_affinity = 1; 93 + const struct cpumask *affinity; 94 95 if (!desc) 96 continue; ··· 99 /* interrupt's are disabled at this point */ 100 spin_lock(&desc->lock); 101 102 + affinity = &desc->affinity; 103 if (!irq_has_action(irq) || 104 + cpumask_equal(affinity, cpu_online_mask)) { 105 spin_unlock(&desc->lock); 106 continue; 107 } 108 109 + if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) { 110 break_affinity = 1; 111 + affinity = cpu_all_mask; 112 } 113 114 if (desc->chip->mask) 115 desc->chip->mask(irq); 116 117 if (desc->chip->set_affinity) 118 + desc->chip->set_affinity(irq, affinity); 119 else if (!(warned++)) 120 set_affinity = 0; 121
+15 -1
arch/x86/kernel/irqinit_32.c
··· 110 [IRQ15_VECTOR + 1 ... NR_VECTORS - 1] = -1 111 }; 112 113 /* Overridden in paravirt.c */ 114 void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ"))); 115 ··· 158 alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt); 159 160 /* IPI for single call function */ 161 - set_intr_gate(CALL_FUNCTION_SINGLE_VECTOR, call_function_single_interrupt); 162 163 /* Low priority IPI to cleanup after moving an irq */ 164 set_intr_gate(IRQ_MOVE_CLEANUP_VECTOR, irq_move_cleanup_interrupt); 165 #endif 166 167 #ifdef CONFIG_X86_LOCAL_APIC
··· 110 [IRQ15_VECTOR + 1 ... NR_VECTORS - 1] = -1 111 }; 112 113 + int vector_used_by_percpu_irq(unsigned int vector) 114 + { 115 + int cpu; 116 + 117 + for_each_online_cpu(cpu) { 118 + if (per_cpu(vector_irq, cpu)[vector] != -1) 119 + return 1; 120 + } 121 + 122 + return 0; 123 + } 124 + 125 /* Overridden in paravirt.c */ 126 void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ"))); 127 ··· 146 alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt); 147 148 /* IPI for single call function */ 149 + alloc_intr_gate(CALL_FUNCTION_SINGLE_VECTOR, 150 + call_function_single_interrupt); 151 152 /* Low priority IPI to cleanup after moving an irq */ 153 set_intr_gate(IRQ_MOVE_CLEANUP_VECTOR, irq_move_cleanup_interrupt); 154 + set_bit(IRQ_MOVE_CLEANUP_VECTOR, used_vectors); 155 #endif 156 157 #ifdef CONFIG_X86_LOCAL_APIC
+13
arch/x86/kernel/irqinit_64.c
··· 69 [IRQ15_VECTOR + 1 ... NR_VECTORS - 1] = -1 70 }; 71 72 void __init init_ISA_irqs(void) 73 { 74 int i; ··· 133 134 /* Low priority IPI to cleanup after moving an irq */ 135 set_intr_gate(IRQ_MOVE_CLEANUP_VECTOR, irq_move_cleanup_interrupt); 136 #endif 137 } 138
··· 69 [IRQ15_VECTOR + 1 ... NR_VECTORS - 1] = -1 70 }; 71 72 + int vector_used_by_percpu_irq(unsigned int vector) 73 + { 74 + int cpu; 75 + 76 + for_each_online_cpu(cpu) { 77 + if (per_cpu(vector_irq, cpu)[vector] != -1) 78 + return 1; 79 + } 80 + 81 + return 0; 82 + } 83 + 84 void __init init_ISA_irqs(void) 85 { 86 int i; ··· 121 122 /* Low priority IPI to cleanup after moving an irq */ 123 set_intr_gate(IRQ_MOVE_CLEANUP_VECTOR, irq_move_cleanup_interrupt); 124 + set_bit(IRQ_MOVE_CLEANUP_VECTOR, used_vectors); 125 #endif 126 } 127
+1 -1
arch/x86/kernel/mfgpt_32.c
··· 287 .set_mode = mfgpt_set_mode, 288 .set_next_event = mfgpt_next_event, 289 .rating = 250, 290 - .cpumask = CPU_MASK_ALL, 291 .shift = 32 292 }; 293
··· 287 .set_mode = mfgpt_set_mode, 288 .set_next_event = mfgpt_next_event, 289 .rating = 250, 290 + .cpumask = cpu_all_mask, 291 .shift = 32 292 }; 293
+1 -4
arch/x86/kernel/reboot.c
··· 650 651 static void smp_send_nmi_allbutself(void) 652 { 653 - cpumask_t mask = cpu_online_map; 654 - cpu_clear(safe_smp_processor_id(), mask); 655 - if (!cpus_empty(mask)) 656 - send_IPI_mask(mask, NMI_VECTOR); 657 } 658 659 static struct notifier_block crash_nmi_nb = {
··· 650 651 static void smp_send_nmi_allbutself(void) 652 { 653 + send_IPI_allbutself(NMI_VECTOR); 654 } 655 656 static struct notifier_block crash_nmi_nb = {
+12 -7
arch/x86/kernel/setup_percpu.c
··· 152 old_size = PERCPU_ENOUGH_ROOM; 153 align = max_t(unsigned long, PAGE_SIZE, align); 154 size = roundup(old_size, align); 155 printk(KERN_INFO "PERCPU: Allocating %zd bytes of per cpu data\n", 156 size); 157 ··· 173 "cpu %d has no node %d or node-local memory\n", 174 cpu, node); 175 if (ptr) 176 - printk(KERN_DEBUG "per cpu data for cpu%d at %016lx\n", 177 cpu, __pa(ptr)); 178 } 179 else { 180 ptr = __alloc_bootmem_node(NODE_DATA(node), size, align, 181 __pa(MAX_DMA_ADDRESS)); 182 if (ptr) 183 - printk(KERN_DEBUG "per cpu data for cpu%d on node%d at %016lx\n", 184 - cpu, node, __pa(ptr)); 185 } 186 #endif 187 per_cpu_offset(cpu) = ptr - __per_cpu_start; 188 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start); 189 } 190 - 191 - printk(KERN_DEBUG "NR_CPUS: %d, nr_cpu_ids: %d, nr_node_ids %d\n", 192 - NR_CPUS, nr_cpu_ids, nr_node_ids); 193 194 /* Setup percpu data maps */ 195 setup_per_cpu_maps(); ··· 287 else 288 cpu_clear(cpu, *mask); 289 290 - cpulist_scnprintf(buf, sizeof(buf), *mask); 291 printk(KERN_DEBUG "%s cpu %d node %d: mask now %s\n", 292 enable? "numa_add_cpu":"numa_remove_cpu", cpu, node, buf); 293 }
··· 152 old_size = PERCPU_ENOUGH_ROOM; 153 align = max_t(unsigned long, PAGE_SIZE, align); 154 size = roundup(old_size, align); 155 + 156 + printk(KERN_INFO 157 + "NR_CPUS:%d nr_cpumask_bits:%d nr_cpu_ids:%d nr_node_ids:%d\n", 158 + NR_CPUS, nr_cpumask_bits, nr_cpu_ids, nr_node_ids); 159 + 160 printk(KERN_INFO "PERCPU: Allocating %zd bytes of per cpu data\n", 161 size); 162 ··· 168 "cpu %d has no node %d or node-local memory\n", 169 cpu, node); 170 if (ptr) 171 + printk(KERN_DEBUG 172 + "per cpu data for cpu%d at %016lx\n", 173 cpu, __pa(ptr)); 174 } 175 else { 176 ptr = __alloc_bootmem_node(NODE_DATA(node), size, align, 177 __pa(MAX_DMA_ADDRESS)); 178 if (ptr) 179 + printk(KERN_DEBUG 180 + "per cpu data for cpu%d on node%d " 181 + "at %016lx\n", 182 + cpu, node, __pa(ptr)); 183 } 184 #endif 185 per_cpu_offset(cpu) = ptr - __per_cpu_start; 186 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start); 187 } 188 189 /* Setup percpu data maps */ 190 setup_per_cpu_maps(); ··· 282 else 283 cpu_clear(cpu, *mask); 284 285 + cpulist_scnprintf(buf, sizeof(buf), mask); 286 printk(KERN_DEBUG "%s cpu %d node %d: mask now %s\n", 287 enable? "numa_add_cpu":"numa_remove_cpu", cpu, node, buf); 288 }
+4 -4
arch/x86/kernel/smp.c
··· 118 WARN_ON(1); 119 return; 120 } 121 - send_IPI_mask(cpumask_of_cpu(cpu), RESCHEDULE_VECTOR); 122 } 123 124 void native_send_call_func_single_ipi(int cpu) 125 { 126 - send_IPI_mask(cpumask_of_cpu(cpu), CALL_FUNCTION_SINGLE_VECTOR); 127 } 128 129 - void native_send_call_func_ipi(cpumask_t mask) 130 { 131 cpumask_t allbutself; 132 133 allbutself = cpu_online_map; 134 cpu_clear(smp_processor_id(), allbutself); 135 136 - if (cpus_equal(mask, allbutself) && 137 cpus_equal(cpu_online_map, cpu_callout_map)) 138 send_IPI_allbutself(CALL_FUNCTION_VECTOR); 139 else
··· 118 WARN_ON(1); 119 return; 120 } 121 + send_IPI_mask(cpumask_of(cpu), RESCHEDULE_VECTOR); 122 } 123 124 void native_send_call_func_single_ipi(int cpu) 125 { 126 + send_IPI_mask(cpumask_of(cpu), CALL_FUNCTION_SINGLE_VECTOR); 127 } 128 129 + void native_send_call_func_ipi(const struct cpumask *mask) 130 { 131 cpumask_t allbutself; 132 133 allbutself = cpu_online_map; 134 cpu_clear(smp_processor_id(), allbutself); 135 136 + if (cpus_equal(*mask, allbutself) && 137 cpus_equal(cpu_online_map, cpu_callout_map)) 138 send_IPI_allbutself(CALL_FUNCTION_VECTOR); 139 else
+22 -11
arch/x86/kernel/smpboot.c
··· 102 /* Last level cache ID of each logical CPU */ 103 DEFINE_PER_CPU(u16, cpu_llc_id) = BAD_APICID; 104 105 - /* bitmap of online cpus */ 106 - cpumask_t cpu_online_map __read_mostly; 107 - EXPORT_SYMBOL(cpu_online_map); 108 - 109 cpumask_t cpu_callin_map; 110 cpumask_t cpu_callout_map; 111 - cpumask_t cpu_possible_map; 112 - EXPORT_SYMBOL(cpu_possible_map); 113 114 /* representing HT siblings of each logical CPU */ 115 DEFINE_PER_CPU(cpumask_t, cpu_sibling_map); ··· 1254 check_nmi_watchdog(); 1255 } 1256 1257 /* 1258 * cpu_possible_map should be static, it cannot change as cpu's 1259 * are onlined, or offlined. The reason is per-cpu data-structures ··· 1275 * 1276 * Three ways to find out the number of additional hotplug CPUs: 1277 * - If the BIOS specified disabled CPUs in ACPI/mptables use that. 1278 - * - The user can overwrite it with additional_cpus=NUM 1279 * - Otherwise don't reserve additional CPUs. 1280 * We do this because additional CPUs waste a lot of memory. 1281 * -AK ··· 1288 if (!num_processors) 1289 num_processors = 1; 1290 1291 - possible = num_processors + disabled_cpus; 1292 - if (possible > NR_CPUS) 1293 - possible = NR_CPUS; 1294 1295 printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n", 1296 possible, max_t(int, possible - num_processors, 0)); ··· 1363 lock_vector_lock(); 1364 remove_cpu_from_maps(cpu); 1365 unlock_vector_lock(); 1366 - fixup_irqs(cpu_online_map); 1367 } 1368 1369 int native_cpu_disable(void)
··· 102 /* Last level cache ID of each logical CPU */ 103 DEFINE_PER_CPU(u16, cpu_llc_id) = BAD_APICID; 104 105 cpumask_t cpu_callin_map; 106 cpumask_t cpu_callout_map; 107 108 /* representing HT siblings of each logical CPU */ 109 DEFINE_PER_CPU(cpumask_t, cpu_sibling_map); ··· 1260 check_nmi_watchdog(); 1261 } 1262 1263 + static int __initdata setup_possible_cpus = -1; 1264 + static int __init _setup_possible_cpus(char *str) 1265 + { 1266 + get_option(&str, &setup_possible_cpus); 1267 + return 0; 1268 + } 1269 + early_param("possible_cpus", _setup_possible_cpus); 1270 + 1271 + 1272 /* 1273 * cpu_possible_map should be static, it cannot change as cpu's 1274 * are onlined, or offlined. The reason is per-cpu data-structures ··· 1272 * 1273 * Three ways to find out the number of additional hotplug CPUs: 1274 * - If the BIOS specified disabled CPUs in ACPI/mptables use that. 1275 + * - The user can overwrite it with possible_cpus=NUM 1276 * - Otherwise don't reserve additional CPUs. 1277 * We do this because additional CPUs waste a lot of memory. 1278 * -AK ··· 1285 if (!num_processors) 1286 num_processors = 1; 1287 1288 + if (setup_possible_cpus == -1) 1289 + possible = num_processors + disabled_cpus; 1290 + else 1291 + possible = setup_possible_cpus; 1292 + 1293 + if (possible > CONFIG_NR_CPUS) { 1294 + printk(KERN_WARNING 1295 + "%d Processors exceeds NR_CPUS limit of %d\n", 1296 + possible, CONFIG_NR_CPUS); 1297 + possible = CONFIG_NR_CPUS; 1298 + } 1299 1300 printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n", 1301 possible, max_t(int, possible - num_processors, 0)); ··· 1352 lock_vector_lock(); 1353 remove_cpu_from_maps(cpu); 1354 unlock_vector_lock(); 1355 + fixup_irqs(); 1356 } 1357 1358 int native_cpu_disable(void)
+1 -1
arch/x86/kernel/tlb_32.c
··· 163 * We have to send the IPI only to 164 * CPUs affected. 165 */ 166 - send_IPI_mask(cpumask, INVALIDATE_TLB_VECTOR); 167 168 while (!cpus_empty(flush_cpumask)) 169 /* nothing. lockup detection does not belong here */
··· 163 * We have to send the IPI only to 164 * CPUs affected. 165 */ 166 + send_IPI_mask(&cpumask, INVALIDATE_TLB_VECTOR); 167 168 while (!cpus_empty(flush_cpumask)) 169 /* nothing. lockup detection does not belong here */
+1 -1
arch/x86/kernel/tlb_64.c
··· 191 * We have to send the IPI only to 192 * CPUs affected. 193 */ 194 - send_IPI_mask(cpumask, INVALIDATE_TLB_VECTOR_START + sender); 195 196 while (!cpus_empty(f->flush_cpumask)) 197 cpu_relax();
··· 191 * We have to send the IPI only to 192 * CPUs affected. 193 */ 194 + send_IPI_mask(&cpumask, INVALIDATE_TLB_VECTOR_START + sender); 195 196 while (!cpus_empty(f->flush_cpumask)) 197 cpu_relax();
+7 -5
arch/x86/kernel/traps.c
··· 72 73 #include "cpu/mcheck/mce.h" 74 75 - DECLARE_BITMAP(used_vectors, NR_VECTORS); 76 - EXPORT_SYMBOL_GPL(used_vectors); 77 - 78 asmlinkage int system_call(void); 79 80 /* Do we ignore FPU interrupts ? */ ··· 85 gate_desc idt_table[256] 86 __attribute__((__section__(".data.idt"))) = { { { { 0, 0 } } }, }; 87 #endif 88 89 static int ignore_nmis; 90 ··· 941 942 void __init trap_init(void) 943 { 944 - #ifdef CONFIG_X86_32 945 int i; 946 - #endif 947 948 #ifdef CONFIG_EISA 949 void __iomem *p = early_ioremap(0x0FFFD9, 4); ··· 998 } 999 1000 set_system_trap_gate(SYSCALL_VECTOR, &system_call); 1001 1002 /* Reserve all the builtin and the syscall vector: */ 1003 for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++) 1004 set_bit(i, used_vectors); 1005 1006 set_bit(SYSCALL_VECTOR, used_vectors); 1007 #endif 1008 /*
··· 72 73 #include "cpu/mcheck/mce.h" 74 75 asmlinkage int system_call(void); 76 77 /* Do we ignore FPU interrupts ? */ ··· 88 gate_desc idt_table[256] 89 __attribute__((__section__(".data.idt"))) = { { { { 0, 0 } } }, }; 90 #endif 91 + 92 + DECLARE_BITMAP(used_vectors, NR_VECTORS); 93 + EXPORT_SYMBOL_GPL(used_vectors); 94 95 static int ignore_nmis; 96 ··· 941 942 void __init trap_init(void) 943 { 944 int i; 945 946 #ifdef CONFIG_EISA 947 void __iomem *p = early_ioremap(0x0FFFD9, 4); ··· 1000 } 1001 1002 set_system_trap_gate(SYSCALL_VECTOR, &system_call); 1003 + #endif 1004 1005 /* Reserve all the builtin and the syscall vector: */ 1006 for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++) 1007 set_bit(i, used_vectors); 1008 1009 + #ifdef CONFIG_X86_64 1010 + set_bit(IA32_SYSCALL_VECTOR, used_vectors); 1011 + #else 1012 set_bit(SYSCALL_VECTOR, used_vectors); 1013 #endif 1014 /*
+1 -1
arch/x86/kernel/vmiclock_32.c
··· 226 /* Upper bound is clockevent's use of ulong for cycle deltas. */ 227 evt->max_delta_ns = clockevent_delta2ns(ULONG_MAX, evt); 228 evt->min_delta_ns = clockevent_delta2ns(1, evt); 229 - evt->cpumask = cpumask_of_cpu(cpu); 230 231 printk(KERN_WARNING "vmi: registering clock event %s. mult=%lu shift=%u\n", 232 evt->name, evt->mult, evt->shift);
··· 226 /* Upper bound is clockevent's use of ulong for cycle deltas. */ 227 evt->max_delta_ns = clockevent_delta2ns(ULONG_MAX, evt); 228 evt->min_delta_ns = clockevent_delta2ns(1, evt); 229 + evt->cpumask = cpumask_of(cpu); 230 231 printk(KERN_WARNING "vmi: registering clock event %s. mult=%lu shift=%u\n", 232 evt->name, evt->mult, evt->shift);
+1 -1
arch/x86/lguest/boot.c
··· 738 739 /* We can't set cpumask in the initializer: damn C limitations! Set it 740 * here and register our timer device. */ 741 - lguest_clockevent.cpumask = cpumask_of_cpu(0); 742 clockevents_register_device(&lguest_clockevent); 743 744 /* Finally, we unblock the timer interrupt. */
··· 738 739 /* We can't set cpumask in the initializer: damn C limitations! Set it 740 * here and register our timer device. */ 741 + lguest_clockevent.cpumask = cpumask_of(0); 742 clockevents_register_device(&lguest_clockevent); 743 744 /* Finally, we unblock the timer interrupt. */
+3 -2
arch/x86/mach-generic/bigsmp.c
··· 42 { } 43 }; 44 45 - static cpumask_t vector_allocation_domain(int cpu) 46 { 47 - return cpumask_of_cpu(cpu); 48 } 49 50 static int probe_bigsmp(void)
··· 42 { } 43 }; 44 45 + static void vector_allocation_domain(int cpu, cpumask_t *retmask) 46 { 47 + cpus_clear(*retmask); 48 + cpu_set(cpu, *retmask); 49 } 50 51 static int probe_bigsmp(void)
+2 -3
arch/x86/mach-generic/es7000.c
··· 87 } 88 #endif 89 90 - static cpumask_t vector_allocation_domain(int cpu) 91 { 92 /* Careful. Some cpus do not strictly honor the set of cpus 93 * specified in the interrupt destination when using lowest ··· 97 * deliver interrupts to the wrong hyperthread when only one 98 * hyperthread was specified in the interrupt desitination. 99 */ 100 - cpumask_t domain = { { [0] = APIC_ALL_CPUS, } }; 101 - return domain; 102 } 103 104 struct genapic __initdata_refok apic_es7000 = APIC_INIT("es7000", probe_es7000);
··· 87 } 88 #endif 89 90 + static void vector_allocation_domain(int cpu, cpumask_t *retmask) 91 { 92 /* Careful. Some cpus do not strictly honor the set of cpus 93 * specified in the interrupt destination when using lowest ··· 97 * deliver interrupts to the wrong hyperthread when only one 98 * hyperthread was specified in the interrupt desitination. 99 */ 100 + *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } }; 101 } 102 103 struct genapic __initdata_refok apic_es7000 = APIC_INIT("es7000", probe_es7000);
+2 -3
arch/x86/mach-generic/numaq.c
··· 38 return 0; 39 } 40 41 - static cpumask_t vector_allocation_domain(int cpu) 42 { 43 /* Careful. Some cpus do not strictly honor the set of cpus 44 * specified in the interrupt destination when using lowest ··· 48 * deliver interrupts to the wrong hyperthread when only one 49 * hyperthread was specified in the interrupt desitination. 50 */ 51 - cpumask_t domain = { { [0] = APIC_ALL_CPUS, } }; 52 - return domain; 53 } 54 55 struct genapic apic_numaq = APIC_INIT("NUMAQ", probe_numaq);
··· 38 return 0; 39 } 40 41 + static void vector_allocation_domain(int cpu, cpumask_t *retmask) 42 { 43 /* Careful. Some cpus do not strictly honor the set of cpus 44 * specified in the interrupt destination when using lowest ··· 48 * deliver interrupts to the wrong hyperthread when only one 49 * hyperthread was specified in the interrupt desitination. 50 */ 51 + *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } }; 52 } 53 54 struct genapic apic_numaq = APIC_INIT("NUMAQ", probe_numaq);
+2 -3
arch/x86/mach-generic/summit.c
··· 24 return 0; 25 } 26 27 - static cpumask_t vector_allocation_domain(int cpu) 28 { 29 /* Careful. Some cpus do not strictly honor the set of cpus 30 * specified in the interrupt destination when using lowest ··· 34 * deliver interrupts to the wrong hyperthread when only one 35 * hyperthread was specified in the interrupt desitination. 36 */ 37 - cpumask_t domain = { { [0] = APIC_ALL_CPUS, } }; 38 - return domain; 39 } 40 41 struct genapic apic_summit = APIC_INIT("summit", probe_summit);
··· 24 return 0; 25 } 26 27 + static void vector_allocation_domain(int cpu, cpumask_t *retmask) 28 { 29 /* Careful. Some cpus do not strictly honor the set of cpus 30 * specified in the interrupt destination when using lowest ··· 34 * deliver interrupts to the wrong hyperthread when only one 35 * hyperthread was specified in the interrupt desitination. 36 */ 37 + *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } }; 38 } 39 40 struct genapic apic_summit = APIC_INIT("summit", probe_summit);
+1 -8
arch/x86/mach-voyager/voyager_smp.c
··· 63 /* Used for the invalidate map that's also checked in the spinlock */ 64 static volatile unsigned long smp_invalidate_needed; 65 66 - /* Bitmask of currently online CPUs - used by setup.c for 67 - /proc/cpuinfo, visible externally but still physical */ 68 - cpumask_t cpu_online_map = CPU_MASK_NONE; 69 - EXPORT_SYMBOL(cpu_online_map); 70 - 71 /* Bitmask of CPUs present in the system - exported by i386_syms.c, used 72 * by scheduler but indexed physically */ 73 cpumask_t phys_cpu_present_map = CPU_MASK_NONE; ··· 213 /* This is for the new dynamic CPU boot code */ 214 cpumask_t cpu_callin_map = CPU_MASK_NONE; 215 cpumask_t cpu_callout_map = CPU_MASK_NONE; 216 - cpumask_t cpu_possible_map = CPU_MASK_NONE; 217 - EXPORT_SYMBOL(cpu_possible_map); 218 219 /* The per processor IRQ masks (these are usually kept in sync) */ 220 static __u16 vic_irq_mask[NR_CPUS] __cacheline_aligned; ··· 672 673 /* loop over all the extended VIC CPUs and boot them. The 674 * Quad CPUs must be bootstrapped by their extended VIC cpu */ 675 - for (i = 0; i < NR_CPUS; i++) { 676 if (i == boot_cpu_id || !cpu_isset(i, phys_cpu_present_map)) 677 continue; 678 do_boot_cpu(i);
··· 63 /* Used for the invalidate map that's also checked in the spinlock */ 64 static volatile unsigned long smp_invalidate_needed; 65 66 /* Bitmask of CPUs present in the system - exported by i386_syms.c, used 67 * by scheduler but indexed physically */ 68 cpumask_t phys_cpu_present_map = CPU_MASK_NONE; ··· 218 /* This is for the new dynamic CPU boot code */ 219 cpumask_t cpu_callin_map = CPU_MASK_NONE; 220 cpumask_t cpu_callout_map = CPU_MASK_NONE; 221 222 /* The per processor IRQ masks (these are usually kept in sync) */ 223 static __u16 vic_irq_mask[NR_CPUS] __cacheline_aligned; ··· 679 680 /* loop over all the extended VIC CPUs and boot them. The 681 * Quad CPUs must be bootstrapped by their extended VIC cpu */ 682 + for (i = 0; i < nr_cpu_ids; i++) { 683 if (i == boot_cpu_id || !cpu_isset(i, phys_cpu_present_map)) 684 continue; 685 do_boot_cpu(i);
+2 -2
arch/x86/mm/numa_64.c
··· 278 int rr, i; 279 280 rr = first_node(node_online_map); 281 - for (i = 0; i < NR_CPUS; i++) { 282 if (early_cpu_to_node(i) != NUMA_NO_NODE) 283 continue; 284 numa_set_node(i, rr); ··· 549 memnodemap[0] = 0; 550 node_set_online(0); 551 node_set(0, node_possible_map); 552 - for (i = 0; i < NR_CPUS; i++) 553 numa_set_node(i, 0); 554 e820_register_active_regions(0, start_pfn, last_pfn); 555 setup_node_bootmem(0, start_pfn << PAGE_SHIFT, last_pfn << PAGE_SHIFT);
··· 278 int rr, i; 279 280 rr = first_node(node_online_map); 281 + for (i = 0; i < nr_cpu_ids; i++) { 282 if (early_cpu_to_node(i) != NUMA_NO_NODE) 283 continue; 284 numa_set_node(i, rr); ··· 549 memnodemap[0] = 0; 550 node_set_online(0); 551 node_set(0, node_possible_map); 552 + for (i = 0; i < nr_cpu_ids; i++) 553 numa_set_node(i, 0); 554 e820_register_active_regions(0, start_pfn, last_pfn); 555 setup_node_bootmem(0, start_pfn << PAGE_SHIFT, last_pfn << PAGE_SHIFT);
+1 -1
arch/x86/mm/srat_64.c
··· 382 if (!node_online(i)) 383 setup_node_bootmem(i, nodes[i].start, nodes[i].end); 384 385 - for (i = 0; i < NR_CPUS; i++) { 386 int node = early_cpu_to_node(i); 387 388 if (node == NUMA_NO_NODE)
··· 382 if (!node_online(i)) 383 setup_node_bootmem(i, nodes[i].start, nodes[i].end); 384 385 + for (i = 0; i < nr_cpu_ids; i++) { 386 int node = early_cpu_to_node(i); 387 388 if (node == NUMA_NO_NODE)
+15 -5
arch/x86/xen/mmu.c
··· 1082 1083 static void xen_drop_mm_ref(struct mm_struct *mm) 1084 { 1085 - cpumask_t mask; 1086 unsigned cpu; 1087 1088 if (current->active_mm == mm) { ··· 1094 } 1095 1096 /* Get the "official" set of cpus referring to our pagetable. */ 1097 - mask = mm->cpu_vm_mask; 1098 1099 /* It's possible that a vcpu may have a stale reference to our 1100 cr3, because its in lazy mode, and it hasn't yet flushed ··· 1112 if needed. */ 1113 for_each_online_cpu(cpu) { 1114 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd)) 1115 - cpu_set(cpu, mask); 1116 } 1117 1118 - if (!cpus_empty(mask)) 1119 - smp_call_function_mask(mask, drop_other_mm_ref, mm, 1); 1120 } 1121 #else 1122 static void xen_drop_mm_ref(struct mm_struct *mm)
··· 1082 1083 static void xen_drop_mm_ref(struct mm_struct *mm) 1084 { 1085 + cpumask_var_t mask; 1086 unsigned cpu; 1087 1088 if (current->active_mm == mm) { ··· 1094 } 1095 1096 /* Get the "official" set of cpus referring to our pagetable. */ 1097 + if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) { 1098 + for_each_online_cpu(cpu) { 1099 + if (!cpumask_test_cpu(cpu, &mm->cpu_vm_mask) 1100 + && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd)) 1101 + continue; 1102 + smp_call_function_single(cpu, drop_other_mm_ref, mm, 1); 1103 + } 1104 + return; 1105 + } 1106 + cpumask_copy(mask, &mm->cpu_vm_mask); 1107 1108 /* It's possible that a vcpu may have a stale reference to our 1109 cr3, because its in lazy mode, and it hasn't yet flushed ··· 1103 if needed. */ 1104 for_each_online_cpu(cpu) { 1105 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd)) 1106 + cpumask_set_cpu(cpu, mask); 1107 } 1108 1109 + if (!cpumask_empty(mask)) 1110 + smp_call_function_many(mask, drop_other_mm_ref, mm, 1); 1111 + free_cpumask_var(mask); 1112 } 1113 #else 1114 static void xen_drop_mm_ref(struct mm_struct *mm)
+15 -12
arch/x86/xen/smp.c
··· 33 #include "xen-ops.h" 34 #include "mmu.h" 35 36 - cpumask_t xen_cpu_initialized_map; 37 38 static DEFINE_PER_CPU(int, resched_irq); 39 static DEFINE_PER_CPU(int, callfunc_irq); ··· 158 { 159 int i, rc; 160 161 - for (i = 0; i < NR_CPUS; i++) { 162 rc = HYPERVISOR_vcpu_op(VCPUOP_is_up, i, NULL); 163 if (rc >= 0) { 164 num_processors++; ··· 192 if (xen_smp_intr_init(0)) 193 BUG(); 194 195 - xen_cpu_initialized_map = cpumask_of_cpu(0); 196 197 /* Restrict the possible_map according to max_cpus. */ 198 while ((num_possible_cpus() > 1) && (num_possible_cpus() > max_cpus)) { 199 - for (cpu = NR_CPUS - 1; !cpu_possible(cpu); cpu--) 200 continue; 201 cpu_clear(cpu, cpu_possible_map); 202 } ··· 224 struct vcpu_guest_context *ctxt; 225 struct desc_struct *gdt; 226 227 - if (cpu_test_and_set(cpu, xen_cpu_initialized_map)) 228 return 0; 229 230 ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL); ··· 411 xen_send_IPI_one(cpu, XEN_RESCHEDULE_VECTOR); 412 } 413 414 - static void xen_send_IPI_mask(cpumask_t mask, enum ipi_vector vector) 415 { 416 unsigned cpu; 417 418 - cpus_and(mask, mask, cpu_online_map); 419 - 420 - for_each_cpu_mask_nr(cpu, mask) 421 xen_send_IPI_one(cpu, vector); 422 } 423 424 - static void xen_smp_send_call_function_ipi(cpumask_t mask) 425 { 426 int cpu; 427 428 xen_send_IPI_mask(mask, XEN_CALL_FUNCTION_VECTOR); 429 430 /* Make sure other vcpus get a chance to run if they need to. */ 431 - for_each_cpu_mask_nr(cpu, mask) { 432 if (xen_vcpu_stolen(cpu)) { 433 HYPERVISOR_sched_op(SCHEDOP_yield, 0); 434 break; ··· 437 438 static void xen_smp_send_call_function_single_ipi(int cpu) 439 { 440 - xen_send_IPI_mask(cpumask_of_cpu(cpu), XEN_CALL_FUNCTION_SINGLE_VECTOR); 441 } 442 443 static irqreturn_t xen_call_function_interrupt(int irq, void *dev_id)
··· 33 #include "xen-ops.h" 34 #include "mmu.h" 35 36 + cpumask_var_t xen_cpu_initialized_map; 37 38 static DEFINE_PER_CPU(int, resched_irq); 39 static DEFINE_PER_CPU(int, callfunc_irq); ··· 158 { 159 int i, rc; 160 161 + for (i = 0; i < nr_cpu_ids; i++) { 162 rc = HYPERVISOR_vcpu_op(VCPUOP_is_up, i, NULL); 163 if (rc >= 0) { 164 num_processors++; ··· 192 if (xen_smp_intr_init(0)) 193 BUG(); 194 195 + if (!alloc_cpumask_var(&xen_cpu_initialized_map, GFP_KERNEL)) 196 + panic("could not allocate xen_cpu_initialized_map\n"); 197 + 198 + cpumask_copy(xen_cpu_initialized_map, cpumask_of(0)); 199 200 /* Restrict the possible_map according to max_cpus. */ 201 while ((num_possible_cpus() > 1) && (num_possible_cpus() > max_cpus)) { 202 + for (cpu = nr_cpu_ids - 1; !cpu_possible(cpu); cpu--) 203 continue; 204 cpu_clear(cpu, cpu_possible_map); 205 } ··· 221 struct vcpu_guest_context *ctxt; 222 struct desc_struct *gdt; 223 224 + if (cpumask_test_and_set_cpu(cpu, xen_cpu_initialized_map)) 225 return 0; 226 227 ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL); ··· 408 xen_send_IPI_one(cpu, XEN_RESCHEDULE_VECTOR); 409 } 410 411 + static void xen_send_IPI_mask(const struct cpumask *mask, 412 + enum ipi_vector vector) 413 { 414 unsigned cpu; 415 416 + for_each_cpu_and(cpu, mask, cpu_online_mask) 417 xen_send_IPI_one(cpu, vector); 418 } 419 420 + static void xen_smp_send_call_function_ipi(const struct cpumask *mask) 421 { 422 int cpu; 423 424 xen_send_IPI_mask(mask, XEN_CALL_FUNCTION_VECTOR); 425 426 /* Make sure other vcpus get a chance to run if they need to. */ 427 + for_each_cpu(cpu, mask) { 428 if (xen_vcpu_stolen(cpu)) { 429 HYPERVISOR_sched_op(SCHEDOP_yield, 0); 430 break; ··· 435 436 static void xen_smp_send_call_function_single_ipi(int cpu) 437 { 438 + xen_send_IPI_mask(cpumask_of(cpu), 439 + XEN_CALL_FUNCTION_SINGLE_VECTOR); 440 } 441 442 static irqreturn_t xen_call_function_interrupt(int irq, void *dev_id)
+2 -1
arch/x86/xen/suspend.c
··· 35 pfn_to_mfn(xen_start_info->console.domU.mfn); 36 } else { 37 #ifdef CONFIG_SMP 38 - xen_cpu_initialized_map = cpu_online_map; 39 #endif 40 xen_vcpu_restore(); 41 }
··· 35 pfn_to_mfn(xen_start_info->console.domU.mfn); 36 } else { 37 #ifdef CONFIG_SMP 38 + BUG_ON(xen_cpu_initialized_map == NULL); 39 + cpumask_copy(xen_cpu_initialized_map, cpu_online_mask); 40 #endif 41 xen_vcpu_restore(); 42 }
+1 -1
arch/x86/xen/time.c
··· 437 evt = &per_cpu(xen_clock_events, cpu); 438 memcpy(evt, xen_clockevent, sizeof(*evt)); 439 440 - evt->cpumask = cpumask_of_cpu(cpu); 441 evt->irq = irq; 442 443 setup_runstate_info(cpu);
··· 437 evt = &per_cpu(xen_clock_events, cpu); 438 memcpy(evt, xen_clockevent, sizeof(*evt)); 439 440 + evt->cpumask = cpumask_of(cpu); 441 evt->irq = irq; 442 443 setup_runstate_info(cpu);
+1 -1
arch/x86/xen/xen-ops.h
··· 58 __cpuinit void xen_init_lock_cpu(int cpu); 59 void xen_uninit_lock_cpu(int cpu); 60 61 - extern cpumask_t xen_cpu_initialized_map; 62 #else 63 static inline void xen_smp_init(void) {} 64 #endif
··· 58 __cpuinit void xen_init_lock_cpu(int cpu); 59 void xen_uninit_lock_cpu(int cpu); 60 61 + extern cpumask_var_t xen_cpu_initialized_map; 62 #else 63 static inline void xen_smp_init(void) {} 64 #endif
+1 -1
drivers/base/cpu.c
··· 109 */ 110 static ssize_t print_cpus_map(char *buf, cpumask_t *map) 111 { 112 - int n = cpulist_scnprintf(buf, PAGE_SIZE-2, *map); 113 114 buf[n++] = '\n'; 115 buf[n] = '\0';
··· 109 */ 110 static ssize_t print_cpus_map(char *buf, cpumask_t *map) 111 { 112 + int n = cpulist_scnprintf(buf, PAGE_SIZE-2, map); 113 114 buf[n++] = '\n'; 115 buf[n] = '\0';
+2 -2
drivers/base/node.c
··· 30 BUILD_BUG_ON((NR_CPUS/32 * 9) > (PAGE_SIZE-1)); 31 32 len = type? 33 - cpulist_scnprintf(buf, PAGE_SIZE-2, *mask): 34 - cpumask_scnprintf(buf, PAGE_SIZE-2, *mask); 35 buf[len++] = '\n'; 36 buf[len] = '\0'; 37 return len;
··· 30 BUILD_BUG_ON((NR_CPUS/32 * 9) > (PAGE_SIZE-1)); 31 32 len = type? 33 + cpulist_scnprintf(buf, PAGE_SIZE-2, mask) : 34 + cpumask_scnprintf(buf, PAGE_SIZE-2, mask); 35 buf[len++] = '\n'; 36 buf[len] = '\0'; 37 return len;
+2 -2
drivers/base/topology.c
··· 49 50 if (len > 1) { 51 n = type? 52 - cpulist_scnprintf(buf, len-2, *mask): 53 - cpumask_scnprintf(buf, len-2, *mask); 54 buf[n++] = '\n'; 55 buf[n] = '\0'; 56 }
··· 49 50 if (len > 1) { 51 n = type? 52 + cpulist_scnprintf(buf, len-2, mask) : 53 + cpumask_scnprintf(buf, len-2, mask); 54 buf[n++] = '\n'; 55 buf[n] = '\0'; 56 }
+1 -1
drivers/clocksource/tcb_clksrc.c
··· 154 .shift = 32, 155 /* Should be lower than at91rm9200's system timer */ 156 .rating = 125, 157 - .cpumask = CPU_MASK_CPU0, 158 .set_next_event = tc_next_event, 159 .set_mode = tc_mode, 160 }, ··· 194 clkevt.clkevt.max_delta_ns 195 = clockevent_delta2ns(0xffff, &clkevt.clkevt); 196 clkevt.clkevt.min_delta_ns = clockevent_delta2ns(1, &clkevt.clkevt) + 1; 197 198 setup_irq(irq, &tc_irqaction); 199
··· 154 .shift = 32, 155 /* Should be lower than at91rm9200's system timer */ 156 .rating = 125, 157 .set_next_event = tc_next_event, 158 .set_mode = tc_mode, 159 }, ··· 195 clkevt.clkevt.max_delta_ns 196 = clockevent_delta2ns(0xffff, &clkevt.clkevt); 197 clkevt.clkevt.min_delta_ns = clockevent_delta2ns(1, &clkevt.clkevt) + 1; 198 + clkevt.clkevt.cpumask = cpumask_of(0); 199 200 setup_irq(irq, &tc_irqaction); 201
+9 -4
drivers/lguest/interrupts_and_traps.c
··· 222 int init_interrupts(void) 223 { 224 /* If they want some strange system call vector, reserve it now */ 225 - if (syscall_vector != SYSCALL_VECTOR 226 - && test_and_set_bit(syscall_vector, used_vectors)) { 227 - printk("lg: couldn't reserve syscall %u\n", syscall_vector); 228 - return -EBUSY; 229 } 230 return 0; 231 } 232
··· 222 int init_interrupts(void) 223 { 224 /* If they want some strange system call vector, reserve it now */ 225 + if (syscall_vector != SYSCALL_VECTOR) { 226 + if (test_bit(syscall_vector, used_vectors) || 227 + vector_used_by_percpu_irq(syscall_vector)) { 228 + printk(KERN_ERR "lg: couldn't reserve syscall %u\n", 229 + syscall_vector); 230 + return -EBUSY; 231 + } 232 + set_bit(syscall_vector, used_vectors); 233 } 234 + 235 return 0; 236 } 237
+4 -3
drivers/parisc/iosapic.c
··· 704 } 705 706 #ifdef CONFIG_SMP 707 - static void iosapic_set_affinity_irq(unsigned int irq, cpumask_t dest) 708 { 709 struct vector_info *vi = iosapic_get_vector(irq); 710 u32 d0, d1, dummy_d0; 711 unsigned long flags; 712 713 - if (cpu_check_affinity(irq, &dest)) 714 return; 715 716 - vi->txn_addr = txn_affinity_addr(irq, first_cpu(dest)); 717 718 spin_lock_irqsave(&iosapic_lock, flags); 719 /* d1 contains the destination CPU, so only want to set that
··· 704 } 705 706 #ifdef CONFIG_SMP 707 + static void iosapic_set_affinity_irq(unsigned int irq, 708 + const struct cpumask *dest) 709 { 710 struct vector_info *vi = iosapic_get_vector(irq); 711 u32 d0, d1, dummy_d0; 712 unsigned long flags; 713 714 + if (cpu_check_affinity(irq, dest)) 715 return; 716 717 + vi->txn_addr = txn_affinity_addr(irq, cpumask_first(dest)); 718 719 spin_lock_irqsave(&iosapic_lock, flags); 720 /* d1 contains the destination CPU, so only want to set that
+2 -2
drivers/pci/pci-sysfs.c
··· 74 int len; 75 76 mask = pcibus_to_cpumask(to_pci_dev(dev)->bus); 77 - len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask); 78 buf[len++] = '\n'; 79 buf[len] = '\0'; 80 return len; ··· 88 int len; 89 90 mask = pcibus_to_cpumask(to_pci_dev(dev)->bus); 91 - len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask); 92 buf[len++] = '\n'; 93 buf[len] = '\0'; 94 return len;
··· 74 int len; 75 76 mask = pcibus_to_cpumask(to_pci_dev(dev)->bus); 77 + len = cpumask_scnprintf(buf, PAGE_SIZE-2, &mask); 78 buf[len++] = '\n'; 79 buf[len] = '\0'; 80 return len; ··· 88 int len; 89 90 mask = pcibus_to_cpumask(to_pci_dev(dev)->bus); 91 + len = cpulist_scnprintf(buf, PAGE_SIZE-2, &mask); 92 buf[len++] = '\n'; 93 buf[len] = '\0'; 94 return len;
+2 -2
drivers/pci/probe.c
··· 55 56 cpumask = pcibus_to_cpumask(to_pci_bus(dev)); 57 ret = type? 58 - cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask): 59 - cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask); 60 buf[ret++] = '\n'; 61 buf[ret] = '\0'; 62 return ret;
··· 55 56 cpumask = pcibus_to_cpumask(to_pci_bus(dev)); 57 ret = type? 58 + cpulist_scnprintf(buf, PAGE_SIZE-2, &cpumask) : 59 + cpumask_scnprintf(buf, PAGE_SIZE-2, &cpumask); 60 buf[ret++] = '\n'; 61 buf[ret] = '\0'; 62 return ret;
+3 -3
drivers/xen/events.c
··· 585 spin_unlock(&irq_mapping_update_lock); 586 587 /* new event channels are always bound to cpu 0 */ 588 - irq_set_affinity(irq, cpumask_of_cpu(0)); 589 590 /* Unmask the event channel. */ 591 enable_irq(irq); ··· 614 } 615 616 617 - static void set_affinity_irq(unsigned irq, cpumask_t dest) 618 { 619 - unsigned tcpu = first_cpu(dest); 620 rebind_irq_to_cpu(irq, tcpu); 621 } 622
··· 585 spin_unlock(&irq_mapping_update_lock); 586 587 /* new event channels are always bound to cpu 0 */ 588 + irq_set_affinity(irq, cpumask_of(0)); 589 590 /* Unmask the event channel. */ 591 enable_irq(irq); ··· 614 } 615 616 617 + static void set_affinity_irq(unsigned irq, const struct cpumask *dest) 618 { 619 + unsigned tcpu = cpumask_first(dest); 620 rebind_irq_to_cpu(irq, tcpu); 621 } 622
+13 -1
include/asm-generic/topology.h
··· 40 #ifndef node_to_cpumask 41 #define node_to_cpumask(node) ((void)node, cpu_online_map) 42 #endif 43 #ifndef node_to_first_cpu 44 #define node_to_first_cpu(node) ((void)(node),0) 45 #endif ··· 57 ) 58 #endif 59 60 #endif /* CONFIG_NUMA */ 61 62 - /* returns pointer to cpumask for specified node */ 63 #ifndef node_to_cpumask_ptr 64 65 #define node_to_cpumask_ptr(v, node) \
··· 40 #ifndef node_to_cpumask 41 #define node_to_cpumask(node) ((void)node, cpu_online_map) 42 #endif 43 + #ifndef cpumask_of_node 44 + #define cpumask_of_node(node) ((void)node, cpu_online_mask) 45 + #endif 46 #ifndef node_to_first_cpu 47 #define node_to_first_cpu(node) ((void)(node),0) 48 #endif ··· 54 ) 55 #endif 56 57 + #ifndef cpumask_of_pcibus 58 + #define cpumask_of_pcibus(bus) (pcibus_to_node(bus) == -1 ? \ 59 + cpu_all_mask : \ 60 + cpumask_of_node(pcibus_to_node(bus))) 61 + #endif 62 + 63 #endif /* CONFIG_NUMA */ 64 65 + /* 66 + * returns pointer to cpumask for specified node 67 + * Deprecated: use "const struct cpumask *mask = cpumask_of_node(node)" 68 + */ 69 #ifndef node_to_cpumask_ptr 70 71 #define node_to_cpumask_ptr(v, node) \
-2
include/asm-m32r/smp.h
··· 63 #define raw_smp_processor_id() (current_thread_info()->cpu) 64 65 extern cpumask_t cpu_callout_map; 66 - extern cpumask_t cpu_possible_map; 67 - extern cpumask_t cpu_present_map; 68 69 static __inline__ int hard_smp_processor_id(void) 70 {
··· 63 #define raw_smp_processor_id() (current_thread_info()->cpu) 64 65 extern cpumask_t cpu_callout_map; 66 67 static __inline__ int hard_smp_processor_id(void) 68 {
+2 -2
include/linux/clockchips.h
··· 82 int shift; 83 int rating; 84 int irq; 85 - cpumask_t cpumask; 86 int (*set_next_event)(unsigned long evt, 87 struct clock_event_device *); 88 void (*set_mode)(enum clock_event_mode mode, 89 struct clock_event_device *); 90 void (*event_handler)(struct clock_event_device *); 91 - void (*broadcast)(cpumask_t mask); 92 struct list_head list; 93 enum clock_event_mode mode; 94 ktime_t next_event;
··· 82 int shift; 83 int rating; 84 int irq; 85 + const struct cpumask *cpumask; 86 int (*set_next_event)(unsigned long evt, 87 struct clock_event_device *); 88 void (*set_mode)(enum clock_event_mode mode, 89 struct clock_event_device *); 90 void (*event_handler)(struct clock_event_device *); 91 + void (*broadcast)(const struct cpumask *mask); 92 struct list_head list; 93 enum clock_event_mode mode; 94 ktime_t next_event;
+65 -35
include/linux/cpumask.h
··· 339 #endif 340 #define CPUMASK_PTR(v, m) cpumask_t *v = &(m->v) 341 342 - #define cpumask_scnprintf(buf, len, src) \ 343 - __cpumask_scnprintf((buf), (len), &(src), NR_CPUS) 344 - static inline int __cpumask_scnprintf(char *buf, int len, 345 - const cpumask_t *srcp, int nbits) 346 - { 347 - return bitmap_scnprintf(buf, len, srcp->bits, nbits); 348 - } 349 - 350 - #define cpumask_parse_user(ubuf, ulen, dst) \ 351 - __cpumask_parse_user((ubuf), (ulen), &(dst), NR_CPUS) 352 - static inline int __cpumask_parse_user(const char __user *buf, int len, 353 - cpumask_t *dstp, int nbits) 354 - { 355 - return bitmap_parse_user(buf, len, dstp->bits, nbits); 356 - } 357 - 358 - #define cpulist_scnprintf(buf, len, src) \ 359 - __cpulist_scnprintf((buf), (len), &(src), NR_CPUS) 360 - static inline int __cpulist_scnprintf(char *buf, int len, 361 - const cpumask_t *srcp, int nbits) 362 - { 363 - return bitmap_scnlistprintf(buf, len, srcp->bits, nbits); 364 - } 365 - 366 - #define cpulist_parse(buf, dst) __cpulist_parse((buf), &(dst), NR_CPUS) 367 - static inline int __cpulist_parse(const char *buf, cpumask_t *dstp, int nbits) 368 - { 369 - return bitmap_parselist(buf, dstp->bits, nbits); 370 - } 371 - 372 #define cpu_remap(oldbit, old, new) \ 373 __cpu_remap((oldbit), &(old), &(new), NR_CPUS) 374 static inline int __cpu_remap(int oldbit, ··· 510 [BITS_TO_LONGS(NR_CPUS)-1] = CPU_MASK_LAST_WORD \ 511 } 512 513 - /* This produces more efficient code. */ 514 - #define nr_cpumask_bits NR_CPUS 515 - 516 #else /* NR_CPUS > BITS_PER_LONG */ 517 518 #define CPU_BITS_ALL \ ··· 517 [0 ... BITS_TO_LONGS(NR_CPUS)-2] = ~0UL, \ 518 [BITS_TO_LONGS(NR_CPUS)-1] = CPU_MASK_LAST_WORD \ 519 } 520 - 521 - #define nr_cpumask_bits nr_cpu_ids 522 #endif /* NR_CPUS > BITS_PER_LONG */ 523 524 /* verify cpu argument to cpumask_* operators */ 525 static inline unsigned int cpumask_check(unsigned int cpu) ··· 917 * @cpu: the cpu (<= nr_cpu_ids) 918 */ 919 #define cpumask_of(cpu) (get_cpu_mask(cpu)) 920 921 /** 922 * to_cpumask - convert an NR_CPUS bitmap to a struct cpumask *
··· 339 #endif 340 #define CPUMASK_PTR(v, m) cpumask_t *v = &(m->v) 341 342 #define cpu_remap(oldbit, old, new) \ 343 __cpu_remap((oldbit), &(old), &(new), NR_CPUS) 344 static inline int __cpu_remap(int oldbit, ··· 540 [BITS_TO_LONGS(NR_CPUS)-1] = CPU_MASK_LAST_WORD \ 541 } 542 543 #else /* NR_CPUS > BITS_PER_LONG */ 544 545 #define CPU_BITS_ALL \ ··· 550 [0 ... BITS_TO_LONGS(NR_CPUS)-2] = ~0UL, \ 551 [BITS_TO_LONGS(NR_CPUS)-1] = CPU_MASK_LAST_WORD \ 552 } 553 #endif /* NR_CPUS > BITS_PER_LONG */ 554 + 555 + #ifdef CONFIG_CPUMASK_OFFSTACK 556 + /* Assuming NR_CPUS is huge, a runtime limit is more efficient. Also, 557 + * not all bits may be allocated. */ 558 + #define nr_cpumask_bits nr_cpu_ids 559 + #else 560 + #define nr_cpumask_bits NR_CPUS 561 + #endif 562 563 /* verify cpu argument to cpumask_* operators */ 564 static inline unsigned int cpumask_check(unsigned int cpu) ··· 944 * @cpu: the cpu (<= nr_cpu_ids) 945 */ 946 #define cpumask_of(cpu) (get_cpu_mask(cpu)) 947 + 948 + /** 949 + * cpumask_scnprintf - print a cpumask into a string as comma-separated hex 950 + * @buf: the buffer to sprintf into 951 + * @len: the length of the buffer 952 + * @srcp: the cpumask to print 953 + * 954 + * If len is zero, returns zero. Otherwise returns the length of the 955 + * (nul-terminated) @buf string. 956 + */ 957 + static inline int cpumask_scnprintf(char *buf, int len, 958 + const struct cpumask *srcp) 959 + { 960 + return bitmap_scnprintf(buf, len, srcp->bits, nr_cpumask_bits); 961 + } 962 + 963 + /** 964 + * cpumask_parse_user - extract a cpumask from a user string 965 + * @buf: the buffer to extract from 966 + * @len: the length of the buffer 967 + * @dstp: the cpumask to set. 968 + * 969 + * Returns -errno, or 0 for success. 970 + */ 971 + static inline int cpumask_parse_user(const char __user *buf, int len, 972 + struct cpumask *dstp) 973 + { 974 + return bitmap_parse_user(buf, len, dstp->bits, nr_cpumask_bits); 975 + } 976 + 977 + /** 978 + * cpulist_scnprintf - print a cpumask into a string as comma-separated list 979 + * @buf: the buffer to sprintf into 980 + * @len: the length of the buffer 981 + * @srcp: the cpumask to print 982 + * 983 + * If len is zero, returns zero. Otherwise returns the length of the 984 + * (nul-terminated) @buf string. 985 + */ 986 + static inline int cpulist_scnprintf(char *buf, int len, 987 + const struct cpumask *srcp) 988 + { 989 + return bitmap_scnlistprintf(buf, len, srcp->bits, nr_cpumask_bits); 990 + } 991 + 992 + /** 993 + * cpulist_parse_user - extract a cpumask from a user string of ranges 994 + * @buf: the buffer to extract from 995 + * @len: the length of the buffer 996 + * @dstp: the cpumask to set. 997 + * 998 + * Returns -errno, or 0 for success. 999 + */ 1000 + static inline int cpulist_parse(const char *buf, struct cpumask *dstp) 1001 + { 1002 + return bitmap_parselist(buf, dstp->bits, nr_cpumask_bits); 1003 + } 1004 1005 /** 1006 * to_cpumask - convert an NR_CPUS bitmap to a struct cpumask *
+2 -2
include/linux/interrupt.h
··· 111 112 extern cpumask_t irq_default_affinity; 113 114 - extern int irq_set_affinity(unsigned int irq, cpumask_t cpumask); 115 extern int irq_can_set_affinity(unsigned int irq); 116 extern int irq_select_affinity(unsigned int irq); 117 118 #else /* CONFIG_SMP */ 119 120 - static inline int irq_set_affinity(unsigned int irq, cpumask_t cpumask) 121 { 122 return -EINVAL; 123 }
··· 111 112 extern cpumask_t irq_default_affinity; 113 114 + extern int irq_set_affinity(unsigned int irq, const struct cpumask *cpumask); 115 extern int irq_can_set_affinity(unsigned int irq); 116 extern int irq_select_affinity(unsigned int irq); 117 118 #else /* CONFIG_SMP */ 119 120 + static inline int irq_set_affinity(unsigned int irq, const struct cpumask *m) 121 { 122 return -EINVAL; 123 }
+2 -1
include/linux/irq.h
··· 113 void (*eoi)(unsigned int irq); 114 115 void (*end)(unsigned int irq); 116 - void (*set_affinity)(unsigned int irq, cpumask_t dest); 117 int (*retrigger)(unsigned int irq); 118 int (*set_type)(unsigned int irq, unsigned int flow_type); 119 int (*set_wake)(unsigned int irq, unsigned int on);
··· 113 void (*eoi)(unsigned int irq); 114 115 void (*end)(unsigned int irq); 116 + void (*set_affinity)(unsigned int irq, 117 + const struct cpumask *dest); 118 int (*retrigger)(unsigned int irq); 119 int (*set_type)(unsigned int irq, unsigned int flow_type); 120 int (*set_wake)(unsigned int irq, unsigned int on);
+72 -20
include/linux/sched.h
··· 250 extern int runqueue_is_locked(void); 251 extern void task_rq_unlock_wait(struct task_struct *p); 252 253 - extern cpumask_t nohz_cpu_mask; 254 #if defined(CONFIG_SMP) && defined(CONFIG_NO_HZ) 255 extern int select_nohz_load_balancer(int cpu); 256 #else ··· 758 #define SD_SERIALIZE 1024 /* Only a single load balancing instance */ 759 #define SD_WAKE_IDLE_FAR 2048 /* Gain latency sacrificing cache hit */ 760 761 - #define BALANCE_FOR_MC_POWER \ 762 - (sched_smt_power_savings ? SD_POWERSAVINGS_BALANCE : 0) 763 764 - #define BALANCE_FOR_PKG_POWER \ 765 - ((sched_mc_power_savings || sched_smt_power_savings) ? \ 766 - SD_POWERSAVINGS_BALANCE : 0) 767 768 - #define test_sd_parent(sd, flag) ((sd->parent && \ 769 - (sd->parent->flags & flag)) ? 1 : 0) 770 771 772 struct sched_group { 773 struct sched_group *next; /* Must be a circular list */ 774 - cpumask_t cpumask; 775 776 /* 777 * CPU power of this group, SCHED_LOAD_SCALE being max power for a ··· 815 * (see include/linux/reciprocal_div.h) 816 */ 817 u32 reciprocal_cpu_power; 818 }; 819 820 enum sched_domain_level { 821 SD_LV_NONE = 0, ··· 847 struct sched_domain *parent; /* top domain must be null terminated */ 848 struct sched_domain *child; /* bottom domain must be null terminated */ 849 struct sched_group *groups; /* the balancing groups of the domain */ 850 - cpumask_t span; /* span of all CPUs in this domain */ 851 unsigned long min_interval; /* Minimum balance interval ms */ 852 unsigned long max_interval; /* Maximum balance interval ms */ 853 unsigned int busy_factor; /* less balancing by factor if busy */ ··· 901 #ifdef CONFIG_SCHED_DEBUG 902 char *name; 903 #endif 904 }; 905 906 - extern void partition_sched_domains(int ndoms_new, cpumask_t *doms_new, 907 struct sched_domain_attr *dattr_new); 908 extern int arch_reinit_sched_domains(void); 909 910 #else /* CONFIG_SMP */ 911 912 struct sched_domain_attr; 913 914 static inline void 915 - partition_sched_domains(int ndoms_new, cpumask_t *doms_new, 916 struct sched_domain_attr *dattr_new) 917 { 918 } ··· 980 void (*task_wake_up) (struct rq *this_rq, struct task_struct *task); 981 982 void (*set_cpus_allowed)(struct task_struct *p, 983 - const cpumask_t *newmask); 984 985 void (*rq_online)(struct rq *rq); 986 void (*rq_offline)(struct rq *rq); ··· 1633 1634 #ifdef CONFIG_SMP 1635 extern int set_cpus_allowed_ptr(struct task_struct *p, 1636 - const cpumask_t *new_mask); 1637 #else 1638 static inline int set_cpus_allowed_ptr(struct task_struct *p, 1639 - const cpumask_t *new_mask) 1640 { 1641 - if (!cpu_isset(0, *new_mask)) 1642 return -EINVAL; 1643 return 0; 1644 } ··· 2249 } 2250 #endif 2251 2252 - extern long sched_setaffinity(pid_t pid, const cpumask_t *new_mask); 2253 - extern long sched_getaffinity(pid_t pid, cpumask_t *mask); 2254 - 2255 - extern int sched_mc_power_savings, sched_smt_power_savings; 2256 2257 extern void normalize_rt_tasks(void); 2258
··· 250 extern int runqueue_is_locked(void); 251 extern void task_rq_unlock_wait(struct task_struct *p); 252 253 + extern cpumask_var_t nohz_cpu_mask; 254 #if defined(CONFIG_SMP) && defined(CONFIG_NO_HZ) 255 extern int select_nohz_load_balancer(int cpu); 256 #else ··· 758 #define SD_SERIALIZE 1024 /* Only a single load balancing instance */ 759 #define SD_WAKE_IDLE_FAR 2048 /* Gain latency sacrificing cache hit */ 760 761 + enum powersavings_balance_level { 762 + POWERSAVINGS_BALANCE_NONE = 0, /* No power saving load balance */ 763 + POWERSAVINGS_BALANCE_BASIC, /* Fill one thread/core/package 764 + * first for long running threads 765 + */ 766 + POWERSAVINGS_BALANCE_WAKEUP, /* Also bias task wakeups to semi-idle 767 + * cpu package for power savings 768 + */ 769 + MAX_POWERSAVINGS_BALANCE_LEVELS 770 + }; 771 772 + extern int sched_mc_power_savings, sched_smt_power_savings; 773 774 + static inline int sd_balance_for_mc_power(void) 775 + { 776 + if (sched_smt_power_savings) 777 + return SD_POWERSAVINGS_BALANCE; 778 779 + return 0; 780 + } 781 + 782 + static inline int sd_balance_for_package_power(void) 783 + { 784 + if (sched_mc_power_savings | sched_smt_power_savings) 785 + return SD_POWERSAVINGS_BALANCE; 786 + 787 + return 0; 788 + } 789 + 790 + /* 791 + * Optimise SD flags for power savings: 792 + * SD_BALANCE_NEWIDLE helps agressive task consolidation and power savings. 793 + * Keep default SD flags if sched_{smt,mc}_power_saving=0 794 + */ 795 + 796 + static inline int sd_power_saving_flags(void) 797 + { 798 + if (sched_mc_power_savings | sched_smt_power_savings) 799 + return SD_BALANCE_NEWIDLE; 800 + 801 + return 0; 802 + } 803 804 struct sched_group { 805 struct sched_group *next; /* Must be a circular list */ 806 807 /* 808 * CPU power of this group, SCHED_LOAD_SCALE being max power for a ··· 784 * (see include/linux/reciprocal_div.h) 785 */ 786 u32 reciprocal_cpu_power; 787 + 788 + unsigned long cpumask[]; 789 }; 790 + 791 + static inline struct cpumask *sched_group_cpus(struct sched_group *sg) 792 + { 793 + return to_cpumask(sg->cpumask); 794 + } 795 796 enum sched_domain_level { 797 SD_LV_NONE = 0, ··· 809 struct sched_domain *parent; /* top domain must be null terminated */ 810 struct sched_domain *child; /* bottom domain must be null terminated */ 811 struct sched_group *groups; /* the balancing groups of the domain */ 812 unsigned long min_interval; /* Minimum balance interval ms */ 813 unsigned long max_interval; /* Maximum balance interval ms */ 814 unsigned int busy_factor; /* less balancing by factor if busy */ ··· 864 #ifdef CONFIG_SCHED_DEBUG 865 char *name; 866 #endif 867 + 868 + /* span of all CPUs in this domain */ 869 + unsigned long span[]; 870 }; 871 872 + static inline struct cpumask *sched_domain_span(struct sched_domain *sd) 873 + { 874 + return to_cpumask(sd->span); 875 + } 876 + 877 + extern void partition_sched_domains(int ndoms_new, struct cpumask *doms_new, 878 struct sched_domain_attr *dattr_new); 879 extern int arch_reinit_sched_domains(void); 880 + 881 + /* Test a flag in parent sched domain */ 882 + static inline int test_sd_parent(struct sched_domain *sd, int flag) 883 + { 884 + if (sd->parent && (sd->parent->flags & flag)) 885 + return 1; 886 + 887 + return 0; 888 + } 889 890 #else /* CONFIG_SMP */ 891 892 struct sched_domain_attr; 893 894 static inline void 895 + partition_sched_domains(int ndoms_new, struct cpumask *doms_new, 896 struct sched_domain_attr *dattr_new) 897 { 898 } ··· 926 void (*task_wake_up) (struct rq *this_rq, struct task_struct *task); 927 928 void (*set_cpus_allowed)(struct task_struct *p, 929 + const struct cpumask *newmask); 930 931 void (*rq_online)(struct rq *rq); 932 void (*rq_offline)(struct rq *rq); ··· 1579 1580 #ifdef CONFIG_SMP 1581 extern int set_cpus_allowed_ptr(struct task_struct *p, 1582 + const struct cpumask *new_mask); 1583 #else 1584 static inline int set_cpus_allowed_ptr(struct task_struct *p, 1585 + const struct cpumask *new_mask) 1586 { 1587 + if (!cpumask_test_cpu(0, new_mask)) 1588 return -EINVAL; 1589 return 0; 1590 } ··· 2195 } 2196 #endif 2197 2198 + extern long sched_setaffinity(pid_t pid, const struct cpumask *new_mask); 2199 + extern long sched_getaffinity(pid_t pid, struct cpumask *mask); 2200 2201 extern void normalize_rt_tasks(void); 2202
+4 -2
include/linux/topology.h
··· 125 | SD_WAKE_AFFINE \ 126 | SD_WAKE_BALANCE \ 127 | SD_SHARE_PKG_RESOURCES\ 128 - | BALANCE_FOR_MC_POWER, \ 129 .last_balance = jiffies, \ 130 .balance_interval = 1, \ 131 } ··· 151 | SD_BALANCE_FORK \ 152 | SD_WAKE_AFFINE \ 153 | SD_WAKE_BALANCE \ 154 - | BALANCE_FOR_PKG_POWER,\ 155 .last_balance = jiffies, \ 156 .balance_interval = 1, \ 157 }
··· 125 | SD_WAKE_AFFINE \ 126 | SD_WAKE_BALANCE \ 127 | SD_SHARE_PKG_RESOURCES\ 128 + | sd_balance_for_mc_power()\ 129 + | sd_power_saving_flags(),\ 130 .last_balance = jiffies, \ 131 .balance_interval = 1, \ 132 } ··· 150 | SD_BALANCE_FORK \ 151 | SD_WAKE_AFFINE \ 152 | SD_WAKE_BALANCE \ 153 + | sd_balance_for_package_power()\ 154 + | sd_power_saving_flags(),\ 155 .last_balance = jiffies, \ 156 .balance_interval = 1, \ 157 }
+9
init/Kconfig
··· 924 925 endif # MODULES 926 927 config STOP_MACHINE 928 bool 929 default y
··· 924 925 endif # MODULES 926 927 + config INIT_ALL_POSSIBLE 928 + bool 929 + help 930 + Back when each arch used to define their own cpu_online_map and 931 + cpu_possible_map, some of them chose to initialize cpu_possible_map 932 + with all 1s, and others with all 0s. When they were centralised, 933 + it was better to provide this option than to break all the archs 934 + and have several arch maintainers persuing me down dark alleys. 935 + 936 config STOP_MACHINE 937 bool 938 default y
+6 -5
kernel/cpu.c
··· 24 cpumask_t cpu_present_map __read_mostly; 25 EXPORT_SYMBOL(cpu_present_map); 26 27 - #ifndef CONFIG_SMP 28 - 29 /* 30 * Represents all cpu's that are currently online. 31 */ 32 - cpumask_t cpu_online_map __read_mostly = CPU_MASK_ALL; 33 EXPORT_SYMBOL(cpu_online_map); 34 35 cpumask_t cpu_possible_map __read_mostly = CPU_MASK_ALL; 36 EXPORT_SYMBOL(cpu_possible_map); 37 38 - #else /* CONFIG_SMP */ 39 - 40 /* Serializes the updates to cpu_online_map, cpu_present_map */ 41 static DEFINE_MUTEX(cpu_add_remove_lock); 42
··· 24 cpumask_t cpu_present_map __read_mostly; 25 EXPORT_SYMBOL(cpu_present_map); 26 27 /* 28 * Represents all cpu's that are currently online. 29 */ 30 + cpumask_t cpu_online_map __read_mostly; 31 EXPORT_SYMBOL(cpu_online_map); 32 33 + #ifdef CONFIG_INIT_ALL_POSSIBLE 34 cpumask_t cpu_possible_map __read_mostly = CPU_MASK_ALL; 35 + #else 36 + cpumask_t cpu_possible_map __read_mostly; 37 + #endif 38 EXPORT_SYMBOL(cpu_possible_map); 39 40 + #ifdef CONFIG_SMP 41 /* Serializes the updates to cpu_online_map, cpu_present_map */ 42 static DEFINE_MUTEX(cpu_add_remove_lock); 43
+2 -2
kernel/cpuset.c
··· 896 if (!*buf) { 897 cpus_clear(trialcs.cpus_allowed); 898 } else { 899 - retval = cpulist_parse(buf, trialcs.cpus_allowed); 900 if (retval < 0) 901 return retval; 902 ··· 1482 mask = cs->cpus_allowed; 1483 mutex_unlock(&callback_mutex); 1484 1485 - return cpulist_scnprintf(page, PAGE_SIZE, mask); 1486 } 1487 1488 static int cpuset_sprintf_memlist(char *page, struct cpuset *cs)
··· 896 if (!*buf) { 897 cpus_clear(trialcs.cpus_allowed); 898 } else { 899 + retval = cpulist_parse(buf, &trialcs.cpus_allowed); 900 if (retval < 0) 901 return retval; 902 ··· 1482 mask = cs->cpus_allowed; 1483 mutex_unlock(&callback_mutex); 1484 1485 + return cpulist_scnprintf(page, PAGE_SIZE, &mask); 1486 } 1487 1488 static int cpuset_sprintf_memlist(char *page, struct cpuset *cs)
+1 -1
kernel/irq/chip.c
··· 46 desc->irq_count = 0; 47 desc->irqs_unhandled = 0; 48 #ifdef CONFIG_SMP 49 - cpus_setall(desc->affinity); 50 #endif 51 spin_unlock_irqrestore(&desc->lock, flags); 52 }
··· 46 desc->irq_count = 0; 47 desc->irqs_unhandled = 0; 48 #ifdef CONFIG_SMP 49 + cpumask_setall(&desc->affinity); 50 #endif 51 spin_unlock_irqrestore(&desc->lock, flags); 52 }
+10 -12
kernel/irq/manage.c
··· 79 * @cpumask: cpumask 80 * 81 */ 82 - int irq_set_affinity(unsigned int irq, cpumask_t cpumask) 83 { 84 struct irq_desc *desc = irq_to_desc(irq); 85 unsigned long flags; ··· 91 92 #ifdef CONFIG_GENERIC_PENDING_IRQ 93 if (desc->status & IRQ_MOVE_PCNTXT || desc->status & IRQ_DISABLED) { 94 - desc->affinity = cpumask; 95 desc->chip->set_affinity(irq, cpumask); 96 } else { 97 desc->status |= IRQ_MOVE_PENDING; 98 - desc->pending_mask = cpumask; 99 } 100 #else 101 - desc->affinity = cpumask; 102 desc->chip->set_affinity(irq, cpumask); 103 #endif 104 desc->status |= IRQ_AFFINITY_SET; ··· 112 */ 113 int do_irq_select_affinity(unsigned int irq, struct irq_desc *desc) 114 { 115 - cpumask_t mask; 116 - 117 if (!irq_can_set_affinity(irq)) 118 return 0; 119 - 120 - cpus_and(mask, cpu_online_map, irq_default_affinity); 121 122 /* 123 * Preserve an userspace affinity setup, but make sure that 124 * one of the targets is online. 125 */ 126 if (desc->status & (IRQ_AFFINITY_SET | IRQ_NO_BALANCING)) { 127 - if (cpus_intersects(desc->affinity, cpu_online_map)) 128 - mask = desc->affinity; 129 else 130 desc->status &= ~IRQ_AFFINITY_SET; 131 } 132 133 - desc->affinity = mask; 134 - desc->chip->set_affinity(irq, mask); 135 136 return 0; 137 }
··· 79 * @cpumask: cpumask 80 * 81 */ 82 + int irq_set_affinity(unsigned int irq, const struct cpumask *cpumask) 83 { 84 struct irq_desc *desc = irq_to_desc(irq); 85 unsigned long flags; ··· 91 92 #ifdef CONFIG_GENERIC_PENDING_IRQ 93 if (desc->status & IRQ_MOVE_PCNTXT || desc->status & IRQ_DISABLED) { 94 + cpumask_copy(&desc->affinity, cpumask); 95 desc->chip->set_affinity(irq, cpumask); 96 } else { 97 desc->status |= IRQ_MOVE_PENDING; 98 + cpumask_copy(&desc->pending_mask, cpumask); 99 } 100 #else 101 + cpumask_copy(&desc->affinity, cpumask); 102 desc->chip->set_affinity(irq, cpumask); 103 #endif 104 desc->status |= IRQ_AFFINITY_SET; ··· 112 */ 113 int do_irq_select_affinity(unsigned int irq, struct irq_desc *desc) 114 { 115 if (!irq_can_set_affinity(irq)) 116 return 0; 117 118 /* 119 * Preserve an userspace affinity setup, but make sure that 120 * one of the targets is online. 121 */ 122 if (desc->status & (IRQ_AFFINITY_SET | IRQ_NO_BALANCING)) { 123 + if (cpumask_any_and(&desc->affinity, cpu_online_mask) 124 + < nr_cpu_ids) 125 + goto set_affinity; 126 else 127 desc->status &= ~IRQ_AFFINITY_SET; 128 } 129 130 + cpumask_and(&desc->affinity, cpu_online_mask, &irq_default_affinity); 131 + set_affinity: 132 + desc->chip->set_affinity(irq, &desc->affinity); 133 134 return 0; 135 }
+7 -7
kernel/irq/migration.c
··· 4 void move_masked_irq(int irq) 5 { 6 struct irq_desc *desc = irq_to_desc(irq); 7 - cpumask_t tmp; 8 9 if (likely(!(desc->status & IRQ_MOVE_PENDING))) 10 return; ··· 18 19 desc->status &= ~IRQ_MOVE_PENDING; 20 21 - if (unlikely(cpus_empty(desc->pending_mask))) 22 return; 23 24 if (!desc->chip->set_affinity) 25 return; 26 27 assert_spin_locked(&desc->lock); 28 - 29 - cpus_and(tmp, desc->pending_mask, cpu_online_map); 30 31 /* 32 * If there was a valid mask to work with, please ··· 38 * For correct operation this depends on the caller 39 * masking the irqs. 40 */ 41 - if (likely(!cpus_empty(tmp))) { 42 - desc->chip->set_affinity(irq,tmp); 43 } 44 - cpus_clear(desc->pending_mask); 45 } 46 47 void move_native_irq(int irq)
··· 4 void move_masked_irq(int irq) 5 { 6 struct irq_desc *desc = irq_to_desc(irq); 7 8 if (likely(!(desc->status & IRQ_MOVE_PENDING))) 9 return; ··· 19 20 desc->status &= ~IRQ_MOVE_PENDING; 21 22 + if (unlikely(cpumask_empty(&desc->pending_mask))) 23 return; 24 25 if (!desc->chip->set_affinity) 26 return; 27 28 assert_spin_locked(&desc->lock); 29 30 /* 31 * If there was a valid mask to work with, please ··· 41 * For correct operation this depends on the caller 42 * masking the irqs. 43 */ 44 + if (likely(cpumask_any_and(&desc->pending_mask, cpu_online_mask) 45 + < nr_cpu_ids)) { 46 + cpumask_and(&desc->affinity, 47 + &desc->pending_mask, cpu_online_mask); 48 + desc->chip->set_affinity(irq, &desc->affinity); 49 } 50 + cpumask_clear(&desc->pending_mask); 51 } 52 53 void move_native_irq(int irq)
+19 -10
kernel/irq/proc.c
··· 40 const char __user *buffer, size_t count, loff_t *pos) 41 { 42 unsigned int irq = (int)(long)PDE(file->f_path.dentry->d_inode)->data; 43 - cpumask_t new_value; 44 int err; 45 46 if (!irq_to_desc(irq)->chip->set_affinity || no_irq_affinity || 47 irq_balancing_disabled(irq)) 48 return -EIO; 49 50 err = cpumask_parse_user(buffer, count, new_value); 51 if (err) 52 - return err; 53 54 - if (!is_affinity_mask_valid(new_value)) 55 - return -EINVAL; 56 57 /* 58 * Do not allow disabling IRQs completely - it's a too easy 59 * way to make the system unusable accidentally :-) At least 60 * one online CPU still has to be targeted. 61 */ 62 - if (!cpus_intersects(new_value, cpu_online_map)) 63 /* Special case for empty set - allow the architecture 64 code to set default SMP affinity. */ 65 - return irq_select_affinity_usr(irq) ? -EINVAL : count; 66 67 - irq_set_affinity(irq, new_value); 68 - 69 - return count; 70 } 71 72 static int irq_affinity_proc_open(struct inode *inode, struct file *file) ··· 104 cpumask_t new_value; 105 int err; 106 107 - err = cpumask_parse_user(buffer, count, new_value); 108 if (err) 109 return err; 110
··· 40 const char __user *buffer, size_t count, loff_t *pos) 41 { 42 unsigned int irq = (int)(long)PDE(file->f_path.dentry->d_inode)->data; 43 + cpumask_var_t new_value; 44 int err; 45 46 if (!irq_to_desc(irq)->chip->set_affinity || no_irq_affinity || 47 irq_balancing_disabled(irq)) 48 return -EIO; 49 50 + if (!alloc_cpumask_var(&new_value, GFP_KERNEL)) 51 + return -ENOMEM; 52 + 53 err = cpumask_parse_user(buffer, count, new_value); 54 if (err) 55 + goto free_cpumask; 56 57 + if (!is_affinity_mask_valid(*new_value)) { 58 + err = -EINVAL; 59 + goto free_cpumask; 60 + } 61 62 /* 63 * Do not allow disabling IRQs completely - it's a too easy 64 * way to make the system unusable accidentally :-) At least 65 * one online CPU still has to be targeted. 66 */ 67 + if (!cpumask_intersects(new_value, cpu_online_mask)) { 68 /* Special case for empty set - allow the architecture 69 code to set default SMP affinity. */ 70 + err = irq_select_affinity_usr(irq) ? -EINVAL : count; 71 + } else { 72 + irq_set_affinity(irq, new_value); 73 + err = count; 74 + } 75 76 + free_cpumask: 77 + free_cpumask_var(new_value); 78 + return err; 79 } 80 81 static int irq_affinity_proc_open(struct inode *inode, struct file *file) ··· 95 cpumask_t new_value; 96 int err; 97 98 + err = cpumask_parse_user(buffer, count, &new_value); 99 if (err) 100 return err; 101
+2 -2
kernel/profile.c
··· 442 static int prof_cpu_mask_read_proc(char *page, char **start, off_t off, 443 int count, int *eof, void *data) 444 { 445 - int len = cpumask_scnprintf(page, count, *(cpumask_t *)data); 446 if (count - len < 2) 447 return -EINVAL; 448 len += sprintf(page + len, "\n"); ··· 456 unsigned long full_count = count, err; 457 cpumask_t new_value; 458 459 - err = cpumask_parse_user(buffer, count, new_value); 460 if (err) 461 return err; 462
··· 442 static int prof_cpu_mask_read_proc(char *page, char **start, off_t off, 443 int count, int *eof, void *data) 444 { 445 + int len = cpumask_scnprintf(page, count, (cpumask_t *)data); 446 if (count - len < 2) 447 return -EINVAL; 448 len += sprintf(page + len, "\n"); ··· 456 unsigned long full_count = count, err; 457 cpumask_t new_value; 458 459 + err = cpumask_parse_user(buffer, count, &new_value); 460 if (err) 461 return err; 462
+1 -1
kernel/rcuclassic.c
··· 393 * unnecessarily. 394 */ 395 smp_mb(); 396 - cpus_andnot(rcp->cpumask, cpu_online_map, nohz_cpu_mask); 397 398 rcp->signaled = 0; 399 }
··· 393 * unnecessarily. 394 */ 395 smp_mb(); 396 + cpumask_andnot(&rcp->cpumask, cpu_online_mask, nohz_cpu_mask); 397 398 rcp->signaled = 0; 399 }
+553 -411
kernel/sched.c
··· 498 */ 499 struct root_domain { 500 atomic_t refcount; 501 - cpumask_t span; 502 - cpumask_t online; 503 504 /* 505 * The "RT overload" flag: it gets set if a CPU has more than 506 * one runnable RT task. 507 */ 508 - cpumask_t rto_mask; 509 atomic_t rto_count; 510 #ifdef CONFIG_SMP 511 struct cpupri cpupri; 512 #endif 513 }; 514 ··· 1522 struct sched_domain *sd = data; 1523 int i; 1524 1525 - for_each_cpu_mask(i, sd->span) { 1526 /* 1527 * If there are currently no tasks on the cpu pretend there 1528 * is one of average load so that when a new task gets to ··· 1543 if (!sd->parent || !(sd->parent->flags & SD_LOAD_BALANCE)) 1544 shares = tg->shares; 1545 1546 - for_each_cpu_mask(i, sd->span) 1547 update_group_shares_cpu(tg, i, shares, rq_weight); 1548 1549 return 0; ··· 2109 int i; 2110 2111 /* Skip over this group if it has no CPUs allowed */ 2112 - if (!cpus_intersects(group->cpumask, p->cpus_allowed)) 2113 continue; 2114 2115 - local_group = cpu_isset(this_cpu, group->cpumask); 2116 2117 /* Tally up the load of all CPUs in the group */ 2118 avg_load = 0; 2119 2120 - for_each_cpu_mask_nr(i, group->cpumask) { 2121 /* Bias balancing toward cpus of our domain */ 2122 if (local_group) 2123 load = source_load(i, load_idx); ··· 2151 * find_idlest_cpu - find the idlest cpu among the cpus in group. 2152 */ 2153 static int 2154 - find_idlest_cpu(struct sched_group *group, struct task_struct *p, int this_cpu, 2155 - cpumask_t *tmp) 2156 { 2157 unsigned long load, min_load = ULONG_MAX; 2158 int idlest = -1; 2159 int i; 2160 2161 /* Traverse only the allowed CPUs */ 2162 - cpus_and(*tmp, group->cpumask, p->cpus_allowed); 2163 - 2164 - for_each_cpu_mask_nr(i, *tmp) { 2165 load = weighted_cpuload(i); 2166 2167 if (load < min_load || (load == min_load && i == this_cpu)) { ··· 2200 update_shares(sd); 2201 2202 while (sd) { 2203 - cpumask_t span, tmpmask; 2204 struct sched_group *group; 2205 int new_cpu, weight; 2206 ··· 2208 continue; 2209 } 2210 2211 - span = sd->span; 2212 group = find_idlest_group(sd, t, cpu); 2213 if (!group) { 2214 sd = sd->child; 2215 continue; 2216 } 2217 2218 - new_cpu = find_idlest_cpu(group, t, cpu, &tmpmask); 2219 if (new_cpu == -1 || new_cpu == cpu) { 2220 /* Now try balancing at a lower domain level of cpu */ 2221 sd = sd->child; ··· 2223 2224 /* Now try balancing at a lower domain level of new_cpu */ 2225 cpu = new_cpu; 2226 sd = NULL; 2227 - weight = cpus_weight(span); 2228 for_each_domain(cpu, tmp) { 2229 - if (weight <= cpus_weight(tmp->span)) 2230 break; 2231 if (tmp->flags & flag) 2232 sd = tmp; ··· 2271 cpu = task_cpu(p); 2272 2273 for_each_domain(this_cpu, sd) { 2274 - if (cpu_isset(cpu, sd->span)) { 2275 update_shares(sd); 2276 break; 2277 } ··· 2320 else { 2321 struct sched_domain *sd; 2322 for_each_domain(this_cpu, sd) { 2323 - if (cpu_isset(cpu, sd->span)) { 2324 schedstat_inc(sd, ttwu_wake_remote); 2325 break; 2326 } ··· 2851 struct rq *rq; 2852 2853 rq = task_rq_lock(p, &flags); 2854 - if (!cpu_isset(dest_cpu, p->cpus_allowed) 2855 || unlikely(!cpu_active(dest_cpu))) 2856 goto out; 2857 ··· 2916 * 2) cannot be migrated to this CPU due to cpus_allowed, or 2917 * 3) are cache-hot on their current CPU. 2918 */ 2919 - if (!cpu_isset(this_cpu, p->cpus_allowed)) { 2920 schedstat_inc(p, se.nr_failed_migrations_affine); 2921 return 0; 2922 } ··· 3091 static struct sched_group * 3092 find_busiest_group(struct sched_domain *sd, int this_cpu, 3093 unsigned long *imbalance, enum cpu_idle_type idle, 3094 - int *sd_idle, const cpumask_t *cpus, int *balance) 3095 { 3096 struct sched_group *busiest = NULL, *this = NULL, *group = sd->groups; 3097 unsigned long max_load, avg_load, total_load, this_load, total_pwr; ··· 3127 unsigned long sum_avg_load_per_task; 3128 unsigned long avg_load_per_task; 3129 3130 - local_group = cpu_isset(this_cpu, group->cpumask); 3131 3132 if (local_group) 3133 - balance_cpu = first_cpu(group->cpumask); 3134 3135 /* Tally up the load of all CPUs in the group */ 3136 sum_weighted_load = sum_nr_running = avg_load = 0; ··· 3140 max_cpu_load = 0; 3141 min_cpu_load = ~0UL; 3142 3143 - for_each_cpu_mask_nr(i, group->cpumask) { 3144 - struct rq *rq; 3145 - 3146 - if (!cpu_isset(i, *cpus)) 3147 - continue; 3148 - 3149 - rq = cpu_rq(i); 3150 3151 if (*sd_idle && rq->nr_running) 3152 *sd_idle = 0; ··· 3252 */ 3253 if ((sum_nr_running < min_nr_running) || 3254 (sum_nr_running == min_nr_running && 3255 - first_cpu(group->cpumask) < 3256 - first_cpu(group_min->cpumask))) { 3257 group_min = group; 3258 min_nr_running = sum_nr_running; 3259 min_load_per_task = sum_weighted_load / ··· 3268 if (sum_nr_running <= group_capacity - 1) { 3269 if (sum_nr_running > leader_nr_running || 3270 (sum_nr_running == leader_nr_running && 3271 - first_cpu(group->cpumask) > 3272 - first_cpu(group_leader->cpumask))) { 3273 group_leader = group; 3274 leader_nr_running = sum_nr_running; 3275 } ··· 3395 3396 if (this == group_leader && group_leader != group_min) { 3397 *imbalance = min_load_per_task; 3398 return group_min; 3399 } 3400 #endif ··· 3412 */ 3413 static struct rq * 3414 find_busiest_queue(struct sched_group *group, enum cpu_idle_type idle, 3415 - unsigned long imbalance, const cpumask_t *cpus) 3416 { 3417 struct rq *busiest = NULL, *rq; 3418 unsigned long max_load = 0; 3419 int i; 3420 3421 - for_each_cpu_mask_nr(i, group->cpumask) { 3422 unsigned long wl; 3423 3424 - if (!cpu_isset(i, *cpus)) 3425 continue; 3426 3427 rq = cpu_rq(i); ··· 3451 */ 3452 static int load_balance(int this_cpu, struct rq *this_rq, 3453 struct sched_domain *sd, enum cpu_idle_type idle, 3454 - int *balance, cpumask_t *cpus) 3455 { 3456 int ld_moved, all_pinned = 0, active_balance = 0, sd_idle = 0; 3457 struct sched_group *group; ··· 3459 struct rq *busiest; 3460 unsigned long flags; 3461 3462 - cpus_setall(*cpus); 3463 3464 /* 3465 * When power savings policy is enabled for the parent domain, idle ··· 3519 3520 /* All tasks on this runqueue were pinned by CPU affinity */ 3521 if (unlikely(all_pinned)) { 3522 - cpu_clear(cpu_of(busiest), *cpus); 3523 - if (!cpus_empty(*cpus)) 3524 goto redo; 3525 goto out_balanced; 3526 } ··· 3537 /* don't kick the migration_thread, if the curr 3538 * task on busiest cpu can't be moved to this_cpu 3539 */ 3540 - if (!cpu_isset(this_cpu, busiest->curr->cpus_allowed)) { 3541 spin_unlock_irqrestore(&busiest->lock, flags); 3542 all_pinned = 1; 3543 goto out_one_pinned; ··· 3613 */ 3614 static int 3615 load_balance_newidle(int this_cpu, struct rq *this_rq, struct sched_domain *sd, 3616 - cpumask_t *cpus) 3617 { 3618 struct sched_group *group; 3619 struct rq *busiest = NULL; ··· 3622 int sd_idle = 0; 3623 int all_pinned = 0; 3624 3625 - cpus_setall(*cpus); 3626 3627 /* 3628 * When power savings policy is enabled for the parent domain, idle ··· 3666 double_unlock_balance(this_rq, busiest); 3667 3668 if (unlikely(all_pinned)) { 3669 - cpu_clear(cpu_of(busiest), *cpus); 3670 - if (!cpus_empty(*cpus)) 3671 goto redo; 3672 } 3673 } 3674 3675 if (!ld_moved) { 3676 schedstat_inc(sd, lb_failed[CPU_NEWLY_IDLE]); 3677 if (!sd_idle && sd->flags & SD_SHARE_CPUPOWER && 3678 !test_sd_parent(sd, SD_POWERSAVINGS_BALANCE)) 3679 return -1; 3680 } else 3681 sd->nr_balance_failed = 0; 3682 ··· 3756 struct sched_domain *sd; 3757 int pulled_task = 0; 3758 unsigned long next_balance = jiffies + HZ; 3759 - cpumask_t tmpmask; 3760 3761 for_each_domain(this_cpu, sd) { 3762 unsigned long interval; ··· 3770 if (sd->flags & SD_BALANCE_NEWIDLE) 3771 /* If we've pulled tasks over stop searching: */ 3772 pulled_task = load_balance_newidle(this_cpu, this_rq, 3773 - sd, &tmpmask); 3774 3775 interval = msecs_to_jiffies(sd->balance_interval); 3776 if (time_after(next_balance, sd->last_balance + interval)) ··· 3785 */ 3786 this_rq->next_balance = next_balance; 3787 } 3788 } 3789 3790 /* ··· 3823 /* Search for an sd spanning us and the target CPU. */ 3824 for_each_domain(target_cpu, sd) { 3825 if ((sd->flags & SD_LOAD_BALANCE) && 3826 - cpu_isset(busiest_cpu, sd->span)) 3827 break; 3828 } 3829 ··· 3842 #ifdef CONFIG_NO_HZ 3843 static struct { 3844 atomic_t load_balancer; 3845 - cpumask_t cpu_mask; 3846 } nohz ____cacheline_aligned = { 3847 .load_balancer = ATOMIC_INIT(-1), 3848 - .cpu_mask = CPU_MASK_NONE, 3849 }; 3850 3851 /* ··· 3872 int cpu = smp_processor_id(); 3873 3874 if (stop_tick) { 3875 - cpu_set(cpu, nohz.cpu_mask); 3876 cpu_rq(cpu)->in_nohz_recently = 1; 3877 3878 /* ··· 3886 } 3887 3888 /* time for ilb owner also to sleep */ 3889 - if (cpus_weight(nohz.cpu_mask) == num_online_cpus()) { 3890 if (atomic_read(&nohz.load_balancer) == cpu) 3891 atomic_set(&nohz.load_balancer, -1); 3892 return 0; ··· 3899 } else if (atomic_read(&nohz.load_balancer) == cpu) 3900 return 1; 3901 } else { 3902 - if (!cpu_isset(cpu, nohz.cpu_mask)) 3903 return 0; 3904 3905 - cpu_clear(cpu, nohz.cpu_mask); 3906 3907 if (atomic_read(&nohz.load_balancer) == cpu) 3908 if (atomic_cmpxchg(&nohz.load_balancer, cpu, -1) != cpu) ··· 3930 unsigned long next_balance = jiffies + 60*HZ; 3931 int update_next_balance = 0; 3932 int need_serialize; 3933 - cpumask_t tmp; 3934 3935 for_each_domain(cpu, sd) { 3936 if (!(sd->flags & SD_LOAD_BALANCE)) ··· 3959 } 3960 3961 if (time_after_eq(jiffies, sd->last_balance + interval)) { 3962 - if (load_balance(cpu, rq, sd, idle, &balance, &tmp)) { 3963 /* 3964 * We've pulled tasks over so either we're no 3965 * longer idle, or one of our SMT siblings is ··· 3993 */ 3994 if (likely(update_next_balance)) 3995 rq->next_balance = next_balance; 3996 } 3997 3998 /* ··· 4019 */ 4020 if (this_rq->idle_at_tick && 4021 atomic_read(&nohz.load_balancer) == this_cpu) { 4022 - cpumask_t cpus = nohz.cpu_mask; 4023 struct rq *rq; 4024 int balance_cpu; 4025 4026 - cpu_clear(this_cpu, cpus); 4027 - for_each_cpu_mask_nr(balance_cpu, cpus) { 4028 /* 4029 * If this cpu gets work to do, stop the load balancing 4030 * work being done for other cpus. Next load ··· 4063 rq->in_nohz_recently = 0; 4064 4065 if (atomic_read(&nohz.load_balancer) == cpu) { 4066 - cpu_clear(cpu, nohz.cpu_mask); 4067 atomic_set(&nohz.load_balancer, -1); 4068 } 4069 ··· 4076 * TBD: Traverse the sched domains and nominate 4077 * the nearest cpu in the nohz.cpu_mask. 4078 */ 4079 - int ilb = first_cpu(nohz.cpu_mask); 4080 4081 if (ilb < nr_cpu_ids) 4082 resched_cpu(ilb); ··· 4088 * cpus with ticks stopped, is it time for that to stop? 4089 */ 4090 if (rq->idle_at_tick && atomic_read(&nohz.load_balancer) == cpu && 4091 - cpus_weight(nohz.cpu_mask) == num_online_cpus()) { 4092 resched_cpu(cpu); 4093 return; 4094 } ··· 4098 * someone else, then no need raise the SCHED_SOFTIRQ 4099 */ 4100 if (rq->idle_at_tick && atomic_read(&nohz.load_balancer) != cpu && 4101 - cpu_isset(cpu, nohz.cpu_mask)) 4102 return; 4103 #endif 4104 if (time_after_eq(jiffies, rq->next_balance)) ··· 5471 return retval; 5472 } 5473 5474 - long sched_setaffinity(pid_t pid, const cpumask_t *in_mask) 5475 { 5476 - cpumask_t cpus_allowed; 5477 - cpumask_t new_mask = *in_mask; 5478 struct task_struct *p; 5479 int retval; 5480 ··· 5495 get_task_struct(p); 5496 read_unlock(&tasklist_lock); 5497 5498 retval = -EPERM; 5499 if (!check_same_owner(p) && !capable(CAP_SYS_NICE)) 5500 goto out_unlock; ··· 5511 if (retval) 5512 goto out_unlock; 5513 5514 - cpuset_cpus_allowed(p, &cpus_allowed); 5515 - cpus_and(new_mask, new_mask, cpus_allowed); 5516 again: 5517 - retval = set_cpus_allowed_ptr(p, &new_mask); 5518 5519 if (!retval) { 5520 - cpuset_cpus_allowed(p, &cpus_allowed); 5521 - if (!cpus_subset(new_mask, cpus_allowed)) { 5522 /* 5523 * We must have raced with a concurrent cpuset 5524 * update. Just reset the cpus_allowed to the 5525 * cpuset's cpus_allowed 5526 */ 5527 - new_mask = cpus_allowed; 5528 goto again; 5529 } 5530 } 5531 out_unlock: 5532 put_task_struct(p); 5533 put_online_cpus(); 5534 return retval; 5535 } 5536 5537 static int get_user_cpu_mask(unsigned long __user *user_mask_ptr, unsigned len, 5538 - cpumask_t *new_mask) 5539 { 5540 - if (len < sizeof(cpumask_t)) { 5541 - memset(new_mask, 0, sizeof(cpumask_t)); 5542 - } else if (len > sizeof(cpumask_t)) { 5543 - len = sizeof(cpumask_t); 5544 - } 5545 return copy_from_user(new_mask, user_mask_ptr, len) ? -EFAULT : 0; 5546 } 5547 ··· 5558 asmlinkage long sys_sched_setaffinity(pid_t pid, unsigned int len, 5559 unsigned long __user *user_mask_ptr) 5560 { 5561 - cpumask_t new_mask; 5562 int retval; 5563 5564 - retval = get_user_cpu_mask(user_mask_ptr, len, &new_mask); 5565 - if (retval) 5566 - return retval; 5567 5568 - return sched_setaffinity(pid, &new_mask); 5569 } 5570 5571 - long sched_getaffinity(pid_t pid, cpumask_t *mask) 5572 { 5573 struct task_struct *p; 5574 int retval; ··· 5588 if (retval) 5589 goto out_unlock; 5590 5591 - cpus_and(*mask, p->cpus_allowed, cpu_online_map); 5592 5593 out_unlock: 5594 read_unlock(&tasklist_lock); ··· 5607 unsigned long __user *user_mask_ptr) 5608 { 5609 int ret; 5610 - cpumask_t mask; 5611 5612 - if (len < sizeof(cpumask_t)) 5613 return -EINVAL; 5614 5615 - ret = sched_getaffinity(pid, &mask); 5616 - if (ret < 0) 5617 - return ret; 5618 5619 - if (copy_to_user(user_mask_ptr, &mask, sizeof(cpumask_t))) 5620 - return -EFAULT; 5621 5622 - return sizeof(cpumask_t); 5623 } 5624 5625 /** ··· 5966 idle->se.exec_start = sched_clock(); 5967 5968 idle->prio = idle->normal_prio = MAX_PRIO; 5969 - idle->cpus_allowed = cpumask_of_cpu(cpu); 5970 __set_task_cpu(idle, cpu); 5971 5972 rq->curr = rq->idle = idle; ··· 5993 * indicates which cpus entered this state. This is used 5994 * in the rcu update to wait only for active cpus. For system 5995 * which do not switch off the HZ timer nohz_cpu_mask should 5996 - * always be CPU_MASK_NONE. 5997 */ 5998 - cpumask_t nohz_cpu_mask = CPU_MASK_NONE; 5999 6000 /* 6001 * Increase the granularity value when there are more CPUs, ··· 6050 * task must not exit() & deallocate itself prematurely. The 6051 * call is not atomic; no spinlocks may be held. 6052 */ 6053 - int set_cpus_allowed_ptr(struct task_struct *p, const cpumask_t *new_mask) 6054 { 6055 struct migration_req req; 6056 unsigned long flags; ··· 6058 int ret = 0; 6059 6060 rq = task_rq_lock(p, &flags); 6061 - if (!cpus_intersects(*new_mask, cpu_online_map)) { 6062 ret = -EINVAL; 6063 goto out; 6064 } 6065 6066 if (unlikely((p->flags & PF_THREAD_BOUND) && p != current && 6067 - !cpus_equal(p->cpus_allowed, *new_mask))) { 6068 ret = -EINVAL; 6069 goto out; 6070 } ··· 6072 if (p->sched_class->set_cpus_allowed) 6073 p->sched_class->set_cpus_allowed(p, new_mask); 6074 else { 6075 - p->cpus_allowed = *new_mask; 6076 - p->rt.nr_cpus_allowed = cpus_weight(*new_mask); 6077 } 6078 6079 /* Can the task run on the task's current CPU? If so, we're done */ 6080 - if (cpu_isset(task_cpu(p), *new_mask)) 6081 goto out; 6082 6083 - if (migrate_task(p, any_online_cpu(*new_mask), &req)) { 6084 /* Need help from migration thread: drop lock and wait. */ 6085 task_rq_unlock(rq, &flags); 6086 wake_up_process(rq->migration_thread); ··· 6122 if (task_cpu(p) != src_cpu) 6123 goto done; 6124 /* Affinity changed (again). */ 6125 - if (!cpu_isset(dest_cpu, p->cpus_allowed)) 6126 goto fail; 6127 6128 on_rq = p->se.on_rq; ··· 6219 */ 6220 static void move_task_off_dead_cpu(int dead_cpu, struct task_struct *p) 6221 { 6222 - unsigned long flags; 6223 - cpumask_t mask; 6224 - struct rq *rq; 6225 int dest_cpu; 6226 6227 - do { 6228 - /* On same node? */ 6229 - mask = node_to_cpumask(cpu_to_node(dead_cpu)); 6230 - cpus_and(mask, mask, p->cpus_allowed); 6231 - dest_cpu = any_online_cpu(mask); 6232 6233 - /* On any allowed CPU? */ 6234 - if (dest_cpu >= nr_cpu_ids) 6235 - dest_cpu = any_online_cpu(p->cpus_allowed); 6236 6237 - /* No more Mr. Nice Guy. */ 6238 - if (dest_cpu >= nr_cpu_ids) { 6239 - cpumask_t cpus_allowed; 6240 6241 - cpuset_cpus_allowed_locked(p, &cpus_allowed); 6242 - /* 6243 - * Try to stay on the same cpuset, where the 6244 - * current cpuset may be a subset of all cpus. 6245 - * The cpuset_cpus_allowed_locked() variant of 6246 - * cpuset_cpus_allowed() will not block. It must be 6247 - * called within calls to cpuset_lock/cpuset_unlock. 6248 - */ 6249 - rq = task_rq_lock(p, &flags); 6250 - p->cpus_allowed = cpus_allowed; 6251 - dest_cpu = any_online_cpu(p->cpus_allowed); 6252 - task_rq_unlock(rq, &flags); 6253 - 6254 - /* 6255 - * Don't tell them about moving exiting tasks or 6256 - * kernel threads (both mm NULL), since they never 6257 - * leave kernel. 6258 - */ 6259 - if (p->mm && printk_ratelimit()) { 6260 - printk(KERN_INFO "process %d (%s) no " 6261 - "longer affine to cpu%d\n", 6262 - task_pid_nr(p), p->comm, dead_cpu); 6263 - } 6264 } 6265 - } while (!__migrate_task_irq(p, dead_cpu, dest_cpu)); 6266 } 6267 6268 /* ··· 6267 */ 6268 static void migrate_nr_uninterruptible(struct rq *rq_src) 6269 { 6270 - struct rq *rq_dest = cpu_rq(any_online_cpu(*CPU_MASK_ALL_PTR)); 6271 unsigned long flags; 6272 6273 local_irq_save(flags); ··· 6557 if (!rq->online) { 6558 const struct sched_class *class; 6559 6560 - cpu_set(rq->cpu, rq->rd->online); 6561 rq->online = 1; 6562 6563 for_each_class(class) { ··· 6577 class->rq_offline(rq); 6578 } 6579 6580 - cpu_clear(rq->cpu, rq->rd->online); 6581 rq->online = 0; 6582 } 6583 } ··· 6618 rq = cpu_rq(cpu); 6619 spin_lock_irqsave(&rq->lock, flags); 6620 if (rq->rd) { 6621 - BUG_ON(!cpu_isset(cpu, rq->rd->span)); 6622 6623 set_rq_online(rq); 6624 } ··· 6632 break; 6633 /* Unbind it from offline cpu so it can run. Fall thru. */ 6634 kthread_bind(cpu_rq(cpu)->migration_thread, 6635 - any_online_cpu(cpu_online_map)); 6636 kthread_stop(cpu_rq(cpu)->migration_thread); 6637 cpu_rq(cpu)->migration_thread = NULL; 6638 break; ··· 6682 rq = cpu_rq(cpu); 6683 spin_lock_irqsave(&rq->lock, flags); 6684 if (rq->rd) { 6685 - BUG_ON(!cpu_isset(cpu, rq->rd->span)); 6686 set_rq_offline(rq); 6687 } 6688 spin_unlock_irqrestore(&rq->lock, flags); ··· 6721 #ifdef CONFIG_SCHED_DEBUG 6722 6723 static int sched_domain_debug_one(struct sched_domain *sd, int cpu, int level, 6724 - cpumask_t *groupmask) 6725 { 6726 struct sched_group *group = sd->groups; 6727 char str[256]; 6728 6729 - cpulist_scnprintf(str, sizeof(str), sd->span); 6730 - cpus_clear(*groupmask); 6731 6732 printk(KERN_DEBUG "%*s domain %d: ", level, "", level); 6733 ··· 6741 6742 printk(KERN_CONT "span %s level %s\n", str, sd->name); 6743 6744 - if (!cpu_isset(cpu, sd->span)) { 6745 printk(KERN_ERR "ERROR: domain->span does not contain " 6746 "CPU%d\n", cpu); 6747 } 6748 - if (!cpu_isset(cpu, group->cpumask)) { 6749 printk(KERN_ERR "ERROR: domain->groups does not contain" 6750 " CPU%d\n", cpu); 6751 } ··· 6765 break; 6766 } 6767 6768 - if (!cpus_weight(group->cpumask)) { 6769 printk(KERN_CONT "\n"); 6770 printk(KERN_ERR "ERROR: empty group\n"); 6771 break; 6772 } 6773 6774 - if (cpus_intersects(*groupmask, group->cpumask)) { 6775 printk(KERN_CONT "\n"); 6776 printk(KERN_ERR "ERROR: repeated CPUs\n"); 6777 break; 6778 } 6779 6780 - cpus_or(*groupmask, *groupmask, group->cpumask); 6781 6782 - cpulist_scnprintf(str, sizeof(str), group->cpumask); 6783 printk(KERN_CONT " %s", str); 6784 6785 group = group->next; 6786 } while (group != sd->groups); 6787 printk(KERN_CONT "\n"); 6788 6789 - if (!cpus_equal(sd->span, *groupmask)) 6790 printk(KERN_ERR "ERROR: groups don't span domain->span\n"); 6791 6792 - if (sd->parent && !cpus_subset(*groupmask, sd->parent->span)) 6793 printk(KERN_ERR "ERROR: parent span is not a superset " 6794 "of domain->span\n"); 6795 return 0; ··· 6798 6799 static void sched_domain_debug(struct sched_domain *sd, int cpu) 6800 { 6801 - cpumask_t *groupmask; 6802 int level = 0; 6803 6804 if (!sd) { ··· 6808 6809 printk(KERN_DEBUG "CPU%d attaching sched-domain:\n", cpu); 6810 6811 - groupmask = kmalloc(sizeof(cpumask_t), GFP_KERNEL); 6812 - if (!groupmask) { 6813 printk(KERN_DEBUG "Cannot load-balance (out of memory)\n"); 6814 return; 6815 } ··· 6821 if (!sd) 6822 break; 6823 } 6824 - kfree(groupmask); 6825 } 6826 #else /* !CONFIG_SCHED_DEBUG */ 6827 # define sched_domain_debug(sd, cpu) do { } while (0) ··· 6829 6830 static int sd_degenerate(struct sched_domain *sd) 6831 { 6832 - if (cpus_weight(sd->span) == 1) 6833 return 1; 6834 6835 /* Following flags need at least 2 groups */ ··· 6860 if (sd_degenerate(parent)) 6861 return 1; 6862 6863 - if (!cpus_equal(sd->span, parent->span)) 6864 return 0; 6865 6866 /* Does parent contain flags not in child? */ ··· 6884 return 1; 6885 } 6886 6887 static void rq_attach_root(struct rq *rq, struct root_domain *rd) 6888 { 6889 unsigned long flags; ··· 6903 if (rq->rd) { 6904 struct root_domain *old_rd = rq->rd; 6905 6906 - if (cpu_isset(rq->cpu, old_rd->online)) 6907 set_rq_offline(rq); 6908 6909 - cpu_clear(rq->cpu, old_rd->span); 6910 6911 if (atomic_dec_and_test(&old_rd->refcount)) 6912 - kfree(old_rd); 6913 } 6914 6915 atomic_inc(&rd->refcount); 6916 rq->rd = rd; 6917 6918 - cpu_set(rq->cpu, rd->span); 6919 - if (cpu_isset(rq->cpu, cpu_online_map)) 6920 set_rq_online(rq); 6921 6922 spin_unlock_irqrestore(&rq->lock, flags); 6923 } 6924 6925 - static void init_rootdomain(struct root_domain *rd) 6926 { 6927 memset(rd, 0, sizeof(*rd)); 6928 6929 - cpus_clear(rd->span); 6930 - cpus_clear(rd->online); 6931 6932 - cpupri_init(&rd->cpupri); 6933 } 6934 6935 static void init_defrootdomain(void) 6936 { 6937 - init_rootdomain(&def_root_domain); 6938 atomic_set(&def_root_domain.refcount, 1); 6939 } 6940 ··· 6971 if (!rd) 6972 return NULL; 6973 6974 - init_rootdomain(rd); 6975 6976 return rd; 6977 } ··· 7016 } 7017 7018 /* cpus with isolated domains */ 7019 - static cpumask_t cpu_isolated_map = CPU_MASK_NONE; 7020 7021 /* Setup the mask of cpus configured for isolated domains */ 7022 static int __init isolated_cpu_setup(char *str) 7023 { 7024 - static int __initdata ints[NR_CPUS]; 7025 - int i; 7026 - 7027 - str = get_options(str, ARRAY_SIZE(ints), ints); 7028 - cpus_clear(cpu_isolated_map); 7029 - for (i = 1; i <= ints[0]; i++) 7030 - if (ints[i] < NR_CPUS) 7031 - cpu_set(ints[i], cpu_isolated_map); 7032 return 1; 7033 } 7034 ··· 7030 /* 7031 * init_sched_build_groups takes the cpumask we wish to span, and a pointer 7032 * to a function which identifies what group(along with sched group) a CPU 7033 - * belongs to. The return value of group_fn must be a >= 0 and < NR_CPUS 7034 - * (due to the fact that we keep track of groups covered with a cpumask_t). 7035 * 7036 * init_sched_build_groups will build a circular linked list of the groups 7037 * covered by the given span, and will set each group's ->cpumask correctly, 7038 * and ->cpu_power to 0. 7039 */ 7040 static void 7041 - init_sched_build_groups(const cpumask_t *span, const cpumask_t *cpu_map, 7042 - int (*group_fn)(int cpu, const cpumask_t *cpu_map, 7043 struct sched_group **sg, 7044 - cpumask_t *tmpmask), 7045 - cpumask_t *covered, cpumask_t *tmpmask) 7046 { 7047 struct sched_group *first = NULL, *last = NULL; 7048 int i; 7049 7050 - cpus_clear(*covered); 7051 7052 - for_each_cpu_mask_nr(i, *span) { 7053 struct sched_group *sg; 7054 int group = group_fn(i, cpu_map, &sg, tmpmask); 7055 int j; 7056 7057 - if (cpu_isset(i, *covered)) 7058 continue; 7059 7060 - cpus_clear(sg->cpumask); 7061 sg->__cpu_power = 0; 7062 7063 - for_each_cpu_mask_nr(j, *span) { 7064 if (group_fn(j, cpu_map, NULL, tmpmask) != group) 7065 continue; 7066 7067 - cpu_set(j, *covered); 7068 - cpu_set(j, sg->cpumask); 7069 } 7070 if (!first) 7071 first = sg; ··· 7130 * should be one that prevents unnecessary balancing, but also spreads tasks 7131 * out optimally. 7132 */ 7133 - static void sched_domain_node_span(int node, cpumask_t *span) 7134 { 7135 nodemask_t used_nodes; 7136 node_to_cpumask_ptr(nodemask, node); 7137 int i; 7138 ··· 7155 int sched_smt_power_savings = 0, sched_mc_power_savings = 0; 7156 7157 /* 7158 * SMT sched-domains: 7159 */ 7160 #ifdef CONFIG_SCHED_SMT 7161 - static DEFINE_PER_CPU(struct sched_domain, cpu_domains); 7162 - static DEFINE_PER_CPU(struct sched_group, sched_group_cpus); 7163 7164 static int 7165 - cpu_to_cpu_group(int cpu, const cpumask_t *cpu_map, struct sched_group **sg, 7166 - cpumask_t *unused) 7167 { 7168 if (sg) 7169 - *sg = &per_cpu(sched_group_cpus, cpu); 7170 return cpu; 7171 } 7172 #endif /* CONFIG_SCHED_SMT */ ··· 7190 * multi-core sched-domains: 7191 */ 7192 #ifdef CONFIG_SCHED_MC 7193 - static DEFINE_PER_CPU(struct sched_domain, core_domains); 7194 - static DEFINE_PER_CPU(struct sched_group, sched_group_core); 7195 #endif /* CONFIG_SCHED_MC */ 7196 7197 #if defined(CONFIG_SCHED_MC) && defined(CONFIG_SCHED_SMT) 7198 static int 7199 - cpu_to_core_group(int cpu, const cpumask_t *cpu_map, struct sched_group **sg, 7200 - cpumask_t *mask) 7201 { 7202 int group; 7203 7204 - *mask = per_cpu(cpu_sibling_map, cpu); 7205 - cpus_and(*mask, *mask, *cpu_map); 7206 - group = first_cpu(*mask); 7207 if (sg) 7208 - *sg = &per_cpu(sched_group_core, group); 7209 return group; 7210 } 7211 #elif defined(CONFIG_SCHED_MC) 7212 static int 7213 - cpu_to_core_group(int cpu, const cpumask_t *cpu_map, struct sched_group **sg, 7214 - cpumask_t *unused) 7215 { 7216 if (sg) 7217 - *sg = &per_cpu(sched_group_core, cpu); 7218 return cpu; 7219 } 7220 #endif 7221 7222 - static DEFINE_PER_CPU(struct sched_domain, phys_domains); 7223 - static DEFINE_PER_CPU(struct sched_group, sched_group_phys); 7224 7225 static int 7226 - cpu_to_phys_group(int cpu, const cpumask_t *cpu_map, struct sched_group **sg, 7227 - cpumask_t *mask) 7228 { 7229 int group; 7230 #ifdef CONFIG_SCHED_MC 7231 *mask = cpu_coregroup_map(cpu); 7232 cpus_and(*mask, *mask, *cpu_map); 7233 - group = first_cpu(*mask); 7234 #elif defined(CONFIG_SCHED_SMT) 7235 - *mask = per_cpu(cpu_sibling_map, cpu); 7236 - cpus_and(*mask, *mask, *cpu_map); 7237 - group = first_cpu(*mask); 7238 #else 7239 group = cpu; 7240 #endif 7241 if (sg) 7242 - *sg = &per_cpu(sched_group_phys, group); 7243 return group; 7244 } 7245 ··· 7252 static struct sched_group ***sched_group_nodes_bycpu; 7253 7254 static DEFINE_PER_CPU(struct sched_domain, allnodes_domains); 7255 - static DEFINE_PER_CPU(struct sched_group, sched_group_allnodes); 7256 7257 - static int cpu_to_allnodes_group(int cpu, const cpumask_t *cpu_map, 7258 - struct sched_group **sg, cpumask_t *nodemask) 7259 { 7260 int group; 7261 7262 - *nodemask = node_to_cpumask(cpu_to_node(cpu)); 7263 - cpus_and(*nodemask, *nodemask, *cpu_map); 7264 - group = first_cpu(*nodemask); 7265 7266 if (sg) 7267 - *sg = &per_cpu(sched_group_allnodes, group); 7268 return group; 7269 } 7270 ··· 7278 if (!sg) 7279 return; 7280 do { 7281 - for_each_cpu_mask_nr(j, sg->cpumask) { 7282 struct sched_domain *sd; 7283 7284 - sd = &per_cpu(phys_domains, j); 7285 - if (j != first_cpu(sd->groups->cpumask)) { 7286 /* 7287 * Only add "power" once for each 7288 * physical package. ··· 7299 7300 #ifdef CONFIG_NUMA 7301 /* Free memory allocated for various sched_group structures */ 7302 - static void free_sched_groups(const cpumask_t *cpu_map, cpumask_t *nodemask) 7303 { 7304 int cpu, i; 7305 7306 - for_each_cpu_mask_nr(cpu, *cpu_map) { 7307 struct sched_group **sched_group_nodes 7308 = sched_group_nodes_bycpu[cpu]; 7309 ··· 7313 7314 for (i = 0; i < nr_node_ids; i++) { 7315 struct sched_group *oldsg, *sg = sched_group_nodes[i]; 7316 7317 - *nodemask = node_to_cpumask(i); 7318 - cpus_and(*nodemask, *nodemask, *cpu_map); 7319 - if (cpus_empty(*nodemask)) 7320 continue; 7321 7322 if (sg == NULL) ··· 7335 } 7336 } 7337 #else /* !CONFIG_NUMA */ 7338 - static void free_sched_groups(const cpumask_t *cpu_map, cpumask_t *nodemask) 7339 { 7340 } 7341 #endif /* CONFIG_NUMA */ ··· 7362 7363 WARN_ON(!sd || !sd->groups); 7364 7365 - if (cpu != first_cpu(sd->groups->cpumask)) 7366 return; 7367 7368 child = sd->child; ··· 7427 SD_INIT_FUNC(MC) 7428 #endif 7429 7430 - /* 7431 - * To minimize stack usage kmalloc room for cpumasks and share the 7432 - * space as the usage in build_sched_domains() dictates. Used only 7433 - * if the amount of space is significant. 7434 - */ 7435 - struct allmasks { 7436 - cpumask_t tmpmask; /* make this one first */ 7437 - union { 7438 - cpumask_t nodemask; 7439 - cpumask_t this_sibling_map; 7440 - cpumask_t this_core_map; 7441 - }; 7442 - cpumask_t send_covered; 7443 - 7444 - #ifdef CONFIG_NUMA 7445 - cpumask_t domainspan; 7446 - cpumask_t covered; 7447 - cpumask_t notcovered; 7448 - #endif 7449 - }; 7450 - 7451 - #if NR_CPUS > 128 7452 - #define SCHED_CPUMASK_DECLARE(v) struct allmasks *v 7453 - static inline void sched_cpumask_alloc(struct allmasks **masks) 7454 - { 7455 - *masks = kmalloc(sizeof(**masks), GFP_KERNEL); 7456 - } 7457 - static inline void sched_cpumask_free(struct allmasks *masks) 7458 - { 7459 - kfree(masks); 7460 - } 7461 - #else 7462 - #define SCHED_CPUMASK_DECLARE(v) struct allmasks _v, *v = &_v 7463 - static inline void sched_cpumask_alloc(struct allmasks **masks) 7464 - { } 7465 - static inline void sched_cpumask_free(struct allmasks *masks) 7466 - { } 7467 - #endif 7468 - 7469 - #define SCHED_CPUMASK_VAR(v, a) cpumask_t *v = (cpumask_t *) \ 7470 - ((unsigned long)(a) + offsetof(struct allmasks, v)) 7471 - 7472 static int default_relax_domain_level = -1; 7473 7474 static int __init setup_relax_domain_level(char *str) ··· 7466 * Build sched domains for a given set of cpus and attach the sched domains 7467 * to the individual cpus 7468 */ 7469 - static int __build_sched_domains(const cpumask_t *cpu_map, 7470 struct sched_domain_attr *attr) 7471 { 7472 - int i; 7473 struct root_domain *rd; 7474 - SCHED_CPUMASK_DECLARE(allmasks); 7475 - cpumask_t *tmpmask; 7476 #ifdef CONFIG_NUMA 7477 struct sched_group **sched_group_nodes = NULL; 7478 int sd_allnodes = 0; 7479 7480 /* 7481 * Allocate the per-node list of sched groups 7482 */ ··· 7505 GFP_KERNEL); 7506 if (!sched_group_nodes) { 7507 printk(KERN_WARNING "Can not alloc sched group node list\n"); 7508 - return -ENOMEM; 7509 } 7510 #endif 7511 7512 rd = alloc_rootdomain(); 7513 if (!rd) { 7514 printk(KERN_WARNING "Cannot alloc root domain\n"); 7515 - #ifdef CONFIG_NUMA 7516 - kfree(sched_group_nodes); 7517 - #endif 7518 - return -ENOMEM; 7519 } 7520 7521 - /* get space for all scratch cpumask variables */ 7522 - sched_cpumask_alloc(&allmasks); 7523 - if (!allmasks) { 7524 - printk(KERN_WARNING "Cannot alloc cpumask array\n"); 7525 - kfree(rd); 7526 #ifdef CONFIG_NUMA 7527 - kfree(sched_group_nodes); 7528 - #endif 7529 - return -ENOMEM; 7530 - } 7531 - 7532 - tmpmask = (cpumask_t *)allmasks; 7533 - 7534 - 7535 - #ifdef CONFIG_NUMA 7536 - sched_group_nodes_bycpu[first_cpu(*cpu_map)] = sched_group_nodes; 7537 #endif 7538 7539 /* 7540 * Set up domains for cpus specified by the cpu_map. 7541 */ 7542 - for_each_cpu_mask_nr(i, *cpu_map) { 7543 struct sched_domain *sd = NULL, *p; 7544 - SCHED_CPUMASK_VAR(nodemask, allmasks); 7545 7546 *nodemask = node_to_cpumask(cpu_to_node(i)); 7547 cpus_and(*nodemask, *nodemask, *cpu_map); 7548 7549 #ifdef CONFIG_NUMA 7550 - if (cpus_weight(*cpu_map) > 7551 - SD_NODES_PER_DOMAIN*cpus_weight(*nodemask)) { 7552 sd = &per_cpu(allnodes_domains, i); 7553 SD_INIT(sd, ALLNODES); 7554 set_domain_attribute(sd, attr); 7555 - sd->span = *cpu_map; 7556 cpu_to_allnodes_group(i, cpu_map, &sd->groups, tmpmask); 7557 p = sd; 7558 sd_allnodes = 1; ··· 7545 sd = &per_cpu(node_domains, i); 7546 SD_INIT(sd, NODE); 7547 set_domain_attribute(sd, attr); 7548 - sched_domain_node_span(cpu_to_node(i), &sd->span); 7549 sd->parent = p; 7550 if (p) 7551 p->child = sd; 7552 - cpus_and(sd->span, sd->span, *cpu_map); 7553 #endif 7554 7555 p = sd; 7556 - sd = &per_cpu(phys_domains, i); 7557 SD_INIT(sd, CPU); 7558 set_domain_attribute(sd, attr); 7559 - sd->span = *nodemask; 7560 sd->parent = p; 7561 if (p) 7562 p->child = sd; ··· 7565 7566 #ifdef CONFIG_SCHED_MC 7567 p = sd; 7568 - sd = &per_cpu(core_domains, i); 7569 SD_INIT(sd, MC); 7570 set_domain_attribute(sd, attr); 7571 - sd->span = cpu_coregroup_map(i); 7572 - cpus_and(sd->span, sd->span, *cpu_map); 7573 sd->parent = p; 7574 p->child = sd; 7575 cpu_to_core_group(i, cpu_map, &sd->groups, tmpmask); ··· 7578 7579 #ifdef CONFIG_SCHED_SMT 7580 p = sd; 7581 - sd = &per_cpu(cpu_domains, i); 7582 SD_INIT(sd, SIBLING); 7583 set_domain_attribute(sd, attr); 7584 - sd->span = per_cpu(cpu_sibling_map, i); 7585 - cpus_and(sd->span, sd->span, *cpu_map); 7586 sd->parent = p; 7587 p->child = sd; 7588 cpu_to_cpu_group(i, cpu_map, &sd->groups, tmpmask); ··· 7591 7592 #ifdef CONFIG_SCHED_SMT 7593 /* Set up CPU (sibling) groups */ 7594 - for_each_cpu_mask_nr(i, *cpu_map) { 7595 - SCHED_CPUMASK_VAR(this_sibling_map, allmasks); 7596 - SCHED_CPUMASK_VAR(send_covered, allmasks); 7597 - 7598 - *this_sibling_map = per_cpu(cpu_sibling_map, i); 7599 - cpus_and(*this_sibling_map, *this_sibling_map, *cpu_map); 7600 - if (i != first_cpu(*this_sibling_map)) 7601 continue; 7602 7603 init_sched_build_groups(this_sibling_map, cpu_map, ··· 7605 7606 #ifdef CONFIG_SCHED_MC 7607 /* Set up multi-core groups */ 7608 - for_each_cpu_mask_nr(i, *cpu_map) { 7609 - SCHED_CPUMASK_VAR(this_core_map, allmasks); 7610 - SCHED_CPUMASK_VAR(send_covered, allmasks); 7611 - 7612 *this_core_map = cpu_coregroup_map(i); 7613 cpus_and(*this_core_map, *this_core_map, *cpu_map); 7614 - if (i != first_cpu(*this_core_map)) 7615 continue; 7616 7617 init_sched_build_groups(this_core_map, cpu_map, ··· 7620 7621 /* Set up physical groups */ 7622 for (i = 0; i < nr_node_ids; i++) { 7623 - SCHED_CPUMASK_VAR(nodemask, allmasks); 7624 - SCHED_CPUMASK_VAR(send_covered, allmasks); 7625 - 7626 *nodemask = node_to_cpumask(i); 7627 cpus_and(*nodemask, *nodemask, *cpu_map); 7628 - if (cpus_empty(*nodemask)) 7629 continue; 7630 7631 init_sched_build_groups(nodemask, cpu_map, ··· 7634 #ifdef CONFIG_NUMA 7635 /* Set up node groups */ 7636 if (sd_allnodes) { 7637 - SCHED_CPUMASK_VAR(send_covered, allmasks); 7638 - 7639 init_sched_build_groups(cpu_map, cpu_map, 7640 &cpu_to_allnodes_group, 7641 send_covered, tmpmask); ··· 7642 for (i = 0; i < nr_node_ids; i++) { 7643 /* Set up node groups */ 7644 struct sched_group *sg, *prev; 7645 - SCHED_CPUMASK_VAR(nodemask, allmasks); 7646 - SCHED_CPUMASK_VAR(domainspan, allmasks); 7647 - SCHED_CPUMASK_VAR(covered, allmasks); 7648 int j; 7649 7650 *nodemask = node_to_cpumask(i); 7651 - cpus_clear(*covered); 7652 7653 cpus_and(*nodemask, *nodemask, *cpu_map); 7654 - if (cpus_empty(*nodemask)) { 7655 sched_group_nodes[i] = NULL; 7656 continue; 7657 } 7658 7659 sched_domain_node_span(i, domainspan); 7660 - cpus_and(*domainspan, *domainspan, *cpu_map); 7661 7662 - sg = kmalloc_node(sizeof(struct sched_group), GFP_KERNEL, i); 7663 if (!sg) { 7664 printk(KERN_WARNING "Can not alloc domain group for " 7665 "node %d\n", i); 7666 goto error; 7667 } 7668 sched_group_nodes[i] = sg; 7669 - for_each_cpu_mask_nr(j, *nodemask) { 7670 struct sched_domain *sd; 7671 7672 sd = &per_cpu(node_domains, j); 7673 sd->groups = sg; 7674 } 7675 sg->__cpu_power = 0; 7676 - sg->cpumask = *nodemask; 7677 sg->next = sg; 7678 - cpus_or(*covered, *covered, *nodemask); 7679 prev = sg; 7680 7681 for (j = 0; j < nr_node_ids; j++) { 7682 - SCHED_CPUMASK_VAR(notcovered, allmasks); 7683 int n = (i + j) % nr_node_ids; 7684 node_to_cpumask_ptr(pnodemask, n); 7685 7686 - cpus_complement(*notcovered, *covered); 7687 - cpus_and(*tmpmask, *notcovered, *cpu_map); 7688 - cpus_and(*tmpmask, *tmpmask, *domainspan); 7689 - if (cpus_empty(*tmpmask)) 7690 break; 7691 7692 - cpus_and(*tmpmask, *tmpmask, *pnodemask); 7693 - if (cpus_empty(*tmpmask)) 7694 continue; 7695 7696 - sg = kmalloc_node(sizeof(struct sched_group), 7697 GFP_KERNEL, i); 7698 if (!sg) { 7699 printk(KERN_WARNING ··· 7701 goto error; 7702 } 7703 sg->__cpu_power = 0; 7704 - sg->cpumask = *tmpmask; 7705 sg->next = prev->next; 7706 - cpus_or(*covered, *covered, *tmpmask); 7707 prev->next = sg; 7708 prev = sg; 7709 } ··· 7712 7713 /* Calculate CPU power for physical packages and nodes */ 7714 #ifdef CONFIG_SCHED_SMT 7715 - for_each_cpu_mask_nr(i, *cpu_map) { 7716 - struct sched_domain *sd = &per_cpu(cpu_domains, i); 7717 7718 init_sched_groups_power(i, sd); 7719 } 7720 #endif 7721 #ifdef CONFIG_SCHED_MC 7722 - for_each_cpu_mask_nr(i, *cpu_map) { 7723 - struct sched_domain *sd = &per_cpu(core_domains, i); 7724 7725 init_sched_groups_power(i, sd); 7726 } 7727 #endif 7728 7729 - for_each_cpu_mask_nr(i, *cpu_map) { 7730 - struct sched_domain *sd = &per_cpu(phys_domains, i); 7731 7732 init_sched_groups_power(i, sd); 7733 } ··· 7739 if (sd_allnodes) { 7740 struct sched_group *sg; 7741 7742 - cpu_to_allnodes_group(first_cpu(*cpu_map), cpu_map, &sg, 7743 tmpmask); 7744 init_numa_sched_groups_power(sg); 7745 } 7746 #endif 7747 7748 /* Attach the domains */ 7749 - for_each_cpu_mask_nr(i, *cpu_map) { 7750 struct sched_domain *sd; 7751 #ifdef CONFIG_SCHED_SMT 7752 - sd = &per_cpu(cpu_domains, i); 7753 #elif defined(CONFIG_SCHED_MC) 7754 - sd = &per_cpu(core_domains, i); 7755 #else 7756 - sd = &per_cpu(phys_domains, i); 7757 #endif 7758 cpu_attach_domain(sd, rd, i); 7759 } 7760 7761 - sched_cpumask_free(allmasks); 7762 - return 0; 7763 7764 #ifdef CONFIG_NUMA 7765 error: 7766 free_sched_groups(cpu_map, tmpmask); 7767 - sched_cpumask_free(allmasks); 7768 - kfree(rd); 7769 - return -ENOMEM; 7770 #endif 7771 } 7772 7773 - static int build_sched_domains(const cpumask_t *cpu_map) 7774 { 7775 return __build_sched_domains(cpu_map, NULL); 7776 } 7777 7778 - static cpumask_t *doms_cur; /* current sched domains */ 7779 static int ndoms_cur; /* number of sched domains in 'doms_cur' */ 7780 static struct sched_domain_attr *dattr_cur; 7781 /* attribues of custom domains in 'doms_cur' */ 7782 7783 /* 7784 * Special case: If a kmalloc of a doms_cur partition (array of 7785 - * cpumask_t) fails, then fallback to a single sched domain, 7786 - * as determined by the single cpumask_t fallback_doms. 7787 */ 7788 - static cpumask_t fallback_doms; 7789 7790 /* 7791 * arch_update_cpu_topology lets virtualized architectures update the ··· 7827 * For now this just excludes isolated cpus, but could be used to 7828 * exclude other special cases in the future. 7829 */ 7830 - static int arch_init_sched_domains(const cpumask_t *cpu_map) 7831 { 7832 int err; 7833 7834 arch_update_cpu_topology(); 7835 ndoms_cur = 1; 7836 - doms_cur = kmalloc(sizeof(cpumask_t), GFP_KERNEL); 7837 if (!doms_cur) 7838 - doms_cur = &fallback_doms; 7839 - cpus_andnot(*doms_cur, *cpu_map, cpu_isolated_map); 7840 dattr_cur = NULL; 7841 err = build_sched_domains(doms_cur); 7842 register_sched_domain_sysctl(); ··· 7844 return err; 7845 } 7846 7847 - static void arch_destroy_sched_domains(const cpumask_t *cpu_map, 7848 - cpumask_t *tmpmask) 7849 { 7850 free_sched_groups(cpu_map, tmpmask); 7851 } ··· 7854 * Detach sched domains from a group of cpus specified in cpu_map 7855 * These cpus will now be attached to the NULL domain 7856 */ 7857 - static void detach_destroy_domains(const cpumask_t *cpu_map) 7858 { 7859 - cpumask_t tmpmask; 7860 int i; 7861 7862 - for_each_cpu_mask_nr(i, *cpu_map) 7863 cpu_attach_domain(NULL, &def_root_domain, i); 7864 synchronize_sched(); 7865 - arch_destroy_sched_domains(cpu_map, &tmpmask); 7866 } 7867 7868 /* handle null as "default" */ ··· 7888 * doms_new[] to the current sched domain partitioning, doms_cur[]. 7889 * It destroys each deleted domain and builds each new domain. 7890 * 7891 - * 'doms_new' is an array of cpumask_t's of length 'ndoms_new'. 7892 * The masks don't intersect (don't overlap.) We should setup one 7893 * sched domain for each mask. CPUs not in any of the cpumasks will 7894 * not be load balanced. If the same cpumask appears both in the ··· 7902 * the single partition 'fallback_doms', it also forces the domains 7903 * to be rebuilt. 7904 * 7905 - * If doms_new == NULL it will be replaced with cpu_online_map. 7906 * ndoms_new == 0 is a special case for destroying existing domains, 7907 * and it will not create the default domain. 7908 * 7909 * Call with hotplug lock held 7910 */ 7911 - void partition_sched_domains(int ndoms_new, cpumask_t *doms_new, 7912 struct sched_domain_attr *dattr_new) 7913 { 7914 int i, j, n; ··· 7928 /* Destroy deleted domains */ 7929 for (i = 0; i < ndoms_cur; i++) { 7930 for (j = 0; j < n && !new_topology; j++) { 7931 - if (cpus_equal(doms_cur[i], doms_new[j]) 7932 && dattrs_equal(dattr_cur, i, dattr_new, j)) 7933 goto match1; 7934 } ··· 7940 7941 if (doms_new == NULL) { 7942 ndoms_cur = 0; 7943 - doms_new = &fallback_doms; 7944 - cpus_andnot(doms_new[0], cpu_online_map, cpu_isolated_map); 7945 WARN_ON_ONCE(dattr_new); 7946 } 7947 7948 /* Build new domains */ 7949 for (i = 0; i < ndoms_new; i++) { 7950 for (j = 0; j < ndoms_cur && !new_topology; j++) { 7951 - if (cpus_equal(doms_new[i], doms_cur[j]) 7952 && dattrs_equal(dattr_new, i, dattr_cur, j)) 7953 goto match2; 7954 } ··· 7960 } 7961 7962 /* Remember the new sched domains */ 7963 - if (doms_cur != &fallback_doms) 7964 kfree(doms_cur); 7965 kfree(dattr_cur); /* kfree(NULL) is safe */ 7966 doms_cur = doms_new; ··· 7989 static ssize_t sched_power_savings_store(const char *buf, size_t count, int smt) 7990 { 7991 int ret; 7992 7993 - if (buf[0] != '0' && buf[0] != '1') 7994 return -EINVAL; 7995 7996 if (smt) 7997 - sched_smt_power_savings = (buf[0] == '1'); 7998 else 7999 - sched_mc_power_savings = (buf[0] == '1'); 8000 8001 ret = arch_reinit_sched_domains(); 8002 ··· 8111 8112 void __init sched_init_smp(void) 8113 { 8114 - cpumask_t non_isolated_cpus; 8115 8116 #if defined(CONFIG_NUMA) 8117 sched_group_nodes_bycpu = kzalloc(nr_cpu_ids * sizeof(void **), ··· 8122 #endif 8123 get_online_cpus(); 8124 mutex_lock(&sched_domains_mutex); 8125 - arch_init_sched_domains(&cpu_online_map); 8126 - cpus_andnot(non_isolated_cpus, cpu_possible_map, cpu_isolated_map); 8127 - if (cpus_empty(non_isolated_cpus)) 8128 - cpu_set(smp_processor_id(), non_isolated_cpus); 8129 mutex_unlock(&sched_domains_mutex); 8130 put_online_cpus(); 8131 ··· 8140 init_hrtick(); 8141 8142 /* Move init over to a non-isolated CPU */ 8143 - if (set_cpus_allowed_ptr(current, &non_isolated_cpus) < 0) 8144 BUG(); 8145 sched_init_granularity(); 8146 } 8147 #else 8148 void __init sched_init_smp(void) ··· 8460 * During early bootup we pretend to be a normal task: 8461 */ 8462 current->sched_class = &fair_sched_class; 8463 8464 scheduler_running = 1; 8465 }
··· 498 */ 499 struct root_domain { 500 atomic_t refcount; 501 + cpumask_var_t span; 502 + cpumask_var_t online; 503 504 /* 505 * The "RT overload" flag: it gets set if a CPU has more than 506 * one runnable RT task. 507 */ 508 + cpumask_var_t rto_mask; 509 atomic_t rto_count; 510 #ifdef CONFIG_SMP 511 struct cpupri cpupri; 512 + #endif 513 + #if defined(CONFIG_SCHED_MC) || defined(CONFIG_SCHED_SMT) 514 + /* 515 + * Preferred wake up cpu nominated by sched_mc balance that will be 516 + * used when most cpus are idle in the system indicating overall very 517 + * low system utilisation. Triggered at POWERSAVINGS_BALANCE_WAKEUP(2) 518 + */ 519 + unsigned int sched_mc_preferred_wakeup_cpu; 520 #endif 521 }; 522 ··· 1514 struct sched_domain *sd = data; 1515 int i; 1516 1517 + for_each_cpu(i, sched_domain_span(sd)) { 1518 /* 1519 * If there are currently no tasks on the cpu pretend there 1520 * is one of average load so that when a new task gets to ··· 1535 if (!sd->parent || !(sd->parent->flags & SD_LOAD_BALANCE)) 1536 shares = tg->shares; 1537 1538 + for_each_cpu(i, sched_domain_span(sd)) 1539 update_group_shares_cpu(tg, i, shares, rq_weight); 1540 1541 return 0; ··· 2101 int i; 2102 2103 /* Skip over this group if it has no CPUs allowed */ 2104 + if (!cpumask_intersects(sched_group_cpus(group), 2105 + &p->cpus_allowed)) 2106 continue; 2107 2108 + local_group = cpumask_test_cpu(this_cpu, 2109 + sched_group_cpus(group)); 2110 2111 /* Tally up the load of all CPUs in the group */ 2112 avg_load = 0; 2113 2114 + for_each_cpu(i, sched_group_cpus(group)) { 2115 /* Bias balancing toward cpus of our domain */ 2116 if (local_group) 2117 load = source_load(i, load_idx); ··· 2141 * find_idlest_cpu - find the idlest cpu among the cpus in group. 2142 */ 2143 static int 2144 + find_idlest_cpu(struct sched_group *group, struct task_struct *p, int this_cpu) 2145 { 2146 unsigned long load, min_load = ULONG_MAX; 2147 int idlest = -1; 2148 int i; 2149 2150 /* Traverse only the allowed CPUs */ 2151 + for_each_cpu_and(i, sched_group_cpus(group), &p->cpus_allowed) { 2152 load = weighted_cpuload(i); 2153 2154 if (load < min_load || (load == min_load && i == this_cpu)) { ··· 2193 update_shares(sd); 2194 2195 while (sd) { 2196 struct sched_group *group; 2197 int new_cpu, weight; 2198 ··· 2202 continue; 2203 } 2204 2205 group = find_idlest_group(sd, t, cpu); 2206 if (!group) { 2207 sd = sd->child; 2208 continue; 2209 } 2210 2211 + new_cpu = find_idlest_cpu(group, t, cpu); 2212 if (new_cpu == -1 || new_cpu == cpu) { 2213 /* Now try balancing at a lower domain level of cpu */ 2214 sd = sd->child; ··· 2218 2219 /* Now try balancing at a lower domain level of new_cpu */ 2220 cpu = new_cpu; 2221 + weight = cpumask_weight(sched_domain_span(sd)); 2222 sd = NULL; 2223 for_each_domain(cpu, tmp) { 2224 + if (weight <= cpumask_weight(sched_domain_span(tmp))) 2225 break; 2226 if (tmp->flags & flag) 2227 sd = tmp; ··· 2266 cpu = task_cpu(p); 2267 2268 for_each_domain(this_cpu, sd) { 2269 + if (cpumask_test_cpu(cpu, sched_domain_span(sd))) { 2270 update_shares(sd); 2271 break; 2272 } ··· 2315 else { 2316 struct sched_domain *sd; 2317 for_each_domain(this_cpu, sd) { 2318 + if (cpumask_test_cpu(cpu, sched_domain_span(sd))) { 2319 schedstat_inc(sd, ttwu_wake_remote); 2320 break; 2321 } ··· 2846 struct rq *rq; 2847 2848 rq = task_rq_lock(p, &flags); 2849 + if (!cpumask_test_cpu(dest_cpu, &p->cpus_allowed) 2850 || unlikely(!cpu_active(dest_cpu))) 2851 goto out; 2852 ··· 2911 * 2) cannot be migrated to this CPU due to cpus_allowed, or 2912 * 3) are cache-hot on their current CPU. 2913 */ 2914 + if (!cpumask_test_cpu(this_cpu, &p->cpus_allowed)) { 2915 schedstat_inc(p, se.nr_failed_migrations_affine); 2916 return 0; 2917 } ··· 3086 static struct sched_group * 3087 find_busiest_group(struct sched_domain *sd, int this_cpu, 3088 unsigned long *imbalance, enum cpu_idle_type idle, 3089 + int *sd_idle, const struct cpumask *cpus, int *balance) 3090 { 3091 struct sched_group *busiest = NULL, *this = NULL, *group = sd->groups; 3092 unsigned long max_load, avg_load, total_load, this_load, total_pwr; ··· 3122 unsigned long sum_avg_load_per_task; 3123 unsigned long avg_load_per_task; 3124 3125 + local_group = cpumask_test_cpu(this_cpu, 3126 + sched_group_cpus(group)); 3127 3128 if (local_group) 3129 + balance_cpu = cpumask_first(sched_group_cpus(group)); 3130 3131 /* Tally up the load of all CPUs in the group */ 3132 sum_weighted_load = sum_nr_running = avg_load = 0; ··· 3134 max_cpu_load = 0; 3135 min_cpu_load = ~0UL; 3136 3137 + for_each_cpu_and(i, sched_group_cpus(group), cpus) { 3138 + struct rq *rq = cpu_rq(i); 3139 3140 if (*sd_idle && rq->nr_running) 3141 *sd_idle = 0; ··· 3251 */ 3252 if ((sum_nr_running < min_nr_running) || 3253 (sum_nr_running == min_nr_running && 3254 + cpumask_first(sched_group_cpus(group)) > 3255 + cpumask_first(sched_group_cpus(group_min)))) { 3256 group_min = group; 3257 min_nr_running = sum_nr_running; 3258 min_load_per_task = sum_weighted_load / ··· 3267 if (sum_nr_running <= group_capacity - 1) { 3268 if (sum_nr_running > leader_nr_running || 3269 (sum_nr_running == leader_nr_running && 3270 + cpumask_first(sched_group_cpus(group)) < 3271 + cpumask_first(sched_group_cpus(group_leader)))) { 3272 group_leader = group; 3273 leader_nr_running = sum_nr_running; 3274 } ··· 3394 3395 if (this == group_leader && group_leader != group_min) { 3396 *imbalance = min_load_per_task; 3397 + if (sched_mc_power_savings >= POWERSAVINGS_BALANCE_WAKEUP) { 3398 + cpu_rq(this_cpu)->rd->sched_mc_preferred_wakeup_cpu = 3399 + cpumask_first(sched_group_cpus(group_leader)); 3400 + } 3401 return group_min; 3402 } 3403 #endif ··· 3407 */ 3408 static struct rq * 3409 find_busiest_queue(struct sched_group *group, enum cpu_idle_type idle, 3410 + unsigned long imbalance, const struct cpumask *cpus) 3411 { 3412 struct rq *busiest = NULL, *rq; 3413 unsigned long max_load = 0; 3414 int i; 3415 3416 + for_each_cpu(i, sched_group_cpus(group)) { 3417 unsigned long wl; 3418 3419 + if (!cpumask_test_cpu(i, cpus)) 3420 continue; 3421 3422 rq = cpu_rq(i); ··· 3446 */ 3447 static int load_balance(int this_cpu, struct rq *this_rq, 3448 struct sched_domain *sd, enum cpu_idle_type idle, 3449 + int *balance, struct cpumask *cpus) 3450 { 3451 int ld_moved, all_pinned = 0, active_balance = 0, sd_idle = 0; 3452 struct sched_group *group; ··· 3454 struct rq *busiest; 3455 unsigned long flags; 3456 3457 + cpumask_setall(cpus); 3458 3459 /* 3460 * When power savings policy is enabled for the parent domain, idle ··· 3514 3515 /* All tasks on this runqueue were pinned by CPU affinity */ 3516 if (unlikely(all_pinned)) { 3517 + cpumask_clear_cpu(cpu_of(busiest), cpus); 3518 + if (!cpumask_empty(cpus)) 3519 goto redo; 3520 goto out_balanced; 3521 } ··· 3532 /* don't kick the migration_thread, if the curr 3533 * task on busiest cpu can't be moved to this_cpu 3534 */ 3535 + if (!cpumask_test_cpu(this_cpu, 3536 + &busiest->curr->cpus_allowed)) { 3537 spin_unlock_irqrestore(&busiest->lock, flags); 3538 all_pinned = 1; 3539 goto out_one_pinned; ··· 3607 */ 3608 static int 3609 load_balance_newidle(int this_cpu, struct rq *this_rq, struct sched_domain *sd, 3610 + struct cpumask *cpus) 3611 { 3612 struct sched_group *group; 3613 struct rq *busiest = NULL; ··· 3616 int sd_idle = 0; 3617 int all_pinned = 0; 3618 3619 + cpumask_setall(cpus); 3620 3621 /* 3622 * When power savings policy is enabled for the parent domain, idle ··· 3660 double_unlock_balance(this_rq, busiest); 3661 3662 if (unlikely(all_pinned)) { 3663 + cpumask_clear_cpu(cpu_of(busiest), cpus); 3664 + if (!cpumask_empty(cpus)) 3665 goto redo; 3666 } 3667 } 3668 3669 if (!ld_moved) { 3670 + int active_balance = 0; 3671 + 3672 schedstat_inc(sd, lb_failed[CPU_NEWLY_IDLE]); 3673 if (!sd_idle && sd->flags & SD_SHARE_CPUPOWER && 3674 !test_sd_parent(sd, SD_POWERSAVINGS_BALANCE)) 3675 return -1; 3676 + 3677 + if (sched_mc_power_savings < POWERSAVINGS_BALANCE_WAKEUP) 3678 + return -1; 3679 + 3680 + if (sd->nr_balance_failed++ < 2) 3681 + return -1; 3682 + 3683 + /* 3684 + * The only task running in a non-idle cpu can be moved to this 3685 + * cpu in an attempt to completely freeup the other CPU 3686 + * package. The same method used to move task in load_balance() 3687 + * have been extended for load_balance_newidle() to speedup 3688 + * consolidation at sched_mc=POWERSAVINGS_BALANCE_WAKEUP (2) 3689 + * 3690 + * The package power saving logic comes from 3691 + * find_busiest_group(). If there are no imbalance, then 3692 + * f_b_g() will return NULL. However when sched_mc={1,2} then 3693 + * f_b_g() will select a group from which a running task may be 3694 + * pulled to this cpu in order to make the other package idle. 3695 + * If there is no opportunity to make a package idle and if 3696 + * there are no imbalance, then f_b_g() will return NULL and no 3697 + * action will be taken in load_balance_newidle(). 3698 + * 3699 + * Under normal task pull operation due to imbalance, there 3700 + * will be more than one task in the source run queue and 3701 + * move_tasks() will succeed. ld_moved will be true and this 3702 + * active balance code will not be triggered. 3703 + */ 3704 + 3705 + /* Lock busiest in correct order while this_rq is held */ 3706 + double_lock_balance(this_rq, busiest); 3707 + 3708 + /* 3709 + * don't kick the migration_thread, if the curr 3710 + * task on busiest cpu can't be moved to this_cpu 3711 + */ 3712 + if (!cpu_isset(this_cpu, busiest->curr->cpus_allowed)) { 3713 + double_unlock_balance(this_rq, busiest); 3714 + all_pinned = 1; 3715 + return ld_moved; 3716 + } 3717 + 3718 + if (!busiest->active_balance) { 3719 + busiest->active_balance = 1; 3720 + busiest->push_cpu = this_cpu; 3721 + active_balance = 1; 3722 + } 3723 + 3724 + double_unlock_balance(this_rq, busiest); 3725 + if (active_balance) 3726 + wake_up_process(busiest->migration_thread); 3727 + 3728 } else 3729 sd->nr_balance_failed = 0; 3730 ··· 3696 struct sched_domain *sd; 3697 int pulled_task = 0; 3698 unsigned long next_balance = jiffies + HZ; 3699 + cpumask_var_t tmpmask; 3700 + 3701 + if (!alloc_cpumask_var(&tmpmask, GFP_ATOMIC)) 3702 + return; 3703 3704 for_each_domain(this_cpu, sd) { 3705 unsigned long interval; ··· 3707 if (sd->flags & SD_BALANCE_NEWIDLE) 3708 /* If we've pulled tasks over stop searching: */ 3709 pulled_task = load_balance_newidle(this_cpu, this_rq, 3710 + sd, tmpmask); 3711 3712 interval = msecs_to_jiffies(sd->balance_interval); 3713 if (time_after(next_balance, sd->last_balance + interval)) ··· 3722 */ 3723 this_rq->next_balance = next_balance; 3724 } 3725 + free_cpumask_var(tmpmask); 3726 } 3727 3728 /* ··· 3759 /* Search for an sd spanning us and the target CPU. */ 3760 for_each_domain(target_cpu, sd) { 3761 if ((sd->flags & SD_LOAD_BALANCE) && 3762 + cpumask_test_cpu(busiest_cpu, sched_domain_span(sd))) 3763 break; 3764 } 3765 ··· 3778 #ifdef CONFIG_NO_HZ 3779 static struct { 3780 atomic_t load_balancer; 3781 + cpumask_var_t cpu_mask; 3782 } nohz ____cacheline_aligned = { 3783 .load_balancer = ATOMIC_INIT(-1), 3784 }; 3785 3786 /* ··· 3809 int cpu = smp_processor_id(); 3810 3811 if (stop_tick) { 3812 + cpumask_set_cpu(cpu, nohz.cpu_mask); 3813 cpu_rq(cpu)->in_nohz_recently = 1; 3814 3815 /* ··· 3823 } 3824 3825 /* time for ilb owner also to sleep */ 3826 + if (cpumask_weight(nohz.cpu_mask) == num_online_cpus()) { 3827 if (atomic_read(&nohz.load_balancer) == cpu) 3828 atomic_set(&nohz.load_balancer, -1); 3829 return 0; ··· 3836 } else if (atomic_read(&nohz.load_balancer) == cpu) 3837 return 1; 3838 } else { 3839 + if (!cpumask_test_cpu(cpu, nohz.cpu_mask)) 3840 return 0; 3841 3842 + cpumask_clear_cpu(cpu, nohz.cpu_mask); 3843 3844 if (atomic_read(&nohz.load_balancer) == cpu) 3845 if (atomic_cmpxchg(&nohz.load_balancer, cpu, -1) != cpu) ··· 3867 unsigned long next_balance = jiffies + 60*HZ; 3868 int update_next_balance = 0; 3869 int need_serialize; 3870 + cpumask_var_t tmp; 3871 + 3872 + /* Fails alloc? Rebalancing probably not a priority right now. */ 3873 + if (!alloc_cpumask_var(&tmp, GFP_ATOMIC)) 3874 + return; 3875 3876 for_each_domain(cpu, sd) { 3877 if (!(sd->flags & SD_LOAD_BALANCE)) ··· 3892 } 3893 3894 if (time_after_eq(jiffies, sd->last_balance + interval)) { 3895 + if (load_balance(cpu, rq, sd, idle, &balance, tmp)) { 3896 /* 3897 * We've pulled tasks over so either we're no 3898 * longer idle, or one of our SMT siblings is ··· 3926 */ 3927 if (likely(update_next_balance)) 3928 rq->next_balance = next_balance; 3929 + 3930 + free_cpumask_var(tmp); 3931 } 3932 3933 /* ··· 3950 */ 3951 if (this_rq->idle_at_tick && 3952 atomic_read(&nohz.load_balancer) == this_cpu) { 3953 struct rq *rq; 3954 int balance_cpu; 3955 3956 + for_each_cpu(balance_cpu, nohz.cpu_mask) { 3957 + if (balance_cpu == this_cpu) 3958 + continue; 3959 + 3960 /* 3961 * If this cpu gets work to do, stop the load balancing 3962 * work being done for other cpus. Next load ··· 3993 rq->in_nohz_recently = 0; 3994 3995 if (atomic_read(&nohz.load_balancer) == cpu) { 3996 + cpumask_clear_cpu(cpu, nohz.cpu_mask); 3997 atomic_set(&nohz.load_balancer, -1); 3998 } 3999 ··· 4006 * TBD: Traverse the sched domains and nominate 4007 * the nearest cpu in the nohz.cpu_mask. 4008 */ 4009 + int ilb = cpumask_first(nohz.cpu_mask); 4010 4011 if (ilb < nr_cpu_ids) 4012 resched_cpu(ilb); ··· 4018 * cpus with ticks stopped, is it time for that to stop? 4019 */ 4020 if (rq->idle_at_tick && atomic_read(&nohz.load_balancer) == cpu && 4021 + cpumask_weight(nohz.cpu_mask) == num_online_cpus()) { 4022 resched_cpu(cpu); 4023 return; 4024 } ··· 4028 * someone else, then no need raise the SCHED_SOFTIRQ 4029 */ 4030 if (rq->idle_at_tick && atomic_read(&nohz.load_balancer) != cpu && 4031 + cpumask_test_cpu(cpu, nohz.cpu_mask)) 4032 return; 4033 #endif 4034 if (time_after_eq(jiffies, rq->next_balance)) ··· 5401 return retval; 5402 } 5403 5404 + long sched_setaffinity(pid_t pid, const struct cpumask *in_mask) 5405 { 5406 + cpumask_var_t cpus_allowed, new_mask; 5407 struct task_struct *p; 5408 int retval; 5409 ··· 5426 get_task_struct(p); 5427 read_unlock(&tasklist_lock); 5428 5429 + if (!alloc_cpumask_var(&cpus_allowed, GFP_KERNEL)) { 5430 + retval = -ENOMEM; 5431 + goto out_put_task; 5432 + } 5433 + if (!alloc_cpumask_var(&new_mask, GFP_KERNEL)) { 5434 + retval = -ENOMEM; 5435 + goto out_free_cpus_allowed; 5436 + } 5437 retval = -EPERM; 5438 if (!check_same_owner(p) && !capable(CAP_SYS_NICE)) 5439 goto out_unlock; ··· 5434 if (retval) 5435 goto out_unlock; 5436 5437 + cpuset_cpus_allowed(p, cpus_allowed); 5438 + cpumask_and(new_mask, in_mask, cpus_allowed); 5439 again: 5440 + retval = set_cpus_allowed_ptr(p, new_mask); 5441 5442 if (!retval) { 5443 + cpuset_cpus_allowed(p, cpus_allowed); 5444 + if (!cpumask_subset(new_mask, cpus_allowed)) { 5445 /* 5446 * We must have raced with a concurrent cpuset 5447 * update. Just reset the cpus_allowed to the 5448 * cpuset's cpus_allowed 5449 */ 5450 + cpumask_copy(new_mask, cpus_allowed); 5451 goto again; 5452 } 5453 } 5454 out_unlock: 5455 + free_cpumask_var(new_mask); 5456 + out_free_cpus_allowed: 5457 + free_cpumask_var(cpus_allowed); 5458 + out_put_task: 5459 put_task_struct(p); 5460 put_online_cpus(); 5461 return retval; 5462 } 5463 5464 static int get_user_cpu_mask(unsigned long __user *user_mask_ptr, unsigned len, 5465 + struct cpumask *new_mask) 5466 { 5467 + if (len < cpumask_size()) 5468 + cpumask_clear(new_mask); 5469 + else if (len > cpumask_size()) 5470 + len = cpumask_size(); 5471 + 5472 return copy_from_user(new_mask, user_mask_ptr, len) ? -EFAULT : 0; 5473 } 5474 ··· 5477 asmlinkage long sys_sched_setaffinity(pid_t pid, unsigned int len, 5478 unsigned long __user *user_mask_ptr) 5479 { 5480 + cpumask_var_t new_mask; 5481 int retval; 5482 5483 + if (!alloc_cpumask_var(&new_mask, GFP_KERNEL)) 5484 + return -ENOMEM; 5485 5486 + retval = get_user_cpu_mask(user_mask_ptr, len, new_mask); 5487 + if (retval == 0) 5488 + retval = sched_setaffinity(pid, new_mask); 5489 + free_cpumask_var(new_mask); 5490 + return retval; 5491 } 5492 5493 + long sched_getaffinity(pid_t pid, struct cpumask *mask) 5494 { 5495 struct task_struct *p; 5496 int retval; ··· 5504 if (retval) 5505 goto out_unlock; 5506 5507 + cpumask_and(mask, &p->cpus_allowed, cpu_online_mask); 5508 5509 out_unlock: 5510 read_unlock(&tasklist_lock); ··· 5523 unsigned long __user *user_mask_ptr) 5524 { 5525 int ret; 5526 + cpumask_var_t mask; 5527 5528 + if (len < cpumask_size()) 5529 return -EINVAL; 5530 5531 + if (!alloc_cpumask_var(&mask, GFP_KERNEL)) 5532 + return -ENOMEM; 5533 5534 + ret = sched_getaffinity(pid, mask); 5535 + if (ret == 0) { 5536 + if (copy_to_user(user_mask_ptr, mask, cpumask_size())) 5537 + ret = -EFAULT; 5538 + else 5539 + ret = cpumask_size(); 5540 + } 5541 + free_cpumask_var(mask); 5542 5543 + return ret; 5544 } 5545 5546 /** ··· 5877 idle->se.exec_start = sched_clock(); 5878 5879 idle->prio = idle->normal_prio = MAX_PRIO; 5880 + cpumask_copy(&idle->cpus_allowed, cpumask_of(cpu)); 5881 __set_task_cpu(idle, cpu); 5882 5883 rq->curr = rq->idle = idle; ··· 5904 * indicates which cpus entered this state. This is used 5905 * in the rcu update to wait only for active cpus. For system 5906 * which do not switch off the HZ timer nohz_cpu_mask should 5907 + * always be CPU_BITS_NONE. 5908 */ 5909 + cpumask_var_t nohz_cpu_mask; 5910 5911 /* 5912 * Increase the granularity value when there are more CPUs, ··· 5961 * task must not exit() & deallocate itself prematurely. The 5962 * call is not atomic; no spinlocks may be held. 5963 */ 5964 + int set_cpus_allowed_ptr(struct task_struct *p, const struct cpumask *new_mask) 5965 { 5966 struct migration_req req; 5967 unsigned long flags; ··· 5969 int ret = 0; 5970 5971 rq = task_rq_lock(p, &flags); 5972 + if (!cpumask_intersects(new_mask, cpu_online_mask)) { 5973 ret = -EINVAL; 5974 goto out; 5975 } 5976 5977 if (unlikely((p->flags & PF_THREAD_BOUND) && p != current && 5978 + !cpumask_equal(&p->cpus_allowed, new_mask))) { 5979 ret = -EINVAL; 5980 goto out; 5981 } ··· 5983 if (p->sched_class->set_cpus_allowed) 5984 p->sched_class->set_cpus_allowed(p, new_mask); 5985 else { 5986 + cpumask_copy(&p->cpus_allowed, new_mask); 5987 + p->rt.nr_cpus_allowed = cpumask_weight(new_mask); 5988 } 5989 5990 /* Can the task run on the task's current CPU? If so, we're done */ 5991 + if (cpumask_test_cpu(task_cpu(p), new_mask)) 5992 goto out; 5993 5994 + if (migrate_task(p, cpumask_any_and(cpu_online_mask, new_mask), &req)) { 5995 /* Need help from migration thread: drop lock and wait. */ 5996 task_rq_unlock(rq, &flags); 5997 wake_up_process(rq->migration_thread); ··· 6033 if (task_cpu(p) != src_cpu) 6034 goto done; 6035 /* Affinity changed (again). */ 6036 + if (!cpumask_test_cpu(dest_cpu, &p->cpus_allowed)) 6037 goto fail; 6038 6039 on_rq = p->se.on_rq; ··· 6130 */ 6131 static void move_task_off_dead_cpu(int dead_cpu, struct task_struct *p) 6132 { 6133 int dest_cpu; 6134 + /* FIXME: Use cpumask_of_node here. */ 6135 + cpumask_t _nodemask = node_to_cpumask(cpu_to_node(dead_cpu)); 6136 + const struct cpumask *nodemask = &_nodemask; 6137 6138 + again: 6139 + /* Look for allowed, online CPU in same node. */ 6140 + for_each_cpu_and(dest_cpu, nodemask, cpu_online_mask) 6141 + if (cpumask_test_cpu(dest_cpu, &p->cpus_allowed)) 6142 + goto move; 6143 6144 + /* Any allowed, online CPU? */ 6145 + dest_cpu = cpumask_any_and(&p->cpus_allowed, cpu_online_mask); 6146 + if (dest_cpu < nr_cpu_ids) 6147 + goto move; 6148 6149 + /* No more Mr. Nice Guy. */ 6150 + if (dest_cpu >= nr_cpu_ids) { 6151 + cpuset_cpus_allowed_locked(p, &p->cpus_allowed); 6152 + dest_cpu = cpumask_any_and(cpu_online_mask, &p->cpus_allowed); 6153 6154 + /* 6155 + * Don't tell them about moving exiting tasks or 6156 + * kernel threads (both mm NULL), since they never 6157 + * leave kernel. 6158 + */ 6159 + if (p->mm && printk_ratelimit()) { 6160 + printk(KERN_INFO "process %d (%s) no " 6161 + "longer affine to cpu%d\n", 6162 + task_pid_nr(p), p->comm, dead_cpu); 6163 } 6164 + } 6165 + 6166 + move: 6167 + /* It can have affinity changed while we were choosing. */ 6168 + if (unlikely(!__migrate_task_irq(p, dead_cpu, dest_cpu))) 6169 + goto again; 6170 } 6171 6172 /* ··· 6185 */ 6186 static void migrate_nr_uninterruptible(struct rq *rq_src) 6187 { 6188 + struct rq *rq_dest = cpu_rq(cpumask_any(cpu_online_mask)); 6189 unsigned long flags; 6190 6191 local_irq_save(flags); ··· 6475 if (!rq->online) { 6476 const struct sched_class *class; 6477 6478 + cpumask_set_cpu(rq->cpu, rq->rd->online); 6479 rq->online = 1; 6480 6481 for_each_class(class) { ··· 6495 class->rq_offline(rq); 6496 } 6497 6498 + cpumask_clear_cpu(rq->cpu, rq->rd->online); 6499 rq->online = 0; 6500 } 6501 } ··· 6536 rq = cpu_rq(cpu); 6537 spin_lock_irqsave(&rq->lock, flags); 6538 if (rq->rd) { 6539 + BUG_ON(!cpumask_test_cpu(cpu, rq->rd->span)); 6540 6541 set_rq_online(rq); 6542 } ··· 6550 break; 6551 /* Unbind it from offline cpu so it can run. Fall thru. */ 6552 kthread_bind(cpu_rq(cpu)->migration_thread, 6553 + cpumask_any(cpu_online_mask)); 6554 kthread_stop(cpu_rq(cpu)->migration_thread); 6555 cpu_rq(cpu)->migration_thread = NULL; 6556 break; ··· 6600 rq = cpu_rq(cpu); 6601 spin_lock_irqsave(&rq->lock, flags); 6602 if (rq->rd) { 6603 + BUG_ON(!cpumask_test_cpu(cpu, rq->rd->span)); 6604 set_rq_offline(rq); 6605 } 6606 spin_unlock_irqrestore(&rq->lock, flags); ··· 6639 #ifdef CONFIG_SCHED_DEBUG 6640 6641 static int sched_domain_debug_one(struct sched_domain *sd, int cpu, int level, 6642 + struct cpumask *groupmask) 6643 { 6644 struct sched_group *group = sd->groups; 6645 char str[256]; 6646 6647 + cpulist_scnprintf(str, sizeof(str), sched_domain_span(sd)); 6648 + cpumask_clear(groupmask); 6649 6650 printk(KERN_DEBUG "%*s domain %d: ", level, "", level); 6651 ··· 6659 6660 printk(KERN_CONT "span %s level %s\n", str, sd->name); 6661 6662 + if (!cpumask_test_cpu(cpu, sched_domain_span(sd))) { 6663 printk(KERN_ERR "ERROR: domain->span does not contain " 6664 "CPU%d\n", cpu); 6665 } 6666 + if (!cpumask_test_cpu(cpu, sched_group_cpus(group))) { 6667 printk(KERN_ERR "ERROR: domain->groups does not contain" 6668 " CPU%d\n", cpu); 6669 } ··· 6683 break; 6684 } 6685 6686 + if (!cpumask_weight(sched_group_cpus(group))) { 6687 printk(KERN_CONT "\n"); 6688 printk(KERN_ERR "ERROR: empty group\n"); 6689 break; 6690 } 6691 6692 + if (cpumask_intersects(groupmask, sched_group_cpus(group))) { 6693 printk(KERN_CONT "\n"); 6694 printk(KERN_ERR "ERROR: repeated CPUs\n"); 6695 break; 6696 } 6697 6698 + cpumask_or(groupmask, groupmask, sched_group_cpus(group)); 6699 6700 + cpulist_scnprintf(str, sizeof(str), sched_group_cpus(group)); 6701 printk(KERN_CONT " %s", str); 6702 6703 group = group->next; 6704 } while (group != sd->groups); 6705 printk(KERN_CONT "\n"); 6706 6707 + if (!cpumask_equal(sched_domain_span(sd), groupmask)) 6708 printk(KERN_ERR "ERROR: groups don't span domain->span\n"); 6709 6710 + if (sd->parent && 6711 + !cpumask_subset(groupmask, sched_domain_span(sd->parent))) 6712 printk(KERN_ERR "ERROR: parent span is not a superset " 6713 "of domain->span\n"); 6714 return 0; ··· 6715 6716 static void sched_domain_debug(struct sched_domain *sd, int cpu) 6717 { 6718 + cpumask_var_t groupmask; 6719 int level = 0; 6720 6721 if (!sd) { ··· 6725 6726 printk(KERN_DEBUG "CPU%d attaching sched-domain:\n", cpu); 6727 6728 + if (!alloc_cpumask_var(&groupmask, GFP_KERNEL)) { 6729 printk(KERN_DEBUG "Cannot load-balance (out of memory)\n"); 6730 return; 6731 } ··· 6739 if (!sd) 6740 break; 6741 } 6742 + free_cpumask_var(groupmask); 6743 } 6744 #else /* !CONFIG_SCHED_DEBUG */ 6745 # define sched_domain_debug(sd, cpu) do { } while (0) ··· 6747 6748 static int sd_degenerate(struct sched_domain *sd) 6749 { 6750 + if (cpumask_weight(sched_domain_span(sd)) == 1) 6751 return 1; 6752 6753 /* Following flags need at least 2 groups */ ··· 6778 if (sd_degenerate(parent)) 6779 return 1; 6780 6781 + if (!cpumask_equal(sched_domain_span(sd), sched_domain_span(parent))) 6782 return 0; 6783 6784 /* Does parent contain flags not in child? */ ··· 6802 return 1; 6803 } 6804 6805 + static void free_rootdomain(struct root_domain *rd) 6806 + { 6807 + cpupri_cleanup(&rd->cpupri); 6808 + 6809 + free_cpumask_var(rd->rto_mask); 6810 + free_cpumask_var(rd->online); 6811 + free_cpumask_var(rd->span); 6812 + kfree(rd); 6813 + } 6814 + 6815 static void rq_attach_root(struct rq *rq, struct root_domain *rd) 6816 { 6817 unsigned long flags; ··· 6811 if (rq->rd) { 6812 struct root_domain *old_rd = rq->rd; 6813 6814 + if (cpumask_test_cpu(rq->cpu, old_rd->online)) 6815 set_rq_offline(rq); 6816 6817 + cpumask_clear_cpu(rq->cpu, old_rd->span); 6818 6819 if (atomic_dec_and_test(&old_rd->refcount)) 6820 + free_rootdomain(old_rd); 6821 } 6822 6823 atomic_inc(&rd->refcount); 6824 rq->rd = rd; 6825 6826 + cpumask_set_cpu(rq->cpu, rd->span); 6827 + if (cpumask_test_cpu(rq->cpu, cpu_online_mask)) 6828 set_rq_online(rq); 6829 6830 spin_unlock_irqrestore(&rq->lock, flags); 6831 } 6832 6833 + static int init_rootdomain(struct root_domain *rd, bool bootmem) 6834 { 6835 memset(rd, 0, sizeof(*rd)); 6836 6837 + if (bootmem) { 6838 + alloc_bootmem_cpumask_var(&def_root_domain.span); 6839 + alloc_bootmem_cpumask_var(&def_root_domain.online); 6840 + alloc_bootmem_cpumask_var(&def_root_domain.rto_mask); 6841 + cpupri_init(&rd->cpupri, true); 6842 + return 0; 6843 + } 6844 6845 + if (!alloc_cpumask_var(&rd->span, GFP_KERNEL)) 6846 + goto free_rd; 6847 + if (!alloc_cpumask_var(&rd->online, GFP_KERNEL)) 6848 + goto free_span; 6849 + if (!alloc_cpumask_var(&rd->rto_mask, GFP_KERNEL)) 6850 + goto free_online; 6851 + 6852 + if (cpupri_init(&rd->cpupri, false) != 0) 6853 + goto free_rto_mask; 6854 + return 0; 6855 + 6856 + free_rto_mask: 6857 + free_cpumask_var(rd->rto_mask); 6858 + free_online: 6859 + free_cpumask_var(rd->online); 6860 + free_span: 6861 + free_cpumask_var(rd->span); 6862 + free_rd: 6863 + kfree(rd); 6864 + return -ENOMEM; 6865 } 6866 6867 static void init_defrootdomain(void) 6868 { 6869 + init_rootdomain(&def_root_domain, true); 6870 + 6871 atomic_set(&def_root_domain.refcount, 1); 6872 } 6873 ··· 6854 if (!rd) 6855 return NULL; 6856 6857 + if (init_rootdomain(rd, false) != 0) { 6858 + kfree(rd); 6859 + return NULL; 6860 + } 6861 6862 return rd; 6863 } ··· 6896 } 6897 6898 /* cpus with isolated domains */ 6899 + static cpumask_var_t cpu_isolated_map; 6900 6901 /* Setup the mask of cpus configured for isolated domains */ 6902 static int __init isolated_cpu_setup(char *str) 6903 { 6904 + cpulist_parse(str, cpu_isolated_map); 6905 return 1; 6906 } 6907 ··· 6917 /* 6918 * init_sched_build_groups takes the cpumask we wish to span, and a pointer 6919 * to a function which identifies what group(along with sched group) a CPU 6920 + * belongs to. The return value of group_fn must be a >= 0 and < nr_cpu_ids 6921 + * (due to the fact that we keep track of groups covered with a struct cpumask). 6922 * 6923 * init_sched_build_groups will build a circular linked list of the groups 6924 * covered by the given span, and will set each group's ->cpumask correctly, 6925 * and ->cpu_power to 0. 6926 */ 6927 static void 6928 + init_sched_build_groups(const struct cpumask *span, 6929 + const struct cpumask *cpu_map, 6930 + int (*group_fn)(int cpu, const struct cpumask *cpu_map, 6931 struct sched_group **sg, 6932 + struct cpumask *tmpmask), 6933 + struct cpumask *covered, struct cpumask *tmpmask) 6934 { 6935 struct sched_group *first = NULL, *last = NULL; 6936 int i; 6937 6938 + cpumask_clear(covered); 6939 6940 + for_each_cpu(i, span) { 6941 struct sched_group *sg; 6942 int group = group_fn(i, cpu_map, &sg, tmpmask); 6943 int j; 6944 6945 + if (cpumask_test_cpu(i, covered)) 6946 continue; 6947 6948 + cpumask_clear(sched_group_cpus(sg)); 6949 sg->__cpu_power = 0; 6950 6951 + for_each_cpu(j, span) { 6952 if (group_fn(j, cpu_map, NULL, tmpmask) != group) 6953 continue; 6954 6955 + cpumask_set_cpu(j, covered); 6956 + cpumask_set_cpu(j, sched_group_cpus(sg)); 6957 } 6958 if (!first) 6959 first = sg; ··· 7016 * should be one that prevents unnecessary balancing, but also spreads tasks 7017 * out optimally. 7018 */ 7019 + static void sched_domain_node_span(int node, struct cpumask *span) 7020 { 7021 nodemask_t used_nodes; 7022 + /* FIXME: use cpumask_of_node() */ 7023 node_to_cpumask_ptr(nodemask, node); 7024 int i; 7025 ··· 7040 int sched_smt_power_savings = 0, sched_mc_power_savings = 0; 7041 7042 /* 7043 + * The cpus mask in sched_group and sched_domain hangs off the end. 7044 + * FIXME: use cpumask_var_t or dynamic percpu alloc to avoid wasting space 7045 + * for nr_cpu_ids < CONFIG_NR_CPUS. 7046 + */ 7047 + struct static_sched_group { 7048 + struct sched_group sg; 7049 + DECLARE_BITMAP(cpus, CONFIG_NR_CPUS); 7050 + }; 7051 + 7052 + struct static_sched_domain { 7053 + struct sched_domain sd; 7054 + DECLARE_BITMAP(span, CONFIG_NR_CPUS); 7055 + }; 7056 + 7057 + /* 7058 * SMT sched-domains: 7059 */ 7060 #ifdef CONFIG_SCHED_SMT 7061 + static DEFINE_PER_CPU(struct static_sched_domain, cpu_domains); 7062 + static DEFINE_PER_CPU(struct static_sched_group, sched_group_cpus); 7063 7064 static int 7065 + cpu_to_cpu_group(int cpu, const struct cpumask *cpu_map, 7066 + struct sched_group **sg, struct cpumask *unused) 7067 { 7068 if (sg) 7069 + *sg = &per_cpu(sched_group_cpus, cpu).sg; 7070 return cpu; 7071 } 7072 #endif /* CONFIG_SCHED_SMT */ ··· 7060 * multi-core sched-domains: 7061 */ 7062 #ifdef CONFIG_SCHED_MC 7063 + static DEFINE_PER_CPU(struct static_sched_domain, core_domains); 7064 + static DEFINE_PER_CPU(struct static_sched_group, sched_group_core); 7065 #endif /* CONFIG_SCHED_MC */ 7066 7067 #if defined(CONFIG_SCHED_MC) && defined(CONFIG_SCHED_SMT) 7068 static int 7069 + cpu_to_core_group(int cpu, const struct cpumask *cpu_map, 7070 + struct sched_group **sg, struct cpumask *mask) 7071 { 7072 int group; 7073 7074 + cpumask_and(mask, &per_cpu(cpu_sibling_map, cpu), cpu_map); 7075 + group = cpumask_first(mask); 7076 if (sg) 7077 + *sg = &per_cpu(sched_group_core, group).sg; 7078 return group; 7079 } 7080 #elif defined(CONFIG_SCHED_MC) 7081 static int 7082 + cpu_to_core_group(int cpu, const struct cpumask *cpu_map, 7083 + struct sched_group **sg, struct cpumask *unused) 7084 { 7085 if (sg) 7086 + *sg = &per_cpu(sched_group_core, cpu).sg; 7087 return cpu; 7088 } 7089 #endif 7090 7091 + static DEFINE_PER_CPU(struct static_sched_domain, phys_domains); 7092 + static DEFINE_PER_CPU(struct static_sched_group, sched_group_phys); 7093 7094 static int 7095 + cpu_to_phys_group(int cpu, const struct cpumask *cpu_map, 7096 + struct sched_group **sg, struct cpumask *mask) 7097 { 7098 int group; 7099 #ifdef CONFIG_SCHED_MC 7100 + /* FIXME: Use cpu_coregroup_mask. */ 7101 *mask = cpu_coregroup_map(cpu); 7102 cpus_and(*mask, *mask, *cpu_map); 7103 + group = cpumask_first(mask); 7104 #elif defined(CONFIG_SCHED_SMT) 7105 + cpumask_and(mask, &per_cpu(cpu_sibling_map, cpu), cpu_map); 7106 + group = cpumask_first(mask); 7107 #else 7108 group = cpu; 7109 #endif 7110 if (sg) 7111 + *sg = &per_cpu(sched_group_phys, group).sg; 7112 return group; 7113 } 7114 ··· 7123 static struct sched_group ***sched_group_nodes_bycpu; 7124 7125 static DEFINE_PER_CPU(struct sched_domain, allnodes_domains); 7126 + static DEFINE_PER_CPU(struct static_sched_group, sched_group_allnodes); 7127 7128 + static int cpu_to_allnodes_group(int cpu, const struct cpumask *cpu_map, 7129 + struct sched_group **sg, 7130 + struct cpumask *nodemask) 7131 { 7132 int group; 7133 + /* FIXME: use cpumask_of_node */ 7134 + node_to_cpumask_ptr(pnodemask, cpu_to_node(cpu)); 7135 7136 + cpumask_and(nodemask, pnodemask, cpu_map); 7137 + group = cpumask_first(nodemask); 7138 7139 if (sg) 7140 + *sg = &per_cpu(sched_group_allnodes, group).sg; 7141 return group; 7142 } 7143 ··· 7147 if (!sg) 7148 return; 7149 do { 7150 + for_each_cpu(j, sched_group_cpus(sg)) { 7151 struct sched_domain *sd; 7152 7153 + sd = &per_cpu(phys_domains, j).sd; 7154 + if (j != cpumask_first(sched_group_cpus(sd->groups))) { 7155 /* 7156 * Only add "power" once for each 7157 * physical package. ··· 7168 7169 #ifdef CONFIG_NUMA 7170 /* Free memory allocated for various sched_group structures */ 7171 + static void free_sched_groups(const struct cpumask *cpu_map, 7172 + struct cpumask *nodemask) 7173 { 7174 int cpu, i; 7175 7176 + for_each_cpu(cpu, cpu_map) { 7177 struct sched_group **sched_group_nodes 7178 = sched_group_nodes_bycpu[cpu]; 7179 ··· 7181 7182 for (i = 0; i < nr_node_ids; i++) { 7183 struct sched_group *oldsg, *sg = sched_group_nodes[i]; 7184 + /* FIXME: Use cpumask_of_node */ 7185 + node_to_cpumask_ptr(pnodemask, i); 7186 7187 + cpus_and(*nodemask, *pnodemask, *cpu_map); 7188 + if (cpumask_empty(nodemask)) 7189 continue; 7190 7191 if (sg == NULL) ··· 7202 } 7203 } 7204 #else /* !CONFIG_NUMA */ 7205 + static void free_sched_groups(const struct cpumask *cpu_map, 7206 + struct cpumask *nodemask) 7207 { 7208 } 7209 #endif /* CONFIG_NUMA */ ··· 7228 7229 WARN_ON(!sd || !sd->groups); 7230 7231 + if (cpu != cpumask_first(sched_group_cpus(sd->groups))) 7232 return; 7233 7234 child = sd->child; ··· 7293 SD_INIT_FUNC(MC) 7294 #endif 7295 7296 static int default_relax_domain_level = -1; 7297 7298 static int __init setup_relax_domain_level(char *str) ··· 7374 * Build sched domains for a given set of cpus and attach the sched domains 7375 * to the individual cpus 7376 */ 7377 + static int __build_sched_domains(const struct cpumask *cpu_map, 7378 struct sched_domain_attr *attr) 7379 { 7380 + int i, err = -ENOMEM; 7381 struct root_domain *rd; 7382 + cpumask_var_t nodemask, this_sibling_map, this_core_map, send_covered, 7383 + tmpmask; 7384 #ifdef CONFIG_NUMA 7385 + cpumask_var_t domainspan, covered, notcovered; 7386 struct sched_group **sched_group_nodes = NULL; 7387 int sd_allnodes = 0; 7388 7389 + if (!alloc_cpumask_var(&domainspan, GFP_KERNEL)) 7390 + goto out; 7391 + if (!alloc_cpumask_var(&covered, GFP_KERNEL)) 7392 + goto free_domainspan; 7393 + if (!alloc_cpumask_var(&notcovered, GFP_KERNEL)) 7394 + goto free_covered; 7395 + #endif 7396 + 7397 + if (!alloc_cpumask_var(&nodemask, GFP_KERNEL)) 7398 + goto free_notcovered; 7399 + if (!alloc_cpumask_var(&this_sibling_map, GFP_KERNEL)) 7400 + goto free_nodemask; 7401 + if (!alloc_cpumask_var(&this_core_map, GFP_KERNEL)) 7402 + goto free_this_sibling_map; 7403 + if (!alloc_cpumask_var(&send_covered, GFP_KERNEL)) 7404 + goto free_this_core_map; 7405 + if (!alloc_cpumask_var(&tmpmask, GFP_KERNEL)) 7406 + goto free_send_covered; 7407 + 7408 + #ifdef CONFIG_NUMA 7409 /* 7410 * Allocate the per-node list of sched groups 7411 */ ··· 7392 GFP_KERNEL); 7393 if (!sched_group_nodes) { 7394 printk(KERN_WARNING "Can not alloc sched group node list\n"); 7395 + goto free_tmpmask; 7396 } 7397 #endif 7398 7399 rd = alloc_rootdomain(); 7400 if (!rd) { 7401 printk(KERN_WARNING "Cannot alloc root domain\n"); 7402 + goto free_sched_groups; 7403 } 7404 7405 #ifdef CONFIG_NUMA 7406 + sched_group_nodes_bycpu[cpumask_first(cpu_map)] = sched_group_nodes; 7407 #endif 7408 7409 /* 7410 * Set up domains for cpus specified by the cpu_map. 7411 */ 7412 + for_each_cpu(i, cpu_map) { 7413 struct sched_domain *sd = NULL, *p; 7414 7415 + /* FIXME: use cpumask_of_node */ 7416 *nodemask = node_to_cpumask(cpu_to_node(i)); 7417 cpus_and(*nodemask, *nodemask, *cpu_map); 7418 7419 #ifdef CONFIG_NUMA 7420 + if (cpumask_weight(cpu_map) > 7421 + SD_NODES_PER_DOMAIN*cpumask_weight(nodemask)) { 7422 sd = &per_cpu(allnodes_domains, i); 7423 SD_INIT(sd, ALLNODES); 7424 set_domain_attribute(sd, attr); 7425 + cpumask_copy(sched_domain_span(sd), cpu_map); 7426 cpu_to_allnodes_group(i, cpu_map, &sd->groups, tmpmask); 7427 p = sd; 7428 sd_allnodes = 1; ··· 7449 sd = &per_cpu(node_domains, i); 7450 SD_INIT(sd, NODE); 7451 set_domain_attribute(sd, attr); 7452 + sched_domain_node_span(cpu_to_node(i), sched_domain_span(sd)); 7453 sd->parent = p; 7454 if (p) 7455 p->child = sd; 7456 + cpumask_and(sched_domain_span(sd), 7457 + sched_domain_span(sd), cpu_map); 7458 #endif 7459 7460 p = sd; 7461 + sd = &per_cpu(phys_domains, i).sd; 7462 SD_INIT(sd, CPU); 7463 set_domain_attribute(sd, attr); 7464 + cpumask_copy(sched_domain_span(sd), nodemask); 7465 sd->parent = p; 7466 if (p) 7467 p->child = sd; ··· 7468 7469 #ifdef CONFIG_SCHED_MC 7470 p = sd; 7471 + sd = &per_cpu(core_domains, i).sd; 7472 SD_INIT(sd, MC); 7473 set_domain_attribute(sd, attr); 7474 + *sched_domain_span(sd) = cpu_coregroup_map(i); 7475 + cpumask_and(sched_domain_span(sd), 7476 + sched_domain_span(sd), cpu_map); 7477 sd->parent = p; 7478 p->child = sd; 7479 cpu_to_core_group(i, cpu_map, &sd->groups, tmpmask); ··· 7480 7481 #ifdef CONFIG_SCHED_SMT 7482 p = sd; 7483 + sd = &per_cpu(cpu_domains, i).sd; 7484 SD_INIT(sd, SIBLING); 7485 set_domain_attribute(sd, attr); 7486 + cpumask_and(sched_domain_span(sd), 7487 + &per_cpu(cpu_sibling_map, i), cpu_map); 7488 sd->parent = p; 7489 p->child = sd; 7490 cpu_to_cpu_group(i, cpu_map, &sd->groups, tmpmask); ··· 7493 7494 #ifdef CONFIG_SCHED_SMT 7495 /* Set up CPU (sibling) groups */ 7496 + for_each_cpu(i, cpu_map) { 7497 + cpumask_and(this_sibling_map, 7498 + &per_cpu(cpu_sibling_map, i), cpu_map); 7499 + if (i != cpumask_first(this_sibling_map)) 7500 continue; 7501 7502 init_sched_build_groups(this_sibling_map, cpu_map, ··· 7510 7511 #ifdef CONFIG_SCHED_MC 7512 /* Set up multi-core groups */ 7513 + for_each_cpu(i, cpu_map) { 7514 + /* FIXME: Use cpu_coregroup_mask */ 7515 *this_core_map = cpu_coregroup_map(i); 7516 cpus_and(*this_core_map, *this_core_map, *cpu_map); 7517 + if (i != cpumask_first(this_core_map)) 7518 continue; 7519 7520 init_sched_build_groups(this_core_map, cpu_map, ··· 7527 7528 /* Set up physical groups */ 7529 for (i = 0; i < nr_node_ids; i++) { 7530 + /* FIXME: Use cpumask_of_node */ 7531 *nodemask = node_to_cpumask(i); 7532 cpus_and(*nodemask, *nodemask, *cpu_map); 7533 + if (cpumask_empty(nodemask)) 7534 continue; 7535 7536 init_sched_build_groups(nodemask, cpu_map, ··· 7543 #ifdef CONFIG_NUMA 7544 /* Set up node groups */ 7545 if (sd_allnodes) { 7546 init_sched_build_groups(cpu_map, cpu_map, 7547 &cpu_to_allnodes_group, 7548 send_covered, tmpmask); ··· 7553 for (i = 0; i < nr_node_ids; i++) { 7554 /* Set up node groups */ 7555 struct sched_group *sg, *prev; 7556 int j; 7557 7558 + /* FIXME: Use cpumask_of_node */ 7559 *nodemask = node_to_cpumask(i); 7560 + cpumask_clear(covered); 7561 7562 cpus_and(*nodemask, *nodemask, *cpu_map); 7563 + if (cpumask_empty(nodemask)) { 7564 sched_group_nodes[i] = NULL; 7565 continue; 7566 } 7567 7568 sched_domain_node_span(i, domainspan); 7569 + cpumask_and(domainspan, domainspan, cpu_map); 7570 7571 + sg = kmalloc_node(sizeof(struct sched_group) + cpumask_size(), 7572 + GFP_KERNEL, i); 7573 if (!sg) { 7574 printk(KERN_WARNING "Can not alloc domain group for " 7575 "node %d\n", i); 7576 goto error; 7577 } 7578 sched_group_nodes[i] = sg; 7579 + for_each_cpu(j, nodemask) { 7580 struct sched_domain *sd; 7581 7582 sd = &per_cpu(node_domains, j); 7583 sd->groups = sg; 7584 } 7585 sg->__cpu_power = 0; 7586 + cpumask_copy(sched_group_cpus(sg), nodemask); 7587 sg->next = sg; 7588 + cpumask_or(covered, covered, nodemask); 7589 prev = sg; 7590 7591 for (j = 0; j < nr_node_ids; j++) { 7592 int n = (i + j) % nr_node_ids; 7593 + /* FIXME: Use cpumask_of_node */ 7594 node_to_cpumask_ptr(pnodemask, n); 7595 7596 + cpumask_complement(notcovered, covered); 7597 + cpumask_and(tmpmask, notcovered, cpu_map); 7598 + cpumask_and(tmpmask, tmpmask, domainspan); 7599 + if (cpumask_empty(tmpmask)) 7600 break; 7601 7602 + cpumask_and(tmpmask, tmpmask, pnodemask); 7603 + if (cpumask_empty(tmpmask)) 7604 continue; 7605 7606 + sg = kmalloc_node(sizeof(struct sched_group) + 7607 + cpumask_size(), 7608 GFP_KERNEL, i); 7609 if (!sg) { 7610 printk(KERN_WARNING ··· 7612 goto error; 7613 } 7614 sg->__cpu_power = 0; 7615 + cpumask_copy(sched_group_cpus(sg), tmpmask); 7616 sg->next = prev->next; 7617 + cpumask_or(covered, covered, tmpmask); 7618 prev->next = sg; 7619 prev = sg; 7620 } ··· 7623 7624 /* Calculate CPU power for physical packages and nodes */ 7625 #ifdef CONFIG_SCHED_SMT 7626 + for_each_cpu(i, cpu_map) { 7627 + struct sched_domain *sd = &per_cpu(cpu_domains, i).sd; 7628 7629 init_sched_groups_power(i, sd); 7630 } 7631 #endif 7632 #ifdef CONFIG_SCHED_MC 7633 + for_each_cpu(i, cpu_map) { 7634 + struct sched_domain *sd = &per_cpu(core_domains, i).sd; 7635 7636 init_sched_groups_power(i, sd); 7637 } 7638 #endif 7639 7640 + for_each_cpu(i, cpu_map) { 7641 + struct sched_domain *sd = &per_cpu(phys_domains, i).sd; 7642 7643 init_sched_groups_power(i, sd); 7644 } ··· 7650 if (sd_allnodes) { 7651 struct sched_group *sg; 7652 7653 + cpu_to_allnodes_group(cpumask_first(cpu_map), cpu_map, &sg, 7654 tmpmask); 7655 init_numa_sched_groups_power(sg); 7656 } 7657 #endif 7658 7659 /* Attach the domains */ 7660 + for_each_cpu(i, cpu_map) { 7661 struct sched_domain *sd; 7662 #ifdef CONFIG_SCHED_SMT 7663 + sd = &per_cpu(cpu_domains, i).sd; 7664 #elif defined(CONFIG_SCHED_MC) 7665 + sd = &per_cpu(core_domains, i).sd; 7666 #else 7667 + sd = &per_cpu(phys_domains, i).sd; 7668 #endif 7669 cpu_attach_domain(sd, rd, i); 7670 } 7671 7672 + err = 0; 7673 + 7674 + free_tmpmask: 7675 + free_cpumask_var(tmpmask); 7676 + free_send_covered: 7677 + free_cpumask_var(send_covered); 7678 + free_this_core_map: 7679 + free_cpumask_var(this_core_map); 7680 + free_this_sibling_map: 7681 + free_cpumask_var(this_sibling_map); 7682 + free_nodemask: 7683 + free_cpumask_var(nodemask); 7684 + free_notcovered: 7685 + #ifdef CONFIG_NUMA 7686 + free_cpumask_var(notcovered); 7687 + free_covered: 7688 + free_cpumask_var(covered); 7689 + free_domainspan: 7690 + free_cpumask_var(domainspan); 7691 + out: 7692 + #endif 7693 + return err; 7694 + 7695 + free_sched_groups: 7696 + #ifdef CONFIG_NUMA 7697 + kfree(sched_group_nodes); 7698 + #endif 7699 + goto free_tmpmask; 7700 7701 #ifdef CONFIG_NUMA 7702 error: 7703 free_sched_groups(cpu_map, tmpmask); 7704 + free_rootdomain(rd); 7705 + goto free_tmpmask; 7706 #endif 7707 } 7708 7709 + static int build_sched_domains(const struct cpumask *cpu_map) 7710 { 7711 return __build_sched_domains(cpu_map, NULL); 7712 } 7713 7714 + static struct cpumask *doms_cur; /* current sched domains */ 7715 static int ndoms_cur; /* number of sched domains in 'doms_cur' */ 7716 static struct sched_domain_attr *dattr_cur; 7717 /* attribues of custom domains in 'doms_cur' */ 7718 7719 /* 7720 * Special case: If a kmalloc of a doms_cur partition (array of 7721 + * cpumask) fails, then fallback to a single sched domain, 7722 + * as determined by the single cpumask fallback_doms. 7723 */ 7724 + static cpumask_var_t fallback_doms; 7725 7726 /* 7727 * arch_update_cpu_topology lets virtualized architectures update the ··· 7713 * For now this just excludes isolated cpus, but could be used to 7714 * exclude other special cases in the future. 7715 */ 7716 + static int arch_init_sched_domains(const struct cpumask *cpu_map) 7717 { 7718 int err; 7719 7720 arch_update_cpu_topology(); 7721 ndoms_cur = 1; 7722 + doms_cur = kmalloc(cpumask_size(), GFP_KERNEL); 7723 if (!doms_cur) 7724 + doms_cur = fallback_doms; 7725 + cpumask_andnot(doms_cur, cpu_map, cpu_isolated_map); 7726 dattr_cur = NULL; 7727 err = build_sched_domains(doms_cur); 7728 register_sched_domain_sysctl(); ··· 7730 return err; 7731 } 7732 7733 + static void arch_destroy_sched_domains(const struct cpumask *cpu_map, 7734 + struct cpumask *tmpmask) 7735 { 7736 free_sched_groups(cpu_map, tmpmask); 7737 } ··· 7740 * Detach sched domains from a group of cpus specified in cpu_map 7741 * These cpus will now be attached to the NULL domain 7742 */ 7743 + static void detach_destroy_domains(const struct cpumask *cpu_map) 7744 { 7745 + /* Save because hotplug lock held. */ 7746 + static DECLARE_BITMAP(tmpmask, CONFIG_NR_CPUS); 7747 int i; 7748 7749 + for_each_cpu(i, cpu_map) 7750 cpu_attach_domain(NULL, &def_root_domain, i); 7751 synchronize_sched(); 7752 + arch_destroy_sched_domains(cpu_map, to_cpumask(tmpmask)); 7753 } 7754 7755 /* handle null as "default" */ ··· 7773 * doms_new[] to the current sched domain partitioning, doms_cur[]. 7774 * It destroys each deleted domain and builds each new domain. 7775 * 7776 + * 'doms_new' is an array of cpumask's of length 'ndoms_new'. 7777 * The masks don't intersect (don't overlap.) We should setup one 7778 * sched domain for each mask. CPUs not in any of the cpumasks will 7779 * not be load balanced. If the same cpumask appears both in the ··· 7787 * the single partition 'fallback_doms', it also forces the domains 7788 * to be rebuilt. 7789 * 7790 + * If doms_new == NULL it will be replaced with cpu_online_mask. 7791 * ndoms_new == 0 is a special case for destroying existing domains, 7792 * and it will not create the default domain. 7793 * 7794 * Call with hotplug lock held 7795 */ 7796 + /* FIXME: Change to struct cpumask *doms_new[] */ 7797 + void partition_sched_domains(int ndoms_new, struct cpumask *doms_new, 7798 struct sched_domain_attr *dattr_new) 7799 { 7800 int i, j, n; ··· 7812 /* Destroy deleted domains */ 7813 for (i = 0; i < ndoms_cur; i++) { 7814 for (j = 0; j < n && !new_topology; j++) { 7815 + if (cpumask_equal(&doms_cur[i], &doms_new[j]) 7816 && dattrs_equal(dattr_cur, i, dattr_new, j)) 7817 goto match1; 7818 } ··· 7824 7825 if (doms_new == NULL) { 7826 ndoms_cur = 0; 7827 + doms_new = fallback_doms; 7828 + cpumask_andnot(&doms_new[0], cpu_online_mask, cpu_isolated_map); 7829 WARN_ON_ONCE(dattr_new); 7830 } 7831 7832 /* Build new domains */ 7833 for (i = 0; i < ndoms_new; i++) { 7834 for (j = 0; j < ndoms_cur && !new_topology; j++) { 7835 + if (cpumask_equal(&doms_new[i], &doms_cur[j]) 7836 && dattrs_equal(dattr_new, i, dattr_cur, j)) 7837 goto match2; 7838 } ··· 7844 } 7845 7846 /* Remember the new sched domains */ 7847 + if (doms_cur != fallback_doms) 7848 kfree(doms_cur); 7849 kfree(dattr_cur); /* kfree(NULL) is safe */ 7850 doms_cur = doms_new; ··· 7873 static ssize_t sched_power_savings_store(const char *buf, size_t count, int smt) 7874 { 7875 int ret; 7876 + unsigned int level = 0; 7877 7878 + if (sscanf(buf, "%u", &level) != 1) 7879 + return -EINVAL; 7880 + 7881 + /* 7882 + * level is always be positive so don't check for 7883 + * level < POWERSAVINGS_BALANCE_NONE which is 0 7884 + * What happens on 0 or 1 byte write, 7885 + * need to check for count as well? 7886 + */ 7887 + 7888 + if (level >= MAX_POWERSAVINGS_BALANCE_LEVELS) 7889 return -EINVAL; 7890 7891 if (smt) 7892 + sched_smt_power_savings = level; 7893 else 7894 + sched_mc_power_savings = level; 7895 7896 ret = arch_reinit_sched_domains(); 7897 ··· 7984 7985 void __init sched_init_smp(void) 7986 { 7987 + cpumask_var_t non_isolated_cpus; 7988 + 7989 + alloc_cpumask_var(&non_isolated_cpus, GFP_KERNEL); 7990 7991 #if defined(CONFIG_NUMA) 7992 sched_group_nodes_bycpu = kzalloc(nr_cpu_ids * sizeof(void **), ··· 7993 #endif 7994 get_online_cpus(); 7995 mutex_lock(&sched_domains_mutex); 7996 + arch_init_sched_domains(cpu_online_mask); 7997 + cpumask_andnot(non_isolated_cpus, cpu_possible_mask, cpu_isolated_map); 7998 + if (cpumask_empty(non_isolated_cpus)) 7999 + cpumask_set_cpu(smp_processor_id(), non_isolated_cpus); 8000 mutex_unlock(&sched_domains_mutex); 8001 put_online_cpus(); 8002 ··· 8011 init_hrtick(); 8012 8013 /* Move init over to a non-isolated CPU */ 8014 + if (set_cpus_allowed_ptr(current, non_isolated_cpus) < 0) 8015 BUG(); 8016 sched_init_granularity(); 8017 + free_cpumask_var(non_isolated_cpus); 8018 + 8019 + alloc_cpumask_var(&fallback_doms, GFP_KERNEL); 8020 + init_sched_rt_class(); 8021 } 8022 #else 8023 void __init sched_init_smp(void) ··· 8327 * During early bootup we pretend to be a normal task: 8328 */ 8329 current->sched_class = &fair_sched_class; 8330 + 8331 + /* Allocate the nohz_cpu_mask if CONFIG_CPUMASK_OFFSTACK */ 8332 + alloc_bootmem_cpumask_var(&nohz_cpu_mask); 8333 + #ifdef CONFIG_SMP 8334 + #ifdef CONFIG_NO_HZ 8335 + alloc_bootmem_cpumask_var(&nohz.cpu_mask); 8336 + #endif 8337 + alloc_bootmem_cpumask_var(&cpu_isolated_map); 8338 + #endif /* SMP */ 8339 8340 scheduler_running = 1; 8341 }
+28 -11
kernel/sched_cpupri.c
··· 67 * Returns: (int)bool - CPUs were found 68 */ 69 int cpupri_find(struct cpupri *cp, struct task_struct *p, 70 - cpumask_t *lowest_mask) 71 { 72 int idx = 0; 73 int task_pri = convert_prio(p->prio); 74 75 for_each_cpupri_active(cp->pri_active, idx) { 76 struct cpupri_vec *vec = &cp->pri_to_cpu[idx]; 77 - cpumask_t mask; 78 79 if (idx >= task_pri) 80 break; 81 82 - cpus_and(mask, p->cpus_allowed, vec->mask); 83 - 84 - if (cpus_empty(mask)) 85 continue; 86 87 - *lowest_mask = mask; 88 return 1; 89 } 90 ··· 123 vec->count--; 124 if (!vec->count) 125 clear_bit(oldpri, cp->pri_active); 126 - cpu_clear(cpu, vec->mask); 127 128 spin_unlock_irqrestore(&vec->lock, flags); 129 } ··· 133 134 spin_lock_irqsave(&vec->lock, flags); 135 136 - cpu_set(cpu, vec->mask); 137 vec->count++; 138 if (vec->count == 1) 139 set_bit(newpri, cp->pri_active); ··· 147 /** 148 * cpupri_init - initialize the cpupri structure 149 * @cp: The cpupri context 150 * 151 - * Returns: (void) 152 */ 153 - void cpupri_init(struct cpupri *cp) 154 { 155 int i; 156 ··· 162 163 spin_lock_init(&vec->lock); 164 vec->count = 0; 165 - cpus_clear(vec->mask); 166 } 167 168 for_each_possible_cpu(i) 169 cp->cpu_to_pri[i] = CPUPRI_INVALID; 170 } 171 172
··· 67 * Returns: (int)bool - CPUs were found 68 */ 69 int cpupri_find(struct cpupri *cp, struct task_struct *p, 70 + struct cpumask *lowest_mask) 71 { 72 int idx = 0; 73 int task_pri = convert_prio(p->prio); 74 75 for_each_cpupri_active(cp->pri_active, idx) { 76 struct cpupri_vec *vec = &cp->pri_to_cpu[idx]; 77 78 if (idx >= task_pri) 79 break; 80 81 + if (cpumask_any_and(&p->cpus_allowed, vec->mask) >= nr_cpu_ids) 82 continue; 83 84 + cpumask_and(lowest_mask, &p->cpus_allowed, vec->mask); 85 return 1; 86 } 87 ··· 126 vec->count--; 127 if (!vec->count) 128 clear_bit(oldpri, cp->pri_active); 129 + cpumask_clear_cpu(cpu, vec->mask); 130 131 spin_unlock_irqrestore(&vec->lock, flags); 132 } ··· 136 137 spin_lock_irqsave(&vec->lock, flags); 138 139 + cpumask_set_cpu(cpu, vec->mask); 140 vec->count++; 141 if (vec->count == 1) 142 set_bit(newpri, cp->pri_active); ··· 150 /** 151 * cpupri_init - initialize the cpupri structure 152 * @cp: The cpupri context 153 + * @bootmem: true if allocations need to use bootmem 154 * 155 + * Returns: -ENOMEM if memory fails. 156 */ 157 + int cpupri_init(struct cpupri *cp, bool bootmem) 158 { 159 int i; 160 ··· 164 165 spin_lock_init(&vec->lock); 166 vec->count = 0; 167 + if (bootmem) 168 + alloc_bootmem_cpumask_var(&vec->mask); 169 + else if (!alloc_cpumask_var(&vec->mask, GFP_KERNEL)) 170 + goto cleanup; 171 } 172 173 for_each_possible_cpu(i) 174 cp->cpu_to_pri[i] = CPUPRI_INVALID; 175 + return 0; 176 + 177 + cleanup: 178 + for (i--; i >= 0; i--) 179 + free_cpumask_var(cp->pri_to_cpu[i].mask); 180 + return -ENOMEM; 181 } 182 183 + /** 184 + * cpupri_cleanup - clean up the cpupri structure 185 + * @cp: The cpupri context 186 + */ 187 + void cpupri_cleanup(struct cpupri *cp) 188 + { 189 + int i; 190 191 + for (i = 0; i < CPUPRI_NR_PRIORITIES; i++) 192 + free_cpumask_var(cp->pri_to_cpu[i].mask); 193 + }
+3 -2
kernel/sched_cpupri.h
··· 14 struct cpupri_vec { 15 spinlock_t lock; 16 int count; 17 - cpumask_t mask; 18 }; 19 20 struct cpupri { ··· 27 int cpupri_find(struct cpupri *cp, 28 struct task_struct *p, cpumask_t *lowest_mask); 29 void cpupri_set(struct cpupri *cp, int cpu, int pri); 30 - void cpupri_init(struct cpupri *cp); 31 #else 32 #define cpupri_set(cp, cpu, pri) do { } while (0) 33 #define cpupri_init() do { } while (0)
··· 14 struct cpupri_vec { 15 spinlock_t lock; 16 int count; 17 + cpumask_var_t mask; 18 }; 19 20 struct cpupri { ··· 27 int cpupri_find(struct cpupri *cp, 28 struct task_struct *p, cpumask_t *lowest_mask); 29 void cpupri_set(struct cpupri *cp, int cpu, int pri); 30 + int cpupri_init(struct cpupri *cp, bool bootmem); 31 + void cpupri_cleanup(struct cpupri *cp); 32 #else 33 #define cpupri_set(cp, cpu, pri) do { } while (0) 34 #define cpupri_init() do { } while (0)
+24 -8
kernel/sched_fair.c
··· 1019 * search starts with cpus closest then further out as needed, 1020 * so we always favor a closer, idle cpu. 1021 * Domains may include CPUs that are not usable for migration, 1022 - * hence we need to mask them out (cpu_active_map) 1023 * 1024 * Returns the CPU we should wake onto. 1025 */ 1026 #if defined(ARCH_HAS_SCHED_WAKE_IDLE) 1027 static int wake_idle(int cpu, struct task_struct *p) 1028 { 1029 - cpumask_t tmp; 1030 struct sched_domain *sd; 1031 int i; 1032 1033 /* 1034 * If it is idle, then it is the best cpu to run this task. ··· 1063 if ((sd->flags & SD_WAKE_IDLE) 1064 || ((sd->flags & SD_WAKE_IDLE_FAR) 1065 && !task_hot(p, task_rq(p)->clock, sd))) { 1066 - cpus_and(tmp, sd->span, p->cpus_allowed); 1067 - cpus_and(tmp, tmp, cpu_active_map); 1068 - for_each_cpu_mask_nr(i, tmp) { 1069 - if (idle_cpu(i)) { 1070 if (i != task_cpu(p)) { 1071 schedstat_inc(p, 1072 se.nr_wakeups_idle); ··· 1258 * this_cpu and prev_cpu are present in: 1259 */ 1260 for_each_domain(this_cpu, sd) { 1261 - if (cpu_isset(prev_cpu, sd->span)) { 1262 this_sd = sd; 1263 break; 1264 } 1265 } 1266 1267 - if (unlikely(!cpu_isset(this_cpu, p->cpus_allowed))) 1268 goto out; 1269 1270 /*
··· 1019 * search starts with cpus closest then further out as needed, 1020 * so we always favor a closer, idle cpu. 1021 * Domains may include CPUs that are not usable for migration, 1022 + * hence we need to mask them out (cpu_active_mask) 1023 * 1024 * Returns the CPU we should wake onto. 1025 */ 1026 #if defined(ARCH_HAS_SCHED_WAKE_IDLE) 1027 static int wake_idle(int cpu, struct task_struct *p) 1028 { 1029 struct sched_domain *sd; 1030 int i; 1031 + unsigned int chosen_wakeup_cpu; 1032 + int this_cpu; 1033 + 1034 + /* 1035 + * At POWERSAVINGS_BALANCE_WAKEUP level, if both this_cpu and prev_cpu 1036 + * are idle and this is not a kernel thread and this task's affinity 1037 + * allows it to be moved to preferred cpu, then just move! 1038 + */ 1039 + 1040 + this_cpu = smp_processor_id(); 1041 + chosen_wakeup_cpu = 1042 + cpu_rq(this_cpu)->rd->sched_mc_preferred_wakeup_cpu; 1043 + 1044 + if (sched_mc_power_savings >= POWERSAVINGS_BALANCE_WAKEUP && 1045 + idle_cpu(cpu) && idle_cpu(this_cpu) && 1046 + p->mm && !(p->flags & PF_KTHREAD) && 1047 + cpu_isset(chosen_wakeup_cpu, p->cpus_allowed)) 1048 + return chosen_wakeup_cpu; 1049 1050 /* 1051 * If it is idle, then it is the best cpu to run this task. ··· 1046 if ((sd->flags & SD_WAKE_IDLE) 1047 || ((sd->flags & SD_WAKE_IDLE_FAR) 1048 && !task_hot(p, task_rq(p)->clock, sd))) { 1049 + for_each_cpu_and(i, sched_domain_span(sd), 1050 + &p->cpus_allowed) { 1051 + if (cpu_active(i) && idle_cpu(i)) { 1052 if (i != task_cpu(p)) { 1053 schedstat_inc(p, 1054 se.nr_wakeups_idle); ··· 1242 * this_cpu and prev_cpu are present in: 1243 */ 1244 for_each_domain(this_cpu, sd) { 1245 + if (cpumask_test_cpu(prev_cpu, sched_domain_span(sd))) { 1246 this_sd = sd; 1247 break; 1248 } 1249 } 1250 1251 + if (unlikely(!cpumask_test_cpu(this_cpu, &p->cpus_allowed))) 1252 goto out; 1253 1254 /*
+44 -29
kernel/sched_rt.c
··· 15 if (!rq->online) 16 return; 17 18 - cpu_set(rq->cpu, rq->rd->rto_mask); 19 /* 20 * Make sure the mask is visible before we set 21 * the overload count. That is checked to determine ··· 34 35 /* the order here really doesn't matter */ 36 atomic_dec(&rq->rd->rto_count); 37 - cpu_clear(rq->cpu, rq->rd->rto_mask); 38 } 39 40 static void update_rt_migration(struct rq *rq) ··· 139 } 140 141 #ifdef CONFIG_SMP 142 - static inline cpumask_t sched_rt_period_mask(void) 143 { 144 return cpu_rq(smp_processor_id())->rd->span; 145 } 146 #else 147 - static inline cpumask_t sched_rt_period_mask(void) 148 { 149 - return cpu_online_map; 150 } 151 #endif 152 ··· 212 return rt_rq->rt_throttled; 213 } 214 215 - static inline cpumask_t sched_rt_period_mask(void) 216 { 217 - return cpu_online_map; 218 } 219 220 static inline ··· 241 int i, weight, more = 0; 242 u64 rt_period; 243 244 - weight = cpus_weight(rd->span); 245 246 spin_lock(&rt_b->rt_runtime_lock); 247 rt_period = ktime_to_ns(rt_b->rt_period); 248 - for_each_cpu_mask_nr(i, rd->span) { 249 struct rt_rq *iter = sched_rt_period_rt_rq(rt_b, i); 250 s64 diff; 251 ··· 324 /* 325 * Greedy reclaim, take back as much as we can. 326 */ 327 - for_each_cpu_mask(i, rd->span) { 328 struct rt_rq *iter = sched_rt_period_rt_rq(rt_b, i); 329 s64 diff; 330 ··· 429 static int do_sched_rt_period_timer(struct rt_bandwidth *rt_b, int overrun) 430 { 431 int i, idle = 1; 432 - cpumask_t span; 433 434 if (!rt_bandwidth_enabled() || rt_b->rt_runtime == RUNTIME_INF) 435 return 1; 436 437 span = sched_rt_period_mask(); 438 - for_each_cpu_mask(i, span) { 439 int enqueue = 0; 440 struct rt_rq *rt_rq = sched_rt_period_rt_rq(rt_b, i); 441 struct rq *rq = rq_of_rt_rq(rt_rq); ··· 805 806 static void check_preempt_equal_prio(struct rq *rq, struct task_struct *p) 807 { 808 - cpumask_t mask; 809 810 if (rq->curr->rt.nr_cpus_allowed == 1) 811 return; 812 813 - if (p->rt.nr_cpus_allowed != 1 814 - && cpupri_find(&rq->rd->cpupri, p, &mask)) 815 return; 816 817 - if (!cpupri_find(&rq->rd->cpupri, rq->curr, &mask)) 818 - return; 819 820 /* 821 * There appears to be other cpus that can accept ··· 827 */ 828 requeue_task_rt(rq, p, 1); 829 resched_task(rq->curr); 830 } 831 832 #endif /* CONFIG_SMP */ ··· 919 static int pick_rt_task(struct rq *rq, struct task_struct *p, int cpu) 920 { 921 if (!task_running(rq, p) && 922 - (cpu < 0 || cpu_isset(cpu, p->cpus_allowed)) && 923 (p->rt.nr_cpus_allowed > 1)) 924 return 1; 925 return 0; ··· 958 return next; 959 } 960 961 - static DEFINE_PER_CPU(cpumask_t, local_cpu_mask); 962 963 static inline int pick_optimal_cpu(int this_cpu, cpumask_t *mask) 964 { ··· 978 static int find_lowest_rq(struct task_struct *task) 979 { 980 struct sched_domain *sd; 981 - cpumask_t *lowest_mask = &__get_cpu_var(local_cpu_mask); 982 int this_cpu = smp_processor_id(); 983 int cpu = task_cpu(task); 984 ··· 993 * I guess we might want to change cpupri_find() to ignore those 994 * in the first place. 995 */ 996 - cpus_and(*lowest_mask, *lowest_mask, cpu_active_map); 997 998 /* 999 * At this point we have built a mask of cpus representing the ··· 1003 * We prioritize the last cpu that the task executed on since 1004 * it is most likely cache-hot in that location. 1005 */ 1006 - if (cpu_isset(cpu, *lowest_mask)) 1007 return cpu; 1008 1009 /* ··· 1018 cpumask_t domain_mask; 1019 int best_cpu; 1020 1021 - cpus_and(domain_mask, sd->span, *lowest_mask); 1022 1023 best_cpu = pick_optimal_cpu(this_cpu, 1024 &domain_mask); ··· 1060 * Also make sure that it wasn't scheduled on its rq. 1061 */ 1062 if (unlikely(task_rq(task) != rq || 1063 - !cpu_isset(lowest_rq->cpu, 1064 - task->cpus_allowed) || 1065 task_running(rq, task) || 1066 !task->se.on_rq)) { 1067 ··· 1182 1183 next = pick_next_task_rt(this_rq); 1184 1185 - for_each_cpu_mask_nr(cpu, this_rq->rd->rto_mask) { 1186 if (this_cpu == cpu) 1187 continue; 1188 ··· 1311 } 1312 1313 static void set_cpus_allowed_rt(struct task_struct *p, 1314 - const cpumask_t *new_mask) 1315 { 1316 - int weight = cpus_weight(*new_mask); 1317 1318 BUG_ON(!rt_task(p)); 1319 ··· 1334 update_rt_migration(rq); 1335 } 1336 1337 - p->cpus_allowed = *new_mask; 1338 p->rt.nr_cpus_allowed = weight; 1339 } 1340 ··· 1376 */ 1377 if (!rq->rt.rt_nr_running) 1378 pull_rt_task(rq); 1379 } 1380 #endif /* CONFIG_SMP */ 1381 ··· 1555 rcu_read_unlock(); 1556 } 1557 #endif /* CONFIG_SCHED_DEBUG */
··· 15 if (!rq->online) 16 return; 17 18 + cpumask_set_cpu(rq->cpu, rq->rd->rto_mask); 19 /* 20 * Make sure the mask is visible before we set 21 * the overload count. That is checked to determine ··· 34 35 /* the order here really doesn't matter */ 36 atomic_dec(&rq->rd->rto_count); 37 + cpumask_clear_cpu(rq->cpu, rq->rd->rto_mask); 38 } 39 40 static void update_rt_migration(struct rq *rq) ··· 139 } 140 141 #ifdef CONFIG_SMP 142 + static inline const struct cpumask *sched_rt_period_mask(void) 143 { 144 return cpu_rq(smp_processor_id())->rd->span; 145 } 146 #else 147 + static inline const struct cpumask *sched_rt_period_mask(void) 148 { 149 + return cpu_online_mask; 150 } 151 #endif 152 ··· 212 return rt_rq->rt_throttled; 213 } 214 215 + static inline const struct cpumask *sched_rt_period_mask(void) 216 { 217 + return cpu_online_mask; 218 } 219 220 static inline ··· 241 int i, weight, more = 0; 242 u64 rt_period; 243 244 + weight = cpumask_weight(rd->span); 245 246 spin_lock(&rt_b->rt_runtime_lock); 247 rt_period = ktime_to_ns(rt_b->rt_period); 248 + for_each_cpu(i, rd->span) { 249 struct rt_rq *iter = sched_rt_period_rt_rq(rt_b, i); 250 s64 diff; 251 ··· 324 /* 325 * Greedy reclaim, take back as much as we can. 326 */ 327 + for_each_cpu(i, rd->span) { 328 struct rt_rq *iter = sched_rt_period_rt_rq(rt_b, i); 329 s64 diff; 330 ··· 429 static int do_sched_rt_period_timer(struct rt_bandwidth *rt_b, int overrun) 430 { 431 int i, idle = 1; 432 + const struct cpumask *span; 433 434 if (!rt_bandwidth_enabled() || rt_b->rt_runtime == RUNTIME_INF) 435 return 1; 436 437 span = sched_rt_period_mask(); 438 + for_each_cpu(i, span) { 439 int enqueue = 0; 440 struct rt_rq *rt_rq = sched_rt_period_rt_rq(rt_b, i); 441 struct rq *rq = rq_of_rt_rq(rt_rq); ··· 805 806 static void check_preempt_equal_prio(struct rq *rq, struct task_struct *p) 807 { 808 + cpumask_var_t mask; 809 810 if (rq->curr->rt.nr_cpus_allowed == 1) 811 return; 812 813 + if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) 814 return; 815 816 + if (p->rt.nr_cpus_allowed != 1 817 + && cpupri_find(&rq->rd->cpupri, p, mask)) 818 + goto free; 819 + 820 + if (!cpupri_find(&rq->rd->cpupri, rq->curr, mask)) 821 + goto free; 822 823 /* 824 * There appears to be other cpus that can accept ··· 824 */ 825 requeue_task_rt(rq, p, 1); 826 resched_task(rq->curr); 827 + free: 828 + free_cpumask_var(mask); 829 } 830 831 #endif /* CONFIG_SMP */ ··· 914 static int pick_rt_task(struct rq *rq, struct task_struct *p, int cpu) 915 { 916 if (!task_running(rq, p) && 917 + (cpu < 0 || cpumask_test_cpu(cpu, &p->cpus_allowed)) && 918 (p->rt.nr_cpus_allowed > 1)) 919 return 1; 920 return 0; ··· 953 return next; 954 } 955 956 + static DEFINE_PER_CPU(cpumask_var_t, local_cpu_mask); 957 958 static inline int pick_optimal_cpu(int this_cpu, cpumask_t *mask) 959 { ··· 973 static int find_lowest_rq(struct task_struct *task) 974 { 975 struct sched_domain *sd; 976 + struct cpumask *lowest_mask = __get_cpu_var(local_cpu_mask); 977 int this_cpu = smp_processor_id(); 978 int cpu = task_cpu(task); 979 ··· 988 * I guess we might want to change cpupri_find() to ignore those 989 * in the first place. 990 */ 991 + cpumask_and(lowest_mask, lowest_mask, cpu_active_mask); 992 993 /* 994 * At this point we have built a mask of cpus representing the ··· 998 * We prioritize the last cpu that the task executed on since 999 * it is most likely cache-hot in that location. 1000 */ 1001 + if (cpumask_test_cpu(cpu, lowest_mask)) 1002 return cpu; 1003 1004 /* ··· 1013 cpumask_t domain_mask; 1014 int best_cpu; 1015 1016 + cpumask_and(&domain_mask, sched_domain_span(sd), 1017 + lowest_mask); 1018 1019 best_cpu = pick_optimal_cpu(this_cpu, 1020 &domain_mask); ··· 1054 * Also make sure that it wasn't scheduled on its rq. 1055 */ 1056 if (unlikely(task_rq(task) != rq || 1057 + !cpumask_test_cpu(lowest_rq->cpu, 1058 + &task->cpus_allowed) || 1059 task_running(rq, task) || 1060 !task->se.on_rq)) { 1061 ··· 1176 1177 next = pick_next_task_rt(this_rq); 1178 1179 + for_each_cpu(cpu, this_rq->rd->rto_mask) { 1180 if (this_cpu == cpu) 1181 continue; 1182 ··· 1305 } 1306 1307 static void set_cpus_allowed_rt(struct task_struct *p, 1308 + const struct cpumask *new_mask) 1309 { 1310 + int weight = cpumask_weight(new_mask); 1311 1312 BUG_ON(!rt_task(p)); 1313 ··· 1328 update_rt_migration(rq); 1329 } 1330 1331 + cpumask_copy(&p->cpus_allowed, new_mask); 1332 p->rt.nr_cpus_allowed = weight; 1333 } 1334 ··· 1370 */ 1371 if (!rq->rt.rt_nr_running) 1372 pull_rt_task(rq); 1373 + } 1374 + 1375 + static inline void init_sched_rt_class(void) 1376 + { 1377 + unsigned int i; 1378 + 1379 + for_each_possible_cpu(i) 1380 + alloc_cpumask_var(&per_cpu(local_cpu_mask, i), GFP_KERNEL); 1381 } 1382 #endif /* CONFIG_SMP */ 1383 ··· 1541 rcu_read_unlock(); 1542 } 1543 #endif /* CONFIG_SCHED_DEBUG */ 1544 +
+2 -1
kernel/sched_stats.h
··· 42 for_each_domain(cpu, sd) { 43 enum cpu_idle_type itype; 44 45 - cpumask_scnprintf(mask_str, mask_len, sd->span); 46 seq_printf(seq, "domain%d %s", dcount++, mask_str); 47 for (itype = CPU_IDLE; itype < CPU_MAX_IDLE_TYPES; 48 itype++) {
··· 42 for_each_domain(cpu, sd) { 43 enum cpu_idle_type itype; 44 45 + cpumask_scnprintf(mask_str, mask_len, 46 + sched_domain_span(sd)); 47 seq_printf(seq, "domain%d %s", dcount++, mask_str); 48 for (itype = CPU_IDLE; itype < CPU_MAX_IDLE_TYPES; 49 itype++) {
+1 -1
kernel/taskstats.c
··· 352 if (!data) 353 return -ENOMEM; 354 nla_strlcpy(data, na, len); 355 - ret = cpulist_parse(data, *mask); 356 kfree(data); 357 return ret; 358 }
··· 352 if (!data) 353 return -ENOMEM; 354 nla_strlcpy(data, na, len); 355 + ret = cpulist_parse(data, mask); 356 kfree(data); 357 return ret; 358 }
+2
kernel/time/clockevents.c
··· 166 void clockevents_register_device(struct clock_event_device *dev) 167 { 168 BUG_ON(dev->mode != CLOCK_EVT_MODE_UNUSED); 169 /* 170 * A nsec2cyc multiplicator of 0 is invalid and we'd crash 171 * on it, so fix it up and emit a warning:
··· 166 void clockevents_register_device(struct clock_event_device *dev) 167 { 168 BUG_ON(dev->mode != CLOCK_EVT_MODE_UNUSED); 169 + BUG_ON(!dev->cpumask); 170 + 171 /* 172 * A nsec2cyc multiplicator of 0 is invalid and we'd crash 173 * on it, so fix it up and emit a warning:
+1 -1
kernel/time/tick-broadcast.c
··· 150 */ 151 cpu = first_cpu(mask); 152 td = &per_cpu(tick_cpu_device, cpu); 153 - td->evtdev->broadcast(mask); 154 } 155 } 156
··· 150 */ 151 cpu = first_cpu(mask); 152 td = &per_cpu(tick_cpu_device, cpu); 153 + td->evtdev->broadcast(&mask); 154 } 155 } 156
+6 -6
kernel/time/tick-common.c
··· 136 */ 137 static void tick_setup_device(struct tick_device *td, 138 struct clock_event_device *newdev, int cpu, 139 - const cpumask_t *cpumask) 140 { 141 ktime_t next_event; 142 void (*handler)(struct clock_event_device *) = NULL; ··· 171 * When the device is not per cpu, pin the interrupt to the 172 * current cpu: 173 */ 174 - if (!cpus_equal(newdev->cpumask, *cpumask)) 175 - irq_set_affinity(newdev->irq, *cpumask); 176 177 /* 178 * When global broadcasting is active, check if the current ··· 202 spin_lock_irqsave(&tick_device_lock, flags); 203 204 cpu = smp_processor_id(); 205 - if (!cpu_isset(cpu, newdev->cpumask)) 206 goto out_bc; 207 208 td = &per_cpu(tick_cpu_device, cpu); 209 curdev = td->evtdev; 210 211 /* cpu local device ? */ 212 - if (!cpus_equal(newdev->cpumask, cpumask_of_cpu(cpu))) { 213 214 /* 215 * If the cpu affinity of the device interrupt can not ··· 222 * If we have a cpu local device already, do not replace it 223 * by a non cpu local device 224 */ 225 - if (curdev && cpus_equal(curdev->cpumask, cpumask_of_cpu(cpu))) 226 goto out_bc; 227 } 228
··· 136 */ 137 static void tick_setup_device(struct tick_device *td, 138 struct clock_event_device *newdev, int cpu, 139 + const struct cpumask *cpumask) 140 { 141 ktime_t next_event; 142 void (*handler)(struct clock_event_device *) = NULL; ··· 171 * When the device is not per cpu, pin the interrupt to the 172 * current cpu: 173 */ 174 + if (!cpumask_equal(newdev->cpumask, cpumask)) 175 + irq_set_affinity(newdev->irq, cpumask); 176 177 /* 178 * When global broadcasting is active, check if the current ··· 202 spin_lock_irqsave(&tick_device_lock, flags); 203 204 cpu = smp_processor_id(); 205 + if (!cpumask_test_cpu(cpu, newdev->cpumask)) 206 goto out_bc; 207 208 td = &per_cpu(tick_cpu_device, cpu); 209 curdev = td->evtdev; 210 211 /* cpu local device ? */ 212 + if (!cpumask_equal(newdev->cpumask, cpumask_of(cpu))) { 213 214 /* 215 * If the cpu affinity of the device interrupt can not ··· 222 * If we have a cpu local device already, do not replace it 223 * by a non cpu local device 224 */ 225 + if (curdev && cpumask_equal(curdev->cpumask, cpumask_of(cpu))) 226 goto out_bc; 227 } 228
+5 -5
kernel/time/tick-sched.c
··· 144 if (!ts->tick_stopped) 145 return; 146 147 - cpu_clear(cpu, nohz_cpu_mask); 148 now = ktime_get(); 149 ts->idle_waketime = now; 150 ··· 301 tick_do_timer_cpu = TICK_DO_TIMER_NONE; 302 303 if (delta_jiffies > 1) 304 - cpu_set(cpu, nohz_cpu_mask); 305 306 /* Skip reprogram of event if its not changed */ 307 if (ts->tick_stopped && ktime_equal(expires, dev->next_event)) ··· 319 /* 320 * sched tick not stopped! 321 */ 322 - cpu_clear(cpu, nohz_cpu_mask); 323 goto out; 324 } 325 ··· 361 * softirq. 362 */ 363 tick_do_update_jiffies64(ktime_get()); 364 - cpu_clear(cpu, nohz_cpu_mask); 365 } 366 raise_softirq_irqoff(TIMER_SOFTIRQ); 367 out: ··· 439 select_nohz_load_balancer(0); 440 now = ktime_get(); 441 tick_do_update_jiffies64(now); 442 - cpu_clear(cpu, nohz_cpu_mask); 443 444 /* 445 * We stopped the tick in idle. Update process times would miss the
··· 144 if (!ts->tick_stopped) 145 return; 146 147 + cpumask_clear_cpu(cpu, nohz_cpu_mask); 148 now = ktime_get(); 149 ts->idle_waketime = now; 150 ··· 301 tick_do_timer_cpu = TICK_DO_TIMER_NONE; 302 303 if (delta_jiffies > 1) 304 + cpumask_set_cpu(cpu, nohz_cpu_mask); 305 306 /* Skip reprogram of event if its not changed */ 307 if (ts->tick_stopped && ktime_equal(expires, dev->next_event)) ··· 319 /* 320 * sched tick not stopped! 321 */ 322 + cpumask_clear_cpu(cpu, nohz_cpu_mask); 323 goto out; 324 } 325 ··· 361 * softirq. 362 */ 363 tick_do_update_jiffies64(ktime_get()); 364 + cpumask_clear_cpu(cpu, nohz_cpu_mask); 365 } 366 raise_softirq_irqoff(TIMER_SOFTIRQ); 367 out: ··· 439 select_nohz_load_balancer(0); 440 now = ktime_get(); 441 tick_do_update_jiffies64(now); 442 + cpumask_clear_cpu(cpu, nohz_cpu_mask); 443 444 /* 445 * We stopped the tick in idle. Update process times would miss the
+2 -2
kernel/trace/trace.c
··· 2674 2675 mutex_lock(&tracing_cpumask_update_lock); 2676 2677 - len = cpumask_scnprintf(mask_str, count, tracing_cpumask); 2678 if (count - len < 2) { 2679 count = -EINVAL; 2680 goto out_err; ··· 2695 int err, cpu; 2696 2697 mutex_lock(&tracing_cpumask_update_lock); 2698 - err = cpumask_parse_user(ubuf, count, tracing_cpumask_new); 2699 if (err) 2700 goto err_unlock; 2701
··· 2674 2675 mutex_lock(&tracing_cpumask_update_lock); 2676 2677 + len = cpumask_scnprintf(mask_str, count, &tracing_cpumask); 2678 if (count - len < 2) { 2679 count = -EINVAL; 2680 goto out_err; ··· 2695 int err, cpu; 2696 2697 mutex_lock(&tracing_cpumask_update_lock); 2698 + err = cpumask_parse_user(ubuf, count, &tracing_cpumask_new); 2699 if (err) 2700 goto err_unlock; 2701
+7
lib/Kconfig
··· 159 config HAVE_LMB 160 boolean 161 162 endmenu
··· 159 config HAVE_LMB 160 boolean 161 162 + config CPUMASK_OFFSTACK 163 + bool "Force CPU masks off stack" if DEBUG_PER_CPU_MAPS 164 + help 165 + Use dynamic allocation for cpumask_var_t, instead of putting 166 + them on the stack. This is a bit more expensive, but avoids 167 + stack overflow. 168 + 169 endmenu
+1 -1
mm/slub.c
··· 3642 len < PAGE_SIZE - 60) { 3643 len += sprintf(buf + len, " cpus="); 3644 len += cpulist_scnprintf(buf + len, PAGE_SIZE - len - 50, 3645 - l->cpus); 3646 } 3647 3648 if (num_online_nodes() > 1 && !nodes_empty(l->nodes) &&
··· 3642 len < PAGE_SIZE - 60) { 3643 len += sprintf(buf + len, " cpus="); 3644 len += cpulist_scnprintf(buf + len, PAGE_SIZE - len - 50, 3645 + &l->cpus); 3646 } 3647 3648 if (num_online_nodes() > 1 && !nodes_empty(l->nodes) &&