Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amdgpu: remove old lockup detection infrastructure

It didn't worked to well anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>

authored by

Christian König and committed by
Alex Deucher
b7e4dad3 d0be9f4e

+1 -169
-7
drivers/gpu/drm/amd/amdgpu/amdgpu.h
··· 345 345 /* testing functions */ 346 346 int (*test_ring)(struct amdgpu_ring *ring); 347 347 int (*test_ib)(struct amdgpu_ring *ring); 348 - bool (*is_lockup)(struct amdgpu_ring *ring); 349 348 /* insert NOP packets */ 350 349 void (*insert_nop)(struct amdgpu_ring *ring, uint32_t count); 351 350 }; ··· 906 907 unsigned ring_size; 907 908 unsigned ring_free_dw; 908 909 int count_dw; 909 - atomic_t last_rptr; 910 - atomic64_t last_activity; 911 910 uint64_t gpu_addr; 912 911 uint32_t align_mask; 913 912 uint32_t ptr_mask; ··· 1227 1230 void amdgpu_ring_unlock_commit(struct amdgpu_ring *ring); 1228 1231 void amdgpu_ring_undo(struct amdgpu_ring *ring); 1229 1232 void amdgpu_ring_unlock_undo(struct amdgpu_ring *ring); 1230 - void amdgpu_ring_lockup_update(struct amdgpu_ring *ring); 1231 - bool amdgpu_ring_test_lockup(struct amdgpu_ring *ring); 1232 1233 unsigned amdgpu_ring_backup(struct amdgpu_ring *ring, 1233 1234 uint32_t **data); 1234 1235 int amdgpu_ring_restore(struct amdgpu_ring *ring, ··· 1969 1974 bool suspend; 1970 1975 bool need_dma32; 1971 1976 bool accel_working; 1972 - bool needs_reset; 1973 1977 struct work_struct reset_work; 1974 1978 struct notifier_block acpi_nb; 1975 1979 struct amdgpu_i2c_chan *i2c_bus[AMDGPU_MAX_I2C_BUS]; ··· 2247 2253 #define amdgpu_ring_parse_cs(r, p, ib) ((r)->funcs->parse_cs((p), (ib))) 2248 2254 #define amdgpu_ring_test_ring(r) (r)->funcs->test_ring((r)) 2249 2255 #define amdgpu_ring_test_ib(r) (r)->funcs->test_ib((r)) 2250 - #define amdgpu_ring_is_lockup(r) (r)->funcs->is_lockup((r)) 2251 2256 #define amdgpu_ring_get_rptr(r) (r)->funcs->get_rptr((r)) 2252 2257 #define amdgpu_ring_get_wptr(r) (r)->funcs->get_wptr((r)) 2253 2258 #define amdgpu_ring_set_wptr(r) (r)->funcs->set_wptr((r))
-6
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
··· 1816 1816 1817 1817 down_write(&adev->exclusive_lock); 1818 1818 1819 - if (!adev->needs_reset) { 1820 - up_write(&adev->exclusive_lock); 1821 - return 0; 1822 - } 1823 - 1824 - adev->needs_reset = false; 1825 1819 atomic_inc(&adev->gpu_reset_counter); 1826 1820 1827 1821 /* block TTM */
+1 -19
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
··· 269 269 if (amdgpu_fence_activity(ring)) { 270 270 wake_up_all(&ring->fence_drv.fence_queue); 271 271 } 272 - else if (amdgpu_ring_is_lockup(ring)) { 273 - /* good news we believe it's a lockup */ 274 - dev_warn(ring->adev->dev, "GPU lockup (current fence id " 275 - "0x%016llx last fence id 0x%016llx on ring %d)\n", 276 - (uint64_t)atomic64_read(&fence_drv->last_seq), 277 - fence_drv->sync_seq[ring->idx], ring->idx); 278 - 279 - /* remember that we need an reset */ 280 - ring->adev->needs_reset = true; 281 - wake_up_all(&ring->fence_drv.fence_queue); 282 - } 283 272 up_read(&ring->adev->exclusive_lock); 284 273 } 285 274 ··· 369 380 */ 370 381 static int amdgpu_fence_ring_wait_seq(struct amdgpu_ring *ring, uint64_t seq) 371 382 { 372 - struct amdgpu_device *adev = ring->adev; 373 383 bool signaled = false; 374 384 375 385 BUG_ON(!ring); ··· 379 391 return 0; 380 392 381 393 wait_event(ring->fence_drv.fence_queue, ( 382 - (signaled = amdgpu_fence_seq_signaled(ring, seq)) 383 - || adev->needs_reset)); 394 + (signaled = amdgpu_fence_seq_signaled(ring, seq)))); 384 395 385 396 if (signaled) 386 397 return 0; ··· 925 938 */ 926 939 if (amdgpu_test_signaled_any(array, count)) 927 940 break; 928 - 929 - if (adev->needs_reset) { 930 - t = -EDEADLK; 931 - break; 932 - } 933 941 934 942 t = schedule_timeout(t); 935 943
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
··· 298 298 r = amdgpu_ring_test_ib(ring); 299 299 if (r) { 300 300 ring->ready = false; 301 - adev->needs_reset = false; 302 301 303 302 if (ring == &adev->gfx.gfx_ring[0]) { 304 303 /* oh, oh, that's really bad */
-43
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
··· 67 67 if (!ring->ring_free_dw) { 68 68 /* this is an empty ring */ 69 69 ring->ring_free_dw = ring->ring_size / 4; 70 - /* update lockup info to avoid false positive */ 71 - amdgpu_ring_lockup_update(ring); 72 70 } 73 71 } 74 72 ··· 204 206 { 205 207 amdgpu_ring_undo(ring); 206 208 mutex_unlock(ring->ring_lock); 207 - } 208 - 209 - /** 210 - * amdgpu_ring_lockup_update - update lockup variables 211 - * 212 - * @ring: amdgpu_ring structure holding ring information 213 - * 214 - * Update the last rptr value and timestamp (all asics). 215 - */ 216 - void amdgpu_ring_lockup_update(struct amdgpu_ring *ring) 217 - { 218 - atomic_set(&ring->last_rptr, amdgpu_ring_get_rptr(ring)); 219 - atomic64_set(&ring->last_activity, jiffies_64); 220 - } 221 - 222 - /** 223 - * amdgpu_ring_test_lockup() - check if ring is lockedup by recording information 224 - * @ring: amdgpu_ring structure holding ring information 225 - * 226 - */ 227 - bool amdgpu_ring_test_lockup(struct amdgpu_ring *ring) 228 - { 229 - uint32_t rptr = amdgpu_ring_get_rptr(ring); 230 - uint64_t last = atomic64_read(&ring->last_activity); 231 - uint64_t elapsed; 232 - 233 - if (rptr != atomic_read(&ring->last_rptr)) { 234 - /* ring is still working, no lockup */ 235 - amdgpu_ring_lockup_update(ring); 236 - return false; 237 - } 238 - 239 - elapsed = jiffies_to_msecs(jiffies_64 - last); 240 - if (amdgpu_lockup_timeout && elapsed >= amdgpu_lockup_timeout) { 241 - dev_err(ring->adev->dev, "ring %d stalled for more than %llumsec\n", 242 - ring->idx, elapsed); 243 - return true; 244 - } 245 - /* give a chance to the GPU ... */ 246 - return false; 247 209 } 248 210 249 211 /** ··· 394 436 if (amdgpu_debugfs_ring_init(adev, ring)) { 395 437 DRM_ERROR("Failed to register debugfs file for rings !\n"); 396 438 } 397 - amdgpu_ring_lockup_update(ring); 398 439 return 0; 399 440 } 400 441
-19
drivers/gpu/drm/amd/amdgpu/cik_sdma.c
··· 1290 1290 .set_powergating_state = cik_sdma_set_powergating_state, 1291 1291 }; 1292 1292 1293 - /** 1294 - * cik_sdma_ring_is_lockup - Check if the DMA engine is locked up 1295 - * 1296 - * @ring: amdgpu_ring structure holding ring information 1297 - * 1298 - * Check if the async DMA engine is locked up (CIK). 1299 - * Returns true if the engine appears to be locked up, false if not. 1300 - */ 1301 - static bool cik_sdma_ring_is_lockup(struct amdgpu_ring *ring) 1302 - { 1303 - 1304 - if (cik_sdma_is_idle(ring->adev)) { 1305 - amdgpu_ring_lockup_update(ring); 1306 - return false; 1307 - } 1308 - return amdgpu_ring_test_lockup(ring); 1309 - } 1310 - 1311 1293 static const struct amdgpu_ring_funcs cik_sdma_ring_funcs = { 1312 1294 .get_rptr = cik_sdma_ring_get_rptr, 1313 1295 .get_wptr = cik_sdma_ring_get_wptr, ··· 1302 1320 .emit_hdp_flush = cik_sdma_ring_emit_hdp_flush, 1303 1321 .test_ring = cik_sdma_ring_test_ring, 1304 1322 .test_ib = cik_sdma_ring_test_ib, 1305 - .is_lockup = cik_sdma_ring_is_lockup, 1306 1323 .insert_nop = cik_sdma_ring_insert_nop, 1307 1324 }; 1308 1325
-20
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
··· 5542 5542 .set_powergating_state = gfx_v7_0_set_powergating_state, 5543 5543 }; 5544 5544 5545 - /** 5546 - * gfx_v7_0_ring_is_lockup - check if the 3D engine is locked up 5547 - * 5548 - * @adev: amdgpu_device pointer 5549 - * @ring: amdgpu_ring structure holding ring information 5550 - * 5551 - * Check if the 3D engine is locked up (CIK). 5552 - * Returns true if the engine is locked, false if not. 5553 - */ 5554 - static bool gfx_v7_0_ring_is_lockup(struct amdgpu_ring *ring) 5555 - { 5556 - if (gfx_v7_0_is_idle(ring->adev)) { 5557 - amdgpu_ring_lockup_update(ring); 5558 - return false; 5559 - } 5560 - return amdgpu_ring_test_lockup(ring); 5561 - } 5562 - 5563 5545 static const struct amdgpu_ring_funcs gfx_v7_0_ring_funcs_gfx = { 5564 5546 .get_rptr = gfx_v7_0_ring_get_rptr_gfx, 5565 5547 .get_wptr = gfx_v7_0_ring_get_wptr_gfx, ··· 5555 5573 .emit_hdp_flush = gfx_v7_0_ring_emit_hdp_flush, 5556 5574 .test_ring = gfx_v7_0_ring_test_ring, 5557 5575 .test_ib = gfx_v7_0_ring_test_ib, 5558 - .is_lockup = gfx_v7_0_ring_is_lockup, 5559 5576 .insert_nop = amdgpu_ring_insert_nop, 5560 5577 }; 5561 5578 ··· 5571 5590 .emit_hdp_flush = gfx_v7_0_ring_emit_hdp_flush, 5572 5591 .test_ring = gfx_v7_0_ring_test_ring, 5573 5592 .test_ib = gfx_v7_0_ring_test_ib, 5574 - .is_lockup = gfx_v7_0_ring_is_lockup, 5575 5593 .insert_nop = amdgpu_ring_insert_nop, 5576 5594 }; 5577 5595
-11
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
··· 4075 4075 } 4076 4076 } 4077 4077 4078 - static bool gfx_v8_0_ring_is_lockup(struct amdgpu_ring *ring) 4079 - { 4080 - if (gfx_v8_0_is_idle(ring->adev)) { 4081 - amdgpu_ring_lockup_update(ring); 4082 - return false; 4083 - } 4084 - return amdgpu_ring_test_lockup(ring); 4085 - } 4086 - 4087 4078 static u32 gfx_v8_0_ring_get_rptr_compute(struct amdgpu_ring *ring) 4088 4079 { 4089 4080 return ring->adev->wb.wb[ring->rptr_offs]; ··· 4356 4365 .emit_hdp_flush = gfx_v8_0_ring_emit_hdp_flush, 4357 4366 .test_ring = gfx_v8_0_ring_test_ring, 4358 4367 .test_ib = gfx_v8_0_ring_test_ib, 4359 - .is_lockup = gfx_v8_0_ring_is_lockup, 4360 4368 .insert_nop = amdgpu_ring_insert_nop, 4361 4369 }; 4362 4370 ··· 4372 4382 .emit_hdp_flush = gfx_v8_0_ring_emit_hdp_flush, 4373 4383 .test_ring = gfx_v8_0_ring_test_ring, 4374 4384 .test_ib = gfx_v8_0_ring_test_ib, 4375 - .is_lockup = gfx_v8_0_ring_is_lockup, 4376 4385 .insert_nop = amdgpu_ring_insert_nop, 4377 4386 }; 4378 4387
-19
drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
··· 1295 1295 .set_powergating_state = sdma_v2_4_set_powergating_state, 1296 1296 }; 1297 1297 1298 - /** 1299 - * sdma_v2_4_ring_is_lockup - Check if the DMA engine is locked up 1300 - * 1301 - * @ring: amdgpu_ring structure holding ring information 1302 - * 1303 - * Check if the async DMA engine is locked up (VI). 1304 - * Returns true if the engine appears to be locked up, false if not. 1305 - */ 1306 - static bool sdma_v2_4_ring_is_lockup(struct amdgpu_ring *ring) 1307 - { 1308 - 1309 - if (sdma_v2_4_is_idle(ring->adev)) { 1310 - amdgpu_ring_lockup_update(ring); 1311 - return false; 1312 - } 1313 - return amdgpu_ring_test_lockup(ring); 1314 - } 1315 - 1316 1298 static const struct amdgpu_ring_funcs sdma_v2_4_ring_funcs = { 1317 1299 .get_rptr = sdma_v2_4_ring_get_rptr, 1318 1300 .get_wptr = sdma_v2_4_ring_get_wptr, ··· 1307 1325 .emit_hdp_flush = sdma_v2_4_ring_emit_hdp_flush, 1308 1326 .test_ring = sdma_v2_4_ring_test_ring, 1309 1327 .test_ib = sdma_v2_4_ring_test_ib, 1310 - .is_lockup = sdma_v2_4_ring_is_lockup, 1311 1328 .insert_nop = sdma_v2_4_ring_insert_nop, 1312 1329 }; 1313 1330
-19
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
··· 1428 1428 .set_powergating_state = sdma_v3_0_set_powergating_state, 1429 1429 }; 1430 1430 1431 - /** 1432 - * sdma_v3_0_ring_is_lockup - Check if the DMA engine is locked up 1433 - * 1434 - * @ring: amdgpu_ring structure holding ring information 1435 - * 1436 - * Check if the async DMA engine is locked up (VI). 1437 - * Returns true if the engine appears to be locked up, false if not. 1438 - */ 1439 - static bool sdma_v3_0_ring_is_lockup(struct amdgpu_ring *ring) 1440 - { 1441 - 1442 - if (sdma_v3_0_is_idle(ring->adev)) { 1443 - amdgpu_ring_lockup_update(ring); 1444 - return false; 1445 - } 1446 - return amdgpu_ring_test_lockup(ring); 1447 - } 1448 - 1449 1431 static const struct amdgpu_ring_funcs sdma_v3_0_ring_funcs = { 1450 1432 .get_rptr = sdma_v3_0_ring_get_rptr, 1451 1433 .get_wptr = sdma_v3_0_ring_get_wptr, ··· 1440 1458 .emit_hdp_flush = sdma_v3_0_ring_emit_hdp_flush, 1441 1459 .test_ring = sdma_v3_0_ring_test_ring, 1442 1460 .test_ib = sdma_v3_0_ring_test_ib, 1443 - .is_lockup = sdma_v3_0_ring_is_lockup, 1444 1461 .insert_nop = sdma_v3_0_ring_insert_nop, 1445 1462 }; 1446 1463
-1
drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
··· 885 885 .emit_semaphore = uvd_v4_2_ring_emit_semaphore, 886 886 .test_ring = uvd_v4_2_ring_test_ring, 887 887 .test_ib = uvd_v4_2_ring_test_ib, 888 - .is_lockup = amdgpu_ring_test_lockup, 889 888 .insert_nop = amdgpu_ring_insert_nop, 890 889 }; 891 890
-1
drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
··· 824 824 .emit_semaphore = uvd_v5_0_ring_emit_semaphore, 825 825 .test_ring = uvd_v5_0_ring_test_ring, 826 826 .test_ib = uvd_v5_0_ring_test_ib, 827 - .is_lockup = amdgpu_ring_test_lockup, 828 827 .insert_nop = amdgpu_ring_insert_nop, 829 828 }; 830 829
-1
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
··· 808 808 .emit_semaphore = uvd_v6_0_ring_emit_semaphore, 809 809 .test_ring = uvd_v6_0_ring_test_ring, 810 810 .test_ib = uvd_v6_0_ring_test_ib, 811 - .is_lockup = amdgpu_ring_test_lockup, 812 811 .insert_nop = amdgpu_ring_insert_nop, 813 812 }; 814 813
-1
drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
··· 642 642 .emit_semaphore = amdgpu_vce_ring_emit_semaphore, 643 643 .test_ring = amdgpu_vce_ring_test_ring, 644 644 .test_ib = amdgpu_vce_ring_test_ib, 645 - .is_lockup = amdgpu_ring_test_lockup, 646 645 .insert_nop = amdgpu_ring_insert_nop, 647 646 }; 648 647
-1
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
··· 643 643 .emit_semaphore = amdgpu_vce_ring_emit_semaphore, 644 644 .test_ring = amdgpu_vce_ring_test_ring, 645 645 .test_ib = amdgpu_vce_ring_test_ib, 646 - .is_lockup = amdgpu_ring_test_lockup, 647 646 .insert_nop = amdgpu_ring_insert_nop, 648 647 }; 649 648