Merge tag 'rtc-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux

+64

Documentation/devicetree/bindings/rtc/microcrystal,rv3032.yaml

··· 1 + # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/rtc/microcrystal,rv3032.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Microchip RV-3032 RTC Device Tree Bindings 8 + 9 + allOf: 10 + - $ref: "rtc.yaml#" 11 + 12 + maintainers: 13 + - Alexandre Belloni <alexandre.belloni@bootlin.com> 14 + 15 + properties: 16 + compatible: 17 + const: microcrystal,rv3032 18 + 19 + reg: 20 + maxItems: 1 21 + 22 + interrupts: 23 + maxItems: 1 24 + 25 + start-year: true 26 + 27 + trickle-resistor-ohms: 28 + enum: 29 + - 1000 30 + - 2000 31 + - 7000 32 + - 11000 33 + 34 + trickle-voltage-millivolt: 35 + enum: 36 + - 1750 37 + - 3000 38 + - 4400 39 + 40 + required: 41 + - compatible 42 + - reg 43 + 44 + additionalProperties: false 45 + 46 + examples: 47 + - | 48 + #include <dt-bindings/interrupt-controller/irq.h> 49 + i2c { 50 + #address-cells = <1>; 51 + #size-cells = <0>; 52 + 53 + rtc@51 { 54 + compatible = "microcrystal,rv3032"; 55 + reg = <0x51>; 56 + status = "okay"; 57 + pinctrl-0 = <&rtc_nint_pins>; 58 + interrupts-extended = <&gpio1 16 IRQ_TYPE_LEVEL_HIGH>; 59 + trickle-resistor-ohms = <7000>; 60 + trickle-voltage-millivolt = <1750>; 61 + }; 62 + }; 63 + 64 + ...

+8 -1

Documentation/devicetree/bindings/rtc/rtc-ds1307.txt

··· 31 31 Selected resistor for trickle charger 32 32 Possible values are 250, 2000, 4000 33 33 Should be given if trickle charger should be enabled 34 - - trickle-diode-disable : ds1339, ds1340 and ds 1388 only 34 + - aux-voltage-chargeable: ds1339, ds1340, ds1388 and rx8130 only 35 + Tells whether the battery/supercap of the RTC (if any) is 36 + chargeable or not. 37 + Possible values are 0 (not chargeable), 1 (chargeable) 38 + 39 + Deprecated properties: 40 + - trickle-diode-disable : ds1339, ds1340 and ds1388 only 35 41 Do not use internal trickle charger diode 36 42 Should be given if internal trickle charger diode should be disabled 43 + (superseded by aux-voltage-chargeable) 37 44 38 45 Example: 39 46 ds1339: rtc@68 {

+16

Documentation/devicetree/bindings/rtc/rtc.yaml

··· 17 17 $nodename: 18 18 pattern: "^rtc(@.*|-[0-9a-f])*$" 19 19 20 + aux-voltage-chargeable: 21 + $ref: /schemas/types.yaml#/definitions/uint32 22 + enum: [0, 1] 23 + description: | 24 + Tells whether the battery/supercap of the RTC (if any) is 25 + chargeable or not: 26 + 0: not chargeable 27 + 1: chargeable 28 + 20 29 quartz-load-femtofarads: 21 30 $ref: /schemas/types.yaml#/definitions/uint32 22 31 description: ··· 44 35 description: 45 36 Do not use internal trickle charger diode. Should be given if 46 37 internal trickle charger diode should be disabled. 38 + deprecated: true 47 39 48 40 trickle-resistor-ohms: 49 41 $ref: /schemas/types.yaml#/definitions/uint32 50 42 description: 51 43 Selected resistor for trickle charger. Should be given 52 44 if trickle charger should be enabled. 45 + 46 + trickle-voltage-millivolt: 47 + description: 48 + Selected voltage for trickle charger. Should be given 49 + if trickle charger should be enabled and the trickle voltage is different 50 + from the RTC main power supply. 53 51 54 52 wakeup-source: 55 53 $ref: /schemas/types.yaml#/definitions/flag

+10

drivers/rtc/Kconfig

··· 669 669 This driver can also be built as a module. If so, the module 670 670 will be called rtc-rv3028. 671 671 672 + config RTC_DRV_RV3032 673 + tristate "Micro Crystal RV3032" 674 + select REGMAP_I2C 675 + help 676 + If you say yes here you get support for the Micro Crystal 677 + RV3032. 678 + 679 + This driver can also be built as a module. If so, the module 680 + will be called rtc-rv3032. 681 + 672 682 config RTC_DRV_RV8803 673 683 tristate "Micro Crystal RV8803, Epson RX8900" 674 684 help

+1

drivers/rtc/Makefile

··· 141 141 obj-$(CONFIG_RTC_DRV_RTD119X) += rtc-rtd119x.o 142 142 obj-$(CONFIG_RTC_DRV_RV3028) += rtc-rv3028.o 143 143 obj-$(CONFIG_RTC_DRV_RV3029C2) += rtc-rv3029c2.o 144 + obj-$(CONFIG_RTC_DRV_RV3032) += rtc-rv3032.o 144 145 obj-$(CONFIG_RTC_DRV_RV8803) += rtc-rv8803.o 145 146 obj-$(CONFIG_RTC_DRV_RX4581) += rtc-rx4581.o 146 147 obj-$(CONFIG_RTC_DRV_RX6110) += rtc-rx6110.o

+2

drivers/rtc/rtc-cmos.c

··· 1006 1006 enable_irq_wake(cmos->irq); 1007 1007 } 1008 1008 1009 + memset(&cmos->saved_wkalrm, 0, sizeof(struct rtc_wkalrm)); 1009 1010 cmos_read_alarm(dev, &cmos->saved_wkalrm); 1010 1011 1011 1012 dev_dbg(dev, "suspend%s, ctrl %02x\n", ··· 1055 1054 return; 1056 1055 } 1057 1056 1057 + memset(&current_alarm, 0, sizeof(struct rtc_wkalrm)); 1058 1058 cmos_read_alarm(dev, &current_alarm); 1059 1059 t_current_expires = rtc_tm_to_time64(&current_alarm.time); 1060 1060 t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time);

+71 -5

drivers/rtc/rtc-ds1307.c

··· 122 122 #define RX8130_REG_FLAG_AF BIT(3) 123 123 #define RX8130_REG_CONTROL0 0x1e 124 124 #define RX8130_REG_CONTROL0_AIE BIT(3) 125 + #define RX8130_REG_CONTROL1 0x1f 126 + #define RX8130_REG_CONTROL1_INIEN BIT(4) 127 + #define RX8130_REG_CONTROL1_CHGEN BIT(5) 125 128 126 129 #define MCP794XX_REG_CONTROL 0x07 127 130 # define MCP794XX_BIT_ALM0_EN 0x10 ··· 156 153 #define DS1388_REG_CONTROL 0x0c 157 154 # define DS1388_BIT_RST BIT(0) 158 155 # define DS1388_BIT_WDE BIT(1) 156 + # define DS1388_BIT_nEOSC BIT(7) 159 157 160 158 /* negative offset step is -2.034ppm */ 161 159 #define M41TXX_NEG_OFFSET_STEP_PPB 2034 ··· 194 190 u16 trickle_charger_reg; 195 191 u8 (*do_trickle_setup)(struct ds1307 *, u32, 196 192 bool); 193 + /* Does the RTC require trickle-resistor-ohms to select the value of 194 + * the resistor between Vcc and Vbackup? 195 + */ 196 + bool requires_trickle_resistor; 197 + /* Some RTC's batteries and supercaps were charged by default, others 198 + * allow charging but were not configured previously to do so. 199 + * Remember this behavior to stay backwards compatible. 200 + */ 201 + bool charge_default; 197 202 }; 198 203 199 204 static const struct chip_desc chips[last_ds_type]; ··· 365 352 regmap_update_bits(ds1307->regmap, DS1340_REG_FLAG, 366 353 DS1340_BIT_OSF, 0); 367 354 break; 355 + case ds_1388: 356 + regmap_update_bits(ds1307->regmap, DS1388_REG_FLAG, 357 + DS1388_BIT_OSF, 0); 358 + break; 368 359 case mcp794xx: 369 360 /* 370 361 * these bits were cleared when preparing the date/time ··· 524 507 u8 setup = (diode) ? DS1307_TRICKLE_CHARGER_DIODE : 525 508 DS1307_TRICKLE_CHARGER_NO_DIODE; 526 509 510 + setup |= DS13XX_TRICKLE_CHARGER_MAGIC; 511 + 527 512 switch (ohms) { 528 513 case 250: 529 514 setup |= DS1307_TRICKLE_CHARGER_250_OHM; ··· 541 522 "Unsupported ohm value %u in dt\n", ohms); 542 523 return 0; 543 524 } 525 + return setup; 526 + } 527 + 528 + static u8 do_trickle_setup_rx8130(struct ds1307 *ds1307, u32 ohms, bool diode) 529 + { 530 + /* make sure that the backup battery is enabled */ 531 + u8 setup = RX8130_REG_CONTROL1_INIEN; 532 + if (diode) 533 + setup |= RX8130_REG_CONTROL1_CHGEN; 534 + 544 535 return setup; 545 536 } 546 537 ··· 1008 979 .bbsqi_bit = DS1339_BIT_BBSQI, 1009 980 .trickle_charger_reg = 0x10, 1010 981 .do_trickle_setup = &do_trickle_setup_ds1339, 982 + .requires_trickle_resistor = true, 983 + .charge_default = true, 1011 984 }, 1012 985 [ds_1340] = { 1013 986 .century_reg = DS1307_REG_HOUR, ··· 1017 986 .century_bit = DS1340_BIT_CENTURY, 1018 987 .do_trickle_setup = &do_trickle_setup_ds1339, 1019 988 .trickle_charger_reg = 0x08, 989 + .requires_trickle_resistor = true, 990 + .charge_default = true, 1020 991 }, 1021 992 [ds_1341] = { 1022 993 .century_reg = DS1307_REG_MONTH, ··· 1042 1009 .offset = 0x10, 1043 1010 .irq_handler = rx8130_irq, 1044 1011 .rtc_ops = &rx8130_rtc_ops, 1012 + .trickle_charger_reg = RX8130_REG_CONTROL1, 1013 + .do_trickle_setup = &do_trickle_setup_rx8130, 1045 1014 }, 1046 1015 [m41t0] = { 1047 1016 .rtc_ops = &m41txx_rtc_ops, ··· 1328 1293 static u8 ds1307_trickle_init(struct ds1307 *ds1307, 1329 1294 const struct chip_desc *chip) 1330 1295 { 1331 - u32 ohms; 1332 - bool diode = true; 1296 + u32 ohms, chargeable; 1297 + bool diode = chip->charge_default; 1333 1298 1334 1299 if (!chip->do_trickle_setup) 1335 1300 return 0; 1336 1301 1337 1302 if (device_property_read_u32(ds1307->dev, "trickle-resistor-ohms", 1338 - &ohms)) 1303 + &ohms) && chip->requires_trickle_resistor) 1339 1304 return 0; 1340 1305 1341 - if (device_property_read_bool(ds1307->dev, "trickle-diode-disable")) 1306 + /* aux-voltage-chargeable takes precedence over the deprecated 1307 + * trickle-diode-disable 1308 + */ 1309 + if (!device_property_read_u32(ds1307->dev, "aux-voltage-chargeable", 1310 + &chargeable)) { 1311 + switch (chargeable) { 1312 + case 0: 1313 + diode = false; 1314 + break; 1315 + case 1: 1316 + diode = true; 1317 + break; 1318 + default: 1319 + dev_warn(ds1307->dev, 1320 + "unsupported aux-voltage-chargeable value\n"); 1321 + break; 1322 + } 1323 + } else if (device_property_read_bool(ds1307->dev, 1324 + "trickle-diode-disable")) { 1342 1325 diode = false; 1326 + } 1343 1327 1344 1328 return chip->do_trickle_setup(ds1307, ohms, diode); 1345 1329 } ··· 1812 1758 trickle_charger_setup = pdata->trickle_charger_setup; 1813 1759 1814 1760 if (trickle_charger_setup && chip->trickle_charger_reg) { 1815 - trickle_charger_setup |= DS13XX_TRICKLE_CHARGER_MAGIC; 1816 1761 dev_dbg(ds1307->dev, 1817 1762 "writing trickle charger info 0x%x to 0x%x\n", 1818 1763 trickle_charger_setup, chip->trickle_charger_reg); ··· 1932 1879 1933 1880 regmap_write(ds1307->regmap, 1934 1881 DS1307_REG_HOUR << 4 | 0x08, hour); 1882 + } 1883 + break; 1884 + case ds_1388: 1885 + err = regmap_read(ds1307->regmap, DS1388_REG_CONTROL, &tmp); 1886 + if (err) { 1887 + dev_dbg(ds1307->dev, "read error %d\n", err); 1888 + goto exit; 1889 + } 1890 + 1891 + /* oscillator off? turn it on, so clock can tick. */ 1892 + if (tmp & DS1388_BIT_nEOSC) { 1893 + tmp &= ~DS1388_BIT_nEOSC; 1894 + regmap_write(ds1307->regmap, DS1388_REG_CONTROL, tmp); 1935 1895 } 1936 1896 break; 1937 1897 default:

+4 -4

drivers/rtc/rtc-ds1685.c

··· 193 193 rtc->write(rtc, RTC_CTRL_B, 194 194 (rtc->read(rtc, RTC_CTRL_B) | RTC_CTRL_B_SET)); 195 195 196 + /* Switch to Bank 1 */ 197 + ds1685_rtc_switch_to_bank1(rtc); 198 + 196 199 /* Read Ext Ctrl 4A and check the INCR bit to avoid a lockout. */ 197 200 while (rtc->read(rtc, RTC_EXT_CTRL_4A) & RTC_CTRL_4A_INCR) 198 201 cpu_relax(); 199 - 200 - /* Switch to Bank 1 */ 201 - ds1685_rtc_switch_to_bank1(rtc); 202 202 } 203 203 204 204 /** ··· 213 213 ds1685_rtc_end_data_access(struct ds1685_priv *rtc) 214 214 { 215 215 /* Switch back to Bank 0 */ 216 - ds1685_rtc_switch_to_bank1(rtc); 216 + ds1685_rtc_switch_to_bank0(rtc); 217 217 218 218 /* Clear the SET bit in Ctrl B */ 219 219 rtc->write(rtc, RTC_CTRL_B,

+2 -2

drivers/rtc/rtc-fsl-ftm-alarm.c

··· 3 3 * Freescale FlexTimer Module (FTM) alarm device driver. 4 4 * 5 5 * Copyright 2014 Freescale Semiconductor, Inc. 6 - * Copyright 2019 NXP 6 + * Copyright 2019-2020 NXP 7 7 * 8 8 */ 9 9 ··· 312 312 }; 313 313 314 314 static const struct acpi_device_id ftm_imx_acpi_ids[] = { 315 - {"NXP0011",}, 315 + {"NXP0014",}, 316 316 { } 317 317 }; 318 318 MODULE_DEVICE_TABLE(acpi, ftm_imx_acpi_ids);

+1 -6

drivers/rtc/rtc-meson-vrtc.c

··· 65 65 static int meson_vrtc_probe(struct platform_device *pdev) 66 66 { 67 67 struct meson_vrtc_data *vrtc; 68 - int ret; 69 68 70 69 vrtc = devm_kzalloc(&pdev->dev, sizeof(*vrtc), GFP_KERNEL); 71 70 if (!vrtc) ··· 83 84 return PTR_ERR(vrtc->rtc); 84 85 85 86 vrtc->rtc->ops = &meson_vrtc_ops; 86 - ret = rtc_register_device(vrtc->rtc); 87 - if (ret) 88 - return ret; 89 - 90 - return 0; 87 + return rtc_register_device(vrtc->rtc); 91 88 } 92 89 93 90 static int __maybe_unused meson_vrtc_suspend(struct device *dev)

+2 -1

drivers/rtc/rtc-mt6397.c

··· 31 31 MTK_RTC_POLL_DELAY_US, 32 32 MTK_RTC_POLL_TIMEOUT); 33 33 if (ret < 0) 34 - dev_err(rtc->dev, "failed to write WRTGE: %d\n", ret); 34 + dev_err(rtc->rtc_dev->dev.parent, 35 + "failed to write WRTGR: %d\n", ret); 35 36 36 37 return ret; 37 38 }

+2 -2

drivers/rtc/rtc-pcf2127.c

··· 559 559 pcf2127->rtc->set_start_time = true; /* Sets actual start to 1970 */ 560 560 pcf2127->rtc->uie_unsupported = 1; 561 561 562 - if (alarm_irq >= 0) { 562 + if (alarm_irq > 0) { 563 563 ret = devm_request_threaded_irq(dev, alarm_irq, NULL, 564 564 pcf2127_rtc_irq, 565 565 IRQF_TRIGGER_LOW | IRQF_ONESHOT, ··· 570 570 } 571 571 } 572 572 573 - if (alarm_irq >= 0 || device_property_read_bool(dev, "wakeup-source")) { 573 + if (alarm_irq > 0 || device_property_read_bool(dev, "wakeup-source")) { 574 574 device_init_wakeup(dev, true); 575 575 pcf2127->rtc->ops = &pcf2127_rtc_alrm_ops; 576 576 }

+6 -37

drivers/rtc/rtc-r9701.c

··· 75 75 if (ret) 76 76 return ret; 77 77 78 - memset(dt, 0, sizeof(*dt)); 79 - 80 78 dt->tm_sec = bcd2bin(buf[0]); /* RSECCNT */ 81 79 dt->tm_min = bcd2bin(buf[1]); /* RMINCNT */ 82 80 dt->tm_hour = bcd2bin(buf[2]); /* RHRCNT */ ··· 83 85 dt->tm_mon = bcd2bin(buf[4]) - 1; /* RMONCNT */ 84 86 dt->tm_year = bcd2bin(buf[5]) + 100; /* RYRCNT */ 85 87 86 - /* the rtc device may contain illegal values on power up 87 - * according to the data sheet. make sure they are valid. 88 - */ 89 - 90 88 return 0; 91 89 } 92 90 93 91 static int r9701_set_datetime(struct device *dev, struct rtc_time *dt) 94 92 { 95 - int ret, year; 96 - 97 - year = dt->tm_year + 1900; 98 - if (year >= 2100 || year < 2000) 99 - return -EINVAL; 93 + int ret; 100 94 101 95 ret = write_reg(dev, RHRCNT, bin2bcd(dt->tm_hour)); 102 96 ret = ret ? ret : write_reg(dev, RMINCNT, bin2bcd(dt->tm_min)); ··· 96 106 ret = ret ? ret : write_reg(dev, RDAYCNT, bin2bcd(dt->tm_mday)); 97 107 ret = ret ? ret : write_reg(dev, RMONCNT, bin2bcd(dt->tm_mon + 1)); 98 108 ret = ret ? ret : write_reg(dev, RYRCNT, bin2bcd(dt->tm_year - 100)); 99 - ret = ret ? ret : write_reg(dev, RWKCNT, 1 << dt->tm_wday); 100 109 101 110 return ret; 102 111 } ··· 108 119 static int r9701_probe(struct spi_device *spi) 109 120 { 110 121 struct rtc_device *rtc; 111 - struct rtc_time dt; 112 122 unsigned char tmp; 113 123 int res; 114 124 ··· 118 130 return -ENODEV; 119 131 } 120 132 121 - /* 122 - * The device seems to be present. Now check if the registers 123 - * contain invalid values. If so, try to write a default date: 124 - * 2000/1/1 00:00:00 125 - */ 126 - if (r9701_get_datetime(&spi->dev, &dt)) { 127 - dev_info(&spi->dev, "trying to repair invalid date/time\n"); 128 - dt.tm_sec = 0; 129 - dt.tm_min = 0; 130 - dt.tm_hour = 0; 131 - dt.tm_mday = 1; 132 - dt.tm_mon = 0; 133 - dt.tm_year = 100; 134 - 135 - if (r9701_set_datetime(&spi->dev, &dt) || 136 - r9701_get_datetime(&spi->dev, &dt)) { 137 - dev_err(&spi->dev, "cannot repair RTC register\n"); 138 - return -ENODEV; 139 - } 140 - } 141 - 142 - rtc = devm_rtc_device_register(&spi->dev, "r9701", 143 - &r9701_rtc_ops, THIS_MODULE); 133 + rtc = devm_rtc_allocate_device(&spi->dev); 144 134 if (IS_ERR(rtc)) 145 135 return PTR_ERR(rtc); 146 136 147 137 spi_set_drvdata(spi, rtc); 138 + rtc->ops = &r9701_rtc_ops; 139 + rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; 140 + rtc->range_max = RTC_TIMESTAMP_END_2099; 148 141 149 - return 0; 142 + return rtc_register_device(rtc); 150 143 } 151 144 152 145 static struct spi_driver r9701_driver = {

+7 -27

drivers/rtc/rtc-rs5c313.c

··· 366 366 367 367 static int rs5c313_rtc_probe(struct platform_device *pdev) 368 368 { 369 - struct rtc_device *rtc = devm_rtc_device_register(&pdev->dev, "rs5c313", 370 - &rs5c313_rtc_ops, THIS_MODULE); 369 + struct rtc_device *rtc; 371 370 372 - if (IS_ERR(rtc)) 373 - return PTR_ERR(rtc); 371 + rs5c313_init_port(); 372 + rs5c313_check_xstp_bit(); 374 373 375 - platform_set_drvdata(pdev, rtc); 374 + rtc = devm_rtc_device_register(&pdev->dev, "rs5c313", &rs5c313_rtc_ops, 375 + THIS_MODULE); 376 376 377 - return 0; 377 + return PTR_ERR_OR_ZERO(rtc); 378 378 } 379 379 380 380 static struct platform_driver rs5c313_rtc_platform_driver = { ··· 384 384 .probe = rs5c313_rtc_probe, 385 385 }; 386 386 387 - static int __init rs5c313_rtc_init(void) 388 - { 389 - int err; 390 - 391 - err = platform_driver_register(&rs5c313_rtc_platform_driver); 392 - if (err) 393 - return err; 394 - 395 - rs5c313_init_port(); 396 - rs5c313_check_xstp_bit(); 397 - 398 - return 0; 399 - } 400 - 401 - static void __exit rs5c313_rtc_exit(void) 402 - { 403 - platform_driver_unregister(&rs5c313_rtc_platform_driver); 404 - } 405 - 406 - module_init(rs5c313_rtc_init); 407 - module_exit(rs5c313_rtc_exit); 387 + module_platform_driver(rs5c313_rtc_platform_driver); 408 388 409 389 MODULE_AUTHOR("kogiidena , Nobuhiro Iwamatsu <iwamatsu@nigauri.org>"); 410 390 MODULE_DESCRIPTION("Ricoh RS5C313 RTC device driver");

+136 -79

drivers/rtc/rtc-rv3028.c

··· 71 71 72 72 #define RV3028_EVT_CTRL_TSR BIT(2) 73 73 74 + #define RV3028_EEPROM_CMD_UPDATE 0x11 74 75 #define RV3028_EEPROM_CMD_WRITE 0x21 75 76 #define RV3028_EEPROM_CMD_READ 0x22 76 77 ··· 96 95 #endif 97 96 }; 98 97 99 - static u16 rv3028_trickle_resistors[] = {1000, 3000, 6000, 11000}; 98 + static u16 rv3028_trickle_resistors[] = {3000, 5000, 9000, 15000}; 100 99 101 100 static ssize_t timestamp0_store(struct device *dev, 102 101 struct device_attribute *attr, ··· 171 170 static const struct attribute_group rv3028_attr_group = { 172 171 .attrs = rv3028_attrs, 173 172 }; 173 + 174 + static int rv3028_exit_eerd(struct rv3028_data *rv3028, u32 eerd) 175 + { 176 + if (eerd) 177 + return 0; 178 + 179 + return regmap_update_bits(rv3028->regmap, RV3028_CTRL1, RV3028_CTRL1_EERD, 0); 180 + } 181 + 182 + static int rv3028_enter_eerd(struct rv3028_data *rv3028, u32 *eerd) 183 + { 184 + u32 ctrl1, status; 185 + int ret; 186 + 187 + ret = regmap_read(rv3028->regmap, RV3028_CTRL1, &ctrl1); 188 + if (ret) 189 + return ret; 190 + 191 + *eerd = ctrl1 & RV3028_CTRL1_EERD; 192 + if (*eerd) 193 + return 0; 194 + 195 + ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL1, 196 + RV3028_CTRL1_EERD, RV3028_CTRL1_EERD); 197 + if (ret) 198 + return ret; 199 + 200 + ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status, 201 + !(status & RV3028_STATUS_EEBUSY), 202 + RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT); 203 + if (ret) { 204 + rv3028_exit_eerd(rv3028, *eerd); 205 + 206 + return ret; 207 + } 208 + 209 + return 0; 210 + } 211 + 212 + static int rv3028_update_eeprom(struct rv3028_data *rv3028, u32 eerd) 213 + { 214 + u32 status; 215 + int ret; 216 + 217 + ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 0x0); 218 + if (ret) 219 + goto exit_eerd; 220 + 221 + ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, RV3028_EEPROM_CMD_UPDATE); 222 + if (ret) 223 + goto exit_eerd; 224 + 225 + usleep_range(63000, RV3028_EEBUSY_TIMEOUT); 226 + 227 + ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status, 228 + !(status & RV3028_STATUS_EEBUSY), 229 + RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT); 230 + 231 + exit_eerd: 232 + rv3028_exit_eerd(rv3028, eerd); 233 + 234 + return ret; 235 + } 236 + 237 + static int rv3028_update_cfg(struct rv3028_data *rv3028, unsigned int reg, 238 + unsigned int mask, unsigned int val) 239 + { 240 + u32 eerd; 241 + int ret; 242 + 243 + ret = rv3028_enter_eerd(rv3028, &eerd); 244 + if (ret) 245 + return ret; 246 + 247 + ret = regmap_update_bits(rv3028->regmap, reg, mask, val); 248 + if (ret) { 249 + rv3028_exit_eerd(rv3028, eerd); 250 + return ret; 251 + } 252 + 253 + return rv3028_update_eeprom(rv3028, eerd); 254 + } 174 255 175 256 static irqreturn_t rv3028_handle_irq(int irq, void *dev_id) 176 257 { ··· 487 404 static int rv3028_set_offset(struct device *dev, long offset) 488 405 { 489 406 struct rv3028_data *rv3028 = dev_get_drvdata(dev); 407 + u32 eerd; 490 408 int ret; 491 409 492 410 offset = clamp(offset, -244141L, 243187L) * 1000; 493 411 offset = DIV_ROUND_CLOSEST(offset, OFFSET_STEP_PPT); 494 412 495 - ret = regmap_write(rv3028->regmap, RV3028_OFFSET, offset >> 1); 496 - if (ret < 0) 413 + ret = rv3028_enter_eerd(rv3028, &eerd); 414 + if (ret) 497 415 return ret; 498 416 499 - return regmap_update_bits(rv3028->regmap, RV3028_BACKUP, BIT(7), 500 - offset << 7); 417 + ret = regmap_write(rv3028->regmap, RV3028_OFFSET, offset >> 1); 418 + if (ret < 0) 419 + goto exit_eerd; 420 + 421 + ret = regmap_update_bits(rv3028->regmap, RV3028_BACKUP, BIT(7), 422 + offset << 7); 423 + if (ret < 0) 424 + goto exit_eerd; 425 + 426 + return rv3028_update_eeprom(rv3028, eerd); 427 + 428 + exit_eerd: 429 + rv3028_exit_eerd(rv3028, eerd); 430 + 431 + return ret; 432 + 501 433 } 502 434 503 435 static int rv3028_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) ··· 549 451 static int rv3028_eeprom_write(void *priv, unsigned int offset, void *val, 550 452 size_t bytes) 551 453 { 552 - u32 status, ctrl1; 553 - int i, ret, err; 454 + struct rv3028_data *rv3028 = priv; 455 + u32 status, eerd; 456 + int i, ret; 554 457 u8 *buf = val; 555 458 556 - ret = regmap_read(priv, RV3028_CTRL1, &ctrl1); 459 + ret = rv3028_enter_eerd(rv3028, &eerd); 557 460 if (ret) 558 461 return ret; 559 462 560 - if (!(ctrl1 & RV3028_CTRL1_EERD)) { 561 - ret = regmap_update_bits(priv, RV3028_CTRL1, 562 - RV3028_CTRL1_EERD, RV3028_CTRL1_EERD); 563 - if (ret) 564 - return ret; 565 - 566 - ret = regmap_read_poll_timeout(priv, RV3028_STATUS, status, 567 - !(status & RV3028_STATUS_EEBUSY), 568 - RV3028_EEBUSY_POLL, 569 - RV3028_EEBUSY_TIMEOUT); 570 - if (ret) 571 - goto restore_eerd; 572 - } 573 - 574 463 for (i = 0; i < bytes; i++) { 575 - ret = regmap_write(priv, RV3028_EEPROM_ADDR, offset + i); 464 + ret = regmap_write(rv3028->regmap, RV3028_EEPROM_ADDR, offset + i); 576 465 if (ret) 577 466 goto restore_eerd; 578 467 579 - ret = regmap_write(priv, RV3028_EEPROM_DATA, buf[i]); 468 + ret = regmap_write(rv3028->regmap, RV3028_EEPROM_DATA, buf[i]); 580 469 if (ret) 581 470 goto restore_eerd; 582 471 583 - ret = regmap_write(priv, RV3028_EEPROM_CMD, 0x0); 472 + ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 0x0); 584 473 if (ret) 585 474 goto restore_eerd; 586 475 587 - ret = regmap_write(priv, RV3028_EEPROM_CMD, 476 + ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 588 477 RV3028_EEPROM_CMD_WRITE); 589 478 if (ret) 590 479 goto restore_eerd; 591 480 592 481 usleep_range(RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT); 593 482 594 - ret = regmap_read_poll_timeout(priv, RV3028_STATUS, status, 483 + ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status, 595 484 !(status & RV3028_STATUS_EEBUSY), 596 485 RV3028_EEBUSY_POLL, 597 486 RV3028_EEBUSY_TIMEOUT); ··· 587 502 } 588 503 589 504 restore_eerd: 590 - if (!(ctrl1 & RV3028_CTRL1_EERD)) 591 - { 592 - err = regmap_update_bits(priv, RV3028_CTRL1, RV3028_CTRL1_EERD, 593 - 0); 594 - if (err && !ret) 595 - ret = err; 596 - } 505 + rv3028_exit_eerd(rv3028, eerd); 597 506 598 507 return ret; 599 508 } ··· 595 516 static int rv3028_eeprom_read(void *priv, unsigned int offset, void *val, 596 517 size_t bytes) 597 518 { 598 - u32 status, ctrl1, data; 599 - int i, ret, err; 519 + struct rv3028_data *rv3028 = priv; 520 + u32 status, eerd, data; 521 + int i, ret; 600 522 u8 *buf = val; 601 523 602 - ret = regmap_read(priv, RV3028_CTRL1, &ctrl1); 524 + ret = rv3028_enter_eerd(rv3028, &eerd); 603 525 if (ret) 604 526 return ret; 605 527 606 - if (!(ctrl1 & RV3028_CTRL1_EERD)) { 607 - ret = regmap_update_bits(priv, RV3028_CTRL1, 608 - RV3028_CTRL1_EERD, RV3028_CTRL1_EERD); 609 - if (ret) 610 - return ret; 611 - 612 - ret = regmap_read_poll_timeout(priv, RV3028_STATUS, status, 613 - !(status & RV3028_STATUS_EEBUSY), 614 - RV3028_EEBUSY_POLL, 615 - RV3028_EEBUSY_TIMEOUT); 616 - if (ret) 617 - goto restore_eerd; 618 - } 619 - 620 528 for (i = 0; i < bytes; i++) { 621 - ret = regmap_write(priv, RV3028_EEPROM_ADDR, offset + i); 529 + ret = regmap_write(rv3028->regmap, RV3028_EEPROM_ADDR, offset + i); 622 530 if (ret) 623 531 goto restore_eerd; 624 532 625 - ret = regmap_write(priv, RV3028_EEPROM_CMD, 0x0); 533 + ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 0x0); 626 534 if (ret) 627 535 goto restore_eerd; 628 536 629 - ret = regmap_write(priv, RV3028_EEPROM_CMD, 537 + ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 630 538 RV3028_EEPROM_CMD_READ); 631 539 if (ret) 632 540 goto restore_eerd; 633 541 634 - ret = regmap_read_poll_timeout(priv, RV3028_STATUS, status, 542 + ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status, 635 543 !(status & RV3028_STATUS_EEBUSY), 636 544 RV3028_EEBUSY_POLL, 637 545 RV3028_EEBUSY_TIMEOUT); 638 546 if (ret) 639 547 goto restore_eerd; 640 548 641 - ret = regmap_read(priv, RV3028_EEPROM_DATA, &data); 549 + ret = regmap_read(rv3028->regmap, RV3028_EEPROM_DATA, &data); 642 550 if (ret) 643 551 goto restore_eerd; 644 552 buf[i] = data; 645 553 } 646 554 647 555 restore_eerd: 648 - if (!(ctrl1 & RV3028_CTRL1_EERD)) 649 - { 650 - err = regmap_update_bits(priv, RV3028_CTRL1, RV3028_CTRL1_EERD, 651 - 0); 652 - if (err && !ret) 653 - ret = err; 654 - } 556 + rv3028_exit_eerd(rv3028, eerd); 655 557 656 558 return ret; 657 559 } ··· 679 619 unsigned long parent_rate) 680 620 { 681 621 int i, ret; 622 + u32 enabled; 682 623 struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw); 624 + 625 + ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &enabled); 626 + if (ret < 0) 627 + return ret; 683 628 684 629 ret = regmap_write(rv3028->regmap, RV3028_CLKOUT, 0x0); 685 630 if (ret < 0) 686 631 return ret; 687 632 688 - for (i = 0; i < ARRAY_SIZE(clkout_rates); i++) { 689 - if (clkout_rates[i] == rate) { 690 - ret = regmap_update_bits(rv3028->regmap, 691 - RV3028_CLKOUT, 692 - RV3028_CLKOUT_FD_MASK, i); 693 - if (ret < 0) 694 - return ret; 633 + enabled &= RV3028_CLKOUT_CLKOE; 695 634 696 - return regmap_write(rv3028->regmap, RV3028_CLKOUT, 697 - RV3028_CLKOUT_CLKSY | RV3028_CLKOUT_CLKOE); 698 - } 699 - } 635 + for (i = 0; i < ARRAY_SIZE(clkout_rates); i++) 636 + if (clkout_rates[i] == rate) 637 + return rv3028_update_cfg(rv3028, RV3028_CLKOUT, 0xff, 638 + RV3028_CLKOUT_CLKSY | enabled | i); 700 639 701 640 return -EINVAL; 702 641 } ··· 870 811 break; 871 812 872 813 if (i < ARRAY_SIZE(rv3028_trickle_resistors)) { 873 - ret = regmap_update_bits(rv3028->regmap, RV3028_BACKUP, 874 - RV3028_BACKUP_TCE | 875 - RV3028_BACKUP_TCR_MASK, 876 - RV3028_BACKUP_TCE | i); 814 + ret = rv3028_update_cfg(rv3028, RV3028_BACKUP, RV3028_BACKUP_TCE | 815 + RV3028_BACKUP_TCR_MASK, RV3028_BACKUP_TCE | i); 877 816 if (ret) 878 817 return ret; 879 818 } else { ··· 892 835 893 836 nvmem_cfg.priv = rv3028->regmap; 894 837 rtc_nvmem_register(rv3028->rtc, &nvmem_cfg); 895 - eeprom_cfg.priv = rv3028->regmap; 838 + eeprom_cfg.priv = rv3028; 896 839 rtc_nvmem_register(rv3028->rtc, &eeprom_cfg); 897 840 898 841 rv3028->rtc->max_user_freq = 1;

+925

drivers/rtc/rtc-rv3032.c

··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + /* 3 + * RTC driver for the Micro Crystal RV3032 4 + * 5 + * Copyright (C) 2020 Micro Crystal SA 6 + * 7 + * Alexandre Belloni <alexandre.belloni@bootlin.com> 8 + * 9 + */ 10 + 11 + #include <linux/clk.h> 12 + #include <linux/clk-provider.h> 13 + #include <linux/bcd.h> 14 + #include <linux/bitfield.h> 15 + #include <linux/bitops.h> 16 + #include <linux/hwmon.h> 17 + #include <linux/i2c.h> 18 + #include <linux/interrupt.h> 19 + #include <linux/kernel.h> 20 + #include <linux/log2.h> 21 + #include <linux/module.h> 22 + #include <linux/of_device.h> 23 + #include <linux/regmap.h> 24 + #include <linux/rtc.h> 25 + 26 + #define RV3032_SEC 0x01 27 + #define RV3032_MIN 0x02 28 + #define RV3032_HOUR 0x03 29 + #define RV3032_WDAY 0x04 30 + #define RV3032_DAY 0x05 31 + #define RV3032_MONTH 0x06 32 + #define RV3032_YEAR 0x07 33 + #define RV3032_ALARM_MIN 0x08 34 + #define RV3032_ALARM_HOUR 0x09 35 + #define RV3032_ALARM_DAY 0x0A 36 + #define RV3032_STATUS 0x0D 37 + #define RV3032_TLSB 0x0E 38 + #define RV3032_TMSB 0x0F 39 + #define RV3032_CTRL1 0x10 40 + #define RV3032_CTRL2 0x11 41 + #define RV3032_CTRL3 0x12 42 + #define RV3032_TS_CTRL 0x13 43 + #define RV3032_CLK_IRQ 0x14 44 + #define RV3032_EEPROM_ADDR 0x3D 45 + #define RV3032_EEPROM_DATA 0x3E 46 + #define RV3032_EEPROM_CMD 0x3F 47 + #define RV3032_RAM1 0x40 48 + #define RV3032_PMU 0xC0 49 + #define RV3032_OFFSET 0xC1 50 + #define RV3032_CLKOUT1 0xC2 51 + #define RV3032_CLKOUT2 0xC3 52 + #define RV3032_TREF0 0xC4 53 + #define RV3032_TREF1 0xC5 54 + 55 + #define RV3032_STATUS_VLF BIT(0) 56 + #define RV3032_STATUS_PORF BIT(1) 57 + #define RV3032_STATUS_EVF BIT(2) 58 + #define RV3032_STATUS_AF BIT(3) 59 + #define RV3032_STATUS_TF BIT(4) 60 + #define RV3032_STATUS_UF BIT(5) 61 + #define RV3032_STATUS_TLF BIT(6) 62 + #define RV3032_STATUS_THF BIT(7) 63 + 64 + #define RV3032_TLSB_CLKF BIT(1) 65 + #define RV3032_TLSB_EEBUSY BIT(2) 66 + #define RV3032_TLSB_TEMP GENMASK(7, 4) 67 + 68 + #define RV3032_CLKOUT2_HFD_MSK GENMASK(4, 0) 69 + #define RV3032_CLKOUT2_FD_MSK GENMASK(6, 5) 70 + #define RV3032_CLKOUT2_OS BIT(7) 71 + 72 + #define RV3032_CTRL1_EERD BIT(3) 73 + #define RV3032_CTRL1_WADA BIT(5) 74 + 75 + #define RV3032_CTRL2_STOP BIT(0) 76 + #define RV3032_CTRL2_EIE BIT(2) 77 + #define RV3032_CTRL2_AIE BIT(3) 78 + #define RV3032_CTRL2_TIE BIT(4) 79 + #define RV3032_CTRL2_UIE BIT(5) 80 + #define RV3032_CTRL2_CLKIE BIT(6) 81 + #define RV3032_CTRL2_TSE BIT(7) 82 + 83 + #define RV3032_PMU_TCM GENMASK(1, 0) 84 + #define RV3032_PMU_TCR GENMASK(3, 2) 85 + #define RV3032_PMU_BSM GENMASK(5, 4) 86 + #define RV3032_PMU_NCLKE BIT(6) 87 + 88 + #define RV3032_PMU_BSM_DSM 1 89 + #define RV3032_PMU_BSM_LSM 2 90 + 91 + #define RV3032_OFFSET_MSK GENMASK(5, 0) 92 + 93 + #define RV3032_EVT_CTRL_TSR BIT(2) 94 + 95 + #define RV3032_EEPROM_CMD_UPDATE 0x11 96 + #define RV3032_EEPROM_CMD_WRITE 0x21 97 + #define RV3032_EEPROM_CMD_READ 0x22 98 + 99 + #define RV3032_EEPROM_USER 0xCB 100 + 101 + #define RV3032_EEBUSY_POLL 10000 102 + #define RV3032_EEBUSY_TIMEOUT 100000 103 + 104 + #define OFFSET_STEP_PPT 238419 105 + 106 + struct rv3032_data { 107 + struct regmap *regmap; 108 + struct rtc_device *rtc; 109 + #ifdef CONFIG_COMMON_CLK 110 + struct clk_hw clkout_hw; 111 + #endif 112 + }; 113 + 114 + static u16 rv3032_trickle_resistors[] = {1000, 2000, 7000, 11000}; 115 + static u16 rv3032_trickle_voltages[] = {0, 1750, 3000, 4400}; 116 + 117 + static int rv3032_exit_eerd(struct rv3032_data *rv3032, u32 eerd) 118 + { 119 + if (eerd) 120 + return 0; 121 + 122 + return regmap_update_bits(rv3032->regmap, RV3032_CTRL1, RV3032_CTRL1_EERD, 0); 123 + } 124 + 125 + static int rv3032_enter_eerd(struct rv3032_data *rv3032, u32 *eerd) 126 + { 127 + u32 ctrl1, status; 128 + int ret; 129 + 130 + ret = regmap_read(rv3032->regmap, RV3032_CTRL1, &ctrl1); 131 + if (ret) 132 + return ret; 133 + 134 + *eerd = ctrl1 & RV3032_CTRL1_EERD; 135 + if (*eerd) 136 + return 0; 137 + 138 + ret = regmap_update_bits(rv3032->regmap, RV3032_CTRL1, 139 + RV3032_CTRL1_EERD, RV3032_CTRL1_EERD); 140 + if (ret) 141 + return ret; 142 + 143 + ret = regmap_read_poll_timeout(rv3032->regmap, RV3032_TLSB, status, 144 + !(status & RV3032_TLSB_EEBUSY), 145 + RV3032_EEBUSY_POLL, RV3032_EEBUSY_TIMEOUT); 146 + if (ret) { 147 + rv3032_exit_eerd(rv3032, *eerd); 148 + 149 + return ret; 150 + } 151 + 152 + return 0; 153 + } 154 + 155 + static int rv3032_update_cfg(struct rv3032_data *rv3032, unsigned int reg, 156 + unsigned int mask, unsigned int val) 157 + { 158 + u32 status, eerd; 159 + int ret; 160 + 161 + ret = rv3032_enter_eerd(rv3032, &eerd); 162 + if (ret) 163 + return ret; 164 + 165 + ret = regmap_update_bits(rv3032->regmap, reg, mask, val); 166 + if (ret) 167 + goto exit_eerd; 168 + 169 + ret = regmap_write(rv3032->regmap, RV3032_EEPROM_CMD, RV3032_EEPROM_CMD_UPDATE); 170 + if (ret) 171 + goto exit_eerd; 172 + 173 + usleep_range(46000, RV3032_EEBUSY_TIMEOUT); 174 + 175 + ret = regmap_read_poll_timeout(rv3032->regmap, RV3032_TLSB, status, 176 + !(status & RV3032_TLSB_EEBUSY), 177 + RV3032_EEBUSY_POLL, RV3032_EEBUSY_TIMEOUT); 178 + 179 + exit_eerd: 180 + rv3032_exit_eerd(rv3032, eerd); 181 + 182 + return ret; 183 + } 184 + 185 + static irqreturn_t rv3032_handle_irq(int irq, void *dev_id) 186 + { 187 + struct rv3032_data *rv3032 = dev_id; 188 + unsigned long events = 0; 189 + u32 status = 0, ctrl = 0; 190 + 191 + if (regmap_read(rv3032->regmap, RV3032_STATUS, &status) < 0 || 192 + status == 0) { 193 + return IRQ_NONE; 194 + } 195 + 196 + if (status & RV3032_STATUS_TF) { 197 + status |= RV3032_STATUS_TF; 198 + ctrl |= RV3032_CTRL2_TIE; 199 + events |= RTC_PF; 200 + } 201 + 202 + if (status & RV3032_STATUS_AF) { 203 + status |= RV3032_STATUS_AF; 204 + ctrl |= RV3032_CTRL2_AIE; 205 + events |= RTC_AF; 206 + } 207 + 208 + if (status & RV3032_STATUS_UF) { 209 + status |= RV3032_STATUS_UF; 210 + ctrl |= RV3032_CTRL2_UIE; 211 + events |= RTC_UF; 212 + } 213 + 214 + if (events) { 215 + rtc_update_irq(rv3032->rtc, 1, events); 216 + regmap_update_bits(rv3032->regmap, RV3032_STATUS, status, 0); 217 + regmap_update_bits(rv3032->regmap, RV3032_CTRL2, ctrl, 0); 218 + } 219 + 220 + return IRQ_HANDLED; 221 + } 222 + 223 + static int rv3032_get_time(struct device *dev, struct rtc_time *tm) 224 + { 225 + struct rv3032_data *rv3032 = dev_get_drvdata(dev); 226 + u8 date[7]; 227 + int ret, status; 228 + 229 + ret = regmap_read(rv3032->regmap, RV3032_STATUS, &status); 230 + if (ret < 0) 231 + return ret; 232 + 233 + if (status & (RV3032_STATUS_PORF | RV3032_STATUS_VLF)) 234 + return -EINVAL; 235 + 236 + ret = regmap_bulk_read(rv3032->regmap, RV3032_SEC, date, sizeof(date)); 237 + if (ret) 238 + return ret; 239 + 240 + tm->tm_sec = bcd2bin(date[0] & 0x7f); 241 + tm->tm_min = bcd2bin(date[1] & 0x7f); 242 + tm->tm_hour = bcd2bin(date[2] & 0x3f); 243 + tm->tm_wday = date[3] & 0x7; 244 + tm->tm_mday = bcd2bin(date[4] & 0x3f); 245 + tm->tm_mon = bcd2bin(date[5] & 0x1f) - 1; 246 + tm->tm_year = bcd2bin(date[6]) + 100; 247 + 248 + return 0; 249 + } 250 + 251 + static int rv3032_set_time(struct device *dev, struct rtc_time *tm) 252 + { 253 + struct rv3032_data *rv3032 = dev_get_drvdata(dev); 254 + u8 date[7]; 255 + int ret; 256 + 257 + date[0] = bin2bcd(tm->tm_sec); 258 + date[1] = bin2bcd(tm->tm_min); 259 + date[2] = bin2bcd(tm->tm_hour); 260 + date[3] = tm->tm_wday; 261 + date[4] = bin2bcd(tm->tm_mday); 262 + date[5] = bin2bcd(tm->tm_mon + 1); 263 + date[6] = bin2bcd(tm->tm_year - 100); 264 + 265 + ret = regmap_bulk_write(rv3032->regmap, RV3032_SEC, date, 266 + sizeof(date)); 267 + if (ret) 268 + return ret; 269 + 270 + ret = regmap_update_bits(rv3032->regmap, RV3032_STATUS, 271 + RV3032_STATUS_PORF | RV3032_STATUS_VLF, 0); 272 + 273 + return ret; 274 + } 275 + 276 + static int rv3032_get_alarm(struct device *dev, struct rtc_wkalrm *alrm) 277 + { 278 + struct rv3032_data *rv3032 = dev_get_drvdata(dev); 279 + u8 alarmvals[3]; 280 + int status, ctrl, ret; 281 + 282 + ret = regmap_bulk_read(rv3032->regmap, RV3032_ALARM_MIN, alarmvals, 283 + sizeof(alarmvals)); 284 + if (ret) 285 + return ret; 286 + 287 + ret = regmap_read(rv3032->regmap, RV3032_STATUS, &status); 288 + if (ret < 0) 289 + return ret; 290 + 291 + ret = regmap_read(rv3032->regmap, RV3032_CTRL2, &ctrl); 292 + if (ret < 0) 293 + return ret; 294 + 295 + alrm->time.tm_sec = 0; 296 + alrm->time.tm_min = bcd2bin(alarmvals[0] & 0x7f); 297 + alrm->time.tm_hour = bcd2bin(alarmvals[1] & 0x3f); 298 + alrm->time.tm_mday = bcd2bin(alarmvals[2] & 0x3f); 299 + 300 + alrm->enabled = !!(ctrl & RV3032_CTRL2_AIE); 301 + alrm->pending = (status & RV3032_STATUS_AF) && alrm->enabled; 302 + 303 + return 0; 304 + } 305 + 306 + static int rv3032_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) 307 + { 308 + struct rv3032_data *rv3032 = dev_get_drvdata(dev); 309 + u8 alarmvals[3]; 310 + u8 ctrl = 0; 311 + int ret; 312 + 313 + /* The alarm has no seconds, round up to nearest minute */ 314 + if (alrm->time.tm_sec) { 315 + time64_t alarm_time = rtc_tm_to_time64(&alrm->time); 316 + 317 + alarm_time += 60 - alrm->time.tm_sec; 318 + rtc_time64_to_tm(alarm_time, &alrm->time); 319 + } 320 + 321 + ret = regmap_update_bits(rv3032->regmap, RV3032_CTRL2, 322 + RV3032_CTRL2_AIE | RV3032_CTRL2_UIE, 0); 323 + if (ret) 324 + return ret; 325 + 326 + alarmvals[0] = bin2bcd(alrm->time.tm_min); 327 + alarmvals[1] = bin2bcd(alrm->time.tm_hour); 328 + alarmvals[2] = bin2bcd(alrm->time.tm_mday); 329 + 330 + ret = regmap_update_bits(rv3032->regmap, RV3032_STATUS, 331 + RV3032_STATUS_AF, 0); 332 + if (ret) 333 + return ret; 334 + 335 + ret = regmap_bulk_write(rv3032->regmap, RV3032_ALARM_MIN, alarmvals, 336 + sizeof(alarmvals)); 337 + if (ret) 338 + return ret; 339 + 340 + if (alrm->enabled) { 341 + if (rv3032->rtc->uie_rtctimer.enabled) 342 + ctrl |= RV3032_CTRL2_UIE; 343 + if (rv3032->rtc->aie_timer.enabled) 344 + ctrl |= RV3032_CTRL2_AIE; 345 + } 346 + 347 + ret = regmap_update_bits(rv3032->regmap, RV3032_CTRL2, 348 + RV3032_CTRL2_UIE | RV3032_CTRL2_AIE, ctrl); 349 + 350 + return ret; 351 + } 352 + 353 + static int rv3032_alarm_irq_enable(struct device *dev, unsigned int enabled) 354 + { 355 + struct rv3032_data *rv3032 = dev_get_drvdata(dev); 356 + int ctrl = 0, ret; 357 + 358 + if (enabled) { 359 + if (rv3032->rtc->uie_rtctimer.enabled) 360 + ctrl |= RV3032_CTRL2_UIE; 361 + if (rv3032->rtc->aie_timer.enabled) 362 + ctrl |= RV3032_CTRL2_AIE; 363 + } 364 + 365 + ret = regmap_update_bits(rv3032->regmap, RV3032_STATUS, 366 + RV3032_STATUS_AF | RV3032_STATUS_UF, 0); 367 + if (ret) 368 + return ret; 369 + 370 + ret = regmap_update_bits(rv3032->regmap, RV3032_CTRL2, 371 + RV3032_CTRL2_UIE | RV3032_CTRL2_AIE, ctrl); 372 + if (ret) 373 + return ret; 374 + 375 + return 0; 376 + } 377 + 378 + static int rv3032_read_offset(struct device *dev, long *offset) 379 + { 380 + struct rv3032_data *rv3032 = dev_get_drvdata(dev); 381 + int ret, value, steps; 382 + 383 + ret = regmap_read(rv3032->regmap, RV3032_OFFSET, &value); 384 + if (ret < 0) 385 + return ret; 386 + 387 + steps = sign_extend32(FIELD_GET(RV3032_OFFSET_MSK, value), 5); 388 + 389 + *offset = DIV_ROUND_CLOSEST(steps * OFFSET_STEP_PPT, 1000); 390 + 391 + return 0; 392 + } 393 + 394 + static int rv3032_set_offset(struct device *dev, long offset) 395 + { 396 + struct rv3032_data *rv3032 = dev_get_drvdata(dev); 397 + 398 + offset = clamp(offset, -7629L, 7391L) * 1000; 399 + offset = DIV_ROUND_CLOSEST(offset, OFFSET_STEP_PPT); 400 + 401 + return rv3032_update_cfg(rv3032, RV3032_OFFSET, RV3032_OFFSET_MSK, 402 + FIELD_PREP(RV3032_OFFSET_MSK, offset)); 403 + } 404 + 405 + static int rv3032_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) 406 + { 407 + struct rv3032_data *rv3032 = dev_get_drvdata(dev); 408 + int status, val = 0, ret = 0; 409 + 410 + switch (cmd) { 411 + case RTC_VL_READ: 412 + ret = regmap_read(rv3032->regmap, RV3032_STATUS, &status); 413 + if (ret < 0) 414 + return ret; 415 + 416 + if (status & (RV3032_STATUS_PORF | RV3032_STATUS_VLF)) 417 + val = RTC_VL_DATA_INVALID; 418 + return put_user(val, (unsigned int __user *)arg); 419 + 420 + default: 421 + return -ENOIOCTLCMD; 422 + } 423 + } 424 + 425 + static int rv3032_nvram_write(void *priv, unsigned int offset, void *val, size_t bytes) 426 + { 427 + return regmap_bulk_write(priv, RV3032_RAM1 + offset, val, bytes); 428 + } 429 + 430 + static int rv3032_nvram_read(void *priv, unsigned int offset, void *val, size_t bytes) 431 + { 432 + return regmap_bulk_read(priv, RV3032_RAM1 + offset, val, bytes); 433 + } 434 + 435 + static int rv3032_eeprom_write(void *priv, unsigned int offset, void *val, size_t bytes) 436 + { 437 + struct rv3032_data *rv3032 = priv; 438 + u32 status, eerd; 439 + int i, ret; 440 + u8 *buf = val; 441 + 442 + ret = rv3032_enter_eerd(rv3032, &eerd); 443 + if (ret) 444 + return ret; 445 + 446 + for (i = 0; i < bytes; i++) { 447 + ret = regmap_write(rv3032->regmap, RV3032_EEPROM_ADDR, 448 + RV3032_EEPROM_USER + offset + i); 449 + if (ret) 450 + goto exit_eerd; 451 + 452 + ret = regmap_write(rv3032->regmap, RV3032_EEPROM_DATA, buf[i]); 453 + if (ret) 454 + goto exit_eerd; 455 + 456 + ret = regmap_write(rv3032->regmap, RV3032_EEPROM_CMD, 457 + RV3032_EEPROM_CMD_WRITE); 458 + if (ret) 459 + goto exit_eerd; 460 + 461 + usleep_range(RV3032_EEBUSY_POLL, RV3032_EEBUSY_TIMEOUT); 462 + 463 + ret = regmap_read_poll_timeout(rv3032->regmap, RV3032_TLSB, status, 464 + !(status & RV3032_TLSB_EEBUSY), 465 + RV3032_EEBUSY_POLL, RV3032_EEBUSY_TIMEOUT); 466 + if (ret) 467 + goto exit_eerd; 468 + } 469 + 470 + exit_eerd: 471 + rv3032_exit_eerd(rv3032, eerd); 472 + 473 + return ret; 474 + } 475 + 476 + static int rv3032_eeprom_read(void *priv, unsigned int offset, void *val, size_t bytes) 477 + { 478 + struct rv3032_data *rv3032 = priv; 479 + u32 status, eerd, data; 480 + int i, ret; 481 + u8 *buf = val; 482 + 483 + ret = rv3032_enter_eerd(rv3032, &eerd); 484 + if (ret) 485 + return ret; 486 + 487 + for (i = 0; i < bytes; i++) { 488 + ret = regmap_write(rv3032->regmap, RV3032_EEPROM_ADDR, 489 + RV3032_EEPROM_USER + offset + i); 490 + if (ret) 491 + goto exit_eerd; 492 + 493 + ret = regmap_write(rv3032->regmap, RV3032_EEPROM_CMD, 494 + RV3032_EEPROM_CMD_READ); 495 + if (ret) 496 + goto exit_eerd; 497 + 498 + ret = regmap_read_poll_timeout(rv3032->regmap, RV3032_TLSB, status, 499 + !(status & RV3032_TLSB_EEBUSY), 500 + RV3032_EEBUSY_POLL, RV3032_EEBUSY_TIMEOUT); 501 + if (ret) 502 + goto exit_eerd; 503 + 504 + ret = regmap_read(rv3032->regmap, RV3032_EEPROM_DATA, &data); 505 + if (ret) 506 + goto exit_eerd; 507 + buf[i] = data; 508 + } 509 + 510 + exit_eerd: 511 + rv3032_exit_eerd(rv3032, eerd); 512 + 513 + return ret; 514 + } 515 + 516 + static int rv3032_trickle_charger_setup(struct device *dev, struct rv3032_data *rv3032) 517 + { 518 + u32 val, ohms, voltage; 519 + int i; 520 + 521 + val = FIELD_PREP(RV3032_PMU_TCM, 1) | FIELD_PREP(RV3032_PMU_BSM, RV3032_PMU_BSM_DSM); 522 + if (!device_property_read_u32(dev, "trickle-voltage-millivolt", &voltage)) { 523 + for (i = 0; i < ARRAY_SIZE(rv3032_trickle_voltages); i++) 524 + if (voltage == rv3032_trickle_voltages[i]) 525 + break; 526 + if (i < ARRAY_SIZE(rv3032_trickle_voltages)) 527 + val = FIELD_PREP(RV3032_PMU_TCM, i) | 528 + FIELD_PREP(RV3032_PMU_BSM, RV3032_PMU_BSM_LSM); 529 + } 530 + 531 + if (device_property_read_u32(dev, "trickle-resistor-ohms", &ohms)) 532 + return 0; 533 + 534 + for (i = 0; i < ARRAY_SIZE(rv3032_trickle_resistors); i++) 535 + if (ohms == rv3032_trickle_resistors[i]) 536 + break; 537 + 538 + if (i >= ARRAY_SIZE(rv3032_trickle_resistors)) { 539 + dev_warn(dev, "invalid trickle resistor value\n"); 540 + 541 + return 0; 542 + } 543 + 544 + return rv3032_update_cfg(rv3032, RV3032_PMU, 545 + RV3032_PMU_TCR | RV3032_PMU_TCM | RV3032_PMU_BSM, 546 + val | FIELD_PREP(RV3032_PMU_TCR, i)); 547 + } 548 + 549 + #ifdef CONFIG_COMMON_CLK 550 + #define clkout_hw_to_rv3032(hw) container_of(hw, struct rv3032_data, clkout_hw) 551 + 552 + static int clkout_xtal_rates[] = { 553 + 32768, 554 + 1024, 555 + 64, 556 + 1, 557 + }; 558 + 559 + #define RV3032_HFD_STEP 8192 560 + 561 + static unsigned long rv3032_clkout_recalc_rate(struct clk_hw *hw, 562 + unsigned long parent_rate) 563 + { 564 + int clkout, ret; 565 + struct rv3032_data *rv3032 = clkout_hw_to_rv3032(hw); 566 + 567 + ret = regmap_read(rv3032->regmap, RV3032_CLKOUT2, &clkout); 568 + if (ret < 0) 569 + return 0; 570 + 571 + if (clkout & RV3032_CLKOUT2_OS) { 572 + unsigned long rate = FIELD_GET(RV3032_CLKOUT2_HFD_MSK, clkout) << 8; 573 + 574 + ret = regmap_read(rv3032->regmap, RV3032_CLKOUT1, &clkout); 575 + if (ret < 0) 576 + return 0; 577 + 578 + rate += clkout + 1; 579 + 580 + return rate * RV3032_HFD_STEP; 581 + } 582 + 583 + return clkout_xtal_rates[FIELD_GET(RV3032_CLKOUT2_FD_MSK, clkout)]; 584 + } 585 + 586 + static long rv3032_clkout_round_rate(struct clk_hw *hw, unsigned long rate, 587 + unsigned long *prate) 588 + { 589 + int i, hfd; 590 + 591 + if (rate < RV3032_HFD_STEP) 592 + for (i = 0; i < ARRAY_SIZE(clkout_xtal_rates); i++) 593 + if (clkout_xtal_rates[i] <= rate) 594 + return clkout_xtal_rates[i]; 595 + 596 + hfd = DIV_ROUND_CLOSEST(rate, RV3032_HFD_STEP); 597 + 598 + return RV3032_HFD_STEP * clamp(hfd, 0, 8192); 599 + } 600 + 601 + static int rv3032_clkout_set_rate(struct clk_hw *hw, unsigned long rate, 602 + unsigned long parent_rate) 603 + { 604 + struct rv3032_data *rv3032 = clkout_hw_to_rv3032(hw); 605 + u32 status, eerd; 606 + int i, hfd, ret; 607 + 608 + for (i = 0; i < ARRAY_SIZE(clkout_xtal_rates); i++) { 609 + if (clkout_xtal_rates[i] == rate) { 610 + return rv3032_update_cfg(rv3032, RV3032_CLKOUT2, 0xff, 611 + FIELD_PREP(RV3032_CLKOUT2_FD_MSK, i)); 612 + } 613 + } 614 + 615 + hfd = DIV_ROUND_CLOSEST(rate, RV3032_HFD_STEP); 616 + hfd = clamp(hfd, 1, 8192) - 1; 617 + 618 + ret = rv3032_enter_eerd(rv3032, &eerd); 619 + if (ret) 620 + goto exit_eerd; 621 + 622 + ret = regmap_write(rv3032->regmap, RV3032_CLKOUT1, hfd & 0xff); 623 + if (ret) 624 + return ret; 625 + 626 + ret = regmap_write(rv3032->regmap, RV3032_CLKOUT2, RV3032_CLKOUT2_OS | 627 + FIELD_PREP(RV3032_CLKOUT2_HFD_MSK, hfd >> 8)); 628 + if (ret) 629 + goto exit_eerd; 630 + 631 + ret = regmap_write(rv3032->regmap, RV3032_EEPROM_CMD, RV3032_EEPROM_CMD_UPDATE); 632 + if (ret) 633 + goto exit_eerd; 634 + 635 + usleep_range(46000, RV3032_EEBUSY_TIMEOUT); 636 + 637 + ret = regmap_read_poll_timeout(rv3032->regmap, RV3032_TLSB, status, 638 + !(status & RV3032_TLSB_EEBUSY), 639 + RV3032_EEBUSY_POLL, RV3032_EEBUSY_TIMEOUT); 640 + 641 + exit_eerd: 642 + rv3032_exit_eerd(rv3032, eerd); 643 + 644 + return ret; 645 + } 646 + 647 + static int rv3032_clkout_prepare(struct clk_hw *hw) 648 + { 649 + struct rv3032_data *rv3032 = clkout_hw_to_rv3032(hw); 650 + 651 + return rv3032_update_cfg(rv3032, RV3032_PMU, RV3032_PMU_NCLKE, 0); 652 + } 653 + 654 + static void rv3032_clkout_unprepare(struct clk_hw *hw) 655 + { 656 + struct rv3032_data *rv3032 = clkout_hw_to_rv3032(hw); 657 + 658 + rv3032_update_cfg(rv3032, RV3032_PMU, RV3032_PMU_NCLKE, RV3032_PMU_NCLKE); 659 + } 660 + 661 + static int rv3032_clkout_is_prepared(struct clk_hw *hw) 662 + { 663 + int val, ret; 664 + struct rv3032_data *rv3032 = clkout_hw_to_rv3032(hw); 665 + 666 + ret = regmap_read(rv3032->regmap, RV3032_PMU, &val); 667 + if (ret < 0) 668 + return ret; 669 + 670 + return !(val & RV3032_PMU_NCLKE); 671 + } 672 + 673 + static const struct clk_ops rv3032_clkout_ops = { 674 + .prepare = rv3032_clkout_prepare, 675 + .unprepare = rv3032_clkout_unprepare, 676 + .is_prepared = rv3032_clkout_is_prepared, 677 + .recalc_rate = rv3032_clkout_recalc_rate, 678 + .round_rate = rv3032_clkout_round_rate, 679 + .set_rate = rv3032_clkout_set_rate, 680 + }; 681 + 682 + static int rv3032_clkout_register_clk(struct rv3032_data *rv3032, 683 + struct i2c_client *client) 684 + { 685 + int ret; 686 + struct clk *clk; 687 + struct clk_init_data init; 688 + struct device_node *node = client->dev.of_node; 689 + 690 + ret = regmap_update_bits(rv3032->regmap, RV3032_TLSB, RV3032_TLSB_CLKF, 0); 691 + if (ret < 0) 692 + return ret; 693 + 694 + ret = regmap_update_bits(rv3032->regmap, RV3032_CTRL2, RV3032_CTRL2_CLKIE, 0); 695 + if (ret < 0) 696 + return ret; 697 + 698 + ret = regmap_write(rv3032->regmap, RV3032_CLK_IRQ, 0); 699 + if (ret < 0) 700 + return ret; 701 + 702 + init.name = "rv3032-clkout"; 703 + init.ops = &rv3032_clkout_ops; 704 + init.flags = 0; 705 + init.parent_names = NULL; 706 + init.num_parents = 0; 707 + rv3032->clkout_hw.init = &init; 708 + 709 + of_property_read_string(node, "clock-output-names", &init.name); 710 + 711 + clk = devm_clk_register(&client->dev, &rv3032->clkout_hw); 712 + if (!IS_ERR(clk)) 713 + of_clk_add_provider(node, of_clk_src_simple_get, clk); 714 + 715 + return 0; 716 + } 717 + #endif 718 + 719 + static int rv3032_hwmon_read_temp(struct device *dev, long *mC) 720 + { 721 + struct rv3032_data *rv3032 = dev_get_drvdata(dev); 722 + u8 buf[2]; 723 + int temp, prev = 0; 724 + int ret; 725 + 726 + ret = regmap_bulk_read(rv3032->regmap, RV3032_TLSB, buf, sizeof(buf)); 727 + if (ret) 728 + return ret; 729 + 730 + temp = sign_extend32(buf[1], 7) << 4; 731 + temp |= FIELD_GET(RV3032_TLSB_TEMP, buf[0]); 732 + 733 + /* No blocking or shadowing on RV3032_TLSB and RV3032_TMSB */ 734 + do { 735 + prev = temp; 736 + 737 + ret = regmap_bulk_read(rv3032->regmap, RV3032_TLSB, buf, sizeof(buf)); 738 + if (ret) 739 + return ret; 740 + 741 + temp = sign_extend32(buf[1], 7) << 4; 742 + temp |= FIELD_GET(RV3032_TLSB_TEMP, buf[0]); 743 + } while (temp != prev); 744 + 745 + *mC = (temp * 1000) / 16; 746 + 747 + return 0; 748 + } 749 + 750 + static umode_t rv3032_hwmon_is_visible(const void *data, enum hwmon_sensor_types type, 751 + u32 attr, int channel) 752 + { 753 + if (type != hwmon_temp) 754 + return 0; 755 + 756 + switch (attr) { 757 + case hwmon_temp_input: 758 + return 0444; 759 + default: 760 + return 0; 761 + } 762 + } 763 + 764 + static int rv3032_hwmon_read(struct device *dev, enum hwmon_sensor_types type, 765 + u32 attr, int channel, long *temp) 766 + { 767 + int err; 768 + 769 + switch (attr) { 770 + case hwmon_temp_input: 771 + err = rv3032_hwmon_read_temp(dev, temp); 772 + break; 773 + default: 774 + err = -EOPNOTSUPP; 775 + break; 776 + } 777 + 778 + return err; 779 + } 780 + 781 + static const struct hwmon_channel_info *rv3032_hwmon_info[] = { 782 + HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ), 783 + HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST), 784 + NULL 785 + }; 786 + 787 + static const struct hwmon_ops rv3032_hwmon_hwmon_ops = { 788 + .is_visible = rv3032_hwmon_is_visible, 789 + .read = rv3032_hwmon_read, 790 + }; 791 + 792 + static const struct hwmon_chip_info rv3032_hwmon_chip_info = { 793 + .ops = &rv3032_hwmon_hwmon_ops, 794 + .info = rv3032_hwmon_info, 795 + }; 796 + 797 + static void rv3032_hwmon_register(struct device *dev) 798 + { 799 + struct rv3032_data *rv3032 = dev_get_drvdata(dev); 800 + 801 + if (!IS_REACHABLE(CONFIG_HWMON)) 802 + return; 803 + 804 + devm_hwmon_device_register_with_info(dev, "rv3032", rv3032, &rv3032_hwmon_chip_info, NULL); 805 + } 806 + 807 + static struct rtc_class_ops rv3032_rtc_ops = { 808 + .read_time = rv3032_get_time, 809 + .set_time = rv3032_set_time, 810 + .read_offset = rv3032_read_offset, 811 + .set_offset = rv3032_set_offset, 812 + .ioctl = rv3032_ioctl, 813 + }; 814 + 815 + static const struct regmap_config regmap_config = { 816 + .reg_bits = 8, 817 + .val_bits = 8, 818 + .max_register = 0xCA, 819 + }; 820 + 821 + static int rv3032_probe(struct i2c_client *client) 822 + { 823 + struct rv3032_data *rv3032; 824 + int ret, status; 825 + struct nvmem_config nvmem_cfg = { 826 + .name = "rv3032_nvram", 827 + .word_size = 1, 828 + .stride = 1, 829 + .size = 16, 830 + .type = NVMEM_TYPE_BATTERY_BACKED, 831 + .reg_read = rv3032_nvram_read, 832 + .reg_write = rv3032_nvram_write, 833 + }; 834 + struct nvmem_config eeprom_cfg = { 835 + .name = "rv3032_eeprom", 836 + .word_size = 1, 837 + .stride = 1, 838 + .size = 32, 839 + .type = NVMEM_TYPE_EEPROM, 840 + .reg_read = rv3032_eeprom_read, 841 + .reg_write = rv3032_eeprom_write, 842 + }; 843 + 844 + rv3032 = devm_kzalloc(&client->dev, sizeof(struct rv3032_data), 845 + GFP_KERNEL); 846 + if (!rv3032) 847 + return -ENOMEM; 848 + 849 + rv3032->regmap = devm_regmap_init_i2c(client, &regmap_config); 850 + if (IS_ERR(rv3032->regmap)) 851 + return PTR_ERR(rv3032->regmap); 852 + 853 + i2c_set_clientdata(client, rv3032); 854 + 855 + ret = regmap_read(rv3032->regmap, RV3032_STATUS, &status); 856 + if (ret < 0) 857 + return ret; 858 + 859 + rv3032->rtc = devm_rtc_allocate_device(&client->dev); 860 + if (IS_ERR(rv3032->rtc)) 861 + return PTR_ERR(rv3032->rtc); 862 + 863 + if (client->irq > 0) { 864 + ret = devm_request_threaded_irq(&client->dev, client->irq, 865 + NULL, rv3032_handle_irq, 866 + IRQF_TRIGGER_LOW | IRQF_ONESHOT, 867 + "rv3032", rv3032); 868 + if (ret) { 869 + dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n"); 870 + client->irq = 0; 871 + } else { 872 + rv3032_rtc_ops.read_alarm = rv3032_get_alarm; 873 + rv3032_rtc_ops.set_alarm = rv3032_set_alarm; 874 + rv3032_rtc_ops.alarm_irq_enable = rv3032_alarm_irq_enable; 875 + } 876 + } 877 + 878 + ret = regmap_update_bits(rv3032->regmap, RV3032_CTRL1, 879 + RV3032_CTRL1_WADA, RV3032_CTRL1_WADA); 880 + if (ret) 881 + return ret; 882 + 883 + rv3032_trickle_charger_setup(&client->dev, rv3032); 884 + 885 + rv3032->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; 886 + rv3032->rtc->range_max = RTC_TIMESTAMP_END_2099; 887 + rv3032->rtc->ops = &rv3032_rtc_ops; 888 + ret = rtc_register_device(rv3032->rtc); 889 + if (ret) 890 + return ret; 891 + 892 + nvmem_cfg.priv = rv3032; 893 + rtc_nvmem_register(rv3032->rtc, &nvmem_cfg); 894 + eeprom_cfg.priv = rv3032; 895 + rtc_nvmem_register(rv3032->rtc, &eeprom_cfg); 896 + 897 + rv3032->rtc->max_user_freq = 1; 898 + 899 + #ifdef CONFIG_COMMON_CLK 900 + rv3032_clkout_register_clk(rv3032, client); 901 + #endif 902 + 903 + rv3032_hwmon_register(&client->dev); 904 + 905 + return 0; 906 + } 907 + 908 + static const struct of_device_id rv3032_of_match[] = { 909 + { .compatible = "microcrystal,rv3032", }, 910 + { } 911 + }; 912 + MODULE_DEVICE_TABLE(of, rv3032_of_match); 913 + 914 + static struct i2c_driver rv3032_driver = { 915 + .driver = { 916 + .name = "rtc-rv3032", 917 + .of_match_table = of_match_ptr(rv3032_of_match), 918 + }, 919 + .probe_new = rv3032_probe, 920 + }; 921 + module_i2c_driver(rv3032_driver); 922 + 923 + MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@bootlin.com>"); 924 + MODULE_DESCRIPTION("Micro Crystal RV3032 RTC driver"); 925 + MODULE_LICENSE("GPL v2");

+1 -7

drivers/rtc/rtc-rv8803.c

··· 454 454 static int rv8803_nvram_write(void *priv, unsigned int offset, void *val, 455 455 size_t bytes) 456 456 { 457 - int ret; 458 - 459 - ret = rv8803_write_reg(priv, RV8803_RAM, *(u8 *)val); 460 - if (ret) 461 - return ret; 462 - 463 - return 0; 457 + return rv8803_write_reg(priv, RV8803_RAM, *(u8 *)val); 464 458 } 465 459 466 460 static int rv8803_nvram_read(void *priv, unsigned int offset,

+143 -189

drivers/rtc/rtc-rx8010.c

··· 11 11 #include <linux/i2c.h> 12 12 #include <linux/kernel.h> 13 13 #include <linux/module.h> 14 + #include <linux/regmap.h> 14 15 #include <linux/rtc.h> 15 16 16 - #define RX8010_SEC 0x10 17 - #define RX8010_MIN 0x11 18 - #define RX8010_HOUR 0x12 19 - #define RX8010_WDAY 0x13 20 - #define RX8010_MDAY 0x14 21 - #define RX8010_MONTH 0x15 22 - #define RX8010_YEAR 0x16 23 - #define RX8010_RESV17 0x17 24 - #define RX8010_ALMIN 0x18 25 - #define RX8010_ALHOUR 0x19 26 - #define RX8010_ALWDAY 0x1A 27 - #define RX8010_TCOUNT0 0x1B 28 - #define RX8010_TCOUNT1 0x1C 29 - #define RX8010_EXT 0x1D 30 - #define RX8010_FLAG 0x1E 31 - #define RX8010_CTRL 0x1F 17 + #define RX8010_SEC 0x10 18 + #define RX8010_MIN 0x11 19 + #define RX8010_HOUR 0x12 20 + #define RX8010_WDAY 0x13 21 + #define RX8010_MDAY 0x14 22 + #define RX8010_MONTH 0x15 23 + #define RX8010_YEAR 0x16 24 + #define RX8010_RESV17 0x17 25 + #define RX8010_ALMIN 0x18 26 + #define RX8010_ALHOUR 0x19 27 + #define RX8010_ALWDAY 0x1A 28 + #define RX8010_TCOUNT0 0x1B 29 + #define RX8010_TCOUNT1 0x1C 30 + #define RX8010_EXT 0x1D 31 + #define RX8010_FLAG 0x1E 32 + #define RX8010_CTRL 0x1F 32 33 /* 0x20 to 0x2F are user registers */ 33 - #define RX8010_RESV30 0x30 34 - #define RX8010_RESV31 0x31 35 - #define RX8010_IRQ 0x32 34 + #define RX8010_RESV30 0x30 35 + #define RX8010_RESV31 0x31 36 + #define RX8010_IRQ 0x32 36 37 37 - #define RX8010_EXT_WADA BIT(3) 38 + #define RX8010_EXT_WADA BIT(3) 38 39 39 - #define RX8010_FLAG_VLF BIT(1) 40 - #define RX8010_FLAG_AF BIT(3) 41 - #define RX8010_FLAG_TF BIT(4) 42 - #define RX8010_FLAG_UF BIT(5) 40 + #define RX8010_FLAG_VLF BIT(1) 41 + #define RX8010_FLAG_AF BIT(3) 42 + #define RX8010_FLAG_TF BIT(4) 43 + #define RX8010_FLAG_UF BIT(5) 43 44 44 - #define RX8010_CTRL_AIE BIT(3) 45 - #define RX8010_CTRL_UIE BIT(5) 46 - #define RX8010_CTRL_STOP BIT(6) 47 - #define RX8010_CTRL_TEST BIT(7) 45 + #define RX8010_CTRL_AIE BIT(3) 46 + #define RX8010_CTRL_UIE BIT(5) 47 + #define RX8010_CTRL_STOP BIT(6) 48 + #define RX8010_CTRL_TEST BIT(7) 48 49 49 - #define RX8010_ALARM_AE BIT(7) 50 + #define RX8010_ALARM_AE BIT(7) 50 51 51 52 static const struct i2c_device_id rx8010_id[] = { 52 53 { "rx8010", 0 }, ··· 62 61 MODULE_DEVICE_TABLE(of, rx8010_of_match); 63 62 64 63 struct rx8010_data { 65 - struct i2c_client *client; 64 + struct regmap *regs; 66 65 struct rtc_device *rtc; 67 66 u8 ctrlreg; 68 67 }; ··· 71 70 { 72 71 struct i2c_client *client = dev_id; 73 72 struct rx8010_data *rx8010 = i2c_get_clientdata(client); 74 - int flagreg; 73 + int flagreg, err; 75 74 76 75 mutex_lock(&rx8010->rtc->ops_lock); 77 76 78 - flagreg = i2c_smbus_read_byte_data(client, RX8010_FLAG); 79 - 80 - if (flagreg <= 0) { 77 + err = regmap_read(rx8010->regs, RX8010_FLAG, &flagreg); 78 + if (err) { 81 79 mutex_unlock(&rx8010->rtc->ops_lock); 82 80 return IRQ_NONE; 83 81 } ··· 99 99 rtc_update_irq(rx8010->rtc, 1, RTC_UF | RTC_IRQF); 100 100 } 101 101 102 - i2c_smbus_write_byte_data(client, RX8010_FLAG, flagreg); 103 - 102 + err = regmap_write(rx8010->regs, RX8010_FLAG, flagreg); 104 103 mutex_unlock(&rx8010->rtc->ops_lock); 105 - return IRQ_HANDLED; 104 + return err ? IRQ_NONE : IRQ_HANDLED; 106 105 } 107 106 108 107 static int rx8010_get_time(struct device *dev, struct rtc_time *dt) 109 108 { 110 109 struct rx8010_data *rx8010 = dev_get_drvdata(dev); 111 - u8 date[7]; 112 - int flagreg; 113 - int err; 110 + u8 date[RX8010_YEAR - RX8010_SEC + 1]; 111 + int flagreg, err; 114 112 115 - flagreg = i2c_smbus_read_byte_data(rx8010->client, RX8010_FLAG); 116 - if (flagreg < 0) 117 - return flagreg; 113 + err = regmap_read(rx8010->regs, RX8010_FLAG, &flagreg); 114 + if (err) 115 + return err; 118 116 119 117 if (flagreg & RX8010_FLAG_VLF) { 120 118 dev_warn(dev, "Frequency stop detected\n"); 121 119 return -EINVAL; 122 120 } 123 121 124 - err = i2c_smbus_read_i2c_block_data(rx8010->client, RX8010_SEC, 125 - 7, date); 126 - if (err != 7) 127 - return err < 0 ? err : -EIO; 122 + err = regmap_bulk_read(rx8010->regs, RX8010_SEC, date, sizeof(date)); 123 + if (err) 124 + return err; 128 125 129 126 dt->tm_sec = bcd2bin(date[RX8010_SEC - RX8010_SEC] & 0x7f); 130 127 dt->tm_min = bcd2bin(date[RX8010_MIN - RX8010_SEC] & 0x7f); ··· 137 140 static int rx8010_set_time(struct device *dev, struct rtc_time *dt) 138 141 { 139 142 struct rx8010_data *rx8010 = dev_get_drvdata(dev); 140 - u8 date[7]; 141 - int ctrl, flagreg; 142 - int ret; 143 - 144 - if ((dt->tm_year < 100) || (dt->tm_year > 199)) 145 - return -EINVAL; 143 + u8 date[RX8010_YEAR - RX8010_SEC + 1]; 144 + int err; 146 145 147 146 /* set STOP bit before changing clock/calendar */ 148 - ctrl = i2c_smbus_read_byte_data(rx8010->client, RX8010_CTRL); 149 - if (ctrl < 0) 150 - return ctrl; 151 - rx8010->ctrlreg = ctrl | RX8010_CTRL_STOP; 152 - ret = i2c_smbus_write_byte_data(rx8010->client, RX8010_CTRL, 153 - rx8010->ctrlreg); 154 - if (ret < 0) 155 - return ret; 147 + err = regmap_set_bits(rx8010->regs, RX8010_CTRL, RX8010_CTRL_STOP); 148 + if (err) 149 + return err; 156 150 157 151 date[RX8010_SEC - RX8010_SEC] = bin2bcd(dt->tm_sec); 158 152 date[RX8010_MIN - RX8010_SEC] = bin2bcd(dt->tm_min); ··· 153 165 date[RX8010_YEAR - RX8010_SEC] = bin2bcd(dt->tm_year - 100); 154 166 date[RX8010_WDAY - RX8010_SEC] = bin2bcd(1 << dt->tm_wday); 155 167 156 - ret = i2c_smbus_write_i2c_block_data(rx8010->client, 157 - RX8010_SEC, 7, date); 158 - if (ret < 0) 159 - return ret; 168 + err = regmap_bulk_write(rx8010->regs, RX8010_SEC, date, sizeof(date)); 169 + if (err) 170 + return err; 160 171 161 172 /* clear STOP bit after changing clock/calendar */ 162 - ctrl = i2c_smbus_read_byte_data(rx8010->client, RX8010_CTRL); 163 - if (ctrl < 0) 164 - return ctrl; 165 - rx8010->ctrlreg = ctrl & ~RX8010_CTRL_STOP; 166 - ret = i2c_smbus_write_byte_data(rx8010->client, RX8010_CTRL, 167 - rx8010->ctrlreg); 168 - if (ret < 0) 169 - return ret; 173 + err = regmap_clear_bits(rx8010->regs, RX8010_CTRL, RX8010_CTRL_STOP); 174 + if (err) 175 + return err; 170 176 171 - flagreg = i2c_smbus_read_byte_data(rx8010->client, RX8010_FLAG); 172 - if (flagreg < 0) { 173 - return flagreg; 174 - } 175 - 176 - if (flagreg & RX8010_FLAG_VLF) 177 - ret = i2c_smbus_write_byte_data(rx8010->client, RX8010_FLAG, 178 - flagreg & ~RX8010_FLAG_VLF); 177 + err = regmap_clear_bits(rx8010->regs, RX8010_FLAG, RX8010_FLAG_VLF); 178 + if (err) 179 + return err; 179 180 180 181 return 0; 181 182 } 182 183 183 - static int rx8010_init_client(struct i2c_client *client) 184 + static int rx8010_init(struct device *dev) 184 185 { 185 - struct rx8010_data *rx8010 = i2c_get_clientdata(client); 186 + struct rx8010_data *rx8010 = dev_get_drvdata(dev); 186 187 u8 ctrl[2]; 187 - int need_clear = 0, err = 0; 188 + int need_clear = 0, err; 188 189 189 190 /* Initialize reserved registers as specified in datasheet */ 190 - err = i2c_smbus_write_byte_data(client, RX8010_RESV17, 0xD8); 191 - if (err < 0) 191 + err = regmap_write(rx8010->regs, RX8010_RESV17, 0xD8); 192 + if (err) 192 193 return err; 193 194 194 - err = i2c_smbus_write_byte_data(client, RX8010_RESV30, 0x00); 195 - if (err < 0) 195 + err = regmap_write(rx8010->regs, RX8010_RESV30, 0x00); 196 + if (err) 196 197 return err; 197 198 198 - err = i2c_smbus_write_byte_data(client, RX8010_RESV31, 0x08); 199 - if (err < 0) 199 + err = regmap_write(rx8010->regs, RX8010_RESV31, 0x08); 200 + if (err) 200 201 return err; 201 202 202 - err = i2c_smbus_write_byte_data(client, RX8010_IRQ, 0x00); 203 - if (err < 0) 203 + err = regmap_write(rx8010->regs, RX8010_IRQ, 0x00); 204 + if (err) 204 205 return err; 205 206 206 - err = i2c_smbus_read_i2c_block_data(rx8010->client, RX8010_FLAG, 207 - 2, ctrl); 208 - if (err != 2) 209 - return err < 0 ? err : -EIO; 207 + err = regmap_bulk_read(rx8010->regs, RX8010_FLAG, ctrl, 2); 208 + if (err) 209 + return err; 210 210 211 211 if (ctrl[0] & RX8010_FLAG_VLF) 212 - dev_warn(&client->dev, "Frequency stop was detected\n"); 212 + dev_warn(dev, "Frequency stop was detected\n"); 213 213 214 214 if (ctrl[0] & RX8010_FLAG_AF) { 215 - dev_warn(&client->dev, "Alarm was detected\n"); 215 + dev_warn(dev, "Alarm was detected\n"); 216 216 need_clear = 1; 217 217 } 218 218 ··· 212 236 213 237 if (need_clear) { 214 238 ctrl[0] &= ~(RX8010_FLAG_AF | RX8010_FLAG_TF | RX8010_FLAG_UF); 215 - err = i2c_smbus_write_byte_data(client, RX8010_FLAG, ctrl[0]); 216 - if (err < 0) 239 + err = regmap_write(rx8010->regs, RX8010_FLAG, ctrl[0]); 240 + if (err) 217 241 return err; 218 242 } 219 243 ··· 225 249 static int rx8010_read_alarm(struct device *dev, struct rtc_wkalrm *t) 226 250 { 227 251 struct rx8010_data *rx8010 = dev_get_drvdata(dev); 228 - struct i2c_client *client = rx8010->client; 229 252 u8 alarmvals[3]; 230 - int flagreg; 231 - int err; 253 + int flagreg, err; 232 254 233 - err = i2c_smbus_read_i2c_block_data(client, RX8010_ALMIN, 3, alarmvals); 234 - if (err != 3) 235 - return err < 0 ? err : -EIO; 255 + err = regmap_bulk_read(rx8010->regs, RX8010_ALMIN, alarmvals, 3); 256 + if (err) 257 + return err; 236 258 237 - flagreg = i2c_smbus_read_byte_data(client, RX8010_FLAG); 238 - if (flagreg < 0) 239 - return flagreg; 259 + err = regmap_read(rx8010->regs, RX8010_FLAG, &flagreg); 260 + if (err) 261 + return err; 240 262 241 263 t->time.tm_sec = 0; 242 264 t->time.tm_min = bcd2bin(alarmvals[0] & 0x7f); ··· 251 277 252 278 static int rx8010_set_alarm(struct device *dev, struct rtc_wkalrm *t) 253 279 { 254 - struct i2c_client *client = to_i2c_client(dev); 255 280 struct rx8010_data *rx8010 = dev_get_drvdata(dev); 256 281 u8 alarmvals[3]; 257 - int extreg, flagreg; 258 282 int err; 259 - 260 - flagreg = i2c_smbus_read_byte_data(client, RX8010_FLAG); 261 - if (flagreg < 0) { 262 - return flagreg; 263 - } 264 283 265 284 if (rx8010->ctrlreg & (RX8010_CTRL_AIE | RX8010_CTRL_UIE)) { 266 285 rx8010->ctrlreg &= ~(RX8010_CTRL_AIE | RX8010_CTRL_UIE); 267 - err = i2c_smbus_write_byte_data(rx8010->client, RX8010_CTRL, 268 - rx8010->ctrlreg); 269 - if (err < 0) { 286 + err = regmap_write(rx8010->regs, RX8010_CTRL, rx8010->ctrlreg); 287 + if (err) 270 288 return err; 271 - } 272 289 } 273 290 274 - flagreg &= ~RX8010_FLAG_AF; 275 - err = i2c_smbus_write_byte_data(rx8010->client, RX8010_FLAG, flagreg); 276 - if (err < 0) 291 + err = regmap_clear_bits(rx8010->regs, RX8010_FLAG, RX8010_FLAG_AF); 292 + if (err) 277 293 return err; 278 294 279 295 alarmvals[0] = bin2bcd(t->time.tm_min); 280 296 alarmvals[1] = bin2bcd(t->time.tm_hour); 281 297 alarmvals[2] = bin2bcd(t->time.tm_mday); 282 298 283 - err = i2c_smbus_write_i2c_block_data(rx8010->client, RX8010_ALMIN, 284 - 2, alarmvals); 285 - if (err < 0) 299 + err = regmap_bulk_write(rx8010->regs, RX8010_ALMIN, alarmvals, 2); 300 + if (err) 286 301 return err; 287 302 288 - extreg = i2c_smbus_read_byte_data(client, RX8010_EXT); 289 - if (extreg < 0) 290 - return extreg; 291 - 292 - extreg |= RX8010_EXT_WADA; 293 - err = i2c_smbus_write_byte_data(rx8010->client, RX8010_EXT, extreg); 294 - if (err < 0) 303 + err = regmap_clear_bits(rx8010->regs, RX8010_EXT, RX8010_EXT_WADA); 304 + if (err) 295 305 return err; 296 306 297 307 if (alarmvals[2] == 0) 298 308 alarmvals[2] |= RX8010_ALARM_AE; 299 309 300 - err = i2c_smbus_write_byte_data(rx8010->client, RX8010_ALWDAY, 301 - alarmvals[2]); 302 - if (err < 0) 310 + err = regmap_write(rx8010->regs, RX8010_ALWDAY, alarmvals[2]); 311 + if (err) 303 312 return err; 304 313 305 314 if (t->enabled) { ··· 292 335 rx8010->ctrlreg |= 293 336 (RX8010_CTRL_AIE | RX8010_CTRL_UIE); 294 337 295 - err = i2c_smbus_write_byte_data(rx8010->client, RX8010_CTRL, 296 - rx8010->ctrlreg); 297 - if (err < 0) 338 + err = regmap_write(rx8010->regs, RX8010_CTRL, rx8010->ctrlreg); 339 + if (err) 298 340 return err; 299 341 } 300 342 ··· 303 347 static int rx8010_alarm_irq_enable(struct device *dev, 304 348 unsigned int enabled) 305 349 { 306 - struct i2c_client *client = to_i2c_client(dev); 307 350 struct rx8010_data *rx8010 = dev_get_drvdata(dev); 308 - int flagreg; 309 - u8 ctrl; 310 351 int err; 352 + u8 ctrl; 311 353 312 354 ctrl = rx8010->ctrlreg; 313 355 ··· 321 367 ctrl &= ~RX8010_CTRL_AIE; 322 368 } 323 369 324 - flagreg = i2c_smbus_read_byte_data(client, RX8010_FLAG); 325 - if (flagreg < 0) 326 - return flagreg; 327 - 328 - flagreg &= ~RX8010_FLAG_AF; 329 - err = i2c_smbus_write_byte_data(rx8010->client, RX8010_FLAG, flagreg); 330 - if (err < 0) 370 + err = regmap_clear_bits(rx8010->regs, RX8010_FLAG, RX8010_FLAG_AF); 371 + if (err) 331 372 return err; 332 373 333 374 if (ctrl != rx8010->ctrlreg) { 334 375 rx8010->ctrlreg = ctrl; 335 - err = i2c_smbus_write_byte_data(rx8010->client, RX8010_CTRL, 336 - rx8010->ctrlreg); 337 - if (err < 0) 376 + err = regmap_write(rx8010->regs, RX8010_CTRL, rx8010->ctrlreg); 377 + if (err) 338 378 return err; 339 379 } 340 380 ··· 338 390 static int rx8010_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) 339 391 { 340 392 struct rx8010_data *rx8010 = dev_get_drvdata(dev); 341 - int tmp; 342 - int flagreg; 393 + int tmp, flagreg, err; 343 394 344 395 switch (cmd) { 345 396 case RTC_VL_READ: 346 - flagreg = i2c_smbus_read_byte_data(rx8010->client, RX8010_FLAG); 347 - if (flagreg < 0) 348 - return flagreg; 397 + err = regmap_read(rx8010->regs, RX8010_FLAG, &flagreg); 398 + if (err) 399 + return err; 349 400 350 401 tmp = flagreg & RX8010_FLAG_VLF ? RTC_VL_DATA_INVALID : 0; 351 402 return put_user(tmp, (unsigned int __user *)arg); ··· 354 407 } 355 408 } 356 409 357 - static struct rtc_class_ops rx8010_rtc_ops = { 410 + static const struct rtc_class_ops rx8010_rtc_ops_default = { 358 411 .read_time = rx8010_get_time, 359 412 .set_time = rx8010_set_time, 360 413 .ioctl = rx8010_ioctl, 361 414 }; 362 415 363 - static int rx8010_probe(struct i2c_client *client, 364 - const struct i2c_device_id *id) 416 + static const struct rtc_class_ops rx8010_rtc_ops_alarm = { 417 + .read_time = rx8010_get_time, 418 + .set_time = rx8010_set_time, 419 + .ioctl = rx8010_ioctl, 420 + .read_alarm = rx8010_read_alarm, 421 + .set_alarm = rx8010_set_alarm, 422 + .alarm_irq_enable = rx8010_alarm_irq_enable, 423 + }; 424 + 425 + static const struct regmap_config rx8010_regmap_config = { 426 + .name = "rx8010-rtc", 427 + .reg_bits = 8, 428 + .val_bits = 8, 429 + }; 430 + 431 + static int rx8010_probe(struct i2c_client *client) 365 432 { 366 - struct i2c_adapter *adapter = client->adapter; 433 + struct device *dev = &client->dev; 367 434 struct rx8010_data *rx8010; 368 435 int err = 0; 369 436 370 - if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA 371 - | I2C_FUNC_SMBUS_I2C_BLOCK)) { 372 - dev_err(&adapter->dev, "doesn't support required functionality\n"); 373 - return -EIO; 374 - } 375 - 376 - rx8010 = devm_kzalloc(&client->dev, sizeof(struct rx8010_data), 377 - GFP_KERNEL); 437 + rx8010 = devm_kzalloc(dev, sizeof(*rx8010), GFP_KERNEL); 378 438 if (!rx8010) 379 439 return -ENOMEM; 380 440 381 - rx8010->client = client; 382 441 i2c_set_clientdata(client, rx8010); 383 442 384 - err = rx8010_init_client(client); 443 + rx8010->regs = devm_regmap_init_i2c(client, &rx8010_regmap_config); 444 + if (IS_ERR(rx8010->regs)) 445 + return PTR_ERR(rx8010->regs); 446 + 447 + err = rx8010_init(dev); 385 448 if (err) 386 449 return err; 387 450 451 + rx8010->rtc = devm_rtc_allocate_device(dev); 452 + if (IS_ERR(rx8010->rtc)) 453 + return PTR_ERR(rx8010->rtc); 454 + 388 455 if (client->irq > 0) { 389 - dev_info(&client->dev, "IRQ %d supplied\n", client->irq); 390 - err = devm_request_threaded_irq(&client->dev, client->irq, NULL, 456 + dev_info(dev, "IRQ %d supplied\n", client->irq); 457 + err = devm_request_threaded_irq(dev, client->irq, NULL, 391 458 rx8010_irq_1_handler, 392 459 IRQF_TRIGGER_LOW | IRQF_ONESHOT, 393 460 "rx8010", client); 394 - 395 461 if (err) { 396 - dev_err(&client->dev, "unable to request IRQ\n"); 397 - client->irq = 0; 398 - } else { 399 - rx8010_rtc_ops.read_alarm = rx8010_read_alarm; 400 - rx8010_rtc_ops.set_alarm = rx8010_set_alarm; 401 - rx8010_rtc_ops.alarm_irq_enable = rx8010_alarm_irq_enable; 462 + dev_err(dev, "unable to request IRQ\n"); 463 + return err; 402 464 } 403 - } 404 465 405 - rx8010->rtc = devm_rtc_device_register(&client->dev, client->name, 406 - &rx8010_rtc_ops, THIS_MODULE); 407 - 408 - if (IS_ERR(rx8010->rtc)) { 409 - dev_err(&client->dev, "unable to register the class device\n"); 410 - return PTR_ERR(rx8010->rtc); 466 + rx8010->rtc->ops = &rx8010_rtc_ops_alarm; 467 + } else { 468 + rx8010->rtc->ops = &rx8010_rtc_ops_default; 411 469 } 412 470 413 471 rx8010->rtc->max_user_freq = 1; 472 + rx8010->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; 473 + rx8010->rtc->range_max = RTC_TIMESTAMP_END_2099; 414 474 415 - return 0; 475 + return rtc_register_device(rx8010->rtc); 416 476 } 417 477 418 478 static struct i2c_driver rx8010_driver = { ··· 427 473 .name = "rtc-rx8010", 428 474 .of_match_table = of_match_ptr(rx8010_of_match), 429 475 }, 430 - .probe = rx8010_probe, 476 + .probe_new = rx8010_probe, 431 477 .id_table = rx8010_id, 432 478 }; 433 479

+2 -7

drivers/rtc/rtc-s3c.c

··· 494 494 if (info->data->needs_src_clk) { 495 495 info->rtc_src_clk = devm_clk_get(&pdev->dev, "rtc_src"); 496 496 if (IS_ERR(info->rtc_src_clk)) { 497 - ret = PTR_ERR(info->rtc_src_clk); 498 - if (ret != -EPROBE_DEFER) 499 - dev_err(&pdev->dev, 500 - "failed to find rtc source clock\n"); 501 - else 502 - dev_dbg(&pdev->dev, 503 - "probe deferred due to missing rtc src clk\n"); 497 + ret = dev_err_probe(&pdev->dev, PTR_ERR(info->rtc_src_clk), 498 + "failed to find rtc source clock\n"); 504 499 goto err_src_clk; 505 500 } 506 501 ret = clk_prepare_enable(info->rtc_src_clk);

+1 -1

drivers/rtc/rtc-st-lpc.c

··· 173 173 return 0; 174 174 } 175 175 176 - static struct rtc_class_ops st_rtc_ops = { 176 + static const struct rtc_class_ops st_rtc_ops = { 177 177 .read_time = st_rtc_read_time, 178 178 .set_time = st_rtc_set_time, 179 179 .read_alarm = st_rtc_read_alarm,

-1

include/linux/mfd/mt6397/rtc.h

··· 72 72 }; 73 73 74 74 struct mt6397_rtc { 75 - struct device *dev; 76 75 struct rtc_device *rtc_dev; 77 76 78 77 /* Protect register access from multiple tasks */