tjh.dev / kernel
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powerpc/tm: Move TM abort cause codes to uapi

These cause codes are usable by userspace, so let's export to uapi.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Cc: <stable@vger.kernel.org> # v3.9
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

authored by

Michael Neuling and committed by
Benjamin Herrenschmidt b75c100e 6ce6c629

+21 -14
-14
arch/powerpc/include/asm/reg.h
··· 111 111 #define MSR_TM_TRANSACTIONAL(x) (((x) & MSR_TS_MASK) == MSR_TS_T) 112 112 #define MSR_TM_SUSPENDED(x) (((x) & MSR_TS_MASK) == MSR_TS_S) 113 113 114 - /* Reason codes describing kernel causes for transaction aborts. By 115 - convention, bit0 is copied to TEXASR[56] (IBM bit 7) which is set if 116 - the failure is persistent. PAPR saves 0xff-0xe0 for the hypervisor. 117 - */ 118 - #define TM_CAUSE_PERSISTENT 0x01 119 - #define TM_CAUSE_RESCHED 0xde 120 - #define TM_CAUSE_TLBI 0xdc 121 - #define TM_CAUSE_FAC_UNAV 0xda 122 - #define TM_CAUSE_SYSCALL 0xd8 /* future use */ 123 - #define TM_CAUSE_MISC 0xd6 /* future use */ 124 - #define TM_CAUSE_SIGNAL 0xd4 125 - #define TM_CAUSE_ALIGNMENT 0xd2 126 - #define TM_CAUSE_EMULATE 0xd0 127 - 128 114 #if defined(CONFIG_PPC_BOOK3S_64) 129 115 #define MSR_64BIT MSR_SF 130 116
+2
arch/powerpc/include/asm/tm.h
··· 5 5 * Copyright 2012 Matt Evans & Michael Neuling, IBM Corporation. 6 6 */ 7 7 8 + #include <uapi/asm/tm.h> 9 + 8 10 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 9 11 extern void do_load_up_transact_fpu(struct thread_struct *thread); 10 12 extern void do_load_up_transact_altivec(struct thread_struct *thread);
+1
arch/powerpc/include/uapi/asm/Kbuild
··· 40 40 header-y += swab.h 41 41 header-y += termbits.h 42 42 header-y += termios.h 43 + header-y += tm.h 43 44 header-y += types.h 44 45 header-y += ucontext.h 45 46 header-y += unistd.h
+18
arch/powerpc/include/uapi/asm/tm.h
··· 1 + #ifndef _ASM_POWERPC_TM_H 2 + #define _ASM_POWERPC_TM_H 3 + 4 + /* Reason codes describing kernel causes for transaction aborts. By 5 + * convention, bit0 is copied to TEXASR[56] (IBM bit 7) which is set if 6 + * the failure is persistent. PAPR saves 0xff-0xe0 for the hypervisor. 7 + */ 8 + #define TM_CAUSE_PERSISTENT 0x01 9 + #define TM_CAUSE_RESCHED 0xde 10 + #define TM_CAUSE_TLBI 0xdc 11 + #define TM_CAUSE_FAC_UNAV 0xda 12 + #define TM_CAUSE_SYSCALL 0xd8 /* future use */ 13 + #define TM_CAUSE_MISC 0xd6 /* future use */ 14 + #define TM_CAUSE_SIGNAL 0xd4 15 + #define TM_CAUSE_ALIGNMENT 0xd2 16 + #define TM_CAUSE_EMULATE 0xd0 17 + 18 + #endif