Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

reset: starfive: jh71x0: Use 32bit I/O on 32bit registers

We currently use 64bit I/O on the 32bit registers. This works because
there are an even number of assert and status registers, so they're only
ever accessed in pairs on 64bit boundaries.

There are however other reset controllers for audio and video on the
JH7100 SoC with only one status register that isn't 64bit aligned so
64bit I/O results in an unaligned access exception.

Switch to 32bit I/O in preparation for supporting these resets too.

Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

authored by

Emil Renner Berthing and committed by
Conor Dooley
b6d7406c 0333103e

+23 -24
+7 -7
drivers/reset/starfive/reset-starfive-jh7100.c
··· 30 30 * lines don't though, so store the expected value of the status registers when 31 31 * all lines are asserted. 32 32 */ 33 - static const u64 jh7100_reset_asserted[2] = { 33 + static const u32 jh7100_reset_asserted[4] = { 34 34 /* STATUS0 */ 35 - BIT_ULL_MASK(JH7100_RST_U74) | 36 - BIT_ULL_MASK(JH7100_RST_VP6_DRESET) | 37 - BIT_ULL_MASK(JH7100_RST_VP6_BRESET) | 35 + BIT(JH7100_RST_U74 % 32) | 36 + BIT(JH7100_RST_VP6_DRESET % 32) | 37 + BIT(JH7100_RST_VP6_BRESET % 32), 38 38 /* STATUS1 */ 39 - BIT_ULL_MASK(JH7100_RST_HIFI4_DRESET) | 40 - BIT_ULL_MASK(JH7100_RST_HIFI4_BRESET), 39 + BIT(JH7100_RST_HIFI4_DRESET % 32) | 40 + BIT(JH7100_RST_HIFI4_BRESET % 32), 41 41 /* STATUS2 */ 42 - BIT_ULL_MASK(JH7100_RST_E24) | 42 + BIT(JH7100_RST_E24 % 32), 43 43 /* STATUS3 */ 44 44 0, 45 45 };
+15 -16
drivers/reset/starfive/reset-starfive-jh71x0.c
··· 8 8 #include <linux/bitmap.h> 9 9 #include <linux/device.h> 10 10 #include <linux/io.h> 11 - #include <linux/io-64-nonatomic-lo-hi.h> 12 11 #include <linux/iopoll.h> 13 12 #include <linux/reset-controller.h> 14 13 #include <linux/spinlock.h> ··· 20 21 spinlock_t lock; 21 22 void __iomem *assert; 22 23 void __iomem *status; 23 - const u64 *asserted; 24 + const u32 *asserted; 24 25 }; 25 26 26 27 static inline struct jh71x0_reset * ··· 33 34 unsigned long id, bool assert) 34 35 { 35 36 struct jh71x0_reset *data = jh71x0_reset_from(rcdev); 36 - unsigned long offset = BIT_ULL_WORD(id); 37 - u64 mask = BIT_ULL_MASK(id); 38 - void __iomem *reg_assert = data->assert + offset * sizeof(u64); 39 - void __iomem *reg_status = data->status + offset * sizeof(u64); 40 - u64 done = data->asserted ? data->asserted[offset] & mask : 0; 41 - u64 value; 37 + unsigned long offset = id / 32; 38 + u32 mask = BIT(id % 32); 39 + void __iomem *reg_assert = data->assert + offset * sizeof(u32); 40 + void __iomem *reg_status = data->status + offset * sizeof(u32); 41 + u32 done = data->asserted ? data->asserted[offset] & mask : 0; 42 + u32 value; 42 43 unsigned long flags; 43 44 int ret; 44 45 ··· 47 48 48 49 spin_lock_irqsave(&data->lock, flags); 49 50 50 - value = readq(reg_assert); 51 + value = readl(reg_assert); 51 52 if (assert) 52 53 value |= mask; 53 54 else 54 55 value &= ~mask; 55 - writeq(value, reg_assert); 56 + writel(value, reg_assert); 56 57 57 58 /* if the associated clock is gated, deasserting might otherwise hang forever */ 58 - ret = readq_poll_timeout_atomic(reg_status, value, (value & mask) == done, 0, 1000); 59 + ret = readl_poll_timeout_atomic(reg_status, value, (value & mask) == done, 0, 1000); 59 60 60 61 spin_unlock_irqrestore(&data->lock, flags); 61 62 return ret; ··· 89 90 unsigned long id) 90 91 { 91 92 struct jh71x0_reset *data = jh71x0_reset_from(rcdev); 92 - unsigned long offset = BIT_ULL_WORD(id); 93 - u64 mask = BIT_ULL_MASK(id); 94 - void __iomem *reg_status = data->status + offset * sizeof(u64); 95 - u64 value = readq(reg_status); 93 + unsigned long offset = id / 32; 94 + u32 mask = BIT(id % 32); 95 + void __iomem *reg_status = data->status + offset * sizeof(u32); 96 + u32 value = readl(reg_status); 96 97 97 98 return !((value ^ data->asserted[offset]) & mask); 98 99 } ··· 106 107 107 108 int reset_starfive_jh71x0_register(struct device *dev, struct device_node *of_node, 108 109 void __iomem *assert, void __iomem *status, 109 - const u64 *asserted, unsigned int nr_resets, 110 + const u32 *asserted, unsigned int nr_resets, 110 111 struct module *owner) 111 112 { 112 113 struct jh71x0_reset *data;
+1 -1
drivers/reset/starfive/reset-starfive-jh71x0.h
··· 8 8 9 9 int reset_starfive_jh71x0_register(struct device *dev, struct device_node *of_node, 10 10 void __iomem *assert, void __iomem *status, 11 - const u64 *asserted, unsigned int nr_resets, 11 + const u32 *asserted, unsigned int nr_resets, 12 12 struct module *owner); 13 13 14 14 #endif /* __RESET_STARFIVE_JH71X0_H */