tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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ARM: omap1: Switch to use MULTI_IRQ

This allows us to get a bit further with SPARSE_IRQ and
MULTIARCH support.

Note that we now also rename omap_irq_flags to omap_l2_irq
as that's the omap_irq_flags naming is confusing. It just
contains the interrupt number for the l2 irq.

Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Tony Lindgren b694331c 55b44774

+53 -47
+1
arch/arm/Kconfig
··· 752 752 select GENERIC_IRQ_CHIP 753 753 select HAVE_IDE 754 754 select IRQ_DOMAIN 755 + select MULTI_IRQ_HANDLER 755 756 select NEED_MACH_IO_H if PCCARD 756 757 select NEED_MACH_MEMORY_H 757 758 help
+1
arch/arm/mach-omap1/board-ams-delta.c
··· 626 626 .map_io = ams_delta_map_io, 627 627 .init_early = omap1_init_early, 628 628 .init_irq = omap1_init_irq, 629 + .handle_irq = omap1_handle_irq, 629 630 .init_machine = ams_delta_init, 630 631 .init_late = ams_delta_init_late, 631 632 .init_time = omap1_timer_init,
+1
arch/arm/mach-omap1/board-fsample.c
··· 362 362 .map_io = omap_fsample_map_io, 363 363 .init_early = omap1_init_early, 364 364 .init_irq = omap1_init_irq, 365 + .handle_irq = omap1_handle_irq, 365 366 .init_machine = omap_fsample_init, 366 367 .init_late = omap1_init_late, 367 368 .init_time = omap1_timer_init,
+1
arch/arm/mach-omap1/board-generic.c
··· 82 82 .map_io = omap16xx_map_io, 83 83 .init_early = omap1_init_early, 84 84 .init_irq = omap1_init_irq, 85 + .handle_irq = omap1_handle_irq, 85 86 .init_machine = omap_generic_init, 86 87 .init_late = omap1_init_late, 87 88 .init_time = omap1_timer_init,
+1
arch/arm/mach-omap1/board-h2.c
··· 426 426 .map_io = omap16xx_map_io, 427 427 .init_early = omap1_init_early, 428 428 .init_irq = omap1_init_irq, 429 + .handle_irq = omap1_handle_irq, 429 430 .init_machine = h2_init, 430 431 .init_late = omap1_init_late, 431 432 .init_time = omap1_timer_init,
+1
arch/arm/mach-omap1/board-h3.c
··· 452 452 .map_io = omap16xx_map_io, 453 453 .init_early = omap1_init_early, 454 454 .init_irq = omap1_init_irq, 455 + .handle_irq = omap1_handle_irq, 455 456 .init_machine = h3_init, 456 457 .init_late = omap1_init_late, 457 458 .init_time = omap1_timer_init,
+1
arch/arm/mach-omap1/board-htcherald.c
··· 601 601 .map_io = htcherald_map_io, 602 602 .init_early = omap1_init_early, 603 603 .init_irq = omap1_init_irq, 604 + .handle_irq = omap1_handle_irq, 604 605 .init_machine = htcherald_init, 605 606 .init_late = omap1_init_late, 606 607 .init_time = omap1_timer_init,
+1
arch/arm/mach-omap1/board-innovator.c
··· 456 456 .map_io = innovator_map_io, 457 457 .init_early = omap1_init_early, 458 458 .init_irq = omap1_init_irq, 459 + .handle_irq = omap1_handle_irq, 459 460 .init_machine = innovator_init, 460 461 .init_late = omap1_init_late, 461 462 .init_time = omap1_timer_init,
+1
arch/arm/mach-omap1/board-nokia770.c
··· 294 294 .map_io = omap16xx_map_io, 295 295 .init_early = omap1_init_early, 296 296 .init_irq = omap1_init_irq, 297 + .handle_irq = omap1_handle_irq, 297 298 .init_machine = omap_nokia770_init, 298 299 .init_late = omap1_init_late, 299 300 .init_time = omap1_timer_init,
+1
arch/arm/mach-omap1/board-osk.c
··· 610 610 .map_io = omap16xx_map_io, 611 611 .init_early = omap1_init_early, 612 612 .init_irq = omap1_init_irq, 613 + .handle_irq = omap1_handle_irq, 613 614 .init_machine = osk_init, 614 615 .init_late = omap1_init_late, 615 616 .init_time = omap1_timer_init,
+1
arch/arm/mach-omap1/board-palmte.c
··· 235 235 .map_io = omap15xx_map_io, 236 236 .init_early = omap1_init_early, 237 237 .init_irq = omap1_init_irq, 238 + .handle_irq = omap1_handle_irq, 238 239 .init_machine = omap_palmte_init, 239 240 .init_late = omap1_init_late, 240 241 .init_time = omap1_timer_init,
+1
arch/arm/mach-omap1/board-palmtt.c
··· 282 282 .map_io = omap15xx_map_io, 283 283 .init_early = omap1_init_early, 284 284 .init_irq = omap1_init_irq, 285 + .handle_irq = omap1_handle_irq, 285 286 .init_machine = omap_palmtt_init, 286 287 .init_late = omap1_init_late, 287 288 .init_time = omap1_timer_init,
+1
arch/arm/mach-omap1/board-palmz71.c
··· 297 297 .map_io = omap15xx_map_io, 298 298 .init_early = omap1_init_early, 299 299 .init_irq = omap1_init_irq, 300 + .handle_irq = omap1_handle_irq, 300 301 .init_machine = omap_palmz71_init, 301 302 .init_late = omap1_init_late, 302 303 .init_time = omap1_timer_init,
+1
arch/arm/mach-omap1/board-perseus2.c
··· 324 324 .map_io = omap_perseus2_map_io, 325 325 .init_early = omap1_init_early, 326 326 .init_irq = omap1_init_irq, 327 + .handle_irq = omap1_handle_irq, 327 328 .init_machine = omap_perseus2_init, 328 329 .init_late = omap1_init_late, 329 330 .init_time = omap1_timer_init,
+1
arch/arm/mach-omap1/board-sx1.c
··· 343 343 .map_io = omap15xx_map_io, 344 344 .init_early = omap1_init_early, 345 345 .init_irq = omap1_init_irq, 346 + .handle_irq = omap1_handle_irq, 346 347 .init_machine = omap_sx1_init, 347 348 .init_late = omap1_init_late, 348 349 .init_time = omap1_timer_init,
+1
arch/arm/mach-omap1/board-voiceblue.c
··· 288 288 .map_io = omap15xx_map_io, 289 289 .init_early = omap1_init_early, 290 290 .init_irq = omap1_init_irq, 291 + .handle_irq = omap1_handle_irq, 291 292 .init_machine = voiceblue_init, 292 293 .init_late = omap1_init_late, 293 294 .init_time = omap1_timer_init,
+3 -2
arch/arm/mach-omap1/common.h
··· 30 30 #include <linux/i2c-omap.h> 31 31 #include <linux/reboot.h> 32 32 33 + #include <asm/exception.h> 34 + 33 35 #include <plat/i2c.h> 34 36 35 37 #include <mach/irqs.h> ··· 75 73 76 74 void omap1_init_early(void); 77 75 void omap1_init_irq(void); 76 + void __exception_irq_entry omap1_handle_irq(struct pt_regs *regs); 78 77 void omap1_init_late(void); 79 78 void omap1_restart(enum reboot_mode, const char *); 80 79 ··· 93 90 return -ENODEV; 94 91 } 95 92 #endif 96 - 97 - extern u32 omap_irq_flags; 98 93 99 94 #ifdef CONFIG_ARCH_OMAP16XX 100 95 extern int ocpi_enable(void);
-39
arch/arm/mach-omap1/include/mach/entry-macro.S
··· 1 - /* 2 - * arch/arm/mach-omap1/include/mach/entry-macro.S 3 - * 4 - * Low-level IRQ helper macros for OMAP-based platforms 5 - * 6 - * Copyright (C) 2009 Texas Instruments 7 - * 8 - * This file is licensed under the terms of the GNU General Public 9 - * License version 2. This program is licensed "as is" without any 10 - * warranty of any kind, whether express or implied. 11 - */ 12 - 13 - #include <mach/hardware.h> 14 - #include <mach/irqs.h> 15 - 16 - .macro get_irqnr_preamble, base, tmp 17 - .endm 18 - 19 - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 20 - ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE) 21 - ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET] 22 - ldr \tmp, [\base, #IRQ_MIR_REG_OFFSET] 23 - mov \irqstat, #0xffffffff 24 - bic \tmp, \irqstat, \tmp 25 - tst \irqnr, \tmp 26 - beq 1510f 27 - 28 - ldr \irqnr, [\base, #IRQ_SIR_FIQ_REG_OFFSET] 29 - ldr \tmp, =omap_irq_flags @ irq flags address 30 - ldr \tmp, [\tmp, #0] @ irq flags value 31 - cmp \irqnr, #0 32 - ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] 33 - cmpeq \irqnr, \tmp 34 - ldreq \base, =OMAP1_IO_ADDRESS(OMAP_IH2_BASE) 35 - ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] 36 - addeqs \irqnr, \irqnr, #32 37 - 1510: 38 - .endm 39 -
+34 -6
arch/arm/mach-omap1/irq.c
··· 43 43 #include <linux/io.h> 44 44 45 45 #include <asm/irq.h> 46 + #include <asm/exception.h> 46 47 #include <asm/mach/irq.h> 47 48 48 49 #include "soc.h" ··· 62 61 unsigned long wake_enable; 63 62 }; 64 63 65 - u32 omap_irq_flags; 64 + static u32 omap_l2_irq; 66 65 static unsigned int irq_bank_count; 67 66 static struct omap_irq_bank *irq_banks; 68 67 static struct irq_domain *domain; ··· 141 140 }; 142 141 #endif 143 142 143 + asmlinkage void __exception_irq_entry omap1_handle_irq(struct pt_regs *regs) 144 + { 145 + void __iomem *l1 = irq_banks[0].va; 146 + void __iomem *l2 = irq_banks[1].va; 147 + u32 irqnr; 148 + 149 + do { 150 + irqnr = readl_relaxed(l1 + IRQ_ITR_REG_OFFSET); 151 + irqnr &= ~(readl_relaxed(l1 + IRQ_MIR_REG_OFFSET) & 0xffffffff); 152 + if (!irqnr) 153 + break; 154 + 155 + irqnr = readl_relaxed(l1 + IRQ_SIR_FIQ_REG_OFFSET); 156 + if (irqnr) 157 + goto irq; 158 + 159 + irqnr = readl_relaxed(l1 + IRQ_SIR_IRQ_REG_OFFSET); 160 + if (irqnr == omap_l2_irq) { 161 + irqnr = readl_relaxed(l2 + IRQ_SIR_IRQ_REG_OFFSET); 162 + if (irqnr) 163 + irqnr += 32; 164 + } 165 + irq: 166 + if (irqnr) 167 + handle_domain_irq(domain, irqnr, regs); 168 + else 169 + break; 170 + } while (irqnr); 171 + } 172 + 144 173 static __init void 145 174 omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) 146 175 { ··· 198 167 199 168 #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 200 169 if (cpu_is_omap7xx()) { 201 - omap_irq_flags = INT_7XX_IH2_IRQ; 202 170 irq_banks = omap7xx_irq_banks; 203 171 irq_bank_count = ARRAY_SIZE(omap7xx_irq_banks); 204 172 } 205 173 #endif 206 174 #ifdef CONFIG_ARCH_OMAP15XX 207 175 if (cpu_is_omap1510()) { 208 - omap_irq_flags = INT_1510_IH2_IRQ; 209 176 irq_banks = omap1510_irq_banks; 210 177 irq_bank_count = ARRAY_SIZE(omap1510_irq_banks); 211 178 } 212 179 if (cpu_is_omap310()) { 213 - omap_irq_flags = INT_1510_IH2_IRQ; 214 180 irq_banks = omap310_irq_banks; 215 181 irq_bank_count = ARRAY_SIZE(omap310_irq_banks); 216 182 } 217 183 #endif 218 184 #if defined(CONFIG_ARCH_OMAP16XX) 219 185 if (cpu_is_omap16xx()) { 220 - omap_irq_flags = INT_1510_IH2_IRQ; 221 186 irq_banks = omap1610_irq_banks; 222 187 irq_bank_count = ARRAY_SIZE(omap1610_irq_banks); 223 188 } ··· 232 205 pr_warn("Couldn't allocate IRQ numbers\n"); 233 206 irq_base = 0; 234 207 } 208 + omap_l2_irq = cpu_is_omap7xx() ? irq_base + 1 : irq_base; 235 209 236 210 domain = irq_domain_add_legacy(NULL, nr_irqs, irq_base, 0, 237 211 &irq_domain_simple_ops, NULL); ··· 267 239 } 268 240 269 241 /* Unmask level 2 handler */ 270 - d = irq_get_irq_data(omap_irq_flags); 242 + d = irq_get_irq_data(irq_find_mapping(domain, omap_l2_irq)); 271 243 if (d) { 272 244 ct = irq_data_get_chip_type(d); 273 245 ct->chip.irq_unmask(d);