Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'stm32-dt-for-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT updates for v5.9, round 1

Highlights:
----------

MCU part:
-Enable stmpe811 on stm32f429
-Enable l3gd20-gyro on stm32f429
-Enable panel-ilitek-9341 on stm32f429
-Fixes for yaml validation (leds, nodes names,
remove useless bindings ...)
-Add stm32xxx compatibles for syscon nodes

MPU part:
-Add support for usb role switch to dwc2
-Add stm32xxx compatibles for syscon nodes
-Update uart4 pin configuration for low power mode
used by dkx and ed1 ST boards
-Fix uart nodes ordering and uart7_pins_a comments
-Add the support of uart instances available on STM32MP157 boards:
- usart3 on stm32mp157c-ev1, stm32mp157a-dk1, and stm32mp157c-dk2
- uart7 on stm32mp157a-dk1 and stm32mp157c-dk2
- usart2 on stm32mp157c-dk2
-Configure I2C5 on stm32mp15 DK boards

* tag 'stm32-dt-for-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (38 commits)
ARM: dts: stm32: enable usb-role-switch on USB OTG on stm32mp15xx-dkx
ARM: dts: stm32: Add compatibles for syscon for stm32mp151
ARM: dts: stm32: Add compatibles for syscon for stm32h743
ARM: dts: stm32: Add compatibles for syscon for stm32f746
ARM: dts: stm32: Add compatibles for syscon for stm32f426
dt-bindings: arm: stm32: Add compatibles for syscon nodes
ARM: dts: stm32: Fix spi4 pins in stm32mp15-pinctrl
ARM: dts: stm32: configure i2c5 support on stm32mp15xx-dkx
ARM: dts: stm32: add usart2 node to stm32mp157c-dk2
ARM: dts: stm32: add uart7 support to stm32mp15xx-dkx boards
ARM: dts: stm32: add usart3 node to stm32mp157c-ev1
ARM: dts: stm32: add usart3 node to stm32mp15xx-dkx boards
ARM: dts: stm32: add usart2, usart3 and uart7 pins in stm32mp15-pinctrl
ARM: dts: stm32: cosmetic updates in stm32mp15-pinctrl
ARM: dts: stm32: fix uart7_pins_a comments in stm32mp15-pinctrl
ARM: dts: stm32: fix uart nodes ordering in stm32mp15-pinctrl
ARM: dts: stm32: Update UART4 pin states on stm32mp15xx-dkx
ARM: dts: stm32: Update pin states for uart4 on stm32mp157c-ed1
ARM: dts: stm32: update uart4 pin configuration for low power on stm32mp157
dt-bindings: usb: dwc2: Fix issues for stm32mp15x SoC
...

Link: https://lore.kernel.org/r/8a9bb27b-fc08-126a-11f7-01354e8577e1@st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

+523 -107
+13 -1
Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml
··· 16 16 - items: 17 17 - enum: 18 18 - st,stm32mp157-syscfg 19 + - st,stm32mp151-pwr-mcu 20 + - st,stm32-syscfg 21 + - st,stm32-power-config 19 22 - const: syscon 20 23 21 24 reg: ··· 30 27 required: 31 28 - compatible 32 29 - reg 33 - - clocks 30 + 31 + if: 32 + properties: 33 + compatible: 34 + contains: 35 + enum: 36 + - st,stm32mp157-syscfg 37 + then: 38 + required: 39 + - clocks 34 40 35 41 additionalProperties: false 36 42
+4 -2
Documentation/devicetree/bindings/usb/dwc2.yaml
··· 44 44 - const: st,stm32f4x9-hsotg 45 45 - const: st,stm32f7-hsotg 46 46 - const: st,stm32mp15-fsotg 47 - - const: st,stm32mp15-hsotg 47 + - items: 48 + - const: st,stm32mp15-hsotg 49 + - const: snps,dwc2 48 50 - const: samsung,s3c6400-hsotg 49 51 50 52 reg: ··· 95 93 vusb_a-supply: 96 94 description: phandle to voltage regulator of analog section. 97 95 98 - vusb33d-supply: 96 + usb33d-supply: 99 97 description: reference to the VBUS and ID sensing comparators supply, in 100 98 order to perform OTG operation, used on STM32MP15 SoCs. 101 99
+5 -5
arch/arm/boot/dts/stm32429i-eval.dts
··· 104 104 105 105 leds { 106 106 compatible = "gpio-leds"; 107 - green { 107 + led-green { 108 108 gpios = <&gpiog 6 1>; 109 109 linux,default-trigger = "heartbeat"; 110 110 }; 111 - orange { 111 + led-orange { 112 112 gpios = <&gpiog 7 1>; 113 113 }; 114 - red { 114 + led-red { 115 115 gpios = <&gpiog 10 1>; 116 116 }; 117 - blue { 117 + led-blue { 118 118 gpios = <&gpiog 12 1>; 119 119 }; 120 120 }; ··· 240 240 241 241 &ltdc { 242 242 status = "okay"; 243 - pinctrl-0 = <&ltdc_pins>; 243 + pinctrl-0 = <&ltdc_pins_a>; 244 244 pinctrl-names = "default"; 245 245 246 246 port {
+4 -4
arch/arm/boot/dts/stm32746g-eval.dts
··· 66 66 67 67 leds { 68 68 compatible = "gpio-leds"; 69 - green { 69 + led-green { 70 70 gpios = <&gpiof 10 1>; 71 71 linux,default-trigger = "heartbeat"; 72 72 }; 73 - orange { 73 + led-orange { 74 74 gpios = <&stmfx_pinctrl 17 1>; 75 75 }; 76 - red { 76 + led-red { 77 77 gpios = <&gpiob 7 1>; 78 78 }; 79 - blue { 79 + led-blue { 80 80 gpios = <&stmfx_pinctrl 19 1>; 81 81 }; 82 82 };
+82 -3
arch/arm/boot/dts/stm32f4-pinctrl.dtsi
··· 257 257 }; 258 258 }; 259 259 260 - pwm1_pins: pwm-1 { 260 + pwm1_pins: pwm1-0 { 261 261 pins { 262 262 pinmux = <STM32_PINMUX('A', 8, AF1)>, /* TIM1_CH1 */ 263 263 <STM32_PINMUX('B', 13, AF1)>, /* TIM1_CH1N */ ··· 265 265 }; 266 266 }; 267 267 268 - pwm3_pins: pwm-3 { 268 + pwm3_pins: pwm3-0 { 269 269 pins { 270 270 pinmux = <STM32_PINMUX('B', 4, AF2)>, /* TIM3_CH1 */ 271 271 <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */ ··· 282 282 }; 283 283 }; 284 284 285 - ltdc_pins: ltdc-0 { 285 + ltdc_pins_a: ltdc-0 { 286 286 pins { 287 287 pinmux = <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */ 288 288 <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */ ··· 313 313 <STM32_PINMUX('K', 6, AF14)>, /* LCD_B7 */ 314 314 <STM32_PINMUX('K', 7, AF14)>; /* LCD_DE */ 315 315 slew-rate = <2>; 316 + }; 317 + }; 318 + 319 + ltdc_pins_b: ltdc-1 { 320 + pins { 321 + pinmux = <STM32_PINMUX('C', 6, AF14)>, 322 + /* LCD_HSYNC */ 323 + <STM32_PINMUX('A', 4, AF14)>, 324 + /* LCD_VSYNC */ 325 + <STM32_PINMUX('G', 7, AF14)>, 326 + /* LCD_CLK */ 327 + <STM32_PINMUX('C', 10, AF14)>, 328 + /* LCD_R2 */ 329 + <STM32_PINMUX('B', 0, AF9)>, 330 + /* LCD_R3 */ 331 + <STM32_PINMUX('A', 11, AF14)>, 332 + /* LCD_R4 */ 333 + <STM32_PINMUX('A', 12, AF14)>, 334 + /* LCD_R5 */ 335 + <STM32_PINMUX('B', 1, AF9)>, 336 + /* LCD_R6*/ 337 + <STM32_PINMUX('G', 6, AF14)>, 338 + /* LCD_R7 */ 339 + <STM32_PINMUX('A', 6, AF14)>, 340 + /* LCD_G2 */ 341 + <STM32_PINMUX('G', 10, AF9)>, 342 + /* LCD_G3 */ 343 + <STM32_PINMUX('B', 10, AF14)>, 344 + /* LCD_G4 */ 345 + <STM32_PINMUX('D', 6, AF14)>, 346 + /* LCD_B2 */ 347 + <STM32_PINMUX('G', 11, AF14)>, 348 + /* LCD_B3*/ 349 + <STM32_PINMUX('B', 11, AF14)>, 350 + /* LCD_G5 */ 351 + <STM32_PINMUX('C', 7, AF14)>, 352 + /* LCD_G6 */ 353 + <STM32_PINMUX('D', 3, AF14)>, 354 + /* LCD_G7 */ 355 + <STM32_PINMUX('G', 12, AF9)>, 356 + /* LCD_B4 */ 357 + <STM32_PINMUX('A', 3, AF14)>, 358 + /* LCD_B5 */ 359 + <STM32_PINMUX('B', 8, AF14)>, 360 + /* LCD_B6 */ 361 + <STM32_PINMUX('B', 9, AF14)>, 362 + /* LCD_B7 */ 363 + <STM32_PINMUX('F', 10, AF14)>; 364 + /* LCD_DE */ 365 + slew-rate = <2>; 366 + }; 367 + }; 368 + 369 + spi5_pins: spi5-0 { 370 + pins1 { 371 + pinmux = <STM32_PINMUX('F', 7, AF5)>, 372 + /* SPI5_CLK */ 373 + <STM32_PINMUX('F', 9, AF5)>; 374 + /* SPI5_MOSI */ 375 + bias-disable; 376 + drive-push-pull; 377 + slew-rate = <0>; 378 + }; 379 + pins2 { 380 + pinmux = <STM32_PINMUX('F', 8, AF5)>; 381 + /* SPI5_MISO */ 382 + bias-disable; 383 + }; 384 + }; 385 + 386 + i2c3_pins: i2c3-0 { 387 + pins { 388 + pinmux = <STM32_PINMUX('C', 9, AF4)>, 389 + /* I2C3_SDA */ 390 + <STM32_PINMUX('A', 8, AF4)>; 391 + /* I2C3_SCL */ 392 + bias-disable; 393 + drive-open-drain; 394 + slew-rate = <3>; 316 395 }; 317 396 }; 318 397
+95 -2
arch/arm/boot/dts/stm32f429-disco.dts
··· 49 49 #include "stm32f429.dtsi" 50 50 #include "stm32f429-pinctrl.dtsi" 51 51 #include <dt-bindings/input/input.h> 52 + #include <dt-bindings/interrupt-controller/irq.h> 53 + #include <dt-bindings/gpio/gpio.h> 52 54 53 55 / { 54 56 model = "STMicroelectronics STM32F429i-DISCO board"; ··· 72 70 73 71 leds { 74 72 compatible = "gpio-leds"; 75 - red { 73 + led-red { 76 74 gpios = <&gpiog 14 0>; 77 75 }; 78 - green { 76 + led-green { 79 77 gpios = <&gpiog 13 0>; 80 78 linux,default-trigger = "heartbeat"; 81 79 }; ··· 110 108 status = "okay"; 111 109 }; 112 110 111 + &i2c3 { 112 + pinctrl-names = "default"; 113 + pinctrl-0 = <&i2c3_pins>; 114 + clock-frequency = <100000>; 115 + status = "okay"; 116 + 117 + stmpe811@41 { 118 + compatible = "st,stmpe811"; 119 + reg = <0x41>; 120 + interrupts = <15 IRQ_TYPE_EDGE_FALLING>; 121 + interrupt-parent = <&gpioa>; 122 + /* 3.25 MHz ADC clock speed */ 123 + st,adc-freq = <1>; 124 + /* 12-bit ADC */ 125 + st,mod-12b = <1>; 126 + /* internal ADC reference */ 127 + st,ref-sel = <0>; 128 + /* ADC converstion time: 80 clocks */ 129 + st,sample-time = <4>; 130 + 131 + stmpe_touchscreen { 132 + compatible = "st,stmpe-ts"; 133 + /* 8 sample average control */ 134 + st,ave-ctrl = <3>; 135 + /* 7 length fractional part in z */ 136 + st,fraction-z = <7>; 137 + /* 138 + * 50 mA typical 80 mA max touchscreen drivers 139 + * current limit value 140 + */ 141 + st,i-drive = <1>; 142 + /* 1 ms panel driver settling time */ 143 + st,settling = <3>; 144 + /* 5 ms touch detect interrupt delay */ 145 + st,touch-det-delay = <5>; 146 + }; 147 + 148 + stmpe_adc { 149 + compatible = "st,stmpe-adc"; 150 + /* forbid to use ADC channels 3-0 (touch) */ 151 + st,norequest-mask = <0x0F>; 152 + }; 153 + }; 154 + }; 155 + 156 + &ltdc { 157 + status = "okay"; 158 + pinctrl-0 = <&ltdc_pins_b>; 159 + pinctrl-names = "default"; 160 + 161 + port { 162 + ltdc_out_rgb: endpoint { 163 + remote-endpoint = <&panel_in_rgb>; 164 + }; 165 + }; 166 + }; 167 + 113 168 &rtc { 114 169 assigned-clocks = <&rcc 1 CLK_RTC>; 115 170 assigned-clock-parents = <&rcc 1 CLK_LSI>; 116 171 status = "okay"; 172 + }; 173 + 174 + &spi5 { 175 + status = "okay"; 176 + pinctrl-0 = <&spi5_pins>; 177 + pinctrl-names = "default"; 178 + #address-cells = <1>; 179 + #size-cells = <0>; 180 + cs-gpios = <&gpioc 1 GPIO_ACTIVE_LOW>, <&gpioc 2 GPIO_ACTIVE_LOW>; 181 + 182 + l3gd20: l3gd20@0 { 183 + compatible = "st,l3gd20-gyro"; 184 + spi-max-frequency = <10000000>; 185 + st,drdy-int-pin = <2>; 186 + interrupt-parent = <&gpioa>; 187 + interrupts = <1 IRQ_TYPE_EDGE_RISING>, 188 + <2 IRQ_TYPE_EDGE_RISING>; 189 + reg = <0>; 190 + status = "okay"; 191 + }; 192 + 193 + display: display@1{ 194 + /* Connect panel-ilitek-9341 to ltdc */ 195 + compatible = "st,sf-tc240t-9370-t"; 196 + reg = <1>; 197 + spi-3wire; 198 + spi-max-frequency = <10000000>; 199 + dc-gpios = <&gpiod 13 0>; 200 + port { 201 + panel_in_rgb: endpoint { 202 + remote-endpoint = <&ltdc_out_rgb>; 203 + }; 204 + }; 205 + }; 117 206 }; 118 207 119 208 &usart1 {
+18 -4
arch/arm/boot/dts/stm32f429.dtsi
··· 322 322 assigned-clock-parents = <&rcc 1 CLK_LSE>; 323 323 interrupt-parent = <&exti>; 324 324 interrupts = <17 1>; 325 - interrupt-names = "alarm"; 326 325 st,syscfg = <&pwrcfg 0x00 0x100>; 327 326 status = "disabled"; 328 327 }; ··· 396 397 <32>; 397 398 resets = <&rcc STM32F4_APB1_RESET(I2C1)>; 398 399 clocks = <&rcc 0 STM32F4_APB1_CLOCK(I2C1)>; 400 + #address-cells = <1>; 401 + #size-cells = <0>; 402 + status = "disabled"; 403 + }; 404 + 405 + i2c3: i2c@40005c00 { 406 + compatible = "st,stm32f4-i2c"; 407 + reg = <0x40005c00 0x400>; 408 + interrupts = <72>, 409 + <73>; 410 + resets = <&rcc STM32F4_APB1_RESET(I2C3)>; 411 + clocks = <&rcc 0 STM32F4_APB1_CLOCK(I2C3)>; 399 412 #address-cells = <1>; 400 413 #size-cells = <0>; 401 414 status = "disabled"; ··· 597 586 status = "disabled"; 598 587 }; 599 588 600 - syscfg: system-config@40013800 { 601 - compatible = "syscon"; 589 + syscfg: syscon@40013800 { 590 + compatible = "st,stm32-syscfg", "syscon"; 602 591 reg = <0x40013800 0x400>; 603 592 }; 604 593 ··· 671 660 reg = <0x40015000 0x400>; 672 661 interrupts = <85>; 673 662 clocks = <&rcc 0 STM32F4_APB2_CLOCK(SPI5)>; 663 + dmas = <&dma2 3 2 0x400 0x0>, 664 + <&dma2 4 2 0x400 0x0>; 665 + dma-names = "rx", "tx"; 674 666 status = "disabled"; 675 667 }; 676 668 ··· 688 674 }; 689 675 690 676 pwrcfg: power-config@40007000 { 691 - compatible = "syscon"; 677 + compatible = "st,stm32-power-config", "syscon"; 692 678 reg = <0x40007000 0x400>; 693 679 }; 694 680
+4 -4
arch/arm/boot/dts/stm32f469-disco.dts
··· 89 89 90 90 leds { 91 91 compatible = "gpio-leds"; 92 - green { 92 + led-green { 93 93 gpios = <&gpiog 6 GPIO_ACTIVE_LOW>; 94 94 linux,default-trigger = "heartbeat"; 95 95 }; 96 - orange { 96 + led-orange { 97 97 gpios = <&gpiod 4 GPIO_ACTIVE_LOW>; 98 98 }; 99 - red { 99 + led-red { 100 100 gpios = <&gpiod 5 GPIO_ACTIVE_LOW>; 101 101 }; 102 - blue { 102 + led-blue { 103 103 gpios = <&gpiok 3 GPIO_ACTIVE_LOW>; 104 104 }; 105 105 };
+3 -4
arch/arm/boot/dts/stm32f746.dtsi
··· 304 304 assigned-clock-parents = <&rcc 1 CLK_LSE>; 305 305 interrupt-parent = <&exti>; 306 306 interrupts = <17 1>; 307 - interrupt-names = "alarm"; 308 307 st,syscfg = <&pwrcfg 0x00 0x100>; 309 308 status = "disabled"; 310 309 }; ··· 495 496 status = "disabled"; 496 497 }; 497 498 498 - syscfg: system-config@40013800 { 499 - compatible = "syscon"; 499 + syscfg: syscon@40013800 { 500 + compatible = "st,stm32-syscfg", "syscon"; 500 501 reg = <0x40013800 0x400>; 501 502 }; 502 503 ··· 563 564 }; 564 565 565 566 pwrcfg: power-config@40007000 { 566 - compatible = "syscon"; 567 + compatible = "st,stm32-power-config", "syscon"; 567 568 reg = <0x40007000 0x400>; 568 569 }; 569 570
+2 -2
arch/arm/boot/dts/stm32f769-disco.dts
··· 66 66 67 67 leds { 68 68 compatible = "gpio-leds"; 69 - green { 69 + led-green { 70 70 gpios = <&gpioj 5 GPIO_ACTIVE_HIGH>; 71 71 linux,default-trigger = "heartbeat"; 72 72 }; 73 - red { 73 + led-red { 74 74 gpios = <&gpioj 13 GPIO_ACTIVE_HIGH>; 75 75 }; 76 76 };
+5 -5
arch/arm/boot/dts/stm32h743-pinctrl.dtsi
··· 163 163 #interrupt-cells = <2>; 164 164 }; 165 165 166 - i2c1_pins_a: i2c1@0 { 166 + i2c1_pins_a: i2c1-0 { 167 167 pins { 168 168 pinmux = <STM32_PINMUX('B', 6, AF4)>, /* I2C1_SCL */ 169 169 <STM32_PINMUX('B', 7, AF4)>; /* I2C1_SDA */ ··· 173 173 }; 174 174 }; 175 175 176 - ethernet_rmii: rmii@0 { 176 + ethernet_rmii: rmii-0 { 177 177 pins { 178 178 pinmux = <STM32_PINMUX('G', 11, AF11)>, 179 179 <STM32_PINMUX('G', 13, AF11)>, ··· 256 256 }; 257 257 }; 258 258 259 - usart1_pins: usart1@0 { 259 + usart1_pins: usart1-0 { 260 260 pins1 { 261 261 pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */ 262 262 bias-disable; ··· 269 269 }; 270 270 }; 271 271 272 - usart2_pins: usart2@0 { 272 + usart2_pins: usart2-0 { 273 273 pins1 { 274 274 pinmux = <STM32_PINMUX('D', 5, AF7)>; /* USART2_TX */ 275 275 bias-disable; ··· 282 282 }; 283 283 }; 284 284 285 - usbotg_hs_pins_a: usbotg-hs@0 { 285 + usbotg_hs_pins_a: usbotg-hs-0 { 286 286 pins { 287 287 pinmux = <STM32_PINMUX('H', 4, AF10)>, /* ULPI_NXT */ 288 288 <STM32_PINMUX('I', 11, AF10)>, /* ULPI_DIR> */
+3 -4
arch/arm/boot/dts/stm32h743.dtsi
··· 361 361 interrupts = <1>, <2>, <3>, <6>, <7>, <8>, <9>, <10>, <23>, <40>, <41>, <62>, <76>; 362 362 }; 363 363 364 - syscfg: system-config@58000400 { 365 - compatible = "syscon"; 364 + syscfg: syscon@58000400 { 365 + compatible = "st,stm32-syscfg", "syscon"; 366 366 reg = <0x58000400 0x400>; 367 367 }; 368 368 ··· 487 487 assigned-clock-parents = <&rcc LSE_CK>; 488 488 interrupt-parent = <&exti>; 489 489 interrupts = <17 IRQ_TYPE_EDGE_RISING>; 490 - interrupt-names = "alarm"; 491 490 st,syscfg = <&pwrcfg 0x00 0x100>; 492 491 status = "disabled"; 493 492 }; ··· 501 502 }; 502 503 503 504 pwrcfg: power-config@58024800 { 504 - compatible = "syscon"; 505 + compatible = "st,stm32-power-config", "syscon"; 505 506 reg = <0x58024800 0x400>; 506 507 }; 507 508
+216 -62
arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
··· 210 210 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */ 211 211 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */ 212 212 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */ 213 - <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */ 214 - <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */ 213 + <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */ 214 + <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */ 215 215 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */ 216 216 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */ 217 217 <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */ ··· 453 453 i2c5_pins_b: i2c5-1 { 454 454 pins { 455 455 pinmux = <STM32_PINMUX('D', 0, AF4)>, /* I2C5_SCL */ 456 - <STM32_PINMUX('D', 1, AF4)>; /* I2C5_SDA */ 456 + <STM32_PINMUX('D', 1, AF4)>; /* I2C5_SDA */ 457 457 bias-disable; 458 458 drive-open-drain; 459 459 slew-rate = <0>; ··· 463 463 i2c5_sleep_pins_b: i2c5-sleep-1 { 464 464 pins { 465 465 pinmux = <STM32_PINMUX('D', 0, ANALOG)>, /* I2C5_SCL */ 466 - <STM32_PINMUX('D', 1, ANALOG)>; /* I2C5_SDA */ 466 + <STM32_PINMUX('D', 1, ANALOG)>; /* I2C5_SDA */ 467 467 }; 468 468 }; 469 469 ··· 1072 1072 }; 1073 1073 }; 1074 1074 1075 - 1076 1075 sai2a_pins_b: sai2a-1 { 1077 1076 pins1 { 1078 1077 pinmux = <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */ ··· 1573 1574 }; 1574 1575 }; 1575 1576 1577 + uart4_pins_a: uart4-0 { 1578 + pins1 { 1579 + pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */ 1580 + bias-disable; 1581 + drive-push-pull; 1582 + slew-rate = <0>; 1583 + }; 1584 + pins2 { 1585 + pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ 1586 + bias-disable; 1587 + }; 1588 + }; 1589 + 1590 + uart4_idle_pins_a: uart4-idle-0 { 1591 + pins1 { 1592 + pinmux = <STM32_PINMUX('G', 11, ANALOG)>; /* UART4_TX */ 1593 + }; 1594 + pins2 { 1595 + pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ 1596 + bias-disable; 1597 + }; 1598 + }; 1599 + 1600 + uart4_sleep_pins_a: uart4-sleep-0 { 1601 + pins { 1602 + pinmux = <STM32_PINMUX('G', 11, ANALOG)>, /* UART4_TX */ 1603 + <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */ 1604 + }; 1605 + }; 1606 + 1607 + uart4_pins_b: uart4-1 { 1608 + pins1 { 1609 + pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */ 1610 + bias-disable; 1611 + drive-push-pull; 1612 + slew-rate = <0>; 1613 + }; 1614 + pins2 { 1615 + pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ 1616 + bias-disable; 1617 + }; 1618 + }; 1619 + 1620 + uart4_pins_c: uart4-2 { 1621 + pins1 { 1622 + pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */ 1623 + bias-disable; 1624 + drive-push-pull; 1625 + slew-rate = <0>; 1626 + }; 1627 + pins2 { 1628 + pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ 1629 + bias-disable; 1630 + }; 1631 + }; 1632 + 1633 + uart7_pins_a: uart7-0 { 1634 + pins1 { 1635 + pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */ 1636 + bias-disable; 1637 + drive-push-pull; 1638 + slew-rate = <0>; 1639 + }; 1640 + pins2 { 1641 + pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */ 1642 + <STM32_PINMUX('E', 10, AF7)>, /* UART7_CTS */ 1643 + <STM32_PINMUX('E', 9, AF7)>; /* UART7_RTS */ 1644 + bias-disable; 1645 + }; 1646 + }; 1647 + 1648 + uart7_pins_b: uart7-1 { 1649 + pins1 { 1650 + pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */ 1651 + bias-disable; 1652 + drive-push-pull; 1653 + slew-rate = <0>; 1654 + }; 1655 + pins2 { 1656 + pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */ 1657 + bias-disable; 1658 + }; 1659 + }; 1660 + 1661 + uart7_pins_c: uart7-2 { 1662 + pins1 { 1663 + pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */ 1664 + bias-disable; 1665 + drive-push-pull; 1666 + slew-rate = <0>; 1667 + }; 1668 + pins2 { 1669 + pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */ 1670 + bias-disable; 1671 + }; 1672 + }; 1673 + 1674 + uart7_idle_pins_c: uart7-idle-2 { 1675 + pins1 { 1676 + pinmux = <STM32_PINMUX('E', 8, ANALOG)>; /* UART7_TX */ 1677 + }; 1678 + pins2 { 1679 + pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */ 1680 + bias-disable; 1681 + }; 1682 + }; 1683 + 1684 + uart7_sleep_pins_c: uart7-sleep-2 { 1685 + pins { 1686 + pinmux = <STM32_PINMUX('E', 8, ANALOG)>, /* UART7_TX */ 1687 + <STM32_PINMUX('E', 7, ANALOG)>; /* UART7_RX */ 1688 + }; 1689 + }; 1690 + 1691 + uart8_pins_a: uart8-0 { 1692 + pins1 { 1693 + pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */ 1694 + bias-disable; 1695 + drive-push-pull; 1696 + slew-rate = <0>; 1697 + }; 1698 + pins2 { 1699 + pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */ 1700 + bias-disable; 1701 + }; 1702 + }; 1703 + 1704 + spi4_pins_a: spi4-0 { 1705 + pins { 1706 + pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */ 1707 + <STM32_PINMUX('E', 6, AF5)>; /* SPI4_MOSI */ 1708 + bias-disable; 1709 + drive-push-pull; 1710 + slew-rate = <1>; 1711 + }; 1712 + pins2 { 1713 + pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */ 1714 + bias-disable; 1715 + }; 1716 + }; 1717 + 1576 1718 usart2_pins_a: usart2-0 { 1577 1719 pins1 { 1578 1720 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */ ··· 1762 1622 }; 1763 1623 }; 1764 1624 1625 + usart2_pins_c: usart2-2 { 1626 + pins1 { 1627 + pinmux = <STM32_PINMUX('D', 5, AF7)>, /* USART2_TX */ 1628 + <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */ 1629 + bias-disable; 1630 + drive-push-pull; 1631 + slew-rate = <3>; 1632 + }; 1633 + pins2 { 1634 + pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */ 1635 + <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */ 1636 + bias-disable; 1637 + }; 1638 + }; 1639 + 1640 + usart2_idle_pins_c: usart2-idle-2 { 1641 + pins1 { 1642 + pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */ 1643 + <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */ 1644 + <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */ 1645 + }; 1646 + pins2 { 1647 + pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */ 1648 + bias-disable; 1649 + }; 1650 + }; 1651 + 1652 + usart2_sleep_pins_c: usart2-sleep-2 { 1653 + pins { 1654 + pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */ 1655 + <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */ 1656 + <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */ 1657 + <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */ 1658 + }; 1659 + }; 1660 + 1765 1661 usart3_pins_a: usart3-0 { 1766 1662 pins1 { 1767 1663 pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */ ··· 1811 1635 }; 1812 1636 }; 1813 1637 1814 - uart4_pins_a: uart4-0 { 1638 + usart3_pins_b: usart3-1 { 1815 1639 pins1 { 1816 - pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */ 1640 + pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */ 1641 + <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */ 1817 1642 bias-disable; 1818 1643 drive-push-pull; 1819 1644 slew-rate = <0>; 1820 1645 }; 1821 1646 pins2 { 1822 - pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ 1647 + pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */ 1648 + <STM32_PINMUX('I', 10, AF8)>; /* USART3_CTS_NSS */ 1823 1649 bias-disable; 1824 1650 }; 1825 1651 }; 1826 1652 1827 - uart4_pins_b: uart4-1 { 1653 + usart3_idle_pins_b: usart3-idle-1 { 1828 1654 pins1 { 1829 - pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */ 1830 - bias-disable; 1831 - drive-push-pull; 1832 - slew-rate = <0>; 1655 + pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ 1656 + <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */ 1657 + <STM32_PINMUX('I', 10, ANALOG)>; /* USART3_CTS_NSS */ 1833 1658 }; 1834 1659 pins2 { 1835 - pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ 1660 + pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */ 1836 1661 bias-disable; 1837 1662 }; 1838 1663 }; 1839 1664 1840 - uart4_pins_c: uart4-2 { 1665 + usart3_sleep_pins_b: usart3-sleep-1 { 1666 + pins { 1667 + pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ 1668 + <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */ 1669 + <STM32_PINMUX('I', 10, ANALOG)>, /* USART3_CTS_NSS */ 1670 + <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */ 1671 + }; 1672 + }; 1673 + 1674 + usart3_pins_c: usart3-2 { 1841 1675 pins1 { 1842 - pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */ 1676 + pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */ 1677 + <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */ 1843 1678 bias-disable; 1844 1679 drive-push-pull; 1845 1680 slew-rate = <0>; 1846 1681 }; 1847 1682 pins2 { 1848 - pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ 1683 + pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */ 1684 + <STM32_PINMUX('B', 13, AF7)>; /* USART3_CTS_NSS */ 1849 1685 bias-disable; 1850 1686 }; 1851 1687 }; 1852 1688 1853 - uart7_pins_a: uart7-0 { 1689 + usart3_idle_pins_c: usart3-idle-2 { 1854 1690 pins1 { 1855 - pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART4_TX */ 1856 - bias-disable; 1857 - drive-push-pull; 1858 - slew-rate = <0>; 1691 + pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ 1692 + <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */ 1693 + <STM32_PINMUX('B', 13, ANALOG)>; /* USART3_CTS_NSS */ 1859 1694 }; 1860 1695 pins2 { 1861 - pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART4_RX */ 1862 - <STM32_PINMUX('E', 10, AF7)>, /* UART4_CTS */ 1863 - <STM32_PINMUX('E', 9, AF7)>; /* UART4_RTS */ 1696 + pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */ 1864 1697 bias-disable; 1865 1698 }; 1866 1699 }; 1867 1700 1868 - uart7_pins_b: uart7-1 { 1869 - pins1 { 1870 - pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */ 1871 - bias-disable; 1872 - drive-push-pull; 1873 - slew-rate = <0>; 1874 - }; 1875 - pins2 { 1876 - pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */ 1877 - bias-disable; 1878 - }; 1879 - }; 1880 - 1881 - uart8_pins_a: uart8-0 { 1882 - pins1 { 1883 - pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */ 1884 - bias-disable; 1885 - drive-push-pull; 1886 - slew-rate = <0>; 1887 - }; 1888 - pins2 { 1889 - pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */ 1890 - bias-disable; 1701 + usart3_sleep_pins_c: usart3-sleep-2 { 1702 + pins { 1703 + pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ 1704 + <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */ 1705 + <STM32_PINMUX('B', 13, ANALOG)>, /* USART3_CTS_NSS */ 1706 + <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */ 1891 1707 }; 1892 1708 }; 1893 1709 ··· 1941 1773 1942 1774 pins2 { 1943 1775 pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */ 1944 - bias-disable; 1945 - }; 1946 - }; 1947 - 1948 - spi4_pins_a: spi4-0 { 1949 - pins { 1950 - pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */ 1951 - <STM32_PINMUX('E', 6, AF5)>; /* SPI4_MOSI */ 1952 - bias-disable; 1953 - drive-push-pull; 1954 - slew-rate = <1>; 1955 - }; 1956 - pins2 { 1957 - pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */ 1958 1776 bias-disable; 1959 1777 }; 1960 1778 };
+3 -1
arch/arm/boot/dts/stm32mp151.dtsi
··· 1127 1127 }; 1128 1128 1129 1129 pwr_mcu: pwr_mcu@50001014 { 1130 - compatible = "syscon"; 1130 + compatible = "st,stm32mp151-pwr-mcu", "syscon"; 1131 1131 reg = <0x50001014 0x4>; 1132 1132 }; 1133 1133 ··· 1331 1331 dma-names = "tx", "rx"; 1332 1332 clocks = <&rcc QSPI_K>; 1333 1333 resets = <&rcc QSPI_R>; 1334 + #address-cells = <1>; 1335 + #size-cells = <0>; 1334 1336 status = "disabled"; 1335 1337 }; 1336 1338
+2
arch/arm/boot/dts/stm32mp157a-dk1.dts
··· 18 18 aliases { 19 19 ethernet0 = &ethernet0; 20 20 serial0 = &uart4; 21 + serial1 = &usart3; 22 + serial2 = &uart7; 21 23 }; 22 24 23 25 chosen {
+11
arch/arm/boot/dts/stm32mp157c-dk2.dts
··· 19 19 aliases { 20 20 ethernet0 = &ethernet0; 21 21 serial0 = &uart4; 22 + serial1 = &usart3; 23 + serial2 = &uart7; 24 + serial3 = &usart2; 22 25 }; 23 26 24 27 chosen { ··· 86 83 remote-endpoint = <&dsi_in>; 87 84 }; 88 85 }; 86 + }; 87 + 88 + &usart2 { 89 + pinctrl-names = "default", "sleep", "idle"; 90 + pinctrl-0 = <&usart2_pins_c>; 91 + pinctrl-1 = <&usart2_sleep_pins_c>; 92 + pinctrl-2 = <&usart2_idle_pins_c>; 93 + status = "disabled"; 89 94 };
+3 -1
arch/arm/boot/dts/stm32mp157c-ed1.dts
··· 353 353 }; 354 354 355 355 &uart4 { 356 - pinctrl-names = "default"; 356 + pinctrl-names = "default", "sleep", "idle"; 357 357 pinctrl-0 = <&uart4_pins_a>; 358 + pinctrl-1 = <&uart4_sleep_pins_a>; 359 + pinctrl-2 = <&uart4_idle_pins_a>; 358 360 status = "okay"; 359 361 }; 360 362
+15
arch/arm/boot/dts/stm32mp157c-ev1.dts
··· 19 19 20 20 aliases { 21 21 serial0 = &uart4; 22 + serial1 = &usart3; 22 23 ethernet0 = &ethernet0; 23 24 }; 24 25 ··· 340 339 timer@11 { 341 340 status = "okay"; 342 341 }; 342 + }; 343 + 344 + &usart3 { 345 + pinctrl-names = "default", "sleep", "idle"; 346 + pinctrl-0 = <&usart3_pins_b>; 347 + pinctrl-1 = <&usart3_sleep_pins_b>; 348 + pinctrl-2 = <&usart3_idle_pins_b>; 349 + /* 350 + * HW flow control USART3_RTS is optional, and isn't default wired to 351 + * the connector. SB23 needs to be soldered in order to use it, and R77 352 + * (ETH_CLK) should be removed. 353 + */ 354 + uart-has-rtscts; 355 + status = "disabled"; 343 356 }; 344 357 345 358 &usbh_ehci {
+35 -3
arch/arm/boot/dts/stm32mp15xx-dkx.dtsi
··· 62 62 63 63 led { 64 64 compatible = "gpio-leds"; 65 - blue { 65 + led-blue { 66 66 label = "heartbeat"; 67 67 gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>; 68 68 linux,default-trigger = "heartbeat"; ··· 365 365 }; 366 366 }; 367 367 368 + &i2c5 { 369 + pinctrl-names = "default", "sleep"; 370 + pinctrl-0 = <&i2c5_pins_a>; 371 + pinctrl-1 = <&i2c5_sleep_pins_a>; 372 + i2c-scl-rising-time-ns = <185>; 373 + i2c-scl-falling-time-ns = <20>; 374 + clock-frequency = <400000>; 375 + /* spare dmas for other usage */ 376 + /delete-property/dmas; 377 + /delete-property/dma-names; 378 + status = "disabled"; 379 + }; 380 + 368 381 &i2s2 { 369 382 clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>; 370 383 clock-names = "pclk", "i2sclk", "x8k", "x11k"; ··· 597 584 }; 598 585 599 586 &uart4 { 600 - pinctrl-names = "default"; 587 + pinctrl-names = "default", "sleep", "idle"; 601 588 pinctrl-0 = <&uart4_pins_a>; 589 + pinctrl-1 = <&uart4_sleep_pins_a>; 590 + pinctrl-2 = <&uart4_idle_pins_a>; 602 591 status = "okay"; 592 + }; 593 + 594 + &uart7 { 595 + pinctrl-names = "default", "sleep", "idle"; 596 + pinctrl-0 = <&uart7_pins_c>; 597 + pinctrl-1 = <&uart7_sleep_pins_c>; 598 + pinctrl-2 = <&uart7_idle_pins_c>; 599 + status = "disabled"; 600 + }; 601 + 602 + &usart3 { 603 + pinctrl-names = "default", "sleep", "idle"; 604 + pinctrl-0 = <&usart3_pins_c>; 605 + pinctrl-1 = <&usart3_sleep_pins_c>; 606 + pinctrl-2 = <&usart3_idle_pins_c>; 607 + uart-has-rtscts; 608 + status = "disabled"; 603 609 }; 604 610 605 611 &usbh_ehci { ··· 627 595 }; 628 596 629 597 &usbotg_hs { 630 - dr_mode = "peripheral"; 631 598 phys = <&usbphyc_port1 0>; 632 599 phy-names = "usb2-phy"; 600 + usb-role-switch; 633 601 status = "okay"; 634 602 }; 635 603