tjh.dev / kernel
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MIPS: remove cpu_has_64bit_addresses

This macro is identical to CONFIG_64BIT, and using a Kconfig variable
for the only places that checks them (the ioremap implementation) will
simplify later patches in this series.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

authored by

Christoph Hellwig and committed by
Thomas Bogendoerfer b604d497 acfaaf52

+2 -17
-6
arch/mips/include/asm/cpu-features.h
··· 435 435 # ifndef cpu_has_64bit_gp_regs 436 436 # define cpu_has_64bit_gp_regs 0 437 437 # endif 438 - # ifndef cpu_has_64bit_addresses 439 - # define cpu_has_64bit_addresses 0 440 - # endif 441 438 # ifndef cpu_vmbits 442 439 # define cpu_vmbits 31 443 440 # endif ··· 452 455 # endif 453 456 # ifndef cpu_has_64bit_gp_regs 454 457 # define cpu_has_64bit_gp_regs 1 455 - # endif 456 - # ifndef cpu_has_64bit_addresses 457 - # define cpu_has_64bit_addresses 1 458 458 # endif 459 459 # ifndef cpu_vmbits 460 460 # define cpu_vmbits cpu_data[0].vmbits
+2 -2
arch/mips/include/asm/io.h
··· 166 166 167 167 #define __IS_LOW512(addr) (!((phys_addr_t)(addr) & (phys_addr_t) ~0x1fffffffULL)) 168 168 169 - if (cpu_has_64bit_addresses) { 169 + if (IS_ENABLED(CONFIG_64BIT)) { 170 170 u64 base = UNCAC_BASE; 171 171 172 172 /* ··· 275 275 276 276 #define __IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1) 277 277 278 - if (cpu_has_64bit_addresses || 278 + if (IS_ENABLED(CONFIG_64BIT) || 279 279 (__builtin_constant_p(addr) && __IS_KSEG1(addr))) 280 280 return; 281 281
-1
arch/mips/include/asm/mach-ath25/cpu-feature-overrides.h
··· 56 56 #define cpu_has_64bits 0 57 57 #define cpu_has_64bit_zero_reg 0 58 58 #define cpu_has_64bit_gp_regs 0 59 - #define cpu_has_64bit_addresses 0 60 59 61 60 #endif /* __ASM_MACH_ATH25_CPU_FEATURE_OVERRIDES_H */
-1
arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
··· 45 45 #define cpu_has_64bits 0 46 46 #define cpu_has_64bit_zero_reg 0 47 47 #define cpu_has_64bit_gp_regs 0 48 - #define cpu_has_64bit_addresses 0 49 48 50 49 #define cpu_dcache_line_size() 32 51 50 #define cpu_icache_line_size() 32
-1
arch/mips/include/asm/mach-lantiq/falcon/cpu-feature-overrides.h
··· 46 46 #define cpu_has_64bits 0 47 47 #define cpu_has_64bit_zero_reg 0 48 48 #define cpu_has_64bit_gp_regs 0 49 - #define cpu_has_64bit_addresses 0 50 49 51 50 #define cpu_dcache_line_size() 32 52 51 #define cpu_icache_line_size() 32
-1
arch/mips/include/asm/mach-ralink/mt7620/cpu-feature-overrides.h
··· 45 45 #define cpu_has_64bits 0 46 46 #define cpu_has_64bit_zero_reg 0 47 47 #define cpu_has_64bit_gp_regs 0 48 - #define cpu_has_64bit_addresses 0 49 48 50 49 #define cpu_dcache_line_size() 32 51 50 #define cpu_icache_line_size() 32
-1
arch/mips/include/asm/mach-ralink/mt7621/cpu-feature-overrides.h
··· 46 46 #define cpu_has_64bits 0 47 47 #define cpu_has_64bit_zero_reg 0 48 48 #define cpu_has_64bit_gp_regs 0 49 - #define cpu_has_64bit_addresses 0 50 49 51 50 #define cpu_dcache_line_size() 32 52 51 #define cpu_icache_line_size() 32
-1
arch/mips/include/asm/mach-ralink/rt288x/cpu-feature-overrides.h
··· 44 44 #define cpu_has_64bits 0 45 45 #define cpu_has_64bit_zero_reg 0 46 46 #define cpu_has_64bit_gp_regs 0 47 - #define cpu_has_64bit_addresses 0 48 47 49 48 #define cpu_dcache_line_size() 16 50 49 #define cpu_icache_line_size() 16
-1
arch/mips/include/asm/mach-ralink/rt305x/cpu-feature-overrides.h
··· 44 44 #define cpu_has_64bits 0 45 45 #define cpu_has_64bit_zero_reg 0 46 46 #define cpu_has_64bit_gp_regs 0 47 - #define cpu_has_64bit_addresses 0 48 47 49 48 #define cpu_dcache_line_size() 32 50 49 #define cpu_icache_line_size() 32
-1
arch/mips/include/asm/mach-ralink/rt3883/cpu-feature-overrides.h
··· 43 43 #define cpu_has_64bits 0 44 44 #define cpu_has_64bit_zero_reg 0 45 45 #define cpu_has_64bit_gp_regs 0 46 - #define cpu_has_64bit_addresses 0 47 46 48 47 #define cpu_dcache_line_size() 32 49 48 #define cpu_icache_line_size() 32
-1
arch/mips/include/asm/mach-rc32434/cpu-feature-overrides.h
··· 54 54 #define cpu_has_64bits 0 55 55 #define cpu_has_64bit_zero_reg 0 56 56 #define cpu_has_64bit_gp_regs 0 57 - #define cpu_has_64bit_addresses 0 58 57 59 58 #define cpu_has_inclusive_pcaches 0 60 59