[PATCH] hpt37x: Check the enablebits

Helps for PATA but SATA bridged devices lie and always set all the bits
so will need the error handling fixes from Tejun.

Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>

authored by Alan Cox and committed by Jeff Garzik b5bf24b9 0579e303

+16 -3
+16 -3
drivers/ata/pata_hpt37x.c
··· 25 25 #include <linux/libata.h> 26 26 27 27 #define DRV_NAME "pata_hpt37x" 28 - #define DRV_VERSION "0.5" 28 + #define DRV_VERSION "0.5.1" 29 29 30 30 struct hpt_clock { 31 31 u8 xfer_speed; ··· 453 453 { 454 454 u8 scr2, ata66; 455 455 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 456 - 456 + static const struct pci_bits hpt37x_enable_bits[] = { 457 + { 0x50, 1, 0x04, 0x04 }, 458 + { 0x54, 1, 0x04, 0x04 } 459 + }; 460 + if (!pci_test_config_bits(pdev, &hpt37x_enable_bits[ap->port_no])) 461 + return -ENOENT; 462 + 457 463 pci_read_config_byte(pdev, 0x5B, &scr2); 458 464 pci_write_config_byte(pdev, 0x5B, scr2 & ~0x01); 459 465 /* Cable register now active */ ··· 494 488 495 489 static int hpt374_pre_reset(struct ata_port *ap) 496 490 { 491 + static const struct pci_bits hpt37x_enable_bits[] = { 492 + { 0x50, 1, 0x04, 0x04 }, 493 + { 0x54, 1, 0x04, 0x04 } 494 + }; 497 495 u16 mcr3, mcr6; 498 496 u8 ata66; 499 - 500 497 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 498 + 499 + if (!pci_test_config_bits(pdev, &hpt37x_enable_bits[ap->port_no])) 500 + return -ENOENT; 501 + 501 502 /* Do the extra channel work */ 502 503 pci_read_config_word(pdev, 0x52, &mcr3); 503 504 pci_read_config_word(pdev, 0x56, &mcr6);