Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

gpu: nova-core: gsp: replace firmware version with "bindings" alias

We have an "bindings" alias to avoid having to mention the firmware
version again and again, and limit the diff when upgrading the firmware.
Use it where we neglected to.

Fixes: eaf0989c77e4 ("gpu: nova-core: Add bindings required by GSP sequencer")
Reviewed-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Joel Fernandes <joelagnelf@nvidia.com>
Acked-by: Danilo Krummrich <dakr@kernel.org>
Link: https://patch.msgid.link/20251216-nova-fixes-v3-4-c7469a71f7c4@nvidia.com
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>

+29 -29
+29 -29
drivers/gpu/nova-core/gsp/fw.rs
··· 141 141 // are valid. 142 142 unsafe impl FromBytes for GspFwWprMeta {} 143 143 144 - type GspFwWprMetaBootResumeInfo = r570_144::GspFwWprMeta__bindgen_ty_1; 145 - type GspFwWprMetaBootInfo = r570_144::GspFwWprMeta__bindgen_ty_1__bindgen_ty_1; 144 + type GspFwWprMetaBootResumeInfo = bindings::GspFwWprMeta__bindgen_ty_1; 145 + type GspFwWprMetaBootInfo = bindings::GspFwWprMeta__bindgen_ty_1__bindgen_ty_1; 146 146 147 147 impl GspFwWprMeta { 148 148 /// Fill in and return a `GspFwWprMeta` suitable for booting `gsp_firmware` using the ··· 150 150 pub(crate) fn new(gsp_firmware: &GspFirmware, fb_layout: &FbLayout) -> Self { 151 151 Self(bindings::GspFwWprMeta { 152 152 // CAST: we want to store the bits of `GSP_FW_WPR_META_MAGIC` unmodified. 153 - magic: r570_144::GSP_FW_WPR_META_MAGIC as u64, 154 - revision: u64::from(r570_144::GSP_FW_WPR_META_REVISION), 153 + magic: bindings::GSP_FW_WPR_META_MAGIC as u64, 154 + revision: u64::from(bindings::GSP_FW_WPR_META_REVISION), 155 155 sysmemAddrOfRadix3Elf: gsp_firmware.radix3_dma_handle(), 156 156 sizeOfRadix3Elf: u64::from_safe_cast(gsp_firmware.size), 157 157 sysmemAddrOfBootloader: gsp_firmware.bootloader.ucode.dma_handle(), ··· 315 315 #[repr(u32)] 316 316 pub(crate) enum SeqBufOpcode { 317 317 // Core operation opcodes 318 - CoreReset = r570_144::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_CORE_RESET, 319 - CoreResume = r570_144::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_CORE_RESUME, 320 - CoreStart = r570_144::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_CORE_START, 321 - CoreWaitForHalt = r570_144::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_CORE_WAIT_FOR_HALT, 318 + CoreReset = bindings::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_CORE_RESET, 319 + CoreResume = bindings::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_CORE_RESUME, 320 + CoreStart = bindings::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_CORE_START, 321 + CoreWaitForHalt = bindings::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_CORE_WAIT_FOR_HALT, 322 322 323 323 // Delay opcode 324 - DelayUs = r570_144::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_DELAY_US, 324 + DelayUs = bindings::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_DELAY_US, 325 325 326 326 // Register operation opcodes 327 - RegModify = r570_144::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_REG_MODIFY, 328 - RegPoll = r570_144::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_REG_POLL, 329 - RegStore = r570_144::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_REG_STORE, 330 - RegWrite = r570_144::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_REG_WRITE, 327 + RegModify = bindings::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_REG_MODIFY, 328 + RegPoll = bindings::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_REG_POLL, 329 + RegStore = bindings::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_REG_STORE, 330 + RegWrite = bindings::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_REG_WRITE, 331 331 } 332 332 333 333 impl fmt::Display for SeqBufOpcode { ··· 351 351 352 352 fn try_from(value: u32) -> Result<SeqBufOpcode> { 353 353 match value { 354 - r570_144::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_CORE_RESET => { 354 + bindings::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_CORE_RESET => { 355 355 Ok(SeqBufOpcode::CoreReset) 356 356 } 357 - r570_144::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_CORE_RESUME => { 357 + bindings::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_CORE_RESUME => { 358 358 Ok(SeqBufOpcode::CoreResume) 359 359 } 360 - r570_144::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_CORE_START => { 360 + bindings::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_CORE_START => { 361 361 Ok(SeqBufOpcode::CoreStart) 362 362 } 363 - r570_144::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_CORE_WAIT_FOR_HALT => { 363 + bindings::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_CORE_WAIT_FOR_HALT => { 364 364 Ok(SeqBufOpcode::CoreWaitForHalt) 365 365 } 366 - r570_144::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_DELAY_US => Ok(SeqBufOpcode::DelayUs), 367 - r570_144::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_REG_MODIFY => { 366 + bindings::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_DELAY_US => Ok(SeqBufOpcode::DelayUs), 367 + bindings::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_REG_MODIFY => { 368 368 Ok(SeqBufOpcode::RegModify) 369 369 } 370 - r570_144::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_REG_POLL => Ok(SeqBufOpcode::RegPoll), 371 - r570_144::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_REG_STORE => Ok(SeqBufOpcode::RegStore), 372 - r570_144::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_REG_WRITE => Ok(SeqBufOpcode::RegWrite), 370 + bindings::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_REG_POLL => Ok(SeqBufOpcode::RegPoll), 371 + bindings::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_REG_STORE => Ok(SeqBufOpcode::RegStore), 372 + bindings::GSP_SEQ_BUF_OPCODE_GSP_SEQ_BUF_OPCODE_REG_WRITE => Ok(SeqBufOpcode::RegWrite), 373 373 _ => Err(EINVAL), 374 374 } 375 375 } ··· 385 385 /// Wrapper for GSP sequencer register write payload. 386 386 #[repr(transparent)] 387 387 #[derive(Copy, Clone)] 388 - pub(crate) struct RegWritePayload(r570_144::GSP_SEQ_BUF_PAYLOAD_REG_WRITE); 388 + pub(crate) struct RegWritePayload(bindings::GSP_SEQ_BUF_PAYLOAD_REG_WRITE); 389 389 390 390 impl RegWritePayload { 391 391 /// Returns the register address. ··· 408 408 /// Wrapper for GSP sequencer register modify payload. 409 409 #[repr(transparent)] 410 410 #[derive(Copy, Clone)] 411 - pub(crate) struct RegModifyPayload(r570_144::GSP_SEQ_BUF_PAYLOAD_REG_MODIFY); 411 + pub(crate) struct RegModifyPayload(bindings::GSP_SEQ_BUF_PAYLOAD_REG_MODIFY); 412 412 413 413 impl RegModifyPayload { 414 414 /// Returns the register address. ··· 436 436 /// Wrapper for GSP sequencer register poll payload. 437 437 #[repr(transparent)] 438 438 #[derive(Copy, Clone)] 439 - pub(crate) struct RegPollPayload(r570_144::GSP_SEQ_BUF_PAYLOAD_REG_POLL); 439 + pub(crate) struct RegPollPayload(bindings::GSP_SEQ_BUF_PAYLOAD_REG_POLL); 440 440 441 441 impl RegPollPayload { 442 442 /// Returns the register address. ··· 469 469 /// Wrapper for GSP sequencer delay payload. 470 470 #[repr(transparent)] 471 471 #[derive(Copy, Clone)] 472 - pub(crate) struct DelayUsPayload(r570_144::GSP_SEQ_BUF_PAYLOAD_DELAY_US); 472 + pub(crate) struct DelayUsPayload(bindings::GSP_SEQ_BUF_PAYLOAD_DELAY_US); 473 473 474 474 impl DelayUsPayload { 475 475 /// Returns the delay value in microseconds. ··· 487 487 /// Wrapper for GSP sequencer register store payload. 488 488 #[repr(transparent)] 489 489 #[derive(Copy, Clone)] 490 - pub(crate) struct RegStorePayload(r570_144::GSP_SEQ_BUF_PAYLOAD_REG_STORE); 490 + pub(crate) struct RegStorePayload(bindings::GSP_SEQ_BUF_PAYLOAD_REG_STORE); 491 491 492 492 impl RegStorePayload { 493 493 /// Returns the register address. ··· 510 510 511 511 /// Wrapper for GSP sequencer buffer command. 512 512 #[repr(transparent)] 513 - pub(crate) struct SequencerBufferCmd(r570_144::GSP_SEQUENCER_BUFFER_CMD); 513 + pub(crate) struct SequencerBufferCmd(bindings::GSP_SEQUENCER_BUFFER_CMD); 514 514 515 515 impl SequencerBufferCmd { 516 516 /// Returns the opcode as a `SeqBufOpcode` enum, or error if invalid. ··· 612 612 613 613 /// Wrapper for GSP run CPU sequencer RPC. 614 614 #[repr(transparent)] 615 - pub(crate) struct RunCpuSequencer(r570_144::rpc_run_cpu_sequencer_v17_00); 615 + pub(crate) struct RunCpuSequencer(bindings::rpc_run_cpu_sequencer_v17_00); 616 616 617 617 impl RunCpuSequencer { 618 618 /// Returns the command index.