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powerpc/mm: Fix typo in comments

Fixes: 912cc87a6 "powerpc/mm/radix: Add LPID based tlb flush helpers"
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

authored by

Alexey Kardashevskiy and committed by
Michael Ellerman b574df94 a8c0bf3c

+7 -7
+7 -7
arch/powerpc/mm/tlb-radix.c
··· 98 98 rb |= set << PPC_BITLSHIFT(51); 99 99 rs = ((unsigned long)pid) << PPC_BITLSHIFT(31); 100 100 prs = 1; /* process scoped */ 101 - r = 1; /* raidx format */ 101 + r = 1; /* radix format */ 102 102 103 103 asm volatile(PPC_TLBIEL(%0, %4, %3, %2, %1) 104 104 : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory"); ··· 112 112 rb = PPC_BIT(53); /* IS = 1 */ 113 113 rs = pid << PPC_BITLSHIFT(31); 114 114 prs = 1; /* process scoped */ 115 - r = 1; /* raidx format */ 115 + r = 1; /* radix format */ 116 116 117 117 asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1) 118 118 : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory"); ··· 164 164 rb |= ap << PPC_BITLSHIFT(58); 165 165 rs = pid << PPC_BITLSHIFT(31); 166 166 prs = 1; /* process scoped */ 167 - r = 1; /* raidx format */ 167 + r = 1; /* radix format */ 168 168 169 169 asm volatile(PPC_TLBIEL(%0, %4, %3, %2, %1) 170 170 : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory"); ··· 212 212 rb |= ap << PPC_BITLSHIFT(58); 213 213 rs = pid << PPC_BITLSHIFT(31); 214 214 prs = 1; /* process scoped */ 215 - r = 1; /* raidx format */ 215 + r = 1; /* radix format */ 216 216 217 217 asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1) 218 218 : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory"); ··· 615 615 rb |= ap << PPC_BITLSHIFT(58); 616 616 rs = lpid & ((1UL << 32) - 1); 617 617 prs = 0; /* process scoped */ 618 - r = 1; /* raidx format */ 618 + r = 1; /* radix format */ 619 619 620 620 asm volatile("ptesync": : :"memory"); 621 621 asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1) ··· 633 633 rb = 0x2 << PPC_BITLSHIFT(53); /* IS = 2 */ 634 634 rs = lpid & ((1UL << 32) - 1); 635 635 prs = 0; /* partition scoped */ 636 - r = 1; /* raidx format */ 636 + r = 1; /* radix format */ 637 637 638 638 asm volatile("ptesync": : :"memory"); 639 639 asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1) ··· 657 657 658 658 rb = 0x3 << PPC_BITLSHIFT(53); /* IS = 3 */ 659 659 prs = 0; /* partition scoped */ 660 - r = 1; /* raidx format */ 660 + r = 1; /* radix format */ 661 661 rs = 1 & ((1UL << 32) - 1); /* any LPID value to flush guest mappings */ 662 662 663 663 asm volatile("ptesync": : :"memory");