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Blackfin arch: Fix bug - Run "reboot" hangs bf518-ezbrd

[Mike Frysinger <vapier.adi@gmail.com>:
- setup P_DEFAULT_BOOT_SPI_CS for every arch based on
the default bootrom behavior and convert all our boards
to it
- revert previous anomaly change ... bf51x is not affected
by anomaly 05000353]

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>

authored by

Sonic Zhang and committed by
Bryan Wu b52dae31 5b93e13f

+19 -15
+1 -1
arch/blackfin/include/asm/reboot.h
··· 15 15 extern void native_machine_power_off(void); 16 16 17 17 /* common reboot workarounds */ 18 - extern void bfin_gpio_reset_spi0_ssel1(void); 18 + extern void bfin_reset_boot_spi_cs(unsigned short pin); 19 19 20 20 #endif
+2 -3
arch/blackfin/kernel/bfin_gpio.c
··· 1172 1172 * lives here as we need to force all the GPIO states w/out going through 1173 1173 * BUG() checks and such. 1174 1174 */ 1175 - void bfin_gpio_reset_spi0_ssel1(void) 1175 + void bfin_reset_boot_spi_cs(unsigned short pin) 1176 1176 { 1177 - u16 gpio = P_IDENT(P_SPI0_SSEL1); 1178 - 1177 + unsigned short gpio = P_IDENT(pin); 1179 1178 port_setup(gpio, GPIO_USAGE); 1180 1179 gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio); 1181 1180 AWA_DUMMY_READ(data_set);
+1 -1
arch/blackfin/mach-bf518/boards/ezbrd.c
··· 649 649 { 650 650 /* workaround reboot hang when booting from SPI */ 651 651 if ((bfin_read_SYSCR() & 0x7) == 0x3) 652 - bfin_gpio_reset_spi0_ssel1(); 652 + bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); 653 653 } 654 654 655 655 void bfin_get_ether_addr(char *addr)
+2
arch/blackfin/mach-bf518/include/mach/portmux.h
··· 103 103 #define P_SPI1_SSEL4 (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(2)) 104 104 #define P_SPI1_SSEL5 (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(2)) 105 105 106 + #define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2 107 + 106 108 /* SPORT Port Mux */ 107 109 #define P_SPORT0_DRPRI (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(0)) 108 110 #define P_SPORT0_RSCLK (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(0))
+1 -1
arch/blackfin/mach-bf527/boards/cm_bf527.c
··· 988 988 { 989 989 /* workaround reboot hang when booting from SPI */ 990 990 if ((bfin_read_SYSCR() & 0x7) == 0x3) 991 - bfin_gpio_reset_spi0_ssel1(); 991 + bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); 992 992 } 993 993 994 994 void bfin_get_ether_addr(char *addr)
+1 -1
arch/blackfin/mach-bf527/boards/ezbrd.c
··· 784 784 { 785 785 /* workaround reboot hang when booting from SPI */ 786 786 if ((bfin_read_SYSCR() & 0x7) == 0x3) 787 - bfin_gpio_reset_spi0_ssel1(); 787 + bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); 788 788 } 789 789 790 790 void bfin_get_ether_addr(char *addr)
+1 -1
arch/blackfin/mach-bf527/boards/ezkit.c
··· 1068 1068 { 1069 1069 /* workaround reboot hang when booting from SPI */ 1070 1070 if ((bfin_read_SYSCR() & 0x7) == 0x3) 1071 - bfin_gpio_reset_spi0_ssel1(); 1071 + bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); 1072 1072 } 1073 1073 1074 1074 void bfin_get_ether_addr(char *addr)
+2
arch/blackfin/mach-bf527/include/mach/portmux.h
··· 73 73 74 74 #define P_HWAIT (P_DONTCARE) 75 75 76 + #define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL1 77 + 76 78 #define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0)) 77 79 #define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(2)) 78 80 #define P_SPI0_SCK (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(2))
+1 -4
arch/blackfin/mach-bf533/include/mach/portmux.h
··· 54 54 #define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(GPIO_PF2)) 55 55 #define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PF1)) 56 56 #define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PF0)) 57 + #define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2 57 58 58 59 #define P_TMR2 (P_DONTCARE) 59 60 #define P_TMR1 (P_DONTCARE) 60 61 #define P_TMR0 (P_DONTCARE) 61 62 #define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PF1)) 62 - 63 - 64 - 65 - 66 63 67 64 #endif /* _MACH_PORTMUX_H_ */
+1 -1
arch/blackfin/mach-bf537/boards/generic_board.c
··· 726 726 { 727 727 /* workaround reboot hang when booting from SPI */ 728 728 if ((bfin_read_SYSCR() & 0x7) == 0x3) 729 - bfin_gpio_reset_spi0_ssel1(); 729 + bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); 730 730 } 731 731 732 732 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+1 -1
arch/blackfin/mach-bf537/boards/minotaur.c
··· 377 377 { 378 378 /* workaround reboot hang when booting from SPI */ 379 379 if ((bfin_read_SYSCR() & 0x7) == 0x3) 380 - bfin_gpio_reset_spi0_ssel1(); 380 + bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); 381 381 }
+1 -1
arch/blackfin/mach-bf537/boards/stamp.c
··· 1307 1307 { 1308 1308 /* workaround reboot hang when booting from SPI */ 1309 1309 if ((bfin_read_SYSCR() & 0x7) == 0x3) 1310 - bfin_gpio_reset_spi0_ssel1(); 1310 + bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); 1311 1311 } 1312 1312 1313 1313 /*
+1
arch/blackfin/mach-bf537/include/mach/portmux.h
··· 31 31 #define P_PPI0_FS1 (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(1)) 32 32 #define P_TACLK0 (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(1)) 33 33 #define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(1)) 34 + #define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL1 34 35 35 36 #define P_PPI0_D0 (P_DEFINED | P_IDENT(GPIO_PG0) | P_FUNCT(0)) 36 37 #define P_PPI0_D1 (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0))
+1
arch/blackfin/mach-bf538/include/mach/portmux.h
··· 102 102 #define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(GPIO_PF2)) 103 103 #define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PF1)) 104 104 #define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PF0)) 105 + #define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2 105 106 106 107 #endif /* _MACH_PORTMUX_H_ */
+1
arch/blackfin/mach-bf548/include/mach/portmux.h
··· 125 125 #define P_KEY_COL2 (P_DEFINED | P_IDENT(GPIO_PD14) | P_FUNCT(3)) 126 126 #define P_KEY_COL3 (P_DEFINED | P_IDENT(GPIO_PD15) | P_FUNCT(3)) 127 127 128 + #define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL1 128 129 #define P_SPI0_SCK (P_DEFINED | P_IDENT(GPIO_PE0) | P_FUNCT(0)) 129 130 #define P_SPI0_MISO (P_DEFINED | P_IDENT(GPIO_PE1) | P_FUNCT(0)) 130 131 #define P_SPI0_MOSI (P_DEFINED | P_IDENT(GPIO_PE2) | P_FUNCT(0))
+1
arch/blackfin/mach-bf561/include/mach/portmux.h
··· 85 85 #define P_SPI0_MOSI (P_DONTCARE) 86 86 #define P_SPI0_MISO (P_DONTCARE) 87 87 #define P_SPI0_SCK (P_DONTCARE) 88 + #define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2 88 89 89 90 #endif /* _MACH_PORTMUX_H_ */