dt-bindings: usb: dwc3-xilinx: Describe the reset constraint for the versal platform

AMD Versal platform USB 2.0 IP controller receives one reset input from
the SoC controlled by the CRL.RST_USB [RESET] register so accordingly
describe reset constraints.

Signed-off-by: Radhey Shyam Pandey <[e-mail]>
Reviewed-by: Krzysztof Kozlowski <[e-mail]>
Link: https://patch.msgid.link/[e-mail]
Signed-off-by: Greg Kroah-Hartman <[e-mail]>

Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml

···
       - const: ref_clk
 
   resets:
+    minItems: 1
     description:
       A list of phandles for resets listed in reset-names.
 
···
       - description: USB APB reset
 
   reset-names:
+    minItems: 1
     items:
       - const: usb_crst
       - const: usb_hibrst
···
   - clock-names
   - resets
   - reset-names
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - xlnx,versal-dwc3
+    then:
+      properties:
+        resets:
+          maxItems: 1
+        reset-names:
+          maxItems: 1
+    else:
+      properties:
+        resets:
+          minItems: 3
+        reset-names:
+          minItems: 3
 
 additionalProperties: false