···5252{5353 unsigned int val;54545555- /* Configues port 1, 2, 3, 4 to be validate*/5555+ /* Configures port 1, 2, 3, 4 to be validate*/5656 pci_read_config_dword(pdev, 0xe0, &val);5757 pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x4);5858
+1-1
drivers/net/wireless/hostap/hostap_hw.c
···26212621 iface = netdev_priv(dev);26222622 local = iface->local;2623262326242624- /* Detect early interrupt before driver is fully configued */26242624+ /* Detect early interrupt before driver is fully configured */26252625 spin_lock(&local->irq_init_lock);26262626 if (!dev->base_addr) {26272627 if (net_ratelimit()) {
+1-1
net/irda/irnet/irnet_ppp.c
···663663 if((val == N_SYNC_PPP) || (val == N_PPP))664664 {665665 DEBUG(FS_INFO, "Entering PPP discipline.\n");666666- /* PPP channel setup (ap->chan in configued in dev_irnet_open())*/666666+ /* PPP channel setup (ap->chan in configured in dev_irnet_open())*/667667 lock_kernel();668668 err = ppp_register_channel(&ap->chan);669669 if(err == 0)
+1-1
sound/soc/s3c24xx/neo1973_gta02_wm8753.c
···182182 if (ret < 0)183183 return ret;184184185185- /* configue and enable PLL for 12.288MHz output */185185+ /* configure and enable PLL for 12.288MHz output */186186 ret = snd_soc_dai_set_pll(codec_dai, WM8753_PLL2, 0,187187 iis_clkrate / 4, 12288000);188188 if (ret < 0)
+1-1
sound/soc/s3c24xx/neo1973_wm8753.c
···201201 if (ret < 0)202202 return ret;203203204204- /* configue and enable PLL for 12.288MHz output */204204+ /* configure and enable PLL for 12.288MHz output */205205 ret = snd_soc_dai_set_pll(codec_dai, WM8753_PLL2, 0,206206 iis_clkrate / 4, 12288000);207207 if (ret < 0)