Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

locking, arch/ia64: Reduce <asm/smp.h> header dependencies by moving XTP bits into the new <asm/xtp.h> header

We want to remove the #include <asm/io.h> from <asm/smp.h>, but for this
we have to move the XTP bits into a separate header first (as these bits
rely on <asm/io.h> definitions), and include them in the .c files that rely
on those APIs.

Co-developed-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>

authored by

Peter Zijlstra and committed by
Ingo Molnar
b3545192 13c01139

+53 -35
-35
arch/ia64/include/asm/smp.h
··· 18 18 #include <linux/bitops.h> 19 19 #include <linux/irqreturn.h> 20 20 21 - #include <asm/io.h> 22 21 #include <asm/param.h> 23 22 #include <asm/processor.h> 24 23 #include <asm/ptrace.h> ··· 43 44 44 45 #ifdef CONFIG_SMP 45 46 46 - #define XTP_OFFSET 0x1e0008 47 - 48 - #define SMP_IRQ_REDIRECTION (1 << 0) 49 - #define SMP_IPI_REDIRECTION (1 << 1) 50 - 51 47 #define raw_smp_processor_id() (current_thread_info()->cpu) 52 48 53 49 extern struct smp_boot_data { ··· 56 62 DECLARE_PER_CPU_SHARED_ALIGNED(cpumask_t, cpu_sibling_map); 57 63 extern int smp_num_siblings; 58 64 extern void __iomem *ipi_base_addr; 59 - extern unsigned char smp_int_redirect; 60 65 61 66 extern volatile int ia64_cpu_to_sapicid[]; 62 67 #define cpu_physical_id(i) ia64_cpu_to_sapicid[i] ··· 75 82 if (cpu_physical_id(i) == cpuid) 76 83 break; 77 84 return i; 78 - } 79 - 80 - /* 81 - * XTP control functions: 82 - * min_xtp : route all interrupts to this CPU 83 - * normal_xtp: nominal XTP value 84 - * max_xtp : never deliver interrupts to this CPU. 85 - */ 86 - 87 - static inline void 88 - min_xtp (void) 89 - { 90 - if (smp_int_redirect & SMP_IRQ_REDIRECTION) 91 - writeb(0x00, ipi_base_addr + XTP_OFFSET); /* XTP to min */ 92 - } 93 - 94 - static inline void 95 - normal_xtp (void) 96 - { 97 - if (smp_int_redirect & SMP_IRQ_REDIRECTION) 98 - writeb(0x08, ipi_base_addr + XTP_OFFSET); /* XTP normal */ 99 - } 100 - 101 - static inline void 102 - max_xtp (void) 103 - { 104 - if (smp_int_redirect & SMP_IRQ_REDIRECTION) 105 - writeb(0x0f, ipi_base_addr + XTP_OFFSET); /* Set XTP to max */ 106 85 } 107 86 108 87 /* Upping and downing of CPUs */
+46
arch/ia64/include/asm/xtp.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0 */ 2 + #ifndef _ASM_IA64_XTP_H 3 + #define _ASM_IA64_XTP_H 4 + 5 + #include <asm/io.h> 6 + 7 + #ifdef CONFIG_SMP 8 + 9 + #define XTP_OFFSET 0x1e0008 10 + 11 + #define SMP_IRQ_REDIRECTION (1 << 0) 12 + #define SMP_IPI_REDIRECTION (1 << 1) 13 + 14 + extern unsigned char smp_int_redirect; 15 + 16 + /* 17 + * XTP control functions: 18 + * min_xtp : route all interrupts to this CPU 19 + * normal_xtp: nominal XTP value 20 + * max_xtp : never deliver interrupts to this CPU. 21 + */ 22 + 23 + static inline void 24 + min_xtp (void) 25 + { 26 + if (smp_int_redirect & SMP_IRQ_REDIRECTION) 27 + writeb(0x00, ipi_base_addr + XTP_OFFSET); /* XTP to min */ 28 + } 29 + 30 + static inline void 31 + normal_xtp (void) 32 + { 33 + if (smp_int_redirect & SMP_IRQ_REDIRECTION) 34 + writeb(0x08, ipi_base_addr + XTP_OFFSET); /* XTP normal */ 35 + } 36 + 37 + static inline void 38 + max_xtp (void) 39 + { 40 + if (smp_int_redirect & SMP_IRQ_REDIRECTION) 41 + writeb(0x0f, ipi_base_addr + XTP_OFFSET); /* Set XTP to max */ 42 + } 43 + 44 + #endif /* CONFIG_SMP */ 45 + 46 + #endif /* _ASM_IA64_XTP_Hy */
+1
arch/ia64/kernel/iosapic.c
··· 95 95 #include <asm/iosapic.h> 96 96 #include <asm/processor.h> 97 97 #include <asm/ptrace.h> 98 + #include <asm/xtp.h> 98 99 99 100 #undef DEBUG_INTERRUPT_ROUTING 100 101
+1
arch/ia64/kernel/irq.c
··· 25 25 #include <linux/kernel_stat.h> 26 26 27 27 #include <asm/mca.h> 28 + #include <asm/xtp.h> 28 29 29 30 /* 30 31 * 'what should we do if we get a hw irq event on an illegal vector'.
+1
arch/ia64/kernel/process.c
··· 48 48 #include <linux/uaccess.h> 49 49 #include <asm/unwind.h> 50 50 #include <asm/user.h> 51 + #include <asm/xtp.h> 51 52 52 53 #include "entry.h" 53 54
+1
arch/ia64/kernel/sal.c
··· 18 18 #include <asm/page.h> 19 19 #include <asm/sal.h> 20 20 #include <asm/pal.h> 21 + #include <asm/xtp.h> 21 22 22 23 __cacheline_aligned DEFINE_SPINLOCK(sal_lock); 23 24 unsigned long sal_platform_features;
+1
arch/ia64/kernel/setup.c
··· 65 65 #include <asm/tlbflush.h> 66 66 #include <asm/unistd.h> 67 67 #include <asm/uv/uv.h> 68 + #include <asm/xtp.h> 68 69 69 70 #if defined(CONFIG_SMP) && (IA64_CPU_SIZE > PAGE_SIZE) 70 71 # error "struct cpuinfo_ia64 too big!"
+1
arch/ia64/kernel/smp.c
··· 46 46 #include <asm/tlbflush.h> 47 47 #include <asm/unistd.h> 48 48 #include <asm/mca.h> 49 + #include <asm/xtp.h> 49 50 50 51 /* 51 52 * Note: alignment of 4 entries/cacheline was empirically determined
+1
arch/parisc/include/asm/timex.h
··· 7 7 #ifndef _ASMPARISC_TIMEX_H 8 8 #define _ASMPARISC_TIMEX_H 9 9 10 + #include <asm/special_insns.h> 10 11 11 12 #define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ 12 13