irqchip/irq-bcm7120-l2: Use correct I/O accessors for irq_fwd_mask

Initialization of irq_fwd_mask was done using __raw_writel() which
happens to work for all cases except when using ARM BE8 which requires
writel() (with the proper swapping). Move the initialization of the
irq_fwd_mask till later when we have correctly defined our I/O
accessors.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>

authored by

Florian Fainelli and committed by
Marc Zyngier
b304605f c8c7d93d

+4 -6
+4 -6
drivers/irqchip/irq-bcm7120-l2.c
··· 250 if (ret < 0) 251 goto out_free_l1_data; 252 253 - for (idx = 0; idx < data->n_words; idx++) { 254 - __raw_writel(data->irq_fwd_mask[idx], 255 - data->pair_base[idx] + 256 - data->en_offset[idx]); 257 - } 258 - 259 for (irq = 0; irq < data->num_parent_irqs; irq++) { 260 ret = bcm7120_l2_intc_init_one(dn, data, irq, valid_mask); 261 if (ret) ··· 290 291 gc->reg_base = data->pair_base[idx]; 292 ct->regs.mask = data->en_offset[idx]; 293 294 ct->chip.irq_mask = irq_gc_mask_clr_bit; 295 ct->chip.irq_unmask = irq_gc_mask_set_bit;
··· 250 if (ret < 0) 251 goto out_free_l1_data; 252 253 for (irq = 0; irq < data->num_parent_irqs; irq++) { 254 ret = bcm7120_l2_intc_init_one(dn, data, irq, valid_mask); 255 if (ret) ··· 296 297 gc->reg_base = data->pair_base[idx]; 298 ct->regs.mask = data->en_offset[idx]; 299 + 300 + /* gc->reg_base is defined and so is gc->writel */ 301 + irq_reg_writel(gc, data->irq_fwd_mask[idx], 302 + data->en_offset[idx]); 303 304 ct->chip.irq_mask = irq_gc_mask_clr_bit; 305 ct->chip.irq_unmask = irq_gc_mask_set_bit;