···1010#ifndef __ASM_ARM_MACH_TIME_H1111#define __ASM_ARM_MACH_TIME_H12121313-/*1414- * This is our kernel timer structure.1515- *1616- * - init1717- * Initialise the kernels jiffy timer source, claim interrupt1818- * using setup_irq. This is called early on during initialisation1919- * while interrupts are still disabled on the local CPU.2020- * - suspend2121- * Suspend the kernel jiffy timer source, if necessary. This2222- * is called with interrupts disabled, after all normal devices2323- * have been suspended. If no action is required, set this to2424- * NULL.2525- * - resume2626- * Resume the kernel jiffy timer source, if necessary. This2727- * is called with interrupts disabled before any normal devices2828- * are resumed. If no action is required, set this to NULL.2929- * - offset3030- * Return the timer offset in microseconds since the last timer3131- * interrupt. Note: this must take account of any unprocessed3232- * timer interrupt which may be pending.3333- */3434-struct sys_timer {3535- void (*init)(void);3636- void (*suspend)(void);3737- void (*resume)(void);3838-#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET3939- unsigned long (*offset)(void);4040-#endif4141-};4242-4313extern void timer_tick(void);44144515struct timespec;
···1414struct mv643xx_eth_platform_data;1515struct mv_sata_platform_data;16161717-extern struct sys_timer dove_timer;1717+extern void dove_timer_init(void);18181919/*2020 * Basic Dove init functions used early by machine-setup.
···100100 * clocks need to be enabled here manually and then tagged as used in101101 * the clock driver initialization102102 */103103-static void __init lpc32xx_timer_init(void)103103+void __init lpc32xx_timer_init(void)104104{105105 u32 clkrate, pllreg;106106···161161 clocksource_mmio_init(LPC32XX_TIMER_TC(LPC32XX_TIMER1_BASE),162162 "lpc32xx_clksrc", clkrate, 300, 32, clocksource_mmio_readl_up);163163}164164-165165-struct sys_timer lpc32xx_timer = {166166- .init = &lpc32xx_timer_init,167167-};168168-
···6767#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))6868#define APBC_TIMERS APBC_REG(0x34)69697070-static void __init pxa168_timer_init(void)7070+void __init pxa168_timer_init(void)7171{7272 /* this is early, we have to initialize the CCU registers by7373 * ourselves instead of using clk_* API. Clock rate is defined···80808181 timer_init(IRQ_PXA168_TIMER1);8282}8383-8484-struct sys_timer pxa168_timer = {8585- .init = pxa168_timer_init,8686-};87838884void pxa168_clear_keypad_wakeup(void)8985{
···1515void orion5x_id(u32 *dev, u32 *rev, char **dev_name);1616void clk_init(void);1717extern int orion5x_tclk;1818-extern struct sys_timer orion5x_timer;1818+extern void orion5x_timer_init(void);19192020/*2121 * Enumerations and functions for Orion windows mapping. Used by Orion core
···705705 rmobile_add_device_to_domain("A3SP", &i2c1_device);706706}707707708708-static void __init r8a7740_earlytimer_init(void)709709-{710710- r8a7740_clock_init(0);711711- shmobile_earlytimer_init();712712-}713713-714708void __init r8a7740_add_early_devices(void)715709{716710 early_platform_add_devices(r8a7740_early_devices,···712718713719 /* setup early console here as well */714720 shmobile_setup_console();715715-716716- /* override timer setup with soc-specific code */717717- shmobile_timer.init = r8a7740_earlytimer_init;718721}719722720723#ifdef CONFIG_USE_OF···754763 .init_irq = r8a7740_init_irq,755764 .handle_irq = shmobile_handle_irq_intc,756765 .init_machine = r8a7740_add_standard_devices_dt,757757- .timer = &shmobile_timer,766766+ .init_time = shmobile_timer_init,758767 .dt_compat = r8a7740_boards_compat_dt,759768MACHINE_END760769
+1-4
arch/arm/mach-shmobile/setup-r8a7779.c
···339339/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */340340void __init __weak r8a7779_register_twd(void) { }341341342342-static void __init r8a7779_earlytimer_init(void)342342+void __init r8a7779_earlytimer_init(void)343343{344344 r8a7779_clock_init();345345 shmobile_earlytimer_init();···366366 * As a final step pass earlyprint=sh-sci.2,115200 on the kernel367367 * command line in case of the marzen board.368368 */369369-370370- /* override timer setup with soc-specific code */371371- shmobile_timer.init = r8a7779_earlytimer_init;372369}
+2-5
arch/arm/mach-shmobile/setup-sh7372.c
···10541054 ARRAY_SIZE(domain_devices));10551055}1056105610571057-static void __init sh7372_earlytimer_init(void)10571057+void __init sh7372_earlytimer_init(void)10581058{10591059 sh7372_clock_init();10601060 shmobile_earlytimer_init();···1067106710681068 /* setup early console here as well */10691069 shmobile_setup_console();10701070-10711071- /* override timer setup with soc-specific code */10721072- shmobile_timer.init = sh7372_earlytimer_init;10731070}1074107110751072#ifdef CONFIG_USE_OF···11101113 .init_irq = sh7372_init_irq,11111114 .handle_irq = shmobile_handle_irq_intc,11121115 .init_machine = sh7372_add_standard_devices_dt,11131113- .timer = &shmobile_timer,11161116+ .init_time = shmobile_timer_init,11141117 .dt_compat = sh7372_boards_compat_dt,11151118MACHINE_END11161119
+1-4
arch/arm/mach-shmobile/setup-sh73a0.c
···796796/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */797797void __init __weak sh73a0_register_twd(void) { }798798799799-static void __init sh73a0_earlytimer_init(void)799799+void __init sh73a0_earlytimer_init(void)800800{801801 sh73a0_clock_init();802802 shmobile_earlytimer_init();···810810811811 /* setup early console here as well */812812 shmobile_setup_console();813813-814814- /* override timer setup with soc-specific code */815815- shmobile_timer.init = sh73a0_earlytimer_init;816813}
···349349/*350350 * This sets up the system timers, clock source and clock event.351351 */352352-static void __init u300_timer_init(void)352352+void __init u300_timer_init(void)353353{354354 struct clk *clk;355355 unsigned long rate;···413413 * used by hrtimers!414414 */415415}416416-417417-/*418418- * Very simple system timer that only register the clock event and419419- * clock source.420420- */421421-struct sys_timer u300_timer = {422422- .init = u300_timer_init,423423-};
···770770/*771771 * Set up timer interrupt, and return the current time in seconds.772772 */773773-static void __init versatile_timer_init(void)773773+void __init versatile_timer_init(void)774774{775775 u32 val;776776···797797 sp804_clocksource_init(TIMER3_VA_BASE, "timer3");798798 sp804_clockevents_init(TIMER0_VA_BASE, IRQ_TIMERINT0_1, "timer0");799799}800800-801801-struct sys_timer versatile_timer = {802802- .init = versatile_timer_init,803803-};804804-
···8585/*8686 * Should return useconds since last timer tick8787 */8888-u32 arch_gettimeoffset(void)8888+static u32 blackfin_gettimeoffset(void)8989{9090 unsigned long offset;9191 unsigned long clocks_per_jiffy;···141141142142void __init time_init(void)143143{144144+#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET145145+ arch_gettimeoffset = blackfin_gettimeoffset;146146+#endif147147+144148#ifdef CONFIG_RTC_DRV_BFIN145149 /* [#2663] hack to filter junk RTC values that would cause146150 * userspace to have to deal with time values greater than
+6-4
arch/cris/arch-v10/kernel/time.c
···5555 return ns;5656}57575858-unsigned long do_slow_gettimeoffset(void)5858+static u32 cris_v10_gettimeoffset(void)5959{6060- unsigned long count;6060+ u32 count;61616262 /* The timer interrupt comes from Etrax timer 0. In order to get6363 * better precision, we check the current value. It might have···6565 */6666 count = *R_TIMER0_DATA;67676868- /* Convert timer value to usec */6969- return (TIMER0_DIV - count) * ((NSEC_PER_SEC/1000)/HZ)/TIMER0_DIV;6868+ /* Convert timer value to nsec */6969+ return (TIMER0_DIV - count) * (NSEC_PER_SEC/HZ)/TIMER0_DIV;7070}71717272/* Excerpt from the Etrax100 HSDD about the built-in watchdog:···191191void __init192192time_init(void)193193{ 194194+ arch_gettimeoffset = cris_v10_gettimeoffset;195195+194196 /* probe for the RTC and read it if it exists 195197 * Before the RTC can be probed the loops_per_usec variable needs 196198 * to be initialized to make usleep work. A better value for
-11
arch/cris/kernel/time.c
···3939extern unsigned long loops_per_jiffy; /* init/main.c */4040unsigned long loops_per_usec;41414242-4343-#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET4444-extern unsigned long do_slow_gettimeoffset(void);4545-static unsigned long (*do_gettimeoffset)(void) = do_slow_gettimeoffset;4646-4747-u32 arch_gettimeoffset(void)4848-{4949- return do_gettimeoffset() * 1000;5050-}5151-#endif5252-5342int set_rtc_mmss(unsigned long nowtime)5443{5544 D(printk(KERN_DEBUG "set_rtc_mmss(%lu)\n", nowtime));
···2323#define START_VAL (INTERSIL_RUN | INTERSIL_INT_ENABLE | INTERSIL_24H_MODE)24242525/* does this need to be implemented? */2626-unsigned long sun3_gettimeoffset(void)2626+u32 sun3_gettimeoffset(void)2727{2828- return 1;2828+ return 1000;2929}30303131
···7171 return 0;7272}7373/* Not much we can do here */7474-unsigned long sun3x_gettimeoffset (void)7474+u32 sun3x_gettimeoffset(void)7575{7676 return 0L;7777}
+1-1
arch/m68k/sun3x/time.h
···22#define SUN3X_TIME_H3344extern int sun3x_hwclk(int set, struct rtc_time *t);55-unsigned long sun3x_gettimeoffset (void);55+u32 sun3x_gettimeoffset(void);66void sun3x_sched_init(irq_handler_t vector);7788struct mostek_dt {
···11+/*22+ * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.33+ *44+ * This program is free software; you can redistribute it and/or modify it55+ * under the terms and conditions of the GNU General Public License,66+ * version 2, as published by the Free Software Foundation.77+ *88+ * This program is distributed in the hope it will be useful, but WITHOUT99+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or1010+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for1111+ * more details.1212+ *1313+ * You should have received a copy of the GNU General Public License1414+ * along with this program. If not, see <http://www.gnu.org/licenses/>.1515+ */1616+1717+#include <linux/init.h>1818+#include <linux/of.h>1919+2020+extern struct of_device_id __clksrc_of_table[];2121+2222+static const struct of_device_id __clksrc_of_table_sentinel2323+ __used __section(__clksrc_of_table_end);2424+2525+void __init clocksource_of_init(void)2626+{2727+ struct device_node *np;2828+ const struct of_device_id *match;2929+ void (*init_func)(void);3030+3131+ for_each_matching_node_and_match(np, __clksrc_of_table, &match) {3232+ init_func = match->data;3333+ init_func();3434+ }3535+}