Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/i915/psr: Always wait for idle state when disabling PSR

It should always wait for idle state when disabling PSR because PSR
could be inactive due a call to intel_psr_exit() and while PSR is
still being disabled asynchronously userspace could change the
modeset causing a call to psr_disable() that will not wait for PSR
idle and then PSR will be enabled again while PSR is still not idle.

v2: rebased on top of the patch reusing psr_exit()

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181106190843.18009-2-jose.souza@intel.com

+18 -23
+18 -23
drivers/gpu/drm/i915/intel_psr.c
··· 661 661 { 662 662 u32 val; 663 663 664 - if (!dev_priv->psr.active) 664 + if (!dev_priv->psr.active) { 665 + if (INTEL_GEN(dev_priv) >= 9) 666 + WARN_ON(I915_READ(EDP_PSR2_CTL) & EDP_PSR2_ENABLE); 667 + WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE); 665 668 return; 669 + } 666 670 667 671 if (dev_priv->psr.psr2_enabled) { 668 672 val = I915_READ(EDP_PSR2_CTL); ··· 684 680 intel_psr_disable_source(struct intel_dp *intel_dp) 685 681 { 686 682 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); 683 + i915_reg_t psr_status; 684 + u32 psr_status_mask; 687 685 688 - if (dev_priv->psr.active) { 689 - i915_reg_t psr_status; 690 - u32 psr_status_mask; 686 + intel_psr_exit(dev_priv); 691 687 692 - intel_psr_exit(dev_priv); 693 - 694 - if (dev_priv->psr.psr2_enabled) { 695 - psr_status = EDP_PSR2_STATUS; 696 - psr_status_mask = EDP_PSR2_STATUS_STATE_MASK; 697 - } else { 698 - psr_status = EDP_PSR_STATUS; 699 - psr_status_mask = EDP_PSR_STATUS_STATE_MASK; 700 - } 701 - 702 - /* Wait till PSR is idle */ 703 - if (intel_wait_for_register(dev_priv, 704 - psr_status, psr_status_mask, 0, 705 - 2000)) 706 - DRM_ERROR("Timed out waiting for PSR Idle State\n"); 688 + if (dev_priv->psr.psr2_enabled) { 689 + psr_status = EDP_PSR2_STATUS; 690 + psr_status_mask = EDP_PSR2_STATUS_STATE_MASK; 707 691 } else { 708 - if (dev_priv->psr.psr2_enabled) 709 - WARN_ON(I915_READ(EDP_PSR2_CTL) & EDP_PSR2_ENABLE); 710 - else 711 - WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE); 692 + psr_status = EDP_PSR_STATUS; 693 + psr_status_mask = EDP_PSR_STATUS_STATE_MASK; 712 694 } 695 + 696 + /* Wait till PSR is idle */ 697 + if (intel_wait_for_register(dev_priv, psr_status, psr_status_mask, 0, 698 + 2000)) 699 + DRM_ERROR("Timed out waiting PSR idle state\n"); 713 700 } 714 701 715 702 static void intel_psr_disable_locked(struct intel_dp *intel_dp)