···40354035 PCI_DMA_FROMDEVICE);4036403640374037 length = le16_to_cpu(rx_desc->length);40384038-40394039- if (unlikely(!(status & E1000_RXD_STAT_EOP))) {40384038+ /* !EOP means multiple descriptors were used to store a single40394039+ * packet, also make sure the frame isn't just CRC only */40404040+ if (unlikely(!(status & E1000_RXD_STAT_EOP) || (length <= 4))) {40404041 /* All receives must fit into a single buffer */40414042 E1000_DBG("%s: Receive packet consumed multiple"40424043 " buffers\n", netdev->name);
+13-2
drivers/net/forcedeth.c
···898898};899899static int phy_cross = NV_CROSSOVER_DETECTION_DISABLED;900900901901+/*902902+ * Power down phy when interface is down (persists through reboot;903903+ * older Linux and other OSes may not power it up again)904904+ */905905+static int phy_power_down = 0;906906+901907static inline struct fe_priv *get_nvpriv(struct net_device *dev)902908{903909 return netdev_priv(dev);···1509150315101504 /* restart auto negotiation, power down phy */15111505 mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);15121512- mii_control |= (BMCR_ANRESTART | BMCR_ANENABLE | BMCR_PDOWN);15061506+ mii_control |= (BMCR_ANRESTART | BMCR_ANENABLE);15071507+ if (phy_power_down) {15081508+ mii_control |= BMCR_PDOWN;15091509+ }15131510 if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control)) {15141511 return PHY_ERROR;15151512 }···5543553455445535 nv_drain_rxtx(dev);5545553655465546- if (np->wolenabled) {55375537+ if (np->wolenabled || !phy_power_down) {55475538 nv_txrx_gate(dev, false);55485539 writel(NVREG_PFF_ALWAYS|NVREG_PFF_MYADDR, base + NvRegPacketFilterFlags);55495540 nv_start_rx(dev);···63996390MODULE_PARM_DESC(dma_64bit, "High DMA is enabled by setting to 1 and disabled by setting to 0.");64006391module_param(phy_cross, int, 0);64016392MODULE_PARM_DESC(phy_cross, "Phy crossover detection for Realtek 8201 phy is enabled by setting to 1 and disabled by setting to 0.");63936393+module_param(phy_power_down, int, 0);63946394+MODULE_PARM_DESC(phy_power_down, "Power down phy and disable link when interface is down (1), or leave phy powered up (0).");6402639564036396MODULE_AUTHOR("Manfred Spraul <manfred@colorfullife.com>");64046397MODULE_DESCRIPTION("Reverse Engineered nForce ethernet driver");
···388388389389 INC_PERF_COUNTER(priv->pstats.tx_poll);390390391391- if (!spin_trylock(&ring->comp_lock)) {391391+ if (!spin_trylock_irq(&ring->comp_lock)) {392392 mod_timer(&cq->timer, jiffies + MLX4_EN_TX_POLL_TIMEOUT);393393 return;394394 }···401401 if (inflight && priv->port_up)402402 mod_timer(&cq->timer, jiffies + MLX4_EN_TX_POLL_TIMEOUT);403403404404- spin_unlock(&ring->comp_lock);404404+ spin_unlock_irq(&ring->comp_lock);405405}406406407407static struct mlx4_en_tx_desc *mlx4_en_bounce_to_desc(struct mlx4_en_priv *priv,···444444445445 /* Poll the CQ every mlx4_en_TX_MODER_POLL packets */446446 if ((++ring->poll_cnt & (MLX4_EN_TX_POLL_MODER - 1)) == 0)447447- if (spin_trylock(&ring->comp_lock)) {447447+ if (spin_trylock_irq(&ring->comp_lock)) {448448 mlx4_en_process_tx_cq(priv->dev, cq);449449- spin_unlock(&ring->comp_lock);449449+ spin_unlock_irq(&ring->comp_lock);450450 }451451}452452
+62-50
drivers/net/r8169.c
···35613561 int handled = 0;35623562 int status;3563356335643564+ /* loop handling interrupts until we have no new ones or35653565+ * we hit a invalid/hotplug case.35663566+ */35643567 status = RTL_R16(IntrStatus);35683568+ while (status && status != 0xffff) {35693569+ handled = 1;3565357035663566- /* hotplug/major error/no more work/shared irq */35673567- if ((status == 0xffff) || !status)35683568- goto out;35693569-35703570- handled = 1;35713571-35723572- if (unlikely(!netif_running(dev))) {35733573- rtl8169_asic_down(ioaddr);35743574- goto out;35753575- }35763576-35773577- status &= tp->intr_mask;35783578- RTL_W16(IntrStatus,35793579- (status & RxFIFOOver) ? (status | RxOverflow) : status);35803580-35813581- if (!(status & tp->intr_event))35823582- goto out;35833583-35843584- /* Work around for rx fifo overflow */35853585- if (unlikely(status & RxFIFOOver) &&35863586- (tp->mac_version == RTL_GIGA_MAC_VER_11)) {35873587- netif_stop_queue(dev);35883588- rtl8169_tx_timeout(dev);35893589- goto out;35903590- }35913591-35923592- if (unlikely(status & SYSErr)) {35933593- rtl8169_pcierr_interrupt(dev);35943594- goto out;35953595- }35963596-35973597- if (status & LinkChg)35983598- rtl8169_check_link_status(dev, tp, ioaddr);35993599-36003600- if (status & tp->napi_event) {36013601- RTL_W16(IntrMask, tp->intr_event & ~tp->napi_event);36023602- tp->intr_mask = ~tp->napi_event;36033603-36043604- if (likely(napi_schedule_prep(&tp->napi)))36053605- __napi_schedule(&tp->napi);36063606- else if (netif_msg_intr(tp)) {36073607- printk(KERN_INFO "%s: interrupt %04x in poll\n",36083608- dev->name, status);35713571+ /* Handle all of the error cases first. These will reset35723572+ * the chip, so just exit the loop.35733573+ */35743574+ if (unlikely(!netif_running(dev))) {35753575+ rtl8169_asic_down(ioaddr);35763576+ break;36093577 }35783578+35793579+ /* Work around for rx fifo overflow */35803580+ if (unlikely(status & RxFIFOOver) &&35813581+ (tp->mac_version == RTL_GIGA_MAC_VER_11)) {35823582+ netif_stop_queue(dev);35833583+ rtl8169_tx_timeout(dev);35843584+ break;35853585+ }35863586+35873587+ if (unlikely(status & SYSErr)) {35883588+ rtl8169_pcierr_interrupt(dev);35893589+ break;35903590+ }35913591+35923592+ if (status & LinkChg)35933593+ rtl8169_check_link_status(dev, tp, ioaddr);35943594+35953595+ /* We need to see the lastest version of tp->intr_mask to35963596+ * avoid ignoring an MSI interrupt and having to wait for35973597+ * another event which may never come.35983598+ */35993599+ smp_rmb();36003600+ if (status & tp->intr_mask & tp->napi_event) {36013601+ RTL_W16(IntrMask, tp->intr_event & ~tp->napi_event);36023602+ tp->intr_mask = ~tp->napi_event;36033603+36043604+ if (likely(napi_schedule_prep(&tp->napi)))36053605+ __napi_schedule(&tp->napi);36063606+ else if (netif_msg_intr(tp)) {36073607+ printk(KERN_INFO "%s: interrupt %04x in poll\n",36083608+ dev->name, status);36093609+ }36103610+ }36113611+36123612+ /* We only get a new MSI interrupt when all active irq36133613+ * sources on the chip have been acknowledged. So, ack36143614+ * everything we've seen and check if new sources have become36153615+ * active to avoid blocking all interrupts from the chip.36163616+ */36173617+ RTL_W16(IntrStatus,36183618+ (status & RxFIFOOver) ? (status | RxOverflow) : status);36193619+ status = RTL_R16(IntrStatus);36103620 }36113611-out:36213621+36123622 return IRQ_RETVAL(handled);36133623}36143624···3634362436353625 if (work_done < budget) {36363626 napi_complete(napi);36373637- tp->intr_mask = 0xffff;36383638- /*36393639- * 20040426: the barrier is not strictly required but the36403640- * behavior of the irq handler could be less predictable36413641- * without it. Btw, the lack of flush for the posted pci36423642- * write is safe - FR36273627+36283628+ /* We need for force the visibility of tp->intr_mask36293629+ * for other CPUs, as we can loose an MSI interrupt36303630+ * and potentially wait for a retransmit timeout if we don't.36313631+ * The posted write to IntrMask is safe, as it will36323632+ * eventually make it to the chip and we won't loose anything36333633+ * until it does.36433634 */36353635+ tp->intr_mask = 0xffff;36443636 smp_wmb();36453637 RTL_W16(IntrMask, tp->intr_event);36463638 }
+1
drivers/net/wireless/Kconfig
···431431 ASUS P5B Deluxe432432 Toshiba Satellite Pro series of laptops433433 Asus Wireless Link434434+ Linksys WUSB54GC-EU434435435436 Thanks to Realtek for their support!436437
+6-6
drivers/net/wireless/at76c50x-usb.c
···18731873 if (ret != CMD_STATUS_COMPLETE) {18741874 queue_delayed_work(priv->hw->workqueue, &priv->dwork_hw_scan,18751875 SCAN_POLL_INTERVAL);18761876- goto exit;18761876+ mutex_unlock(&priv->mtx);18771877+ return;18771878 }18781878-18791879- ieee80211_scan_completed(priv->hw, false);1880187918811880 if (is_valid_ether_addr(priv->bssid))18821881 at76_join(priv);1883188218841884- ieee80211_wake_queues(priv->hw);18851885-18861886-exit:18871883 mutex_unlock(&priv->mtx);18841884+18851885+ ieee80211_scan_completed(priv->hw, false);18861886+18871887+ ieee80211_wake_queues(priv->hw);18881888}1889188918901890static int at76_hw_scan(struct ieee80211_hw *hw,
···3535/* Has unacknowledged data */3636#define IP_CT_TCP_FLAG_DATA_UNACKNOWLEDGED 0x1037373838+/* The field td_maxack has been set */3939+#define IP_CT_TCP_FLAG_MAXACK_SET 0x204040+3841struct nf_ct_tcp_flags {3942 __u8 flags;4043 __u8 mask;···4946 u_int32_t td_end; /* max of seq + len */5047 u_int32_t td_maxend; /* max of ack + max(win, 1) */5148 u_int32_t td_maxwin; /* max(win) */4949+ u_int32_t td_maxack; /* max of ack */5250 u_int8_t td_scale; /* window scale factor */5351 u_int8_t flags; /* per direction options */5452};