Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: dts: aspeed: Add Bytedance g220a BMC machine

The g220a is a server platform with an ASPEED AST2500 BMC.

Signed-off-by: Lotus Xu <xuxiaohan@bytedance.com>
Signed-off-by: John Wang <wangzhiqiang.bj@bytedance.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20200929063955.1206-2-wangzhiqiang.bj@bytedance.com
Signed-off-by: Joel Stanley <joel@jms.id.au>

authored by

Lotus Xu and committed by
Joel Stanley
b2826bdf e81059a5

+925
+1
arch/arm/boot/dts/Makefile
··· 1381 1381 aspeed-bmc-amd-ethanolx.dtb \ 1382 1382 aspeed-bmc-arm-centriq2400-rep.dtb \ 1383 1383 aspeed-bmc-arm-stardragon4800-rep2.dtb \ 1384 + aspeed-bmc-bytedance-g220a.dtb \ 1384 1385 aspeed-bmc-facebook-cmm.dtb \ 1385 1386 aspeed-bmc-facebook-minipack.dtb \ 1386 1387 aspeed-bmc-facebook-tiogapass.dtb \
+924
arch/arm/boot/dts/aspeed-bmc-bytedance-g220a.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0+ 2 + // Copyright (C) 2020 Bytedance. 3 + /dts-v1/; 4 + 5 + #include "aspeed-g5.dtsi" 6 + #include <dt-bindings/gpio/aspeed-gpio.h> 7 + #include <dt-bindings/i2c/i2c.h> 8 + #include <dt-bindings/leds/leds-pca955x.h> 9 + 10 + / { 11 + model = "Bytedance G220A BMC"; 12 + compatible = "bytedance,g220a-bmc", "aspeed,ast2500"; 13 + 14 + aliases { 15 + serial4 = &uart5; 16 + i2c14 = &channel_3_0; 17 + i2c15 = &channel_3_1; 18 + i2c16 = &channel_3_2; 19 + i2c17 = &channel_3_3; 20 + i2c18 = &channel_6_0; 21 + i2c19 = &channel_6_1; 22 + i2c20 = &channel_6_2; 23 + i2c21 = &channel_6_3; 24 + i2c22 = &channel_6_4; 25 + i2c23 = &channel_6_5; 26 + i2c24 = &channel_6_6; 27 + i2c25 = &channel_6_7; 28 + i2c26 = &channel_6_8; 29 + i2c27 = &channel_6_9; 30 + i2c28 = &channel_6_10; 31 + i2c29 = &channel_6_11; 32 + i2c30 = &channel_6_12; 33 + i2c31 = &channel_6_13; 34 + i2c32 = &channel_6_14; 35 + i2c33 = &channel_6_15; 36 + i2c34 = &channel_6_16; 37 + i2c35 = &channel_6_17; 38 + i2c36 = &channel_6_18; 39 + i2c37 = &channel_6_19; 40 + i2c38 = &channel_6_20; 41 + i2c39 = &channel_6_21; 42 + i2c40 = &channel_6_22; 43 + i2c41 = &channel_6_23; 44 + i2c42 = &channel_6_24; 45 + i2c43 = &channel_6_25; 46 + i2c44 = &channel_10_0; 47 + i2c45 = &channel_10_1; 48 + i2c46 = &channel_10_2; 49 + i2c47 = &channel_10_3; 50 + i2c48 = &channel_10_4; 51 + i2c49 = &channel_10_5; 52 + i2c50 = &channel_10_6; 53 + i2c51 = &channel_10_7; 54 + }; 55 + 56 + chosen { 57 + stdout-path = &uart5; 58 + bootargs = "console=ttyS4,115200 earlyprintk"; 59 + }; 60 + 61 + memory@80000000 { 62 + reg = <0x80000000 0x40000000>; 63 + }; 64 + 65 + reserved-memory { 66 + #address-cells = <1>; 67 + #size-cells = <1>; 68 + ranges; 69 + 70 + vga_memory: framebuffer@bc000000 { 71 + no-map; 72 + reg = <0xbc000000 0x04000000>; /* 64M */ 73 + }; 74 + 75 + video_engine_memory: jpegbuffer { 76 + size = <0x02000000>; /* 32M */ 77 + alignment = <0x01000000>; 78 + compatible = "shared-dma-pool"; 79 + reusable; 80 + }; 81 + }; 82 + 83 + iio-hwmon { 84 + compatible = "iio-hwmon"; 85 + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, 86 + <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>, 87 + <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>, 88 + <&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>; 89 + }; 90 + 91 + leds { 92 + compatible = "gpio-leds"; 93 + bmc_alive { 94 + label = "bmc_alive"; 95 + gpios = <&gpio ASPEED_GPIO(B, 0) GPIO_ACTIVE_LOW>; 96 + linux,default-trigger = "timer"; 97 + led-pattern = <1000 1000>; 98 + }; 99 + }; 100 + 101 + gpio-keys { 102 + compatible = "gpio-keys"; 103 + burn-in-signal { 104 + label = "burn-in"; 105 + gpios = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_LOW>; 106 + linux,code = <ASPEED_GPIO(R, 5)>; 107 + }; 108 + }; 109 + 110 + gpio-keys-polled { 111 + compatible = "gpio-keys-polled"; 112 + poll-interval = <1000>; 113 + 114 + rear-riser1-presence { 115 + label = "rear-riser1-presence"; 116 + gpios = <&pca0 1 GPIO_ACTIVE_LOW>; 117 + linux,code = <1>; 118 + }; 119 + 120 + alrt-pvddq-cpu0 { 121 + label = "alrt-pvddq-cpu0"; 122 + gpios = <&pca0 8 GPIO_ACTIVE_LOW>; 123 + linux,code = <2>; 124 + }; 125 + 126 + rear-riser0-presence { 127 + label = "rear-riser0-presence"; 128 + gpios = <&pca0 9 GPIO_ACTIVE_LOW>; 129 + linux,code = <3>; 130 + }; 131 + 132 + fault-pvddq-cpu0 { 133 + label = "fault-pvddq-cpu0"; 134 + gpios = <&pca0 10 GPIO_ACTIVE_LOW>; 135 + linux,code = <4>; 136 + }; 137 + 138 + alrt-pvddq-cpu1 { 139 + label = "alrt-pvddq-cpu1"; 140 + gpios = <&pca0 11 GPIO_ACTIVE_LOW>; 141 + linux,code = <5>; 142 + }; 143 + 144 + fault-pvddq-cpu1 { 145 + label = "alrt-pvddq-cpu1"; 146 + gpios = <&pca0 12 GPIO_ACTIVE_LOW>; 147 + linux,code = <6>; 148 + }; 149 + 150 + fault-pvccin-cpu1 { 151 + label = "fault-pvccin-cpuq"; 152 + gpios = <&pca0 13 GPIO_ACTIVE_LOW>; 153 + linux,code = <7>; 154 + }; 155 + 156 + bmc-rom0-wp { 157 + label = "bmc-rom0-wp"; 158 + gpios = <&pca1 0 GPIO_ACTIVE_LOW>; 159 + linux,code = <8>; 160 + }; 161 + 162 + bmc-rom1-wp { 163 + label = "bmc-rom1-wp"; 164 + gpios = <&pca1 1 GPIO_ACTIVE_LOW>; 165 + linux,code = <9>; 166 + }; 167 + 168 + fan0-presence { 169 + label = "fan0-presence"; 170 + gpios = <&pca1 2 GPIO_ACTIVE_LOW>; 171 + linux,code = <10>; 172 + }; 173 + 174 + fan1-presence { 175 + label = "fan1-presence"; 176 + gpios = <&pca1 3 GPIO_ACTIVE_LOW>; 177 + linux,code = <11>; 178 + }; 179 + 180 + fan2-presence { 181 + label = "fan2-presence"; 182 + gpios = <&pca1 4 GPIO_ACTIVE_LOW>; 183 + linux,code = <12>; 184 + }; 185 + 186 + fan3-presence { 187 + label = "fan3-presence"; 188 + gpios = <&pca1 5 GPIO_ACTIVE_LOW>; 189 + linux,code = <13>; 190 + }; 191 + 192 + fan4-presence { 193 + label = "fan4-presence"; 194 + gpios = <&pca1 6 GPIO_ACTIVE_LOW>; 195 + linux,code = <14>; 196 + }; 197 + 198 + fan5-presence { 199 + label = "fan5-presence"; 200 + gpios = <&pca1 7 GPIO_ACTIVE_LOW>; 201 + linux,code = <15>; 202 + }; 203 + 204 + front-bp1-presence { 205 + label = "front-bp1-presence"; 206 + gpios = <&pca1 8 GPIO_ACTIVE_LOW>; 207 + linux,code = <16>; 208 + }; 209 + 210 + rear-bp-presence { 211 + label = "rear-bp-presence"; 212 + gpios = <&pca1 9 GPIO_ACTIVE_LOW>; 213 + linux,code = <17>; 214 + }; 215 + 216 + fault-pvccin-cpu0 { 217 + label = "fault-pvccin-cpu0"; 218 + gpios = <&pca1 10 GPIO_ACTIVE_LOW>; 219 + linux,code = <18>; 220 + }; 221 + 222 + alrt-p1v05-pvcc { 223 + label = "alrt-p1v05-pvcc1"; 224 + gpios = <&pca1 11 GPIO_ACTIVE_LOW>; 225 + linux,code = <19>; 226 + }; 227 + 228 + fault-p1v05-pvccio { 229 + label = "alrt-p1v05-pvcc1"; 230 + gpios = <&pca1 12 GPIO_ACTIVE_LOW>; 231 + linux,code = <20>; 232 + }; 233 + 234 + alrt-p1v8-pvccio { 235 + label = "alrt-p1v8-pvccio"; 236 + gpios = <&pca1 13 GPIO_ACTIVE_LOW>; 237 + linux,code = <21>; 238 + }; 239 + 240 + fault-p1v8-pvccio { 241 + label = "fault-p1v8-pvccio"; 242 + gpios = <&pca1 14 GPIO_ACTIVE_LOW>; 243 + linux,code = <22>; 244 + }; 245 + 246 + front-bp0-presence { 247 + label = "front-bp0-presence"; 248 + gpios = <&pca1 15 GPIO_ACTIVE_LOW>; 249 + linux,code = <23>; 250 + }; 251 + }; 252 + }; 253 + 254 + &fmc { 255 + status = "okay"; 256 + flash@0 { 257 + status = "okay"; 258 + label = "bmc"; 259 + m25p,fast-read; 260 + spi-max-frequency = <50000000>; 261 + #include "openbmc-flash-layout-64.dtsi" 262 + }; 263 + }; 264 + 265 + &spi1 { 266 + status = "okay"; 267 + pinctrl-names = "default"; 268 + pinctrl-0 = <&pinctrl_spi1_default>; 269 + flash@0 { 270 + status = "okay"; 271 + m25p,fast-read; 272 + label = "bios"; 273 + spi-max-frequency = <100000000>; 274 + }; 275 + }; 276 + 277 + &adc { 278 + status = "okay"; 279 + }; 280 + 281 + &gpio { 282 + status = "okay"; 283 + gpio-line-names = 284 + /*A0-A7*/ "SMRST_OCP_N","MAC2_LINK","BMC_CPLD_SMB_RST_R_N","BMC_CPLD_GPIO0", 285 + "","","","", 286 + /*B0-B7*/ "BMC_INIT_R_OK","FM_BOARD_REV_ID2","FM_PROJECT_ID7","FAULT_P12V_STBY_N", 287 + "","CPU0_PROCHOT_LVT3_N","","BIOS_LOAD_DEFAULT_R_N", 288 + /*C0-C7*/ "","","","","","","","", 289 + /*D0-D7*/ "","","","","","","","", 290 + /*E0-E7*/ "FM_PROJECT_ID0","FM_PROJECT_ID1","FM_PROJECT_ID2","FM_PROJECT_ID3", 291 + "FM_PROJECT_ID4","FM_PROJECT_ID5","","", 292 + /*F0-F7*/ "PSU0_PRSNT_N","PSU1_PRSNT_N","","FAULT_P12V_NVME_N", 293 + "BIOS_DEBUG_MODE_R_N","DISABLE_CPU_DDR_R_SPD","COOLING_STRATEGY", 294 + "PCH_GLB_RST_N", 295 + /*G0-G7*/ "P12V_PMBUS_ALERT_N","CPLD_ALERT_N","BMC_RELOAD_N", 296 + "P12V_PVDDQ_PMBUS_ALERT_N","BMC_JTAG_TCK_MUX_R_SEL","","NMI_OUT", 297 + "NMI_BUTTON", 298 + /*H0-H7*/ "BMC_CPLD_JTAG_TDI","BMC_CPLD_JTAG_TDO","BMC_CPLD_JTAG_TCK", 299 + "BMC_CPLD_JTAG_TMS","FM_PROJECT_ID6","FM_BOARD_REV_ID0", 300 + "PCA9546_U70_RST_N","IRQ_SML0_ALERT_N", 301 + /*I0-I7*/ "FAULT_FRONT_RISER_P12V_N","FAULT_OCP_P12V_N","FM_BMC_PCH_SCI_R_N", 302 + "","","","","", 303 + /*J0-J7*/ "FM_CPU0_SKTOCC_N","FM_CPU1_SKTOCC_N","FM_CPU1_DISABLE_COD_N", 304 + "","","","","", 305 + /*K0-K7*/ "","","","","","","","", 306 + /*L0-L7*/ "P12V_FAULT_N","PWRGD_P12V_PCIE_RISER","","LEAKAGE_DETECT_INPUT_N", 307 + "","IRQ_SML1_PMBUS_ALERT_N","","", 308 + /*M0-M7*/ "","","","","","","","", 309 + /*N0-N7*/ "","","","","","","","", 310 + /*O0-O7*/ "","","","","","","","", 311 + /*P0-P7*/ "","","","","","","","", 312 + /*Q0-Q7*/ "","","","","","","FM_PCH_THERMTRIP_N","INTRUDER_N", 313 + /*R0-R7*/ "","PVCCIN_CPU1_SMBALERT_N","BMC_PREQ_R_N","FAULT_P12V_PCIE_RISER_N", 314 + "ALT_P12V_PCIE_RISER_N","BURN_BOARD_N","PVCCIN_CPU0_SMBALERT_N","", 315 + /*S0-S7*/ "BMC_PRDY_N","SIO_POWER_GOOD","FM_BMC_PWR_DEBUG_R_N", 316 + "FM_BMC_XDP_DEBUG_EN","","","","", 317 + /*T0-T7*/ "","","","","","","","", 318 + /*U0-U7*/ "","","","","","","","", 319 + /*V0-V7*/ "","","","","","","","", 320 + /*W0-W7*/ "","","","","","","","", 321 + /*X0-X7*/ "","","","","","","","", 322 + /*Y0-Y7*/ "","PWRGD_PSU0_PWROK","CPU1_PROCHOT_LVT3_N","IRQ_BMC_PCH_SMI_LPC_N", 323 + "","","","", 324 + /*Z0-Z7*/ "XDP_PRSNT_N","BMC_XDP_SYS_PWROK","BMC_XDP_JTAG_SEL", 325 + "PCH_BMC_SMI_ACTIVE_R_N","","","","", 326 + /*AA0-AA7*/ "PWRGD_P12V_STBY_OCP","PS_PWROK","RST_PLTRST_BMC_R_N","HDA_SDO_R", 327 + "FM_SLPS4_R_N","PWRGD_PSU1_PWROK","POWER_BUTTON","POWER_OUT", 328 + /*AB0-AB7*/ "","RESET_OUT","SPI_BIOS_MODE_SELECT","POST_COMPLETE","","","","", 329 + /*AC0-AC7*/ "","","","","","","","CPLD_PLTRST_B_N"; 330 + }; 331 + 332 + &kcs3 { 333 + aspeed,lpc-io-reg = <0xCA2>; 334 + status = "okay"; 335 + }; 336 + 337 + &kcs4 { 338 + aspeed,lpc-io-reg = <0xCA4>; 339 + status = "okay"; 340 + }; 341 + 342 + &lpc_snoop { 343 + snoop-ports = <0x80>; 344 + status = "okay"; 345 + }; 346 + 347 + &uart1 { 348 + status = "okay"; 349 + pinctrl-names = "default"; 350 + pinctrl-0 = <&pinctrl_txd1_default 351 + &pinctrl_rxd1_default 352 + &pinctrl_nrts1_default 353 + &pinctrl_ndtr1_default 354 + &pinctrl_ndsr1_default 355 + &pinctrl_ncts1_default 356 + &pinctrl_ndcd1_default 357 + &pinctrl_nri1_default>; 358 + }; 359 + 360 + &uart2 { 361 + status = "okay"; 362 + pinctrl-names = "default"; 363 + pinctrl-0 = <&pinctrl_txd2_default 364 + &pinctrl_rxd2_default 365 + &pinctrl_nrts2_default 366 + &pinctrl_ndtr2_default 367 + &pinctrl_ndsr2_default 368 + &pinctrl_ncts2_default 369 + &pinctrl_ndcd2_default 370 + &pinctrl_nri2_default>; 371 + }; 372 + 373 + &uart3 { 374 + status = "okay"; 375 + }; 376 + 377 + &uart4 { 378 + status = "okay"; 379 + }; 380 + 381 + &uart5 { 382 + status = "okay"; 383 + }; 384 + 385 + &mac0 { 386 + status = "okay"; 387 + pinctrl-names = "default"; 388 + pinctrl-0 = <&pinctrl_rmii1_default>; 389 + clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>, 390 + <&syscon ASPEED_CLK_MAC1RCLK>; 391 + clock-names = "MACCLK", "RCLK"; 392 + use-ncsi; 393 + }; 394 + 395 + &mac1 { 396 + status = "okay"; 397 + pinctrl-names = "default"; 398 + pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>; 399 + }; 400 + 401 + &i2c0 { 402 + status = "okay"; 403 + }; 404 + 405 + &i2c1 { 406 + status = "okay"; 407 + }; 408 + 409 + &i2c2 { 410 + status = "okay"; 411 + }; 412 + 413 + &i2c3 { 414 + status = "okay"; 415 + i2c-switch@70 { 416 + compatible = "nxp,pca9546"; 417 + reg = <0x70>; 418 + #address-cells = <1>; 419 + #size-cells = <0>; 420 + 421 + channel_3_0: i2c@0 { 422 + #address-cells = <1>; 423 + #size-cells = <0>; 424 + reg = <0>; 425 + }; 426 + 427 + channel_3_1: i2c@1 { 428 + #address-cells = <1>; 429 + #size-cells = <0>; 430 + reg = <1>; 431 + }; 432 + 433 + channel_3_2: i2c@2 { 434 + #address-cells = <1>; 435 + #size-cells = <0>; 436 + reg = <2>; 437 + }; 438 + 439 + channel_3_3: i2c@3 { 440 + #address-cells = <1>; 441 + #size-cells = <0>; 442 + reg = <3>; 443 + }; 444 + }; 445 + }; 446 + 447 + &i2c4 { 448 + status = "okay"; 449 + 450 + }; 451 + 452 + &i2c5 { 453 + status = "okay"; 454 + }; 455 + 456 + &i2c6 { 457 + status = "okay"; 458 + i2c-switch@72 { 459 + compatible = "nxp,pca9548"; 460 + reg = <0x72>; 461 + #address-cells = <1>; 462 + #size-cells = <0>; 463 + channel_6_0: i2c@0 { 464 + #address-cells = <1>; 465 + #size-cells = <0>; 466 + reg = <0>; 467 + }; 468 + 469 + channel_6_1: i2c@1 { 470 + #address-cells = <1>; 471 + #size-cells = <0>; 472 + reg = <1>; 473 + }; 474 + 475 + channel_6_2: i2c@2 { 476 + #address-cells = <1>; 477 + #size-cells = <0>; 478 + reg = <2>; 479 + }; 480 + 481 + channel_6_3: i2c@3 { 482 + #address-cells = <1>; 483 + #size-cells = <0>; 484 + reg = <3>; 485 + }; 486 + channel_6_4: i2c@4 { 487 + #address-cells = <1>; 488 + #size-cells = <0>; 489 + reg = <4>; 490 + }; 491 + 492 + channel_6_5: i2c@5 { 493 + #address-cells = <1>; 494 + #size-cells = <0>; 495 + reg = <5>; 496 + }; 497 + 498 + channel_6_6: i2c@6 { 499 + #address-cells = <1>; 500 + #size-cells = <0>; 501 + reg = <6>; 502 + }; 503 + 504 + channel_6_7: i2c@7 { 505 + #address-cells = <1>; 506 + #size-cells = <0>; 507 + reg = <7>; 508 + }; 509 + }; 510 + 511 + i2c-switch@70 { 512 + compatible = "nxp,pca9546"; 513 + reg = <0x70>; 514 + #address-cells = <1>; 515 + #size-cells = <0>; 516 + channel_6_8: i2c@0 { 517 + #address-cells = <1>; 518 + #size-cells = <0>; 519 + reg = <0>; 520 + i2c-switch@71 { 521 + compatible = "nxp,pca9546"; 522 + reg = <0x71>; 523 + #address-cells = <1>; 524 + #size-cells = <0>; 525 + channel_6_12: i2c@0 { 526 + #address-cells = <1>; 527 + #size-cells = <0>; 528 + reg = <0>; 529 + 530 + }; 531 + 532 + channel_6_13: i2c@1 { 533 + #address-cells = <1>; 534 + #size-cells = <0>; 535 + reg = <1>; 536 + }; 537 + 538 + channel_6_14: i2c@2 { 539 + #address-cells = <1>; 540 + #size-cells = <0>; 541 + reg = <2>; 542 + }; 543 + 544 + channel_6_15: i2c@3 { 545 + #address-cells = <1>; 546 + #size-cells = <0>; 547 + reg = <3>; 548 + }; 549 + }; 550 + }; 551 + 552 + channel_6_9: i2c@1 { 553 + #address-cells = <1>; 554 + #size-cells = <0>; 555 + reg = <1>; 556 + i2c-switch@71 { 557 + compatible = "nxp,pca9546"; 558 + reg = <0x71>; 559 + #address-cells = <1>; 560 + #size-cells = <0>; 561 + channel_6_16: i2c@0 { 562 + #address-cells = <1>; 563 + #size-cells = <0>; 564 + reg = <0>; 565 + 566 + }; 567 + 568 + channel_6_17: i2c@1 { 569 + #address-cells = <1>; 570 + #size-cells = <0>; 571 + reg = <1>; 572 + }; 573 + 574 + channel_6_18: i2c@2 { 575 + #address-cells = <1>; 576 + #size-cells = <0>; 577 + reg = <2>; 578 + }; 579 + 580 + channel_6_19: i2c@3 { 581 + #address-cells = <1>; 582 + #size-cells = <0>; 583 + reg = <3>; 584 + }; 585 + }; 586 + }; 587 + 588 + channel_6_10: i2c@2 { 589 + #address-cells = <1>; 590 + #size-cells = <0>; 591 + reg = <2>; 592 + i2c-switch@71 { 593 + compatible = "nxp,pca9546"; 594 + reg = <0x71>; 595 + #address-cells = <1>; 596 + #size-cells = <0>; 597 + channel_6_20: i2c@0 { 598 + #address-cells = <1>; 599 + #size-cells = <0>; 600 + reg = <0>; 601 + }; 602 + 603 + channel_6_21: i2c@1 { 604 + #address-cells = <1>; 605 + #size-cells = <0>; 606 + reg = <1>; 607 + }; 608 + 609 + channel_6_22: i2c@2 { 610 + #address-cells = <1>; 611 + #size-cells = <0>; 612 + reg = <2>; 613 + }; 614 + 615 + channel_6_23: i2c@3 { 616 + #address-cells = <1>; 617 + #size-cells = <0>; 618 + reg = <3>; 619 + }; 620 + }; 621 + }; 622 + 623 + channel_6_11: i2c@3 { 624 + #address-cells = <1>; 625 + #size-cells = <0>; 626 + reg = <3>; 627 + i2c-switch@71 { 628 + compatible = "nxp,pca9546"; 629 + reg = <0x71>; 630 + #address-cells = <1>; 631 + #size-cells = <0>; 632 + channel_6_24: i2c@0 { 633 + #address-cells = <1>; 634 + #size-cells = <0>; 635 + reg = <0>; 636 + }; 637 + 638 + channel_6_25: i2c@1 { 639 + #address-cells = <1>; 640 + #size-cells = <0>; 641 + reg = <1>; 642 + }; 643 + }; 644 + }; 645 + }; 646 + }; 647 + 648 + &i2c7 { 649 + status = "okay"; 650 + }; 651 + 652 + &i2c8 { 653 + status = "okay"; 654 + pca0:pca9555@24 { 655 + compatible = "nxp,pca9555"; 656 + reg = <0x24>; 657 + #address-cells = <1>; 658 + #size-cells = <0>; 659 + 660 + gpio-controller; 661 + #gpio-cells = <2>; 662 + gpio@1 { 663 + reg = <1>; 664 + type = <PCA955X_TYPE_GPIO>; 665 + }; 666 + 667 + gpio@8 { 668 + reg = <8>; 669 + type = <PCA955X_TYPE_GPIO>; 670 + }; 671 + 672 + gpio@9 { 673 + reg = <9>; 674 + type = <PCA955X_TYPE_GPIO>; 675 + }; 676 + 677 + gpio@10 { 678 + reg = <10>; 679 + type = <PCA955X_TYPE_GPIO>; 680 + }; 681 + 682 + gpio@11 { 683 + reg = <11>; 684 + type = <PCA955X_TYPE_GPIO>; 685 + }; 686 + 687 + gpio@12 { 688 + reg = <12>; 689 + type = <PCA955X_TYPE_GPIO>; 690 + }; 691 + 692 + gpio@13 { 693 + reg = <13>; 694 + type = <PCA955X_TYPE_GPIO>; 695 + }; 696 + }; 697 + 698 + pca1:pca9555@25 { 699 + compatible = "nxp,pca9555"; 700 + reg = <0x25>; 701 + 702 + #address-cells = <1>; 703 + #size-cells = <0>; 704 + 705 + gpio-controller; 706 + #gpio-cells = <2>; 707 + 708 + gpio@0 { 709 + reg = <0>; 710 + type = <PCA955X_TYPE_GPIO>; 711 + }; 712 + 713 + gpio@1 { 714 + reg = <1>; 715 + type = <PCA955X_TYPE_GPIO>; 716 + }; 717 + 718 + gpio@2 { 719 + reg = <2>; 720 + type = <PCA955X_TYPE_GPIO>; 721 + }; 722 + 723 + gpio@3 { 724 + reg = <3>; 725 + type = <PCA955X_TYPE_GPIO>; 726 + }; 727 + 728 + gpio@4 { 729 + reg = <4>; 730 + type = <PCA955X_TYPE_GPIO>; 731 + }; 732 + 733 + gpio@5 { 734 + reg = <5>; 735 + type = <PCA955X_TYPE_GPIO>; 736 + }; 737 + 738 + gpio@6 { 739 + reg = <6>; 740 + type = <PCA955X_TYPE_GPIO>; 741 + }; 742 + 743 + gpio@7 { 744 + reg = <7>; 745 + type = <PCA955X_TYPE_GPIO>; 746 + }; 747 + gpio@8 { 748 + reg = <8>; 749 + type = <PCA955X_TYPE_GPIO>; 750 + }; 751 + 752 + gpio@9 { 753 + reg = <9>; 754 + type = <PCA955X_TYPE_GPIO>; 755 + }; 756 + 757 + gpio@10 { 758 + reg = <10>; 759 + type = <PCA955X_TYPE_GPIO>; 760 + }; 761 + 762 + gpio@11 { 763 + reg = <11>; 764 + type = <PCA955X_TYPE_GPIO>; 765 + }; 766 + 767 + gpio@12 { 768 + reg = <12>; 769 + type = <PCA955X_TYPE_GPIO>; 770 + }; 771 + 772 + gpio@13 { 773 + reg = <13>; 774 + type = <PCA955X_TYPE_GPIO>; 775 + }; 776 + 777 + gpio@14 { 778 + reg = <14>; 779 + type = <PCA955X_TYPE_GPIO>; 780 + }; 781 + 782 + gpio@15 { 783 + reg = <15>; 784 + type = <PCA955X_TYPE_GPIO>; 785 + }; 786 + }; 787 + }; 788 + 789 + &i2c9 { 790 + status = "okay"; 791 + }; 792 + 793 + &i2c10 { 794 + status = "okay"; 795 + i2c-switch@70 { 796 + compatible = "nxp,pca9546"; 797 + reg = <0x70>; 798 + #address-cells = <1>; 799 + #size-cells = <0>; 800 + channel_10_0: i2c@0 { 801 + #address-cells = <1>; 802 + #size-cells = <0>; 803 + reg = <0>; 804 + }; 805 + 806 + channel_10_1: i2c@1 { 807 + #address-cells = <1>; 808 + #size-cells = <0>; 809 + reg = <1>; 810 + }; 811 + 812 + channel_10_2: i2c@2 { 813 + #address-cells = <1>; 814 + #size-cells = <0>; 815 + reg = <2>; 816 + }; 817 + 818 + channel_10_3: i2c@3 { 819 + #address-cells = <1>; 820 + #size-cells = <0>; 821 + reg = <3>; 822 + }; 823 + }; 824 + 825 + i2c-switch@71 { 826 + compatible = "nxp,pca9546"; 827 + reg = <0x71>; 828 + #address-cells = <1>; 829 + #size-cells = <0>; 830 + channel_10_4: i2c@0 { 831 + #address-cells = <1>; 832 + #size-cells = <0>; 833 + reg = <0>; 834 + }; 835 + 836 + channel_10_5: i2c@1 { 837 + #address-cells = <1>; 838 + #size-cells = <0>; 839 + reg = <1>; 840 + }; 841 + 842 + channel_10_6: i2c@2 { 843 + #address-cells = <1>; 844 + #size-cells = <0>; 845 + reg = <2>; 846 + }; 847 + 848 + channel_10_7: i2c@3 { 849 + #address-cells = <1>; 850 + #size-cells = <0>; 851 + reg = <3>; 852 + }; 853 + }; 854 + }; 855 + 856 + &i2c11 { 857 + status = "okay"; 858 + }; 859 + 860 + &i2c12 { 861 + status = "okay"; 862 + }; 863 + 864 + &i2c13 { 865 + status = "okay"; 866 + }; 867 + 868 + &pwm_tacho { 869 + status = "okay"; 870 + pinctrl-names = "default"; 871 + pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default 872 + &pinctrl_pwm2_default &pinctrl_pwm3_default 873 + &pinctrl_pwm4_default &pinctrl_pwm5_default>; 874 + 875 + fan@0 { 876 + reg = <0x00>; 877 + aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>; 878 + }; 879 + fan@1 { 880 + reg = <0x01>; 881 + aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>; 882 + }; 883 + fan@2 { 884 + reg = <0x02>; 885 + aspeed,fan-tach-ch = /bits/ 8 <0x04 0x05>; 886 + }; 887 + fan@3 { 888 + reg = <0x03>; 889 + aspeed,fan-tach-ch = /bits/ 8 <0x06 0x07>; 890 + }; 891 + fan@4 { 892 + reg = <0x04>; 893 + aspeed,fan-tach-ch = /bits/ 8 <0x08 0x09>; 894 + }; 895 + fan@5 { 896 + reg = <0x05>; 897 + aspeed,fan-tach-ch = /bits/ 8 <0x0a 0x0b>; 898 + }; 899 + }; 900 + 901 + &gpio { 902 + pin_gpio_i3 { 903 + gpio-hog; 904 + gpios = <ASPEED_GPIO(I, 3) GPIO_ACTIVE_LOW>; 905 + output-low; 906 + line-name = "NCSI_BMC_R_SEL"; 907 + }; 908 + 909 + pin_gpio_b6 { 910 + gpio-hog; 911 + gpios = <ASPEED_GPIO(B, 6) GPIO_ACTIVE_LOW>; 912 + output-low; 913 + line-name = "EN_NCSI_SWITCH_N"; 914 + }; 915 + }; 916 + 917 + &video { 918 + status = "okay"; 919 + memory-region = <&video_engine_memory>; 920 + }; 921 + 922 + &vhub { 923 + status = "okay"; 924 + };