tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Disintegrate asm/system.h for CRIS
Disintegrate asm/system.h for CRIS.
Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
cc: linux-cris-kernel@axis.com
+127
-119
-1
arch/cris/arch-v10/drivers/ds1302.c
-1
arch/cris/arch-v10/drivers/ds1302.c
-1
arch/cris/arch-v10/drivers/gpio.c
-1
arch/cris/arch-v10/drivers/gpio.c
-1
arch/cris/arch-v10/drivers/i2c.c
-1
arch/cris/arch-v10/drivers/i2c.c
-1
arch/cris/arch-v10/drivers/pcf8563.c
-1
arch/cris/arch-v10/drivers/pcf8563.c
-1
arch/cris/arch-v10/drivers/sync_serial.c
-1
arch/cris/arch-v10/drivers/sync_serial.c
-1
arch/cris/arch-v10/kernel/debugport.c
-1
arch/cris/arch-v10/kernel/debugport.c
+1
arch/cris/arch-v10/kernel/dma.c
+1
arch/cris/arch-v10/kernel/dma.c
+1
arch/cris/arch-v10/kernel/io_interface_mux.c
+1
arch/cris/arch-v10/kernel/io_interface_mux.c
+1
arch/cris/arch-v10/kernel/process.c
+1
arch/cris/arch-v10/kernel/process.c
-1
arch/cris/arch-v10/kernel/ptrace.c
-1
arch/cris/arch-v10/kernel/ptrace.c
+1
arch/cris/arch-v10/kernel/setup.c
+1
arch/cris/arch-v10/kernel/setup.c
+1
arch/cris/arch-v10/kernel/signal.c
+1
arch/cris/arch-v10/kernel/signal.c
+1
arch/cris/arch-v10/kernel/traps.c
+1
arch/cris/arch-v10/kernel/traps.c
-1
arch/cris/arch-v32/drivers/i2c.c
-1
arch/cris/arch-v32/drivers/i2c.c
-1
arch/cris/arch-v32/drivers/mach-a3/gpio.c
-1
arch/cris/arch-v32/drivers/mach-a3/gpio.c
-1
arch/cris/arch-v32/drivers/mach-fs/gpio.c
-1
arch/cris/arch-v32/drivers/mach-fs/gpio.c
-1
arch/cris/arch-v32/kernel/debugport.c
-1
arch/cris/arch-v32/kernel/debugport.c
-1
arch/cris/arch-v32/kernel/fasttimer.c
-1
arch/cris/arch-v32/kernel/fasttimer.c
-1
arch/cris/arch-v32/kernel/ptrace.c
-1
arch/cris/arch-v32/kernel/ptrace.c
-1
arch/cris/arch-v32/mach-a3/dma.c
-1
arch/cris/arch-v32/mach-a3/dma.c
-1
arch/cris/arch-v32/mach-fs/dma.c
-1
arch/cris/arch-v32/mach-fs/dma.c
+2
arch/cris/include/arch-v10/arch/elf.h
+2
arch/cris/include/arch-v10/arch/elf.h
+2
arch/cris/include/arch-v32/arch/elf.h
+2
arch/cris/include/arch-v32/arch/elf.h
-10
arch/cris/include/arch-v32/arch/system.h
-10
arch/cris/include/arch-v32/arch/system.h
···
34
34
/* Write the user-mode stack pointer. */
35
35
#define wrusp(usp) __asm__ __volatile__ ("move %0, $usp" : : "rm" (usp))
36
36
37
-
#define nop() __asm__ __volatile__ ("nop");
38
-
39
-
#define xchg(ptr,x) \
40
-
((__typeof__(*(ptr)))__xchg((unsigned long) (x),(ptr),sizeof(*(ptr))))
41
-
42
-
#define tas(ptr) (xchg((ptr),1))
43
-
44
-
struct __xchg_dummy { unsigned long a[100]; };
45
-
#define __xg(x) ((struct __xchg_dummy *)(x))
46
-
47
37
#endif /* _ASM_CRIS_ARCH_SYSTEM_H */
+1
-1
arch/cris/include/asm/atomic.h
+1
-1
arch/cris/include/asm/atomic.h
+25
arch/cris/include/asm/barrier.h
+25
arch/cris/include/asm/barrier.h
···
1
+
#ifndef __ASM_CRIS_BARRIER_H
2
+
#define __ASM_CRIS_BARRIER_H
3
+
4
+
#define nop() __asm__ __volatile__ ("nop");
5
+
6
+
#define barrier() __asm__ __volatile__("": : :"memory")
7
+
#define mb() barrier()
8
+
#define rmb() mb()
9
+
#define wmb() mb()
10
+
#define read_barrier_depends() do { } while(0)
11
+
#define set_mb(var, value) do { var = value; mb(); } while (0)
12
+
13
+
#ifdef CONFIG_SMP
14
+
#define smp_mb() mb()
15
+
#define smp_rmb() rmb()
16
+
#define smp_wmb() wmb()
17
+
#define smp_read_barrier_depends() read_barrier_depends()
18
+
#else
19
+
#define smp_mb() barrier()
20
+
#define smp_rmb() barrier()
21
+
#define smp_wmb() barrier()
22
+
#define smp_read_barrier_depends() do { } while(0)
23
+
#endif
24
+
25
+
#endif /* __ASM_CRIS_BARRIER_H */
-1
arch/cris/include/asm/bitops.h
-1
arch/cris/include/asm/bitops.h
+53
arch/cris/include/asm/cmpxchg.h
+53
arch/cris/include/asm/cmpxchg.h
···
1
+
#ifndef __ASM_CRIS_CMPXCHG__
2
+
#define __ASM_CRIS_CMPXCHG__
3
+
4
+
#include <linux/irqflags.h>
5
+
6
+
static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
7
+
{
8
+
/* since Etrax doesn't have any atomic xchg instructions, we need to disable
9
+
irq's (if enabled) and do it with move.d's */
10
+
unsigned long flags,temp;
11
+
local_irq_save(flags); /* save flags, including irq enable bit and shut off irqs */
12
+
switch (size) {
13
+
case 1:
14
+
*((unsigned char *)&temp) = x;
15
+
x = *(unsigned char *)ptr;
16
+
*(unsigned char *)ptr = *((unsigned char *)&temp);
17
+
break;
18
+
case 2:
19
+
*((unsigned short *)&temp) = x;
20
+
x = *(unsigned short *)ptr;
21
+
*(unsigned short *)ptr = *((unsigned short *)&temp);
22
+
break;
23
+
case 4:
24
+
temp = x;
25
+
x = *(unsigned long *)ptr;
26
+
*(unsigned long *)ptr = temp;
27
+
break;
28
+
}
29
+
local_irq_restore(flags); /* restore irq enable bit */
30
+
return x;
31
+
}
32
+
33
+
#define xchg(ptr,x) \
34
+
((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
35
+
36
+
#define tas(ptr) (xchg((ptr),1))
37
+
38
+
#include <asm-generic/cmpxchg-local.h>
39
+
40
+
/*
41
+
* cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
42
+
* them available.
43
+
*/
44
+
#define cmpxchg_local(ptr, o, n) \
45
+
((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
46
+
(unsigned long)(n), sizeof(*(ptr))))
47
+
#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
48
+
49
+
#ifndef CONFIG_SMP
50
+
#include <asm-generic/cmpxchg.h>
51
+
#endif
52
+
53
+
#endif /* __ASM_CRIS_CMPXCHG__ */
+6
arch/cris/include/asm/exec.h
+6
arch/cris/include/asm/exec.h
+10
-1
arch/cris/include/asm/processor.h
+10
-1
arch/cris/include/asm/processor.h
···
10
10
#ifndef __ASM_CRIS_PROCESSOR_H
11
11
#define __ASM_CRIS_PROCESSOR_H
12
12
13
-
#include <asm/system.h>
14
13
#include <asm/page.h>
15
14
#include <asm/ptrace.h>
16
15
#include <arch/processor.h>
16
+
#include <arch/system.h>
17
17
18
18
struct task_struct;
19
19
···
71
71
#define init_stack (init_thread_union.stack)
72
72
73
73
#define cpu_relax() barrier()
74
+
75
+
/*
76
+
* disable hlt during certain critical i/o operations
77
+
*/
78
+
#define HAVE_DISABLE_HLT
79
+
void disable_hlt(void);
80
+
void enable_hlt(void);
81
+
82
+
void default_idle(void);
74
83
75
84
#endif /* __ASM_CRIS_PROCESSOR_H */
+12
arch/cris/include/asm/switch_to.h
+12
arch/cris/include/asm/switch_to.h
···
1
+
#ifndef __ASM_CRIS_SWITCH_TO_H
2
+
#define __ASM_CRIS_SWITCH_TO_H
3
+
4
+
/* the switch_to macro calls resume, an asm function in entry.S which does the actual
5
+
* task switching.
6
+
*/
7
+
8
+
extern struct task_struct *resume(struct task_struct *prev, struct task_struct *next, int);
9
+
#define switch_to(prev,next,last) last = resume(prev,next, \
10
+
(int)&((struct task_struct *)0)->thread)
11
+
12
+
#endif /* __ASM_CRIS_SWITCH_TO_H */
+5
-89
arch/cris/include/asm/system.h
+5
-89
arch/cris/include/asm/system.h
···
1
-
#ifndef __ASM_CRIS_SYSTEM_H
2
-
#define __ASM_CRIS_SYSTEM_H
3
-
4
-
#include <linux/irqflags.h>
5
-
#include <arch/system.h>
6
-
7
-
/* the switch_to macro calls resume, an asm function in entry.S which does the actual
8
-
* task switching.
9
-
*/
10
-
11
-
extern struct task_struct *resume(struct task_struct *prev, struct task_struct *next, int);
12
-
#define switch_to(prev,next,last) last = resume(prev,next, \
13
-
(int)&((struct task_struct *)0)->thread)
14
-
15
-
#define barrier() __asm__ __volatile__("": : :"memory")
16
-
#define mb() barrier()
17
-
#define rmb() mb()
18
-
#define wmb() mb()
19
-
#define read_barrier_depends() do { } while(0)
20
-
#define set_mb(var, value) do { var = value; mb(); } while (0)
21
-
22
-
#ifdef CONFIG_SMP
23
-
#define smp_mb() mb()
24
-
#define smp_rmb() rmb()
25
-
#define smp_wmb() wmb()
26
-
#define smp_read_barrier_depends() read_barrier_depends()
27
-
#else
28
-
#define smp_mb() barrier()
29
-
#define smp_rmb() barrier()
30
-
#define smp_wmb() barrier()
31
-
#define smp_read_barrier_depends() do { } while(0)
32
-
#endif
33
-
34
-
#define iret()
35
-
36
-
/*
37
-
* disable hlt during certain critical i/o operations
38
-
*/
39
-
#define HAVE_DISABLE_HLT
40
-
void disable_hlt(void);
41
-
void enable_hlt(void);
42
-
43
-
static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
44
-
{
45
-
/* since Etrax doesn't have any atomic xchg instructions, we need to disable
46
-
irq's (if enabled) and do it with move.d's */
47
-
unsigned long flags,temp;
48
-
local_irq_save(flags); /* save flags, including irq enable bit and shut off irqs */
49
-
switch (size) {
50
-
case 1:
51
-
*((unsigned char *)&temp) = x;
52
-
x = *(unsigned char *)ptr;
53
-
*(unsigned char *)ptr = *((unsigned char *)&temp);
54
-
break;
55
-
case 2:
56
-
*((unsigned short *)&temp) = x;
57
-
x = *(unsigned short *)ptr;
58
-
*(unsigned short *)ptr = *((unsigned short *)&temp);
59
-
break;
60
-
case 4:
61
-
temp = x;
62
-
x = *(unsigned long *)ptr;
63
-
*(unsigned long *)ptr = temp;
64
-
break;
65
-
}
66
-
local_irq_restore(flags); /* restore irq enable bit */
67
-
return x;
68
-
}
69
-
70
-
#include <asm-generic/cmpxchg-local.h>
71
-
72
-
/*
73
-
* cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
74
-
* them available.
75
-
*/
76
-
#define cmpxchg_local(ptr, o, n) \
77
-
((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
78
-
(unsigned long)(n), sizeof(*(ptr))))
79
-
#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
80
-
81
-
#ifndef CONFIG_SMP
82
-
#include <asm-generic/cmpxchg.h>
83
-
#endif
84
-
85
-
#define arch_align_stack(x) (x)
86
-
87
-
void default_idle(void);
88
-
89
-
#endif
1
+
/* FILE TO BE DELETED. DO NOT ADD STUFF HERE! */
2
+
#include <asm/barrier.h>
3
+
#include <asm/cmpxchg.h>
4
+
#include <asm/exec.h>
5
+
#include <asm/switch_to.h>
+1
arch/cris/kernel/irq.c
+1
arch/cris/kernel/irq.c
-1
arch/cris/kernel/process.c
-1
arch/cris/kernel/process.c
-1
arch/cris/kernel/ptrace.c
-1
arch/cris/kernel/ptrace.c
+1
arch/cris/kernel/setup.c
+1
arch/cris/kernel/setup.c
+1
arch/cris/kernel/traps.c
+1
arch/cris/kernel/traps.c
+1
arch/cris/mm/fault.c
+1
arch/cris/mm/fault.c