Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: prima2: move to use REGMAP APIs for rtciobrg

all devices behind rtciobrg needs a special way to access. currently they
are using a platform-specific API.
this patch moves to REGMAP, then clients can use regmap APIs to read/write.
for the moment, old APIs are still kept, once all clients move to regmap,
old APIs will be dropped.

this patch also does minor clean for comments, authors statement.

Signed-off-by: Guo Zeng <Guo.Zeng@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>

authored by

Guo Zeng and committed by
Barry Song
b1999477 b787f68c

+50 -3
+1
arch/arm/mach-prima2/Kconfig
··· 4 4 select ARCH_REQUIRE_GPIOLIB 5 5 select GENERIC_IRQ_CHIP 6 6 select NO_IOPORT_MAP 7 + select REGMAP 7 8 select PINCTRL 8 9 select PINCTRL_SIRF 9 10 help
+45 -3
arch/arm/mach-prima2/rtciobrg.c
··· 1 1 /* 2 - * RTC I/O Bridge interfaces for CSR SiRFprimaII 2 + * RTC I/O Bridge interfaces for CSR SiRFprimaII/atlas7 3 3 * ARM access the registers of SYSRTC, GPSRTC and PWRC through this module 4 4 * 5 5 * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. ··· 10 10 #include <linux/kernel.h> 11 11 #include <linux/module.h> 12 12 #include <linux/io.h> 13 + #include <linux/regmap.h> 13 14 #include <linux/of.h> 14 15 #include <linux/of_address.h> 15 16 #include <linux/of_device.h> ··· 67 66 { 68 67 unsigned long flags, val; 69 68 69 + /* TODO: add hwspinlock to sync with M3 */ 70 70 spin_lock_irqsave(&rtciobrg_lock, flags); 71 71 72 72 val = __sirfsoc_rtc_iobrg_readl(addr); ··· 92 90 { 93 91 unsigned long flags; 94 92 93 + /* TODO: add hwspinlock to sync with M3 */ 95 94 spin_lock_irqsave(&rtciobrg_lock, flags); 96 95 97 96 sirfsoc_rtc_iobrg_pre_writel(val, addr); ··· 104 101 spin_unlock_irqrestore(&rtciobrg_lock, flags); 105 102 } 106 103 EXPORT_SYMBOL_GPL(sirfsoc_rtc_iobrg_writel); 104 + 105 + 106 + static int regmap_iobg_regwrite(void *context, unsigned int reg, 107 + unsigned int val) 108 + { 109 + sirfsoc_rtc_iobrg_writel(val, reg); 110 + return 0; 111 + } 112 + 113 + static int regmap_iobg_regread(void *context, unsigned int reg, 114 + unsigned int *val) 115 + { 116 + *val = (u32)sirfsoc_rtc_iobrg_readl(reg); 117 + return 0; 118 + } 119 + 120 + static struct regmap_bus regmap_iobg = { 121 + .reg_write = regmap_iobg_regwrite, 122 + .reg_read = regmap_iobg_regread, 123 + }; 124 + 125 + /** 126 + * devm_regmap_init_iobg(): Initialise managed register map 127 + * 128 + * @iobg: Device that will be interacted with 129 + * @config: Configuration for register map 130 + * 131 + * The return value will be an ERR_PTR() on error or a valid pointer 132 + * to a struct regmap. The regmap will be automatically freed by the 133 + * device management code. 134 + */ 135 + struct regmap *devm_regmap_init_iobg(struct device *dev, 136 + const struct regmap_config *config) 137 + { 138 + const struct regmap_bus *bus = &regmap_iobg; 139 + 140 + return devm_regmap_init(dev, bus, dev, config); 141 + } 142 + EXPORT_SYMBOL_GPL(devm_regmap_init_iobg); 107 143 108 144 static const struct of_device_id rtciobrg_ids[] = { 109 145 { .compatible = "sirf,prima2-rtciobg" }, ··· 174 132 } 175 133 postcore_initcall(sirfsoc_rtciobrg_init); 176 134 177 - MODULE_AUTHOR("Zhiwu Song <zhiwu.song@csr.com>, " 178 - "Barry Song <baohua.song@csr.com>"); 135 + MODULE_AUTHOR("Zhiwu Song <zhiwu.song@csr.com>"); 136 + MODULE_AUTHOR("Barry Song <baohua.song@csr.com>"); 179 137 MODULE_DESCRIPTION("CSR SiRFprimaII rtc io bridge"); 180 138 MODULE_LICENSE("GPL v2");
+4
include/linux/rtc/sirfsoc_rtciobrg.h
··· 9 9 #ifndef _SIRFSOC_RTC_IOBRG_H_ 10 10 #define _SIRFSOC_RTC_IOBRG_H_ 11 11 12 + struct regmap_config; 13 + 12 14 extern void sirfsoc_rtc_iobrg_besyncing(void); 13 15 14 16 extern u32 sirfsoc_rtc_iobrg_readl(u32 addr); 15 17 16 18 extern void sirfsoc_rtc_iobrg_writel(u32 val, u32 addr); 19 + struct regmap *devm_regmap_init_iobg(struct device *dev, 20 + const struct regmap_config *config); 17 21 18 22 #endif